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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi %s -o - | FileCheck %s3; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-one-lfence-per-bb %s -o - | FileCheck %s --check-prefix=X86-ONE-LFENCE4; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-omit-branch-lfences %s -o - | FileCheck %s --check-prefix=X86-OMIT-BR5; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-only-lfence-non-const %s -o - | FileCheck %s --check-prefix=X86-NON-CONST6 7define dso_local void @_Z4buzzv() {8; CHECK-LABEL: _Z4buzzv:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: lfence11; CHECK-NEXT: movl $10, -{{[0-9]+}}(%rsp)12; CHECK-NEXT: retq13;14; X86-ONE-LFENCE-LABEL: _Z4buzzv:15; X86-ONE-LFENCE: # %bb.0: # %entry16; X86-ONE-LFENCE-NEXT: lfence17; X86-ONE-LFENCE-NEXT: movl $10, -{{[0-9]+}}(%rsp)18; X86-ONE-LFENCE-NEXT: retq19;20; X86-OMIT-BR-LABEL: _Z4buzzv:21; X86-OMIT-BR: # %bb.0: # %entry22; X86-OMIT-BR-NEXT: lfence23; X86-OMIT-BR-NEXT: movl $10, -{{[0-9]+}}(%rsp)24; X86-OMIT-BR-NEXT: retq25;26; X86-NON-CONST-LABEL: _Z4buzzv:27; X86-NON-CONST: # %bb.0: # %entry28; X86-NON-CONST-NEXT: lfence29; X86-NON-CONST-NEXT: movl $10, -{{[0-9]+}}(%rsp)30; X86-NON-CONST-NEXT: retq31entry:32 %a = alloca i32, align 433 store i32 10, ptr %a, align 434 ret void35}36 37define dso_local i32 @_Z3barPi(ptr %p) {38; CHECK-LABEL: _Z3barPi:39; CHECK: # %bb.0: # %entry40; CHECK-NEXT: lfence41; CHECK-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)42; CHECK-NEXT: lfence43; CHECK-NEXT: movl $4, -{{[0-9]+}}(%rsp)44; CHECK-NEXT: lfence45; CHECK-NEXT: cmpl $3, (%rdi)46; CHECK-NEXT: lfence47; CHECK-NEXT: jg .LBB1_248; CHECK-NEXT: # %bb.1: # %if.then49; CHECK-NEXT: lfence50; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax51; CHECK-NEXT: lfence52; CHECK-NEXT: movslq (%rax), %rax53; CHECK-NEXT: lfence54; CHECK-NEXT: movl -24(%rsp,%rax,4), %eax55; CHECK-NEXT: lfence56; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)57; CHECK-NEXT: lfence58; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax59; CHECK-NEXT: retq60; CHECK-NEXT: .LBB1_2: # %if.else61; CHECK-NEXT: lfence62; CHECK-NEXT: movl $-1, -{{[0-9]+}}(%rsp)63; CHECK-NEXT: lfence64; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax65; CHECK-NEXT: retq66;67; X86-ONE-LFENCE-LABEL: _Z3barPi:68; X86-ONE-LFENCE: # %bb.0: # %entry69; X86-ONE-LFENCE-NEXT: lfence70; X86-ONE-LFENCE-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)71; X86-ONE-LFENCE-NEXT: movl $4, -{{[0-9]+}}(%rsp)72; X86-ONE-LFENCE-NEXT: cmpl $3, (%rdi)73; X86-ONE-LFENCE-NEXT: jg .LBB1_274; X86-ONE-LFENCE-NEXT: # %bb.1: # %if.then75; X86-ONE-LFENCE-NEXT: lfence76; X86-ONE-LFENCE-NEXT: movq -{{[0-9]+}}(%rsp), %rax77; X86-ONE-LFENCE-NEXT: movslq (%rax), %rax78; X86-ONE-LFENCE-NEXT: movl -24(%rsp,%rax,4), %eax79; X86-ONE-LFENCE-NEXT: movl %eax, -{{[0-9]+}}(%rsp)80; X86-ONE-LFENCE-NEXT: movl -{{[0-9]+}}(%rsp), %eax81; X86-ONE-LFENCE-NEXT: retq82; X86-ONE-LFENCE-NEXT: .LBB1_2: # %if.else83; X86-ONE-LFENCE-NEXT: lfence84; X86-ONE-LFENCE-NEXT: movl $-1, -{{[0-9]+}}(%rsp)85; X86-ONE-LFENCE-NEXT: movl -{{[0-9]+}}(%rsp), %eax86; X86-ONE-LFENCE-NEXT: retq87;88; X86-OMIT-BR-LABEL: _Z3barPi:89; X86-OMIT-BR: # %bb.0: # %entry90; X86-OMIT-BR-NEXT: lfence91; X86-OMIT-BR-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)92; X86-OMIT-BR-NEXT: lfence93; X86-OMIT-BR-NEXT: movl $4, -{{[0-9]+}}(%rsp)94; X86-OMIT-BR-NEXT: lfence95; X86-OMIT-BR-NEXT: cmpl $3, (%rdi)96; X86-OMIT-BR-NEXT: jg .LBB1_297; X86-OMIT-BR-NEXT: # %bb.1: # %if.then98; X86-OMIT-BR-NEXT: lfence99; X86-OMIT-BR-NEXT: movq -{{[0-9]+}}(%rsp), %rax100; X86-OMIT-BR-NEXT: lfence101; X86-OMIT-BR-NEXT: movslq (%rax), %rax102; X86-OMIT-BR-NEXT: lfence103; X86-OMIT-BR-NEXT: movl -24(%rsp,%rax,4), %eax104; X86-OMIT-BR-NEXT: lfence105; X86-OMIT-BR-NEXT: movl %eax, -{{[0-9]+}}(%rsp)106; X86-OMIT-BR-NEXT: lfence107; X86-OMIT-BR-NEXT: movl -{{[0-9]+}}(%rsp), %eax108; X86-OMIT-BR-NEXT: retq109; X86-OMIT-BR-NEXT: .LBB1_2: # %if.else110; X86-OMIT-BR-NEXT: lfence111; X86-OMIT-BR-NEXT: movl $-1, -{{[0-9]+}}(%rsp)112; X86-OMIT-BR-NEXT: lfence113; X86-OMIT-BR-NEXT: movl -{{[0-9]+}}(%rsp), %eax114; X86-OMIT-BR-NEXT: retq115;116; X86-NON-CONST-LABEL: _Z3barPi:117; X86-NON-CONST: # %bb.0: # %entry118; X86-NON-CONST-NEXT: lfence119; X86-NON-CONST-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)120; X86-NON-CONST-NEXT: lfence121; X86-NON-CONST-NEXT: movl $4, -{{[0-9]+}}(%rsp)122; X86-NON-CONST-NEXT: lfence123; X86-NON-CONST-NEXT: cmpl $3, (%rdi)124; X86-NON-CONST-NEXT: lfence125; X86-NON-CONST-NEXT: jg .LBB1_2126; X86-NON-CONST-NEXT: # %bb.1: # %if.then127; X86-NON-CONST-NEXT: lfence128; X86-NON-CONST-NEXT: movq -{{[0-9]+}}(%rsp), %rax129; X86-NON-CONST-NEXT: lfence130; X86-NON-CONST-NEXT: movslq (%rax), %rax131; X86-NON-CONST-NEXT: lfence132; X86-NON-CONST-NEXT: movl -24(%rsp,%rax,4), %eax133; X86-NON-CONST-NEXT: lfence134; X86-NON-CONST-NEXT: movl %eax, -{{[0-9]+}}(%rsp)135; X86-NON-CONST-NEXT: lfence136; X86-NON-CONST-NEXT: movl -{{[0-9]+}}(%rsp), %eax137; X86-NON-CONST-NEXT: retq138; X86-NON-CONST-NEXT: .LBB1_2: # %if.else139; X86-NON-CONST-NEXT: lfence140; X86-NON-CONST-NEXT: movl $-1, -{{[0-9]+}}(%rsp)141; X86-NON-CONST-NEXT: lfence142; X86-NON-CONST-NEXT: movl -{{[0-9]+}}(%rsp), %eax143; X86-NON-CONST-NEXT: retq144entry:145 %retval = alloca i32, align 4146 %p.addr = alloca ptr, align 8147 %a = alloca [4 x i32], align 16148 %len = alloca i32, align 4149 store ptr %p, ptr %p.addr, align 8150 store i32 4, ptr %len, align 4151 %0 = load ptr, ptr %p.addr, align 8152 %1 = load i32, ptr %0, align 4153 %2 = load i32, ptr %len, align 4154 %cmp = icmp slt i32 %1, %2155 br i1 %cmp, label %if.then, label %if.else156 157if.then: ; preds = %entry158 %3 = load ptr, ptr %p.addr, align 8159 %4 = load i32, ptr %3, align 4160 %idxprom = sext i32 %4 to i64161 %arrayidx = getelementptr inbounds [4 x i32], ptr %a, i64 0, i64 %idxprom162 %5 = load i32, ptr %arrayidx, align 4163 store i32 %5, ptr %retval, align 4164 br label %return165 166if.else: ; preds = %entry167 store i32 -1, ptr %retval, align 4168 br label %return169 170return: ; preds = %if.else, %if.then171 %6 = load i32, ptr %retval, align 4172 ret i32 %6173}174 175define dso_local ptr @_Z3bazv() {176; CHECK-LABEL: _Z3bazv:177; CHECK: # %bb.0: # %entry178; CHECK-NEXT: lfence179; CHECK-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)180; CHECK-NEXT: lfence181; CHECK-NEXT: #APP182; CHECK-NEXT: #NO_APP183; CHECK-NEXT: lfence184; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax185; CHECK-NEXT: retq186;187; X86-ONE-LFENCE-LABEL: _Z3bazv:188; X86-ONE-LFENCE: # %bb.0: # %entry189; X86-ONE-LFENCE-NEXT: lfence190; X86-ONE-LFENCE-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)191; X86-ONE-LFENCE-NEXT: #APP192; X86-ONE-LFENCE-NEXT: #NO_APP193; X86-ONE-LFENCE-NEXT: movq -{{[0-9]+}}(%rsp), %rax194; X86-ONE-LFENCE-NEXT: retq195;196; X86-OMIT-BR-LABEL: _Z3bazv:197; X86-OMIT-BR: # %bb.0: # %entry198; X86-OMIT-BR-NEXT: lfence199; X86-OMIT-BR-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)200; X86-OMIT-BR-NEXT: lfence201; X86-OMIT-BR-NEXT: #APP202; X86-OMIT-BR-NEXT: #NO_APP203; X86-OMIT-BR-NEXT: lfence204; X86-OMIT-BR-NEXT: movq -{{[0-9]+}}(%rsp), %rax205; X86-OMIT-BR-NEXT: retq206;207; X86-NON-CONST-LABEL: _Z3bazv:208; X86-NON-CONST: # %bb.0: # %entry209; X86-NON-CONST-NEXT: lfence210; X86-NON-CONST-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)211; X86-NON-CONST-NEXT: lfence212; X86-NON-CONST-NEXT: #APP213; X86-NON-CONST-NEXT: #NO_APP214; X86-NON-CONST-NEXT: lfence215; X86-NON-CONST-NEXT: movq -{{[0-9]+}}(%rsp), %rax216; X86-NON-CONST-NEXT: retq217entry:218 %p = alloca ptr, align 8219 store ptr @_Z3barPi, ptr %p, align 8220 call void asm sideeffect "", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(ptr) %p, ptr elementtype(ptr) %p) #3, !srcloc !2221 %0 = load ptr, ptr %p, align 8222 ret ptr %0223}224 225define dso_local void @_Z3fooPi(ptr %p) {226; CHECK-LABEL: _Z3fooPi:227; CHECK: # %bb.0: # %entry228; CHECK-NEXT: subq $24, %rsp229; CHECK-NEXT: .cfi_def_cfa_offset 32230; CHECK-NEXT: lfence231; CHECK-NEXT: movq %rdi, {{[0-9]+}}(%rsp)232; CHECK-NEXT: callq _Z3bazv233; CHECK-NEXT: lfence234; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)235; CHECK-NEXT: lfence236; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rdi237; CHECK-NEXT: callq *%rax238; CHECK-NEXT: addq $24, %rsp239; CHECK-NEXT: .cfi_def_cfa_offset 8240; CHECK-NEXT: retq241;242; X86-ONE-LFENCE-LABEL: _Z3fooPi:243; X86-ONE-LFENCE: # %bb.0: # %entry244; X86-ONE-LFENCE-NEXT: subq $24, %rsp245; X86-ONE-LFENCE-NEXT: .cfi_def_cfa_offset 32246; X86-ONE-LFENCE-NEXT: lfence247; X86-ONE-LFENCE-NEXT: movq %rdi, {{[0-9]+}}(%rsp)248; X86-ONE-LFENCE-NEXT: callq _Z3bazv249; X86-ONE-LFENCE-NEXT: movq %rax, {{[0-9]+}}(%rsp)250; X86-ONE-LFENCE-NEXT: movq {{[0-9]+}}(%rsp), %rdi251; X86-ONE-LFENCE-NEXT: callq *%rax252; X86-ONE-LFENCE-NEXT: addq $24, %rsp253; X86-ONE-LFENCE-NEXT: .cfi_def_cfa_offset 8254; X86-ONE-LFENCE-NEXT: retq255;256; X86-OMIT-BR-LABEL: _Z3fooPi:257; X86-OMIT-BR: # %bb.0: # %entry258; X86-OMIT-BR-NEXT: subq $24, %rsp259; X86-OMIT-BR-NEXT: .cfi_def_cfa_offset 32260; X86-OMIT-BR-NEXT: lfence261; X86-OMIT-BR-NEXT: movq %rdi, {{[0-9]+}}(%rsp)262; X86-OMIT-BR-NEXT: callq _Z3bazv263; X86-OMIT-BR-NEXT: lfence264; X86-OMIT-BR-NEXT: movq %rax, {{[0-9]+}}(%rsp)265; X86-OMIT-BR-NEXT: lfence266; X86-OMIT-BR-NEXT: movq {{[0-9]+}}(%rsp), %rdi267; X86-OMIT-BR-NEXT: callq *%rax268; X86-OMIT-BR-NEXT: addq $24, %rsp269; X86-OMIT-BR-NEXT: .cfi_def_cfa_offset 8270; X86-OMIT-BR-NEXT: retq271;272; X86-NON-CONST-LABEL: _Z3fooPi:273; X86-NON-CONST: # %bb.0: # %entry274; X86-NON-CONST-NEXT: subq $24, %rsp275; X86-NON-CONST-NEXT: .cfi_def_cfa_offset 32276; X86-NON-CONST-NEXT: lfence277; X86-NON-CONST-NEXT: movq %rdi, {{[0-9]+}}(%rsp)278; X86-NON-CONST-NEXT: callq _Z3bazv279; X86-NON-CONST-NEXT: lfence280; X86-NON-CONST-NEXT: movq %rax, {{[0-9]+}}(%rsp)281; X86-NON-CONST-NEXT: lfence282; X86-NON-CONST-NEXT: movq {{[0-9]+}}(%rsp), %rdi283; X86-NON-CONST-NEXT: callq *%rax284; X86-NON-CONST-NEXT: addq $24, %rsp285; X86-NON-CONST-NEXT: .cfi_def_cfa_offset 8286; X86-NON-CONST-NEXT: retq287entry:288 %p.addr = alloca ptr, align 8289 %t = alloca ptr, align 8290 store ptr %p, ptr %p.addr, align 8291 %call = call ptr @_Z3bazv()292 store ptr %call, ptr %t, align 8293 %0 = load ptr, ptr %t, align 8294 %1 = load ptr, ptr %p.addr, align 8295 %call1 = call i32 %0(ptr %1)296 ret void297}298 299!2 = !{i32 233}300