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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE44; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX26; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX5127 8define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) {9; SSE-LABEL: fold_srem_vec_1:10; SSE: # %bb.0:11; SSE-NEXT: pextrw $3, %xmm0, %eax12; SSE-NEXT: movswl %ax, %ecx13; SSE-NEXT: imull $32081, %ecx, %ecx # imm = 0x7D5114; SSE-NEXT: shrl $16, %ecx15; SSE-NEXT: subl %eax, %ecx16; SSE-NEXT: movzwl %cx, %ecx17; SSE-NEXT: movswl %cx, %edx18; SSE-NEXT: shrl $15, %ecx19; SSE-NEXT: sarl $9, %edx20; SSE-NEXT: addl %ecx, %edx21; SSE-NEXT: imull $-1003, %edx, %ecx # imm = 0xFC1522; SSE-NEXT: subl %ecx, %eax23; SSE-NEXT: movd %xmm0, %ecx24; SSE-NEXT: movswl %cx, %edx25; SSE-NEXT: imull $-21385, %edx, %edx # imm = 0xAC7726; SSE-NEXT: shrl $16, %edx27; SSE-NEXT: addl %ecx, %edx28; SSE-NEXT: movzwl %dx, %edx29; SSE-NEXT: movswl %dx, %esi30; SSE-NEXT: shrl $15, %edx31; SSE-NEXT: sarl $6, %esi32; SSE-NEXT: addl %edx, %esi33; SSE-NEXT: imull $95, %esi, %edx34; SSE-NEXT: subl %edx, %ecx35; SSE-NEXT: movd %ecx, %xmm136; SSE-NEXT: pextrw $1, %xmm0, %ecx37; SSE-NEXT: movswl %cx, %edx38; SSE-NEXT: imull $-16913, %edx, %edx # imm = 0xBDEF39; SSE-NEXT: movl %edx, %esi40; SSE-NEXT: shrl $31, %esi41; SSE-NEXT: sarl $21, %edx42; SSE-NEXT: addl %esi, %edx43; SSE-NEXT: imull $-124, %edx, %edx44; SSE-NEXT: subl %edx, %ecx45; SSE-NEXT: pinsrw $1, %ecx, %xmm146; SSE-NEXT: pextrw $2, %xmm0, %ecx47; SSE-NEXT: movswl %cx, %edx48; SSE-NEXT: imull $2675, %edx, %edx # imm = 0xA7349; SSE-NEXT: movl %edx, %esi50; SSE-NEXT: shrl $31, %esi51; SSE-NEXT: sarl $18, %edx52; SSE-NEXT: addl %esi, %edx53; SSE-NEXT: imull $98, %edx, %edx54; SSE-NEXT: subl %edx, %ecx55; SSE-NEXT: pinsrw $2, %ecx, %xmm156; SSE-NEXT: pinsrw $3, %eax, %xmm157; SSE-NEXT: movdqa %xmm1, %xmm058; SSE-NEXT: retq59;60; AVX1OR2-LABEL: fold_srem_vec_1:61; AVX1OR2: # %bb.0:62; AVX1OR2-NEXT: vpextrw $3, %xmm0, %eax63; AVX1OR2-NEXT: movswl %ax, %ecx64; AVX1OR2-NEXT: imull $32081, %ecx, %ecx # imm = 0x7D5165; AVX1OR2-NEXT: shrl $16, %ecx66; AVX1OR2-NEXT: subl %eax, %ecx67; AVX1OR2-NEXT: movzwl %cx, %ecx68; AVX1OR2-NEXT: movswl %cx, %edx69; AVX1OR2-NEXT: shrl $15, %ecx70; AVX1OR2-NEXT: sarl $9, %edx71; AVX1OR2-NEXT: addl %ecx, %edx72; AVX1OR2-NEXT: imull $-1003, %edx, %ecx # imm = 0xFC1573; AVX1OR2-NEXT: subl %ecx, %eax74; AVX1OR2-NEXT: vmovd %xmm0, %ecx75; AVX1OR2-NEXT: movswl %cx, %edx76; AVX1OR2-NEXT: imull $-21385, %edx, %edx # imm = 0xAC7777; AVX1OR2-NEXT: shrl $16, %edx78; AVX1OR2-NEXT: addl %ecx, %edx79; AVX1OR2-NEXT: movzwl %dx, %edx80; AVX1OR2-NEXT: movswl %dx, %esi81; AVX1OR2-NEXT: shrl $15, %edx82; AVX1OR2-NEXT: sarl $6, %esi83; AVX1OR2-NEXT: addl %edx, %esi84; AVX1OR2-NEXT: imull $95, %esi, %edx85; AVX1OR2-NEXT: subl %edx, %ecx86; AVX1OR2-NEXT: vmovd %ecx, %xmm187; AVX1OR2-NEXT: vpextrw $1, %xmm0, %ecx88; AVX1OR2-NEXT: movswl %cx, %edx89; AVX1OR2-NEXT: imull $-16913, %edx, %edx # imm = 0xBDEF90; AVX1OR2-NEXT: movl %edx, %esi91; AVX1OR2-NEXT: shrl $31, %esi92; AVX1OR2-NEXT: sarl $21, %edx93; AVX1OR2-NEXT: addl %esi, %edx94; AVX1OR2-NEXT: imull $-124, %edx, %edx95; AVX1OR2-NEXT: subl %edx, %ecx96; AVX1OR2-NEXT: vpinsrw $1, %ecx, %xmm1, %xmm197; AVX1OR2-NEXT: vpextrw $2, %xmm0, %ecx98; AVX1OR2-NEXT: movswl %cx, %edx99; AVX1OR2-NEXT: imull $2675, %edx, %edx # imm = 0xA73100; AVX1OR2-NEXT: movl %edx, %esi101; AVX1OR2-NEXT: shrl $31, %esi102; AVX1OR2-NEXT: sarl $18, %edx103; AVX1OR2-NEXT: addl %esi, %edx104; AVX1OR2-NEXT: imull $98, %edx, %edx105; AVX1OR2-NEXT: subl %edx, %ecx106; AVX1OR2-NEXT: vpinsrw $2, %ecx, %xmm1, %xmm0107; AVX1OR2-NEXT: vpinsrw $3, %eax, %xmm0, %xmm0108; AVX1OR2-NEXT: retq109;110; AVX512-LABEL: fold_srem_vec_1:111; AVX512: # %bb.0:112; AVX512-NEXT: vpextrw $3, %xmm0, %eax113; AVX512-NEXT: movswl %ax, %ecx114; AVX512-NEXT: imull $32081, %ecx, %ecx # imm = 0x7D51115; AVX512-NEXT: shrl $16, %ecx116; AVX512-NEXT: subl %eax, %ecx117; AVX512-NEXT: movzwl %cx, %edx118; AVX512-NEXT: movswl %dx, %ecx119; AVX512-NEXT: shrl $15, %edx120; AVX512-NEXT: sarl $9, %ecx121; AVX512-NEXT: addl %edx, %ecx122; AVX512-NEXT: vmovd %xmm0, %edx123; AVX512-NEXT: movswl %dx, %esi124; AVX512-NEXT: imull $-21385, %esi, %esi # imm = 0xAC77125; AVX512-NEXT: shrl $16, %esi126; AVX512-NEXT: addl %edx, %esi127; AVX512-NEXT: movzwl %si, %esi128; AVX512-NEXT: movswl %si, %edi129; AVX512-NEXT: shrl $15, %esi130; AVX512-NEXT: sarl $6, %edi131; AVX512-NEXT: addl %esi, %edi132; AVX512-NEXT: imull $95, %edi, %esi133; AVX512-NEXT: subl %esi, %edx134; AVX512-NEXT: vmovd %edx, %xmm1135; AVX512-NEXT: vpextrw $1, %xmm0, %edx136; AVX512-NEXT: movswl %dx, %esi137; AVX512-NEXT: imull $-16913, %esi, %esi # imm = 0xBDEF138; AVX512-NEXT: movl %esi, %edi139; AVX512-NEXT: shrl $31, %edi140; AVX512-NEXT: sarl $21, %esi141; AVX512-NEXT: addl %edi, %esi142; AVX512-NEXT: imull $-1003, %ecx, %ecx # imm = 0xFC15143; AVX512-NEXT: imull $-124, %esi, %esi144; AVX512-NEXT: subl %esi, %edx145; AVX512-NEXT: vpinsrw $1, %edx, %xmm1, %xmm1146; AVX512-NEXT: vpextrw $2, %xmm0, %edx147; AVX512-NEXT: subl %ecx, %eax148; AVX512-NEXT: movswl %dx, %ecx149; AVX512-NEXT: imull $2675, %ecx, %ecx # imm = 0xA73150; AVX512-NEXT: movl %ecx, %esi151; AVX512-NEXT: shrl $31, %esi152; AVX512-NEXT: sarl $18, %ecx153; AVX512-NEXT: addl %esi, %ecx154; AVX512-NEXT: imull $98, %ecx, %ecx155; AVX512-NEXT: subl %ecx, %edx156; AVX512-NEXT: vpinsrw $2, %edx, %xmm1, %xmm0157; AVX512-NEXT: vpinsrw $3, %eax, %xmm0, %xmm0158; AVX512-NEXT: retq159 %1 = srem <4 x i16> %x, <i16 95, i16 -124, i16 98, i16 -1003>160 ret <4 x i16> %1161}162 163define <4 x i16> @fold_srem_vec_2(<4 x i16> %x) {164; SSE-LABEL: fold_srem_vec_2:165; SSE: # %bb.0:166; SSE-NEXT: movdqa {{.*#+}} xmm1 = [44151,44151,44151,44151,44151,44151,44151,44151]167; SSE-NEXT: pmulhw %xmm0, %xmm1168; SSE-NEXT: paddw %xmm0, %xmm1169; SSE-NEXT: movdqa %xmm1, %xmm2170; SSE-NEXT: psrlw $15, %xmm2171; SSE-NEXT: psraw $6, %xmm1172; SSE-NEXT: paddw %xmm2, %xmm1173; SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [95,95,95,95,95,95,95,95]174; SSE-NEXT: psubw %xmm1, %xmm0175; SSE-NEXT: retq176;177; AVX-LABEL: fold_srem_vec_2:178; AVX: # %bb.0:179; AVX-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [44151,44151,44151,44151,44151,44151,44151,44151]180; AVX-NEXT: vpaddw %xmm0, %xmm1, %xmm1181; AVX-NEXT: vpsrlw $15, %xmm1, %xmm2182; AVX-NEXT: vpsraw $6, %xmm1, %xmm1183; AVX-NEXT: vpaddw %xmm2, %xmm1, %xmm1184; AVX-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [95,95,95,95,95,95,95,95]185; AVX-NEXT: vpsubw %xmm1, %xmm0, %xmm0186; AVX-NEXT: retq187 %1 = srem <4 x i16> %x, <i16 95, i16 95, i16 95, i16 95>188 ret <4 x i16> %1189}190 191 192; Don't fold if we can combine srem with sdiv.193define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) {194; SSE2-LABEL: combine_srem_sdiv:195; SSE2: # %bb.0:196; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [44151,44151,44151,44151,44151,44151,44151,44151]197; SSE2-NEXT: pmulhw %xmm0, %xmm1198; SSE2-NEXT: paddw %xmm0, %xmm1199; SSE2-NEXT: movdqa %xmm1, %xmm2200; SSE2-NEXT: psrlw $15, %xmm2201; SSE2-NEXT: psraw $6, %xmm1202; SSE2-NEXT: paddw %xmm2, %xmm1203; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [95,95,95,95,95,95,95,95]204; SSE2-NEXT: pmullw %xmm1, %xmm2205; SSE2-NEXT: psubw %xmm2, %xmm0206; SSE2-NEXT: paddw %xmm1, %xmm0207; SSE2-NEXT: retq208;209; SSE4-LABEL: combine_srem_sdiv:210; SSE4: # %bb.0:211; SSE4-NEXT: movdqa {{.*#+}} xmm1 = [44151,44151,44151,44151,44151,44151,44151,44151]212; SSE4-NEXT: pmulhw %xmm0, %xmm1213; SSE4-NEXT: paddw %xmm0, %xmm1214; SSE4-NEXT: movdqa %xmm1, %xmm2215; SSE4-NEXT: psrlw $15, %xmm2216; SSE4-NEXT: psraw $6, %xmm1217; SSE4-NEXT: paddw %xmm2, %xmm1218; SSE4-NEXT: pmovsxbw {{.*#+}} xmm2 = [95,95,95,95,95,95,95,95]219; SSE4-NEXT: pmullw %xmm1, %xmm2220; SSE4-NEXT: psubw %xmm2, %xmm0221; SSE4-NEXT: paddw %xmm1, %xmm0222; SSE4-NEXT: retq223;224; AVX-LABEL: combine_srem_sdiv:225; AVX: # %bb.0:226; AVX-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [44151,44151,44151,44151,44151,44151,44151,44151]227; AVX-NEXT: vpaddw %xmm0, %xmm1, %xmm1228; AVX-NEXT: vpsrlw $15, %xmm1, %xmm2229; AVX-NEXT: vpsraw $6, %xmm1, %xmm1230; AVX-NEXT: vpaddw %xmm2, %xmm1, %xmm1231; AVX-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2 # [95,95,95,95,95,95,95,95]232; AVX-NEXT: vpsubw %xmm2, %xmm0, %xmm0233; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0234; AVX-NEXT: retq235 %1 = srem <4 x i16> %x, <i16 95, i16 95, i16 95, i16 95>236 %2 = sdiv <4 x i16> %x, <i16 95, i16 95, i16 95, i16 95>237 %3 = add <4 x i16> %1, %2238 ret <4 x i16> %3239}240 241; Don't fold for divisors that are a power of two.242define <4 x i16> @dont_fold_srem_power_of_two(<4 x i16> %x) {243; SSE-LABEL: dont_fold_srem_power_of_two:244; SSE: # %bb.0:245; SSE-NEXT: movdqa %xmm0, %xmm1246; SSE-NEXT: pextrw $1, %xmm0, %eax247; SSE-NEXT: leal 31(%rax), %ecx248; SSE-NEXT: testw %ax, %ax249; SSE-NEXT: cmovnsl %eax, %ecx250; SSE-NEXT: andl $-32, %ecx251; SSE-NEXT: subl %ecx, %eax252; SSE-NEXT: movd %xmm0, %ecx253; SSE-NEXT: leal 63(%rcx), %edx254; SSE-NEXT: testw %cx, %cx255; SSE-NEXT: cmovnsl %ecx, %edx256; SSE-NEXT: andl $-64, %edx257; SSE-NEXT: subl %edx, %ecx258; SSE-NEXT: movd %ecx, %xmm0259; SSE-NEXT: pinsrw $1, %eax, %xmm0260; SSE-NEXT: pextrw $2, %xmm1, %eax261; SSE-NEXT: leal 7(%rax), %ecx262; SSE-NEXT: testw %ax, %ax263; SSE-NEXT: cmovnsl %eax, %ecx264; SSE-NEXT: andl $-8, %ecx265; SSE-NEXT: subl %ecx, %eax266; SSE-NEXT: pinsrw $2, %eax, %xmm0267; SSE-NEXT: pextrw $3, %xmm1, %eax268; SSE-NEXT: movswl %ax, %ecx269; SSE-NEXT: imull $-21385, %ecx, %ecx # imm = 0xAC77270; SSE-NEXT: shrl $16, %ecx271; SSE-NEXT: addl %eax, %ecx272; SSE-NEXT: movzwl %cx, %ecx273; SSE-NEXT: movswl %cx, %edx274; SSE-NEXT: shrl $15, %ecx275; SSE-NEXT: sarl $6, %edx276; SSE-NEXT: addl %ecx, %edx277; SSE-NEXT: imull $95, %edx, %ecx278; SSE-NEXT: subl %ecx, %eax279; SSE-NEXT: pinsrw $3, %eax, %xmm0280; SSE-NEXT: retq281;282; AVX-LABEL: dont_fold_srem_power_of_two:283; AVX: # %bb.0:284; AVX-NEXT: vpextrw $1, %xmm0, %eax285; AVX-NEXT: leal 31(%rax), %ecx286; AVX-NEXT: testw %ax, %ax287; AVX-NEXT: cmovnsl %eax, %ecx288; AVX-NEXT: andl $-32, %ecx289; AVX-NEXT: subl %ecx, %eax290; AVX-NEXT: vmovd %xmm0, %ecx291; AVX-NEXT: leal 63(%rcx), %edx292; AVX-NEXT: testw %cx, %cx293; AVX-NEXT: cmovnsl %ecx, %edx294; AVX-NEXT: andl $-64, %edx295; AVX-NEXT: subl %edx, %ecx296; AVX-NEXT: vmovd %ecx, %xmm1297; AVX-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1298; AVX-NEXT: vpextrw $2, %xmm0, %eax299; AVX-NEXT: leal 7(%rax), %ecx300; AVX-NEXT: testw %ax, %ax301; AVX-NEXT: cmovnsl %eax, %ecx302; AVX-NEXT: andl $-8, %ecx303; AVX-NEXT: subl %ecx, %eax304; AVX-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1305; AVX-NEXT: vpextrw $3, %xmm0, %eax306; AVX-NEXT: movswl %ax, %ecx307; AVX-NEXT: imull $-21385, %ecx, %ecx # imm = 0xAC77308; AVX-NEXT: shrl $16, %ecx309; AVX-NEXT: addl %eax, %ecx310; AVX-NEXT: movzwl %cx, %ecx311; AVX-NEXT: movswl %cx, %edx312; AVX-NEXT: shrl $15, %ecx313; AVX-NEXT: sarl $6, %edx314; AVX-NEXT: addl %ecx, %edx315; AVX-NEXT: imull $95, %edx, %ecx316; AVX-NEXT: subl %ecx, %eax317; AVX-NEXT: vpinsrw $3, %eax, %xmm1, %xmm0318; AVX-NEXT: retq319 %1 = srem <4 x i16> %x, <i16 64, i16 32, i16 8, i16 95>320 ret <4 x i16> %1321}322 323; Don't fold if the divisor is one.324define <4 x i16> @dont_fold_srem_one(<4 x i16> %x) {325; SSE-LABEL: dont_fold_srem_one:326; SSE: # %bb.0:327; SSE-NEXT: pextrw $2, %xmm0, %ecx328; SSE-NEXT: movswl %cx, %eax329; SSE-NEXT: imull $-19945, %eax, %eax # imm = 0xB217330; SSE-NEXT: shrl $16, %eax331; SSE-NEXT: addl %ecx, %eax332; SSE-NEXT: movzwl %ax, %edx333; SSE-NEXT: movswl %dx, %eax334; SSE-NEXT: shrl $15, %edx335; SSE-NEXT: sarl $4, %eax336; SSE-NEXT: addl %edx, %eax337; SSE-NEXT: leal (%rax,%rax,2), %edx338; SSE-NEXT: shll $3, %edx339; SSE-NEXT: subl %edx, %eax340; SSE-NEXT: addl %ecx, %eax341; SSE-NEXT: pextrw $1, %xmm0, %ecx342; SSE-NEXT: movswl %cx, %edx343; SSE-NEXT: imull $12827, %edx, %edx # imm = 0x321B344; SSE-NEXT: movl %edx, %esi345; SSE-NEXT: shrl $31, %esi346; SSE-NEXT: sarl $23, %edx347; SSE-NEXT: addl %esi, %edx348; SSE-NEXT: imull $654, %edx, %edx # imm = 0x28E349; SSE-NEXT: subl %edx, %ecx350; SSE-NEXT: pxor %xmm1, %xmm1351; SSE-NEXT: pinsrw $1, %ecx, %xmm1352; SSE-NEXT: pinsrw $2, %eax, %xmm1353; SSE-NEXT: pextrw $3, %xmm0, %eax354; SSE-NEXT: movswl %ax, %ecx355; SSE-NEXT: imull $12375, %ecx, %ecx # imm = 0x3057356; SSE-NEXT: movl %ecx, %edx357; SSE-NEXT: shrl $31, %edx358; SSE-NEXT: sarl $26, %ecx359; SSE-NEXT: addl %edx, %ecx360; SSE-NEXT: imull $5423, %ecx, %ecx # imm = 0x152F361; SSE-NEXT: subl %ecx, %eax362; SSE-NEXT: pinsrw $3, %eax, %xmm1363; SSE-NEXT: movdqa %xmm1, %xmm0364; SSE-NEXT: retq365;366; AVX-LABEL: dont_fold_srem_one:367; AVX: # %bb.0:368; AVX-NEXT: vpextrw $2, %xmm0, %eax369; AVX-NEXT: movswl %ax, %ecx370; AVX-NEXT: imull $-19945, %ecx, %ecx # imm = 0xB217371; AVX-NEXT: shrl $16, %ecx372; AVX-NEXT: addl %eax, %ecx373; AVX-NEXT: movzwl %cx, %ecx374; AVX-NEXT: movswl %cx, %edx375; AVX-NEXT: shrl $15, %ecx376; AVX-NEXT: sarl $4, %edx377; AVX-NEXT: addl %ecx, %edx378; AVX-NEXT: leal (%rdx,%rdx,2), %ecx379; AVX-NEXT: shll $3, %ecx380; AVX-NEXT: subl %ecx, %edx381; AVX-NEXT: addl %eax, %edx382; AVX-NEXT: vpextrw $1, %xmm0, %eax383; AVX-NEXT: movswl %ax, %ecx384; AVX-NEXT: imull $12827, %ecx, %ecx # imm = 0x321B385; AVX-NEXT: movl %ecx, %esi386; AVX-NEXT: shrl $31, %esi387; AVX-NEXT: sarl $23, %ecx388; AVX-NEXT: addl %esi, %ecx389; AVX-NEXT: imull $654, %ecx, %ecx # imm = 0x28E390; AVX-NEXT: subl %ecx, %eax391; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1392; AVX-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1393; AVX-NEXT: vpinsrw $2, %edx, %xmm1, %xmm1394; AVX-NEXT: vpextrw $3, %xmm0, %eax395; AVX-NEXT: movswl %ax, %ecx396; AVX-NEXT: imull $12375, %ecx, %ecx # imm = 0x3057397; AVX-NEXT: movl %ecx, %edx398; AVX-NEXT: shrl $31, %edx399; AVX-NEXT: sarl $26, %ecx400; AVX-NEXT: addl %edx, %ecx401; AVX-NEXT: imull $5423, %ecx, %ecx # imm = 0x152F402; AVX-NEXT: subl %ecx, %eax403; AVX-NEXT: vpinsrw $3, %eax, %xmm1, %xmm0404; AVX-NEXT: retq405 %1 = srem <4 x i16> %x, <i16 1, i16 654, i16 23, i16 5423>406 ret <4 x i16> %1407}408 409; Don't fold if the divisor is 2^15.410define <4 x i16> @dont_fold_urem_i16_smax(<4 x i16> %x) {411; SSE-LABEL: dont_fold_urem_i16_smax:412; SSE: # %bb.0:413; SSE-NEXT: pextrw $2, %xmm0, %eax414; SSE-NEXT: movswl %ax, %ecx415; SSE-NEXT: imull $-19945, %ecx, %ecx # imm = 0xB217416; SSE-NEXT: shrl $16, %ecx417; SSE-NEXT: addl %eax, %ecx418; SSE-NEXT: movzwl %cx, %ecx419; SSE-NEXT: movswl %cx, %edx420; SSE-NEXT: shrl $15, %ecx421; SSE-NEXT: sarl $4, %edx422; SSE-NEXT: addl %ecx, %edx423; SSE-NEXT: leal (%rdx,%rdx,2), %ecx424; SSE-NEXT: shll $3, %ecx425; SSE-NEXT: subl %ecx, %edx426; SSE-NEXT: addl %eax, %edx427; SSE-NEXT: pextrw $1, %xmm0, %eax428; SSE-NEXT: leal 32767(%rax), %ecx429; SSE-NEXT: testw %ax, %ax430; SSE-NEXT: cmovnsl %eax, %ecx431; SSE-NEXT: andl $-32768, %ecx # imm = 0x8000432; SSE-NEXT: addl %eax, %ecx433; SSE-NEXT: pxor %xmm1, %xmm1434; SSE-NEXT: pinsrw $1, %ecx, %xmm1435; SSE-NEXT: pinsrw $2, %edx, %xmm1436; SSE-NEXT: pextrw $3, %xmm0, %eax437; SSE-NEXT: movswl %ax, %ecx438; SSE-NEXT: imull $12375, %ecx, %ecx # imm = 0x3057439; SSE-NEXT: movl %ecx, %edx440; SSE-NEXT: shrl $31, %edx441; SSE-NEXT: sarl $26, %ecx442; SSE-NEXT: addl %edx, %ecx443; SSE-NEXT: imull $5423, %ecx, %ecx # imm = 0x152F444; SSE-NEXT: subl %ecx, %eax445; SSE-NEXT: pinsrw $3, %eax, %xmm1446; SSE-NEXT: movdqa %xmm1, %xmm0447; SSE-NEXT: retq448;449; AVX-LABEL: dont_fold_urem_i16_smax:450; AVX: # %bb.0:451; AVX-NEXT: vpextrw $2, %xmm0, %eax452; AVX-NEXT: movswl %ax, %ecx453; AVX-NEXT: imull $-19945, %ecx, %ecx # imm = 0xB217454; AVX-NEXT: shrl $16, %ecx455; AVX-NEXT: addl %eax, %ecx456; AVX-NEXT: movzwl %cx, %ecx457; AVX-NEXT: movswl %cx, %edx458; AVX-NEXT: shrl $15, %ecx459; AVX-NEXT: sarl $4, %edx460; AVX-NEXT: addl %ecx, %edx461; AVX-NEXT: leal (%rdx,%rdx,2), %ecx462; AVX-NEXT: shll $3, %ecx463; AVX-NEXT: subl %ecx, %edx464; AVX-NEXT: addl %eax, %edx465; AVX-NEXT: vpextrw $1, %xmm0, %eax466; AVX-NEXT: leal 32767(%rax), %ecx467; AVX-NEXT: testw %ax, %ax468; AVX-NEXT: cmovnsl %eax, %ecx469; AVX-NEXT: andl $-32768, %ecx # imm = 0x8000470; AVX-NEXT: addl %eax, %ecx471; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1472; AVX-NEXT: vpinsrw $1, %ecx, %xmm1, %xmm1473; AVX-NEXT: vpinsrw $2, %edx, %xmm1, %xmm1474; AVX-NEXT: vpextrw $3, %xmm0, %eax475; AVX-NEXT: movswl %ax, %ecx476; AVX-NEXT: imull $12375, %ecx, %ecx # imm = 0x3057477; AVX-NEXT: movl %ecx, %edx478; AVX-NEXT: shrl $31, %edx479; AVX-NEXT: sarl $26, %ecx480; AVX-NEXT: addl %edx, %ecx481; AVX-NEXT: imull $5423, %ecx, %ecx # imm = 0x152F482; AVX-NEXT: subl %ecx, %eax483; AVX-NEXT: vpinsrw $3, %eax, %xmm1, %xmm0484; AVX-NEXT: retq485 %1 = srem <4 x i16> %x, <i16 1, i16 32768, i16 23, i16 5423>486 ret <4 x i16> %1487}488 489; Don't fold i64 srem.490define <4 x i64> @dont_fold_srem_i64(<4 x i64> %x) {491; SSE2-LABEL: dont_fold_srem_i64:492; SSE2: # %bb.0:493; SSE2-NEXT: movdqa %xmm1, %xmm2494; SSE2-NEXT: movq %xmm1, %rcx495; SSE2-NEXT: movabsq $-5614226457215950491, %rdx # imm = 0xB21642C8590B2165496; SSE2-NEXT: movq %rcx, %rax497; SSE2-NEXT: imulq %rdx498; SSE2-NEXT: addq %rcx, %rdx499; SSE2-NEXT: movq %rdx, %rax500; SSE2-NEXT: shrq $63, %rax501; SSE2-NEXT: sarq $4, %rdx502; SSE2-NEXT: addq %rax, %rdx503; SSE2-NEXT: leaq (%rdx,%rdx,2), %rax504; SSE2-NEXT: shlq $3, %rax505; SSE2-NEXT: subq %rax, %rdx506; SSE2-NEXT: addq %rcx, %rdx507; SSE2-NEXT: movq %rdx, %xmm1508; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]509; SSE2-NEXT: movq %xmm2, %rcx510; SSE2-NEXT: movabsq $6966426675817289639, %rdx # imm = 0x60ADB826E5E517A7511; SSE2-NEXT: movq %rcx, %rax512; SSE2-NEXT: imulq %rdx513; SSE2-NEXT: movq %rdx, %rax514; SSE2-NEXT: shrq $63, %rax515; SSE2-NEXT: sarq $11, %rdx516; SSE2-NEXT: addq %rax, %rdx517; SSE2-NEXT: imulq $5423, %rdx, %rax # imm = 0x152F518; SSE2-NEXT: subq %rax, %rcx519; SSE2-NEXT: movq %rcx, %xmm2520; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]521; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]522; SSE2-NEXT: movq %xmm0, %rcx523; SSE2-NEXT: movabsq $7220743857598845893, %rdx # imm = 0x64353C48064353C5524; SSE2-NEXT: movq %rcx, %rax525; SSE2-NEXT: imulq %rdx526; SSE2-NEXT: movq %rdx, %rax527; SSE2-NEXT: shrq $63, %rax528; SSE2-NEXT: sarq $8, %rdx529; SSE2-NEXT: addq %rax, %rdx530; SSE2-NEXT: imulq $654, %rdx, %rax # imm = 0x28E531; SSE2-NEXT: subq %rax, %rcx532; SSE2-NEXT: movq %rcx, %xmm0533; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]534; SSE2-NEXT: retq535;536; SSE4-LABEL: dont_fold_srem_i64:537; SSE4: # %bb.0:538; SSE4-NEXT: movdqa %xmm1, %xmm2539; SSE4-NEXT: movq %xmm1, %rcx540; SSE4-NEXT: movabsq $-5614226457215950491, %rdx # imm = 0xB21642C8590B2165541; SSE4-NEXT: movq %rcx, %rax542; SSE4-NEXT: imulq %rdx543; SSE4-NEXT: addq %rcx, %rdx544; SSE4-NEXT: movq %rdx, %rax545; SSE4-NEXT: shrq $63, %rax546; SSE4-NEXT: sarq $4, %rdx547; SSE4-NEXT: addq %rax, %rdx548; SSE4-NEXT: leaq (%rdx,%rdx,2), %rax549; SSE4-NEXT: shlq $3, %rax550; SSE4-NEXT: subq %rax, %rdx551; SSE4-NEXT: addq %rcx, %rdx552; SSE4-NEXT: movq %rdx, %xmm1553; SSE4-NEXT: pextrq $1, %xmm2, %rcx554; SSE4-NEXT: movabsq $6966426675817289639, %rdx # imm = 0x60ADB826E5E517A7555; SSE4-NEXT: movq %rcx, %rax556; SSE4-NEXT: imulq %rdx557; SSE4-NEXT: movq %rdx, %rax558; SSE4-NEXT: shrq $63, %rax559; SSE4-NEXT: sarq $11, %rdx560; SSE4-NEXT: addq %rax, %rdx561; SSE4-NEXT: imulq $5423, %rdx, %rax # imm = 0x152F562; SSE4-NEXT: subq %rax, %rcx563; SSE4-NEXT: movq %rcx, %xmm2564; SSE4-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]565; SSE4-NEXT: pextrq $1, %xmm0, %rcx566; SSE4-NEXT: movabsq $7220743857598845893, %rdx # imm = 0x64353C48064353C5567; SSE4-NEXT: movq %rcx, %rax568; SSE4-NEXT: imulq %rdx569; SSE4-NEXT: movq %rdx, %rax570; SSE4-NEXT: shrq $63, %rax571; SSE4-NEXT: sarq $8, %rdx572; SSE4-NEXT: addq %rax, %rdx573; SSE4-NEXT: imulq $654, %rdx, %rax # imm = 0x28E574; SSE4-NEXT: subq %rax, %rcx575; SSE4-NEXT: movq %rcx, %xmm0576; SSE4-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]577; SSE4-NEXT: retq578;579; AVX1-LABEL: dont_fold_srem_i64:580; AVX1: # %bb.0:581; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1582; AVX1-NEXT: vmovq %xmm1, %rcx583; AVX1-NEXT: movabsq $-5614226457215950491, %rdx # imm = 0xB21642C8590B2165584; AVX1-NEXT: movq %rcx, %rax585; AVX1-NEXT: imulq %rdx586; AVX1-NEXT: addq %rcx, %rdx587; AVX1-NEXT: movq %rdx, %rax588; AVX1-NEXT: shrq $63, %rax589; AVX1-NEXT: sarq $4, %rdx590; AVX1-NEXT: addq %rax, %rdx591; AVX1-NEXT: leaq (%rdx,%rdx,2), %rax592; AVX1-NEXT: shlq $3, %rax593; AVX1-NEXT: subq %rax, %rdx594; AVX1-NEXT: addq %rcx, %rdx595; AVX1-NEXT: vmovq %rdx, %xmm2596; AVX1-NEXT: vpextrq $1, %xmm1, %rcx597; AVX1-NEXT: movabsq $6966426675817289639, %rdx # imm = 0x60ADB826E5E517A7598; AVX1-NEXT: movq %rcx, %rax599; AVX1-NEXT: imulq %rdx600; AVX1-NEXT: movq %rdx, %rax601; AVX1-NEXT: shrq $63, %rax602; AVX1-NEXT: sarq $11, %rdx603; AVX1-NEXT: addq %rax, %rdx604; AVX1-NEXT: imulq $5423, %rdx, %rax # imm = 0x152F605; AVX1-NEXT: subq %rax, %rcx606; AVX1-NEXT: vmovq %rcx, %xmm1607; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]608; AVX1-NEXT: vpextrq $1, %xmm0, %rcx609; AVX1-NEXT: movabsq $7220743857598845893, %rdx # imm = 0x64353C48064353C5610; AVX1-NEXT: movq %rcx, %rax611; AVX1-NEXT: imulq %rdx612; AVX1-NEXT: movq %rdx, %rax613; AVX1-NEXT: shrq $63, %rax614; AVX1-NEXT: sarq $8, %rdx615; AVX1-NEXT: addq %rax, %rdx616; AVX1-NEXT: imulq $654, %rdx, %rax # imm = 0x28E617; AVX1-NEXT: subq %rax, %rcx618; AVX1-NEXT: vmovq %rcx, %xmm0619; AVX1-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]620; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0621; AVX1-NEXT: retq622;623; AVX2-LABEL: dont_fold_srem_i64:624; AVX2: # %bb.0:625; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1626; AVX2-NEXT: vmovq %xmm1, %rcx627; AVX2-NEXT: movabsq $-5614226457215950491, %rdx # imm = 0xB21642C8590B2165628; AVX2-NEXT: movq %rcx, %rax629; AVX2-NEXT: imulq %rdx630; AVX2-NEXT: addq %rcx, %rdx631; AVX2-NEXT: movq %rdx, %rax632; AVX2-NEXT: shrq $63, %rax633; AVX2-NEXT: sarq $4, %rdx634; AVX2-NEXT: addq %rax, %rdx635; AVX2-NEXT: leaq (%rdx,%rdx,2), %rax636; AVX2-NEXT: shlq $3, %rax637; AVX2-NEXT: subq %rax, %rdx638; AVX2-NEXT: addq %rcx, %rdx639; AVX2-NEXT: vmovq %rdx, %xmm2640; AVX2-NEXT: vpextrq $1, %xmm1, %rcx641; AVX2-NEXT: movabsq $6966426675817289639, %rdx # imm = 0x60ADB826E5E517A7642; AVX2-NEXT: movq %rcx, %rax643; AVX2-NEXT: imulq %rdx644; AVX2-NEXT: movq %rdx, %rax645; AVX2-NEXT: shrq $63, %rax646; AVX2-NEXT: sarq $11, %rdx647; AVX2-NEXT: addq %rax, %rdx648; AVX2-NEXT: imulq $5423, %rdx, %rax # imm = 0x152F649; AVX2-NEXT: subq %rax, %rcx650; AVX2-NEXT: vmovq %rcx, %xmm1651; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]652; AVX2-NEXT: vpextrq $1, %xmm0, %rcx653; AVX2-NEXT: movabsq $7220743857598845893, %rdx # imm = 0x64353C48064353C5654; AVX2-NEXT: movq %rcx, %rax655; AVX2-NEXT: imulq %rdx656; AVX2-NEXT: movq %rdx, %rax657; AVX2-NEXT: shrq $63, %rax658; AVX2-NEXT: sarq $8, %rdx659; AVX2-NEXT: addq %rax, %rdx660; AVX2-NEXT: imulq $654, %rdx, %rax # imm = 0x28E661; AVX2-NEXT: subq %rax, %rcx662; AVX2-NEXT: vmovq %rcx, %xmm0663; AVX2-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]664; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0665; AVX2-NEXT: retq666;667; AVX512-LABEL: dont_fold_srem_i64:668; AVX512: # %bb.0:669; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1670; AVX512-NEXT: vmovq %xmm1, %rcx671; AVX512-NEXT: movabsq $-5614226457215950491, %rdx # imm = 0xB21642C8590B2165672; AVX512-NEXT: movq %rcx, %rax673; AVX512-NEXT: imulq %rdx674; AVX512-NEXT: addq %rcx, %rdx675; AVX512-NEXT: movq %rdx, %rax676; AVX512-NEXT: shrq $63, %rax677; AVX512-NEXT: sarq $4, %rdx678; AVX512-NEXT: addq %rax, %rdx679; AVX512-NEXT: leaq (%rdx,%rdx,2), %rax680; AVX512-NEXT: shlq $3, %rax681; AVX512-NEXT: subq %rax, %rdx682; AVX512-NEXT: addq %rcx, %rdx683; AVX512-NEXT: vpextrq $1, %xmm1, %rcx684; AVX512-NEXT: vmovq %rdx, %xmm1685; AVX512-NEXT: movabsq $6966426675817289639, %rdx # imm = 0x60ADB826E5E517A7686; AVX512-NEXT: movq %rcx, %rax687; AVX512-NEXT: imulq %rdx688; AVX512-NEXT: movq %rdx, %rax689; AVX512-NEXT: shrq $63, %rax690; AVX512-NEXT: sarq $11, %rdx691; AVX512-NEXT: addq %rax, %rdx692; AVX512-NEXT: imulq $5423, %rdx, %rax # imm = 0x152F693; AVX512-NEXT: subq %rax, %rcx694; AVX512-NEXT: vmovq %rcx, %xmm2695; AVX512-NEXT: vpextrq $1, %xmm0, %rcx696; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm2[0]697; AVX512-NEXT: movabsq $7220743857598845893, %rdx # imm = 0x64353C48064353C5698; AVX512-NEXT: movq %rcx, %rax699; AVX512-NEXT: imulq %rdx700; AVX512-NEXT: movq %rdx, %rax701; AVX512-NEXT: shrq $63, %rax702; AVX512-NEXT: sarq $8, %rdx703; AVX512-NEXT: addq %rax, %rdx704; AVX512-NEXT: imulq $654, %rdx, %rax # imm = 0x28E705; AVX512-NEXT: subq %rax, %rcx706; AVX512-NEXT: vmovq %rcx, %xmm1707; AVX512-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]708; AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0709; AVX512-NEXT: retq710 %1 = srem <4 x i64> %x, <i64 1, i64 654, i64 23, i64 5423>711 ret <4 x i64> %1712}713