25 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX14; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX5125 6define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {7; SSE-LABEL: test_x86_sse_cvtsi642ss:8; SSE: ## %bb.0:9; SSE-NEXT: cvtsi2ss %rdi, %xmm0 ## encoding: [0xf3,0x48,0x0f,0x2a,0xc7]10; SSE-NEXT: retq ## encoding: [0xc3]11;12; AVX1-LABEL: test_x86_sse_cvtsi642ss:13; AVX1: ## %bb.0:14; AVX1-NEXT: vcvtsi2ss %rdi, %xmm0, %xmm0 ## encoding: [0xc4,0xe1,0xfa,0x2a,0xc7]15; AVX1-NEXT: retq ## encoding: [0xc3]16;17; AVX512-LABEL: test_x86_sse_cvtsi642ss:18; AVX512: ## %bb.0:19; AVX512-NEXT: vcvtsi2ss %rdi, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfa,0x2a,0xc7]20; AVX512-NEXT: retq ## encoding: [0xc3]21 %res = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> %a0, i64 %a1) ; <<4 x float>> [#uses=1]22 ret <4 x float> %res23}24declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone25