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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE3; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX5; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX10 11; PR21507 - https://llvm.org/bugs/show_bug.cgi?id=2150712; Each function should be a single math op; no extra moves.13 14 15define <4 x float> @recip(<4 x float> %x) {16; SSE-LABEL: recip:17; SSE: # %bb.0:18; SSE-NEXT: rcpss %xmm0, %xmm019; SSE-NEXT: ret{{[l|q]}}20;21; AVX-LABEL: recip:22; AVX: # %bb.0:23; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm024; AVX-NEXT: ret{{[l|q]}}25 %y = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %x)26 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>27 ret <4 x float> %shuf28}29 30define <4 x float> @recip_square_root(<4 x float> %x) {31; SSE-LABEL: recip_square_root:32; SSE: # %bb.0:33; SSE-NEXT: rsqrtss %xmm0, %xmm034; SSE-NEXT: ret{{[l|q]}}35;36; AVX-LABEL: recip_square_root:37; AVX: # %bb.0:38; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm039; AVX-NEXT: ret{{[l|q]}}40 %y = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %x)41 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>42 ret <4 x float> %shuf43}44 45define <4 x float> @square_root(<4 x float> %x) {46; SSE-LABEL: square_root:47; SSE: # %bb.0:48; SSE-NEXT: sqrtss %xmm0, %xmm049; SSE-NEXT: ret{{[l|q]}}50;51; AVX-LABEL: square_root:52; AVX: # %bb.0:53; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm054; AVX-NEXT: ret{{[l|q]}}55 %y = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %x)56 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>57 ret <4 x float> %shuf58}59 60define <2 x double> @square_root_double(<2 x double> %x) {61; SSE-LABEL: square_root_double:62; SSE: # %bb.0:63; SSE-NEXT: sqrtsd %xmm0, %xmm064; SSE-NEXT: ret{{[l|q]}}65;66; AVX-LABEL: square_root_double:67; AVX: # %bb.0:68; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm069; AVX-NEXT: ret{{[l|q]}}70 %y = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %x)71 %shuf = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> <i32 0, i32 3>72 ret <2 x double> %shuf73}74 75declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>)76declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>)77declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>)78declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>)79 80