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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefixes=CHECK,X864; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,X645; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefixes=CHECK,X646 7; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse4a-builtins.c8 9define <2 x i64> @test_mm_extracti_si64(<2 x i64> %x) {10; CHECK-LABEL: test_mm_extracti_si64:11; CHECK: # %bb.0:12; CHECK-NEXT: extrq $2, $3, %xmm013; CHECK-NEXT: ret{{[l|q]}}14 %res = call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)15 ret <2 x i64> %res16}17declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind readnone18 19define <2 x i64> @test_mm_extract_si64(<2 x i64> %x, <2 x i64> %y) {20; CHECK-LABEL: test_mm_extract_si64:21; CHECK: # %bb.0:22; CHECK-NEXT: extrq %xmm1, %xmm023; CHECK-NEXT: ret{{[l|q]}}24 %bc = bitcast <2 x i64> %y to <16 x i8>25 %res = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %bc)26 ret <2 x i64> %res27}28declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind readnone29 30define <2 x i64> @test_mm_inserti_si64(<2 x i64> %x, <2 x i64> %y) {31; CHECK-LABEL: test_mm_inserti_si64:32; CHECK: # %bb.0:33; CHECK-NEXT: insertq $6, $5, %xmm1, %xmm034; CHECK-NEXT: ret{{[l|q]}}35 %res = call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6)36 ret <2 x i64> %res37}38declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind readnone39 40define <2 x i64> @test_mm_insert_si64(<2 x i64> %x, <2 x i64> %y) {41; CHECK-LABEL: test_mm_insert_si64:42; CHECK: # %bb.0:43; CHECK-NEXT: insertq %xmm1, %xmm044; CHECK-NEXT: ret{{[l|q]}}45 %res = call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y)46 ret <2 x i64> %res47}48declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind readnone49 50define void @test_stream_sd(ptr %p, <2 x double> %a) {51; X86-LABEL: test_stream_sd:52; X86: # %bb.0:53; X86-NEXT: movl {{[0-9]+}}(%esp), %eax54; X86-NEXT: movntsd %xmm0, (%eax)55; X86-NEXT: retl56;57; X64-LABEL: test_stream_sd:58; X64: # %bb.0:59; X64-NEXT: movntsd %xmm0, (%rdi)60; X64-NEXT: retq61 %1 = extractelement <2 x double> %a, i64 062 store double %1, ptr %p, align 1, !nontemporal !163 ret void64}65 66define void @test_mm_stream_ss(ptr %p, <4 x float> %a) {67; X86-LABEL: test_mm_stream_ss:68; X86: # %bb.0:69; X86-NEXT: movl {{[0-9]+}}(%esp), %eax70; X86-NEXT: movntss %xmm0, (%eax)71; X86-NEXT: retl72;73; X64-LABEL: test_mm_stream_ss:74; X64: # %bb.0:75; X64-NEXT: movntss %xmm0, (%rdi)76; X64-NEXT: retq77 %1 = extractelement <4 x float> %a, i64 078 store float %1, ptr %p, align 1, !nontemporal !179 ret void80}81 82!1 = !{i32 1}83