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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 < %s | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-unknown-unknown"6 7; Stack reload folding tests.8;9; By including a nop call with sideeffects we can force a partial register spill of the10; relevant registers and check that the reload is correctly folded into the instruction.11 12define i32 @stack_fold_bzhi_u32(i32 %a0, i32 %a1) {13; CHECK-LABEL: stack_fold_bzhi_u32:14; CHECK: # %bb.0:15; CHECK-NEXT: pushq %rbp16; CHECK-NEXT: .cfi_def_cfa_offset 1617; CHECK-NEXT: pushq %r1518; CHECK-NEXT: .cfi_def_cfa_offset 2419; CHECK-NEXT: pushq %r1420; CHECK-NEXT: .cfi_def_cfa_offset 3221; CHECK-NEXT: pushq %r1322; CHECK-NEXT: .cfi_def_cfa_offset 4023; CHECK-NEXT: pushq %r1224; CHECK-NEXT: .cfi_def_cfa_offset 4825; CHECK-NEXT: pushq %rbx26; CHECK-NEXT: .cfi_def_cfa_offset 5627; CHECK-NEXT: .cfi_offset %rbx, -5628; CHECK-NEXT: .cfi_offset %r12, -4829; CHECK-NEXT: .cfi_offset %r13, -4030; CHECK-NEXT: .cfi_offset %r14, -3231; CHECK-NEXT: .cfi_offset %r15, -2432; CHECK-NEXT: .cfi_offset %rbp, -1633; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill34; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill35; CHECK-NEXT: #APP36; CHECK-NEXT: nop37; CHECK-NEXT: #NO_APP38; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload39; CHECK-NEXT: bzhil %eax, {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload40; CHECK-NEXT: popq %rbx41; CHECK-NEXT: .cfi_def_cfa_offset 4842; CHECK-NEXT: popq %r1243; CHECK-NEXT: .cfi_def_cfa_offset 4044; CHECK-NEXT: popq %r1345; CHECK-NEXT: .cfi_def_cfa_offset 3246; CHECK-NEXT: popq %r1447; CHECK-NEXT: .cfi_def_cfa_offset 2448; CHECK-NEXT: popq %r1549; CHECK-NEXT: .cfi_def_cfa_offset 1650; CHECK-NEXT: popq %rbp51; CHECK-NEXT: .cfi_def_cfa_offset 852; CHECK-NEXT: retq53 %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()54 %2 = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %a0, i32 %a1)55 ret i32 %256}57declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)58 59define i64 @stack_fold_bzhi_u64(i64 %a0, i64 %a1) {60; CHECK-LABEL: stack_fold_bzhi_u64:61; CHECK: # %bb.0:62; CHECK-NEXT: pushq %rbp63; CHECK-NEXT: .cfi_def_cfa_offset 1664; CHECK-NEXT: pushq %r1565; CHECK-NEXT: .cfi_def_cfa_offset 2466; CHECK-NEXT: pushq %r1467; CHECK-NEXT: .cfi_def_cfa_offset 3268; CHECK-NEXT: pushq %r1369; CHECK-NEXT: .cfi_def_cfa_offset 4070; CHECK-NEXT: pushq %r1271; CHECK-NEXT: .cfi_def_cfa_offset 4872; CHECK-NEXT: pushq %rbx73; CHECK-NEXT: .cfi_def_cfa_offset 5674; CHECK-NEXT: .cfi_offset %rbx, -5675; CHECK-NEXT: .cfi_offset %r12, -4876; CHECK-NEXT: .cfi_offset %r13, -4077; CHECK-NEXT: .cfi_offset %r14, -3278; CHECK-NEXT: .cfi_offset %r15, -2479; CHECK-NEXT: .cfi_offset %rbp, -1680; CHECK-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill81; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill82; CHECK-NEXT: #APP83; CHECK-NEXT: nop84; CHECK-NEXT: #NO_APP85; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload86; CHECK-NEXT: bzhiq %rax, {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload87; CHECK-NEXT: popq %rbx88; CHECK-NEXT: .cfi_def_cfa_offset 4889; CHECK-NEXT: popq %r1290; CHECK-NEXT: .cfi_def_cfa_offset 4091; CHECK-NEXT: popq %r1392; CHECK-NEXT: .cfi_def_cfa_offset 3293; CHECK-NEXT: popq %r1494; CHECK-NEXT: .cfi_def_cfa_offset 2495; CHECK-NEXT: popq %r1596; CHECK-NEXT: .cfi_def_cfa_offset 1697; CHECK-NEXT: popq %rbp98; CHECK-NEXT: .cfi_def_cfa_offset 899; CHECK-NEXT: retq100 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()101 %2 = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %a0, i64 %a1)102 ret i64 %2103}104declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)105 106define i32 @stack_fold_pdep_u32(i32 %a0, i32 %a1) {107; CHECK-LABEL: stack_fold_pdep_u32:108; CHECK: # %bb.0:109; CHECK-NEXT: pushq %rbp110; CHECK-NEXT: .cfi_def_cfa_offset 16111; CHECK-NEXT: pushq %r15112; CHECK-NEXT: .cfi_def_cfa_offset 24113; CHECK-NEXT: pushq %r14114; CHECK-NEXT: .cfi_def_cfa_offset 32115; CHECK-NEXT: pushq %r13116; CHECK-NEXT: .cfi_def_cfa_offset 40117; CHECK-NEXT: pushq %r12118; CHECK-NEXT: .cfi_def_cfa_offset 48119; CHECK-NEXT: pushq %rbx120; CHECK-NEXT: .cfi_def_cfa_offset 56121; CHECK-NEXT: .cfi_offset %rbx, -56122; CHECK-NEXT: .cfi_offset %r12, -48123; CHECK-NEXT: .cfi_offset %r13, -40124; CHECK-NEXT: .cfi_offset %r14, -32125; CHECK-NEXT: .cfi_offset %r15, -24126; CHECK-NEXT: .cfi_offset %rbp, -16127; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill128; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill129; CHECK-NEXT: #APP130; CHECK-NEXT: nop131; CHECK-NEXT: #NO_APP132; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload133; CHECK-NEXT: pdepl {{[-0-9]+}}(%r{{[sb]}}p), %eax, %eax # 4-byte Folded Reload134; CHECK-NEXT: popq %rbx135; CHECK-NEXT: .cfi_def_cfa_offset 48136; CHECK-NEXT: popq %r12137; CHECK-NEXT: .cfi_def_cfa_offset 40138; CHECK-NEXT: popq %r13139; CHECK-NEXT: .cfi_def_cfa_offset 32140; CHECK-NEXT: popq %r14141; CHECK-NEXT: .cfi_def_cfa_offset 24142; CHECK-NEXT: popq %r15143; CHECK-NEXT: .cfi_def_cfa_offset 16144; CHECK-NEXT: popq %rbp145; CHECK-NEXT: .cfi_def_cfa_offset 8146; CHECK-NEXT: retq147 %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()148 %2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %a0, i32 %a1)149 ret i32 %2150}151declare i32 @llvm.x86.bmi.pdep.32(i32, i32)152 153define i64 @stack_fold_pdep_u64(i64 %a0, i64 %a1) {154; CHECK-LABEL: stack_fold_pdep_u64:155; CHECK: # %bb.0:156; CHECK-NEXT: pushq %rbp157; CHECK-NEXT: .cfi_def_cfa_offset 16158; CHECK-NEXT: pushq %r15159; CHECK-NEXT: .cfi_def_cfa_offset 24160; CHECK-NEXT: pushq %r14161; CHECK-NEXT: .cfi_def_cfa_offset 32162; CHECK-NEXT: pushq %r13163; CHECK-NEXT: .cfi_def_cfa_offset 40164; CHECK-NEXT: pushq %r12165; CHECK-NEXT: .cfi_def_cfa_offset 48166; CHECK-NEXT: pushq %rbx167; CHECK-NEXT: .cfi_def_cfa_offset 56168; CHECK-NEXT: .cfi_offset %rbx, -56169; CHECK-NEXT: .cfi_offset %r12, -48170; CHECK-NEXT: .cfi_offset %r13, -40171; CHECK-NEXT: .cfi_offset %r14, -32172; CHECK-NEXT: .cfi_offset %r15, -24173; CHECK-NEXT: .cfi_offset %rbp, -16174; CHECK-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill175; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill176; CHECK-NEXT: #APP177; CHECK-NEXT: nop178; CHECK-NEXT: #NO_APP179; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload180; CHECK-NEXT: pdepq {{[-0-9]+}}(%r{{[sb]}}p), %rax, %rax # 8-byte Folded Reload181; CHECK-NEXT: popq %rbx182; CHECK-NEXT: .cfi_def_cfa_offset 48183; CHECK-NEXT: popq %r12184; CHECK-NEXT: .cfi_def_cfa_offset 40185; CHECK-NEXT: popq %r13186; CHECK-NEXT: .cfi_def_cfa_offset 32187; CHECK-NEXT: popq %r14188; CHECK-NEXT: .cfi_def_cfa_offset 24189; CHECK-NEXT: popq %r15190; CHECK-NEXT: .cfi_def_cfa_offset 16191; CHECK-NEXT: popq %rbp192; CHECK-NEXT: .cfi_def_cfa_offset 8193; CHECK-NEXT: retq194 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()195 %2 = tail call i64 @llvm.x86.bmi.pdep.64(i64 %a0, i64 %a1)196 ret i64 %2197}198declare i64 @llvm.x86.bmi.pdep.64(i64, i64)199 200define i32 @stack_fold_pext_u32(i32 %a0, i32 %a1) {201; CHECK-LABEL: stack_fold_pext_u32:202; CHECK: # %bb.0:203; CHECK-NEXT: pushq %rbp204; CHECK-NEXT: .cfi_def_cfa_offset 16205; CHECK-NEXT: pushq %r15206; CHECK-NEXT: .cfi_def_cfa_offset 24207; CHECK-NEXT: pushq %r14208; CHECK-NEXT: .cfi_def_cfa_offset 32209; CHECK-NEXT: pushq %r13210; CHECK-NEXT: .cfi_def_cfa_offset 40211; CHECK-NEXT: pushq %r12212; CHECK-NEXT: .cfi_def_cfa_offset 48213; CHECK-NEXT: pushq %rbx214; CHECK-NEXT: .cfi_def_cfa_offset 56215; CHECK-NEXT: .cfi_offset %rbx, -56216; CHECK-NEXT: .cfi_offset %r12, -48217; CHECK-NEXT: .cfi_offset %r13, -40218; CHECK-NEXT: .cfi_offset %r14, -32219; CHECK-NEXT: .cfi_offset %r15, -24220; CHECK-NEXT: .cfi_offset %rbp, -16221; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill222; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill223; CHECK-NEXT: #APP224; CHECK-NEXT: nop225; CHECK-NEXT: #NO_APP226; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload227; CHECK-NEXT: pextl {{[-0-9]+}}(%r{{[sb]}}p), %eax, %eax # 4-byte Folded Reload228; CHECK-NEXT: popq %rbx229; CHECK-NEXT: .cfi_def_cfa_offset 48230; CHECK-NEXT: popq %r12231; CHECK-NEXT: .cfi_def_cfa_offset 40232; CHECK-NEXT: popq %r13233; CHECK-NEXT: .cfi_def_cfa_offset 32234; CHECK-NEXT: popq %r14235; CHECK-NEXT: .cfi_def_cfa_offset 24236; CHECK-NEXT: popq %r15237; CHECK-NEXT: .cfi_def_cfa_offset 16238; CHECK-NEXT: popq %rbp239; CHECK-NEXT: .cfi_def_cfa_offset 8240; CHECK-NEXT: retq241 %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()242 %2 = tail call i32 @llvm.x86.bmi.pext.32(i32 %a0, i32 %a1)243 ret i32 %2244}245declare i32 @llvm.x86.bmi.pext.32(i32, i32)246 247define i64 @stack_fold_pext_u64(i64 %a0, i64 %a1) {248; CHECK-LABEL: stack_fold_pext_u64:249; CHECK: # %bb.0:250; CHECK-NEXT: pushq %rbp251; CHECK-NEXT: .cfi_def_cfa_offset 16252; CHECK-NEXT: pushq %r15253; CHECK-NEXT: .cfi_def_cfa_offset 24254; CHECK-NEXT: pushq %r14255; CHECK-NEXT: .cfi_def_cfa_offset 32256; CHECK-NEXT: pushq %r13257; CHECK-NEXT: .cfi_def_cfa_offset 40258; CHECK-NEXT: pushq %r12259; CHECK-NEXT: .cfi_def_cfa_offset 48260; CHECK-NEXT: pushq %rbx261; CHECK-NEXT: .cfi_def_cfa_offset 56262; CHECK-NEXT: .cfi_offset %rbx, -56263; CHECK-NEXT: .cfi_offset %r12, -48264; CHECK-NEXT: .cfi_offset %r13, -40265; CHECK-NEXT: .cfi_offset %r14, -32266; CHECK-NEXT: .cfi_offset %r15, -24267; CHECK-NEXT: .cfi_offset %rbp, -16268; CHECK-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill269; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill270; CHECK-NEXT: #APP271; CHECK-NEXT: nop272; CHECK-NEXT: #NO_APP273; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload274; CHECK-NEXT: pextq {{[-0-9]+}}(%r{{[sb]}}p), %rax, %rax # 8-byte Folded Reload275; CHECK-NEXT: popq %rbx276; CHECK-NEXT: .cfi_def_cfa_offset 48277; CHECK-NEXT: popq %r12278; CHECK-NEXT: .cfi_def_cfa_offset 40279; CHECK-NEXT: popq %r13280; CHECK-NEXT: .cfi_def_cfa_offset 32281; CHECK-NEXT: popq %r14282; CHECK-NEXT: .cfi_def_cfa_offset 24283; CHECK-NEXT: popq %r15284; CHECK-NEXT: .cfi_def_cfa_offset 16285; CHECK-NEXT: popq %rbp286; CHECK-NEXT: .cfi_def_cfa_offset 8287; CHECK-NEXT: retq288 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()289 %2 = tail call i64 @llvm.x86.bmi.pext.64(i64 %a0, i64 %a1)290 ret i64 %2291}292declare i64 @llvm.x86.bmi.pext.64(i64, i64)293