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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c < %s | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-unknown-unknown"6 7; Stack reload folding tests.8;9; By including a nop call with sideeffects we can force a partial register spill of the10; relevant registers and check that the reload is correctly folded into the instruction.11 12define <2 x double> @stack_fold_addpd(<2 x double> %a0, <2 x double> %a1) {13; CHECK-LABEL: stack_fold_addpd:14; CHECK:       # %bb.0:15; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill16; CHECK-NEXT:    #APP17; CHECK-NEXT:    nop18; CHECK-NEXT:    #NO_APP19; CHECK-NEXT:    vaddpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload20; CHECK-NEXT:    retq21  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()22  %2 = fadd <2 x double> %a0, %a123  ret <2 x double> %224}25 26define <4 x double> @stack_fold_addpd_ymm(<4 x double> %a0, <4 x double> %a1) {27; CHECK-LABEL: stack_fold_addpd_ymm:28; CHECK:       # %bb.0:29; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill30; CHECK-NEXT:    #APP31; CHECK-NEXT:    nop32; CHECK-NEXT:    #NO_APP33; CHECK-NEXT:    vaddpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload34; CHECK-NEXT:    retq35  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()36  %2 = fadd <4 x double> %a0, %a137  ret <4 x double> %238}39 40define <4 x float> @stack_fold_addps(<4 x float> %a0, <4 x float> %a1) {41; CHECK-LABEL: stack_fold_addps:42; CHECK:       # %bb.0:43; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill44; CHECK-NEXT:    #APP45; CHECK-NEXT:    nop46; CHECK-NEXT:    #NO_APP47; CHECK-NEXT:    vaddps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload48; CHECK-NEXT:    retq49  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()50  %2 = fadd <4 x float> %a0, %a151  ret <4 x float> %252}53 54define <8 x float> @stack_fold_addps_ymm(<8 x float> %a0, <8 x float> %a1) {55; CHECK-LABEL: stack_fold_addps_ymm:56; CHECK:       # %bb.0:57; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill58; CHECK-NEXT:    #APP59; CHECK-NEXT:    nop60; CHECK-NEXT:    #NO_APP61; CHECK-NEXT:    vaddps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload62; CHECK-NEXT:    retq63  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()64  %2 = fadd <8 x float> %a0, %a165  ret <8 x float> %266}67 68define double @stack_fold_addsd(double %a0, double %a1) {69; CHECK-LABEL: stack_fold_addsd:70; CHECK:       # %bb.0:71; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill72; CHECK-NEXT:    #APP73; CHECK-NEXT:    nop74; CHECK-NEXT:    #NO_APP75; CHECK-NEXT:    vaddsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload76; CHECK-NEXT:    retq77  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()78  %2 = fadd double %a0, %a179  ret double %280}81 82define <2 x double> @stack_fold_addsd_int(<2 x double> %a0, <2 x double> %a1) {83; CHECK-LABEL: stack_fold_addsd_int:84; CHECK:       # %bb.0:85; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill86; CHECK-NEXT:    #APP87; CHECK-NEXT:    nop88; CHECK-NEXT:    #NO_APP89; CHECK-NEXT:    vaddsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload90; CHECK-NEXT:    retq91  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()92  %2 = extractelement <2 x double> %a0, i32 093  %3 = extractelement <2 x double> %a1, i32 094  %4 = fadd double %2, %395  %5 = insertelement <2 x double> %a0, double %4, i32 096  ret <2 x double> %597}98declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone99 100define float @stack_fold_addss(float %a0, float %a1) {101; CHECK-LABEL: stack_fold_addss:102; CHECK:       # %bb.0:103; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill104; CHECK-NEXT:    #APP105; CHECK-NEXT:    nop106; CHECK-NEXT:    #NO_APP107; CHECK-NEXT:    vaddss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload108; CHECK-NEXT:    retq109  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()110  %2 = fadd float %a0, %a1111  ret float %2112}113 114define <4 x float> @stack_fold_addss_int(<4 x float> %a0, <4 x float> %a1) {115; CHECK-LABEL: stack_fold_addss_int:116; CHECK:       # %bb.0:117; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill118; CHECK-NEXT:    #APP119; CHECK-NEXT:    nop120; CHECK-NEXT:    #NO_APP121; CHECK-NEXT:    vaddss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload122; CHECK-NEXT:    retq123  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()124  %2 = extractelement <4 x float> %a0, i32 0125  %3 = extractelement <4 x float> %a1, i32 0126  %4 = fadd float %2, %3127  %5 = insertelement <4 x float> %a0, float %4, i32 0128  ret <4 x float> %5129}130declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind readnone131 132define <2 x double> @stack_fold_addsubpd(<2 x double> %a0, <2 x double> %a1) {133; CHECK-LABEL: stack_fold_addsubpd:134; CHECK:       # %bb.0:135; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill136; CHECK-NEXT:    #APP137; CHECK-NEXT:    nop138; CHECK-NEXT:    #NO_APP139; CHECK-NEXT:    vaddsubpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload140; CHECK-NEXT:    retq141  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()142  %2 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1)143  ret <2 x double> %2144}145declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone146 147define <4 x double> @stack_fold_addsubpd_ymm(<4 x double> %a0, <4 x double> %a1) {148; CHECK-LABEL: stack_fold_addsubpd_ymm:149; CHECK:       # %bb.0:150; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill151; CHECK-NEXT:    #APP152; CHECK-NEXT:    nop153; CHECK-NEXT:    #NO_APP154; CHECK-NEXT:    vaddsubpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload155; CHECK-NEXT:    retq156  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()157  %2 = call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %a0, <4 x double> %a1)158  ret <4 x double> %2159}160declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>) nounwind readnone161 162define <4 x float> @stack_fold_addsubps(<4 x float> %a0, <4 x float> %a1) {163; CHECK-LABEL: stack_fold_addsubps:164; CHECK:       # %bb.0:165; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill166; CHECK-NEXT:    #APP167; CHECK-NEXT:    nop168; CHECK-NEXT:    #NO_APP169; CHECK-NEXT:    vaddsubps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload170; CHECK-NEXT:    retq171  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()172  %2 = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1)173  ret <4 x float> %2174}175declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone176 177define <8 x float> @stack_fold_addsubps_ymm(<8 x float> %a0, <8 x float> %a1) {178; CHECK-LABEL: stack_fold_addsubps_ymm:179; CHECK:       # %bb.0:180; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill181; CHECK-NEXT:    #APP182; CHECK-NEXT:    nop183; CHECK-NEXT:    #NO_APP184; CHECK-NEXT:    vaddsubps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload185; CHECK-NEXT:    retq186  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()187  %2 = call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %a0, <8 x float> %a1)188  ret <8 x float> %2189}190declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) nounwind readnone191 192define <2 x double> @stack_fold_andnpd(<2 x double> %a0, <2 x double> %a1) {193; CHECK-LABEL: stack_fold_andnpd:194; CHECK:       # %bb.0:195; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill196; CHECK-NEXT:    #APP197; CHECK-NEXT:    nop198; CHECK-NEXT:    #NO_APP199; CHECK-NEXT:    vandnpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload200; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1201; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm0202; CHECK-NEXT:    retq203  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()204  %2 = bitcast <2 x double> %a0 to <2 x i64>205  %3 = bitcast <2 x double> %a1 to <2 x i64>206  %4 = xor <2 x i64> %2, <i64 -1, i64 -1>207  %5 = and <2 x i64> %4, %3208  %6 = bitcast <2 x i64> %5 to <2 x double>209  ; fadd forces execution domain210  %7 = fadd <2 x double> %6, <double 0x0, double 0x0>211  ret <2 x double> %7212}213 214define <4 x double> @stack_fold_andnpd_ymm(<4 x double> %a0, <4 x double> %a1) {215; CHECK-LABEL: stack_fold_andnpd_ymm:216; CHECK:       # %bb.0:217; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill218; CHECK-NEXT:    #APP219; CHECK-NEXT:    nop220; CHECK-NEXT:    #NO_APP221; CHECK-NEXT:    vandnpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload222; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1223; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm0224; CHECK-NEXT:    retq225  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()226  %2 = bitcast <4 x double> %a0 to <4 x i64>227  %3 = bitcast <4 x double> %a1 to <4 x i64>228  %4 = xor <4 x i64> %2, <i64 -1, i64 -1, i64 -1, i64 -1>229  %5 = and <4 x i64> %4, %3230  %6 = bitcast <4 x i64> %5 to <4 x double>231  ; fadd forces execution domain232  %7 = fadd <4 x double> %6, <double 0x0, double 0x0, double 0x0, double 0x0>233  ret <4 x double> %7234}235 236define <4 x float> @stack_fold_andnps(<4 x float> %a0, <4 x float> %a1) {237; CHECK-LABEL: stack_fold_andnps:238; CHECK:       # %bb.0:239; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill240; CHECK-NEXT:    #APP241; CHECK-NEXT:    nop242; CHECK-NEXT:    #NO_APP243; CHECK-NEXT:    vandnps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload244; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1245; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm0246; CHECK-NEXT:    retq247  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()248  %2 = bitcast <4 x float> %a0 to <2 x i64>249  %3 = bitcast <4 x float> %a1 to <2 x i64>250  %4 = xor <2 x i64> %2, <i64 -1, i64 -1>251  %5 = and <2 x i64> %4, %3252  %6 = bitcast <2 x i64> %5 to <4 x float>253  ; fadd forces execution domain254  %7 = fadd <4 x float> %6, <float 0x0, float 0x0, float 0x0, float 0x0>255  ret <4 x float> %7256}257 258define <8 x float> @stack_fold_andnps_ymm(<8 x float> %a0, <8 x float> %a1) {259; CHECK-LABEL: stack_fold_andnps_ymm:260; CHECK:       # %bb.0:261; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill262; CHECK-NEXT:    #APP263; CHECK-NEXT:    nop264; CHECK-NEXT:    #NO_APP265; CHECK-NEXT:    vandnps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload266; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1267; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm0268; CHECK-NEXT:    retq269  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()270  %2 = bitcast <8 x float> %a0 to <4 x i64>271  %3 = bitcast <8 x float> %a1 to <4 x i64>272  %4 = xor <4 x i64> %2, <i64 -1, i64 -1, i64 -1, i64 -1>273  %5 = and <4 x i64> %4, %3274  %6 = bitcast <4 x i64> %5 to <8 x float>275  ; fadd forces execution domain276  %7 = fadd <8 x float> %6, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>277  ret <8 x float> %7278}279 280define <2 x double> @stack_fold_andpd(<2 x double> %a0, <2 x double> %a1) {281; CHECK-LABEL: stack_fold_andpd:282; CHECK:       # %bb.0:283; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill284; CHECK-NEXT:    #APP285; CHECK-NEXT:    nop286; CHECK-NEXT:    #NO_APP287; CHECK-NEXT:    vandpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload288; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1289; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm0290; CHECK-NEXT:    retq291  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()292  %2 = bitcast <2 x double> %a0 to <2 x i64>293  %3 = bitcast <2 x double> %a1 to <2 x i64>294  %4 = and <2 x i64> %2, %3295  %5 = bitcast <2 x i64> %4 to <2 x double>296  ; fadd forces execution domain297  %6 = fadd <2 x double> %5, <double 0x0, double 0x0>298  ret <2 x double> %6299}300 301define <4 x double> @stack_fold_andpd_ymm(<4 x double> %a0, <4 x double> %a1) {302; CHECK-LABEL: stack_fold_andpd_ymm:303; CHECK:       # %bb.0:304; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill305; CHECK-NEXT:    #APP306; CHECK-NEXT:    nop307; CHECK-NEXT:    #NO_APP308; CHECK-NEXT:    vandpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload309; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1310; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm0311; CHECK-NEXT:    retq312  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()313  %2 = bitcast <4 x double> %a0 to <4 x i64>314  %3 = bitcast <4 x double> %a1 to <4 x i64>315  %4 = and <4 x i64> %2, %3316  %5 = bitcast <4 x i64> %4 to <4 x double>317  ; fadd forces execution domain318  %6 = fadd <4 x double> %5, <double 0x0, double 0x0, double 0x0, double 0x0>319  ret <4 x double> %6320}321 322define <4 x float> @stack_fold_andps(<4 x float> %a0, <4 x float> %a1) {323; CHECK-LABEL: stack_fold_andps:324; CHECK:       # %bb.0:325; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill326; CHECK-NEXT:    #APP327; CHECK-NEXT:    nop328; CHECK-NEXT:    #NO_APP329; CHECK-NEXT:    vandps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload330; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1331; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm0332; CHECK-NEXT:    retq333  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()334  %2 = bitcast <4 x float> %a0 to <2 x i64>335  %3 = bitcast <4 x float> %a1 to <2 x i64>336  %4 = and <2 x i64> %2, %3337  %5 = bitcast <2 x i64> %4 to <4 x float>338  ; fadd forces execution domain339  %6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>340  ret <4 x float> %6341}342 343define <8 x float> @stack_fold_andps_ymm(<8 x float> %a0, <8 x float> %a1) {344; CHECK-LABEL: stack_fold_andps_ymm:345; CHECK:       # %bb.0:346; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill347; CHECK-NEXT:    #APP348; CHECK-NEXT:    nop349; CHECK-NEXT:    #NO_APP350; CHECK-NEXT:    vandps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload351; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1352; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm0353; CHECK-NEXT:    retq354  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()355  %2 = bitcast <8 x float> %a0 to <4 x i64>356  %3 = bitcast <8 x float> %a1 to <4 x i64>357  %4 = and <4 x i64> %2, %3358  %5 = bitcast <4 x i64> %4 to <8 x float>359  ; fadd forces execution domain360  %6 = fadd <8 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>361  ret <8 x float> %6362}363 364define <2 x double> @stack_fold_blendpd(<2 x double> %a0, <2 x double> %a1) {365; CHECK-LABEL: stack_fold_blendpd:366; CHECK:       # %bb.0:367; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill368; CHECK-NEXT:    #APP369; CHECK-NEXT:    nop370; CHECK-NEXT:    #NO_APP371; CHECK-NEXT:    vblendpd $2, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload372; CHECK-NEXT:    # xmm0 = xmm0[0],mem[1]373; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1374; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm0375; CHECK-NEXT:    retq376  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()377  %2 = select <2 x i1> <i1 1, i1 0>, <2 x double> %a0, <2 x double> %a1378  ; fadd forces execution domain379  %3 = fadd <2 x double> %2, <double 0x0, double 0x0>380  ret <2 x double> %3381}382 383define <4 x double> @stack_fold_blendpd_ymm(<4 x double> %a0, <4 x double> %a1) {384; CHECK-LABEL: stack_fold_blendpd_ymm:385; CHECK:       # %bb.0:386; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill387; CHECK-NEXT:    #APP388; CHECK-NEXT:    nop389; CHECK-NEXT:    #NO_APP390; CHECK-NEXT:    vblendpd $6, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload391; CHECK-NEXT:    # ymm0 = ymm0[0],mem[1,2],ymm0[3]392; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm1393; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm0394; CHECK-NEXT:    retq395  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()396  %2 = select <4 x i1> <i1 1, i1 0, i1 0, i1 1>, <4 x double> %a0, <4 x double> %a1397  ; fadd forces execution domain398  %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>399  ret <4 x double> %3}400 401define <4 x float> @stack_fold_blendps(<4 x float> %a0, <4 x float> %a1) {402  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()403  %2 = select <4 x i1> <i1 1, i1 0, i1 0, i1 1>, <4 x float> %a0, <4 x float> %a1404  ; fadd forces execution domain405  %3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>406  ret <4 x float> %3407}408 409define <8 x float> @stack_fold_blendps_ymm(<8 x float> %a0, <8 x float> %a1) {410; CHECK-LABEL: stack_fold_blendps_ymm:411; CHECK:       # %bb.0:412; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill413; CHECK-NEXT:    #APP414; CHECK-NEXT:    nop415; CHECK-NEXT:    #NO_APP416; CHECK-NEXT:    vblendps $102, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload417; CHECK-NEXT:    # ymm0 = ymm0[0],mem[1,2],ymm0[3,4],mem[5,6],ymm0[7]418; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1419; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm0420; CHECK-NEXT:    retq421  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()422  %2 = select <8 x i1> <i1 1, i1 0, i1 0, i1 1, i1 1, i1 0, i1 0, i1 1>, <8 x float> %a0, <8 x float> %a1423  ; fadd forces execution domain424  %3 = fadd <8 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>425  ret <8 x float> %3426}427 428define <2 x double> @stack_fold_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %c) {429; CHECK-LABEL: stack_fold_blendvpd:430; CHECK:       # %bb.0:431; CHECK-NEXT:    vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill432; CHECK-NEXT:    #APP433; CHECK-NEXT:    nop434; CHECK-NEXT:    #NO_APP435; CHECK-NEXT:    vblendvpd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm0 # 16-byte Folded Reload436; CHECK-NEXT:    retq437  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()438  %2 = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a1, <2 x double> %c, <2 x double> %a0)439  ret <2 x double> %2440}441declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone442 443define <4 x double> @stack_fold_blendvpd_ymm(<4 x double> %a0, <4 x double> %a1, <4 x double> %c) {444; CHECK-LABEL: stack_fold_blendvpd_ymm:445; CHECK:       # %bb.0:446; CHECK-NEXT:    vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill447; CHECK-NEXT:    #APP448; CHECK-NEXT:    nop449; CHECK-NEXT:    #NO_APP450; CHECK-NEXT:    vblendvpd %ymm0, {{[-0-9]+}}(%r{{[sb]}}p), %ymm1, %ymm0 # 32-byte Folded Reload451; CHECK-NEXT:    retq452  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()453  %2 = call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %a1, <4 x double> %c, <4 x double> %a0)454  ret <4 x double> %2455}456declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4 x double>) nounwind readnone457 458define <4 x float> @stack_fold_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %c) {459; CHECK-LABEL: stack_fold_blendvps:460; CHECK:       # %bb.0:461; CHECK-NEXT:    vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill462; CHECK-NEXT:    #APP463; CHECK-NEXT:    nop464; CHECK-NEXT:    #NO_APP465; CHECK-NEXT:    vblendvps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm0 # 16-byte Folded Reload466; CHECK-NEXT:    retq467  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()468  %2 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a1, <4 x float> %c, <4 x float> %a0)469  ret <4 x float> %2470}471declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone472 473define <8 x float> @stack_fold_blendvps_ymm(<8 x float> %a0, <8 x float> %a1, <8 x float> %c) {474; CHECK-LABEL: stack_fold_blendvps_ymm:475; CHECK:       # %bb.0:476; CHECK-NEXT:    vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill477; CHECK-NEXT:    #APP478; CHECK-NEXT:    nop479; CHECK-NEXT:    #NO_APP480; CHECK-NEXT:    vblendvps %ymm0, {{[-0-9]+}}(%r{{[sb]}}p), %ymm1, %ymm0 # 32-byte Folded Reload481; CHECK-NEXT:    retq482  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()483  %2 = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %a1, <8 x float> %c, <8 x float> %a0)484  ret <8 x float> %2485}486declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone487 488define <2 x double> @stack_fold_cmppd(<2 x double> %a0, <2 x double> %a1) {489; CHECK-LABEL: stack_fold_cmppd:490; CHECK:       # %bb.0:491; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill492; CHECK-NEXT:    #APP493; CHECK-NEXT:    nop494; CHECK-NEXT:    #NO_APP495; CHECK-NEXT:    vcmpeqpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload496; CHECK-NEXT:    retq497  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()498  %2 = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 0)499  ret <2 x double> %2500}501declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone502 503define <4 x double> @stack_fold_cmppd_ymm(<4 x double> %a0, <4 x double> %a1) {504; CHECK-LABEL: stack_fold_cmppd_ymm:505; CHECK:       # %bb.0:506; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill507; CHECK-NEXT:    #APP508; CHECK-NEXT:    nop509; CHECK-NEXT:    #NO_APP510; CHECK-NEXT:    vcmpeqpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload511; CHECK-NEXT:    retq512  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()513  %2 = call <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double> %a0, <4 x double> %a1, i8 0)514  ret <4 x double> %2515}516declare <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone517 518define <4 x float> @stack_fold_cmpps(<4 x float> %a0, <4 x float> %a1) {519; CHECK-LABEL: stack_fold_cmpps:520; CHECK:       # %bb.0:521; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill522; CHECK-NEXT:    #APP523; CHECK-NEXT:    nop524; CHECK-NEXT:    #NO_APP525; CHECK-NEXT:    vcmpeqps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload526; CHECK-NEXT:    retq527  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()528  %2 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 0)529  ret <4 x float> %2530}531declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone532 533define <8 x float> @stack_fold_cmpps_ymm(<8 x float> %a0, <8 x float> %a1) {534; CHECK-LABEL: stack_fold_cmpps_ymm:535; CHECK:       # %bb.0:536; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill537; CHECK-NEXT:    #APP538; CHECK-NEXT:    nop539; CHECK-NEXT:    #NO_APP540; CHECK-NEXT:    vcmpeqps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload541; CHECK-NEXT:    retq542  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()543  %2 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 0)544  ret <8 x float> %2545}546declare <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone547 548define i32 @stack_fold_cmpsd(double %a0, double %a1) {549; CHECK-LABEL: stack_fold_cmpsd:550; CHECK:       # %bb.0:551; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill552; CHECK-NEXT:    #APP553; CHECK-NEXT:    nop554; CHECK-NEXT:    #NO_APP555; CHECK-NEXT:    vcmpeqsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload556; CHECK-NEXT:    vmovq %xmm0, %rax557; CHECK-NEXT:    andl $1, %eax558; CHECK-NEXT:    # kill: def $eax killed $eax killed $rax559; CHECK-NEXT:    retq560  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()561  %2 = fcmp oeq double %a0, %a1562  %3 = zext i1 %2 to i32563  ret i32 %3564}565 566define <2 x double> @stack_fold_cmpsd_int(<2 x double> %a0, <2 x double> %a1) {567; CHECK-LABEL: stack_fold_cmpsd_int:568; CHECK:       # %bb.0:569; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill570; CHECK-NEXT:    #APP571; CHECK-NEXT:    nop572; CHECK-NEXT:    #NO_APP573; CHECK-NEXT:    vcmpeqsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload574; CHECK-NEXT:    retq575  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()576  %2 = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 0)577  ret <2 x double> %2578}579declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone580 581define i32 @stack_fold_cmpss(float %a0, float %a1) {582; CHECK-LABEL: stack_fold_cmpss:583; CHECK:       # %bb.0:584; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill585; CHECK-NEXT:    #APP586; CHECK-NEXT:    nop587; CHECK-NEXT:    #NO_APP588; CHECK-NEXT:    vcmpeqss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload589; CHECK-NEXT:    vmovd %xmm0, %eax590; CHECK-NEXT:    andl $1, %eax591; CHECK-NEXT:    retq592  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()593  %2 = fcmp oeq float %a0, %a1594  %3 = zext i1 %2 to i32595  ret i32 %3596}597 598define <4 x float> @stack_fold_cmpss_int(<4 x float> %a0, <4 x float> %a1) {599; CHECK-LABEL: stack_fold_cmpss_int:600; CHECK:       # %bb.0:601; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill602; CHECK-NEXT:    #APP603; CHECK-NEXT:    nop604; CHECK-NEXT:    #NO_APP605; CHECK-NEXT:    vcmpeqss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload606; CHECK-NEXT:    retq607  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()608  %2 = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 0)609  ret <4 x float> %2610}611declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind readnone612 613; TODO stack_fold_comisd614 615define i32 @stack_fold_comisd_int(<2 x double> %a0, <2 x double> %a1) {616; CHECK-LABEL: stack_fold_comisd_int:617; CHECK:       # %bb.0:618; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill619; CHECK-NEXT:    #APP620; CHECK-NEXT:    nop621; CHECK-NEXT:    #NO_APP622; CHECK-NEXT:    vcomisd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload623; CHECK-NEXT:    setnp %al624; CHECK-NEXT:    sete %cl625; CHECK-NEXT:    andb %al, %cl626; CHECK-NEXT:    movzbl %cl, %eax627; CHECK-NEXT:    retq628  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()629  %2 = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1)630  ret i32 %2631}632declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone633 634; TODO stack_fold_comiss635 636define i32 @stack_fold_comiss_int(<4 x float> %a0, <4 x float> %a1) {637; CHECK-LABEL: stack_fold_comiss_int:638; CHECK:       # %bb.0:639; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill640; CHECK-NEXT:    #APP641; CHECK-NEXT:    nop642; CHECK-NEXT:    #NO_APP643; CHECK-NEXT:    vcomiss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload644; CHECK-NEXT:    setnp %al645; CHECK-NEXT:    sete %cl646; CHECK-NEXT:    andb %al, %cl647; CHECK-NEXT:    movzbl %cl, %eax648; CHECK-NEXT:    retq649  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()650  %2 = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1)651  ret i32 %2652}653declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone654 655define <2 x double> @stack_fold_cvtdq2pd(<4 x i32> %a0) {656; CHECK-LABEL: stack_fold_cvtdq2pd:657; CHECK:       # %bb.0:658; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill659; CHECK-NEXT:    #APP660; CHECK-NEXT:    nop661; CHECK-NEXT:    #NO_APP662; CHECK-NEXT:    vcvtdq2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload663; CHECK-NEXT:    retq664  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()665  %2 = shufflevector <4 x i32> %a0, <4 x i32> undef, <2 x i32> <i32 0, i32 1>666  %3 = sitofp <2 x i32> %2 to <2 x double>667  ret <2 x double> %3668}669define <2 x double> @stack_fold_cvtdq2pd_int(<4 x i32> %a0) {670; CHECK-LABEL: stack_fold_cvtdq2pd_int:671; CHECK:       # %bb.0:672; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill673; CHECK-NEXT:    #APP674; CHECK-NEXT:    nop675; CHECK-NEXT:    #NO_APP676; CHECK-NEXT:    vcvtdq2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload677; CHECK-NEXT:    retq678  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()679  %2 = shufflevector <4 x i32> %a0, <4 x i32> %a0, <2 x i32> <i32 0, i32 1>680  %cvt = sitofp <2 x i32> %2 to <2 x double>681  ret <2 x double> %cvt682}683 684define <4 x double> @stack_fold_cvtdq2pd_ymm(<4 x i32> %a0) {685; CHECK-LABEL: stack_fold_cvtdq2pd_ymm:686; CHECK:       # %bb.0:687; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill688; CHECK-NEXT:    #APP689; CHECK-NEXT:    nop690; CHECK-NEXT:    #NO_APP691; CHECK-NEXT:    vcvtdq2pd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 16-byte Folded Reload692; CHECK-NEXT:    retq693  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()694  %2 = sitofp <4 x i32> %a0 to <4 x double>695  ret <4 x double> %2696}697 698define <4 x double> @stack_fold_cvtdq2pd_ymm_int(<4 x i32> %a0) {699; CHECK-LABEL: stack_fold_cvtdq2pd_ymm_int:700; CHECK:       # %bb.0:701; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill702; CHECK-NEXT:    #APP703; CHECK-NEXT:    nop704; CHECK-NEXT:    #NO_APP705; CHECK-NEXT:    vcvtdq2pd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 16-byte Folded Reload706; CHECK-NEXT:    retq707  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()708  %cvt = sitofp <4 x i32> %a0 to <4 x double>709  ret <4 x double> %cvt710}711 712define <4 x float> @stack_fold_cvtdq2ps(<4 x i32> %a0) {713; CHECK-LABEL: stack_fold_cvtdq2ps:714; CHECK:       # %bb.0:715; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill716; CHECK-NEXT:    #APP717; CHECK-NEXT:    nop718; CHECK-NEXT:    #NO_APP719; CHECK-NEXT:    vcvtdq2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload720; CHECK-NEXT:    retq721  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()722  %2 = sitofp <4 x i32> %a0 to <4 x float>723  ret <4 x float> %2724}725 726define <8 x float> @stack_fold_cvtdq2ps_ymm(<8 x i32> %a0) {727; CHECK-LABEL: stack_fold_cvtdq2ps_ymm:728; CHECK:       # %bb.0:729; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill730; CHECK-NEXT:    #APP731; CHECK-NEXT:    nop732; CHECK-NEXT:    #NO_APP733; CHECK-NEXT:    vcvtdq2ps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload734; CHECK-NEXT:    retq735  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()736  %2 = sitofp <8 x i32> %a0 to <8 x float>737  ret <8 x float> %2738}739 740define <4 x i32> @stack_fold_cvtpd2dq(<2 x double> %a0) {741; CHECK-LABEL: stack_fold_cvtpd2dq:742; CHECK:       # %bb.0:743; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill744; CHECK-NEXT:    #APP745; CHECK-NEXT:    nop746; CHECK-NEXT:    #NO_APP747; CHECK-NEXT:    vcvtpd2dqx {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload748; CHECK-NEXT:    retq749  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()750  %2 = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0)751  ret <4 x i32> %2752}753declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone754 755define <4 x i32> @stack_fold_cvtpd2dq_ymm(<4 x double> %a0) {756; CHECK-LABEL: stack_fold_cvtpd2dq_ymm:757; CHECK:       # %bb.0:758; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill759; CHECK-NEXT:    #APP760; CHECK-NEXT:    nop761; CHECK-NEXT:    #NO_APP762; CHECK-NEXT:    vcvtpd2dqy {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 32-byte Folded Reload763; CHECK-NEXT:    vzeroupper764; CHECK-NEXT:    retq765  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()766  %2 = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0)767  ret <4 x i32> %2768}769declare <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double>) nounwind readnone770 771define <2 x float> @stack_fold_cvtpd2ps(<2 x double> %a0) {772; CHECK-LABEL: stack_fold_cvtpd2ps:773; CHECK:       # %bb.0:774; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill775; CHECK-NEXT:    #APP776; CHECK-NEXT:    nop777; CHECK-NEXT:    #NO_APP778; CHECK-NEXT:    vcvtpd2psx {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload779; CHECK-NEXT:    retq780  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()781  %2 = fptrunc <2 x double> %a0 to <2 x float>782  ret <2 x float> %2783}784 785define <4 x float> @stack_fold_cvtpd2ps_ymm(<4 x double> %a0) {786; CHECK-LABEL: stack_fold_cvtpd2ps_ymm:787; CHECK:       # %bb.0:788; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill789; CHECK-NEXT:    #APP790; CHECK-NEXT:    nop791; CHECK-NEXT:    #NO_APP792; CHECK-NEXT:    vcvtpd2psy {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 32-byte Folded Reload793; CHECK-NEXT:    vzeroupper794; CHECK-NEXT:    retq795  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()796  %2 = fptrunc <4 x double> %a0 to <4 x float>797  ret <4 x float> %2798}799 800define <4 x float> @stack_fold_cvtph2ps(<8 x i16> %a0) {801; CHECK-LABEL: stack_fold_cvtph2ps:802; CHECK:       # %bb.0:803; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill804; CHECK-NEXT:    #APP805; CHECK-NEXT:    nop806; CHECK-NEXT:    #NO_APP807; CHECK-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload808; CHECK-NEXT:    retq809  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()810  %2 = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0)811  ret <4 x float> %2812}813declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly814 815define <8 x float> @stack_fold_cvtph2ps_ymm(<8 x i16> %a0) {816; CHECK-LABEL: stack_fold_cvtph2ps_ymm:817; CHECK:       # %bb.0:818; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill819; CHECK-NEXT:    #APP820; CHECK-NEXT:    nop821; CHECK-NEXT:    #NO_APP822; CHECK-NEXT:    vcvtph2ps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 16-byte Folded Reload823; CHECK-NEXT:    retq824  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()825  %2 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0)826  ret <8 x float> %2827}828declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly829 830define <4 x i32> @stack_fold_cvtps2dq(<4 x float> %a0) {831; CHECK-LABEL: stack_fold_cvtps2dq:832; CHECK:       # %bb.0:833; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill834; CHECK-NEXT:    #APP835; CHECK-NEXT:    nop836; CHECK-NEXT:    #NO_APP837; CHECK-NEXT:    vcvtps2dq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload838; CHECK-NEXT:    retq839  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()840  %2 = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0)841  ret <4 x i32> %2842}843declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone844 845define <8 x i32> @stack_fold_cvtps2dq_ymm(<8 x float> %a0) {846; CHECK-LABEL: stack_fold_cvtps2dq_ymm:847; CHECK:       # %bb.0:848; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill849; CHECK-NEXT:    #APP850; CHECK-NEXT:    nop851; CHECK-NEXT:    #NO_APP852; CHECK-NEXT:    vcvtps2dq {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload853; CHECK-NEXT:    retq854  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()855  %2 = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> %a0)856  ret <8 x i32> %2857}858declare <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float>) nounwind readnone859 860define <2 x double> @stack_fold_cvtps2pd(<4 x float> %a0) {861; CHECK-LABEL: stack_fold_cvtps2pd:862; CHECK:       # %bb.0:863; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill864; CHECK-NEXT:    #APP865; CHECK-NEXT:    nop866; CHECK-NEXT:    #NO_APP867; CHECK-NEXT:    vcvtps2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload868; CHECK-NEXT:    retq869  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()870  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <2 x i32> <i32 0, i32 1>871  %3 = fpext <2 x float> %2 to <2 x double>872  ret <2 x double> %3873}874 875define <2 x double> @stack_fold_cvtps2pd_int(<4 x float> %a0) {876; CHECK-LABEL: stack_fold_cvtps2pd_int:877; CHECK:       # %bb.0:878; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill879; CHECK-NEXT:    #APP880; CHECK-NEXT:    nop881; CHECK-NEXT:    #NO_APP882; CHECK-NEXT:    vcvtps2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload883; CHECK-NEXT:    retq884  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()885  %2 = shufflevector <4 x float> %a0, <4 x float> %a0, <2 x i32> <i32 0, i32 1>886  %cvtps2pd = fpext <2 x float> %2 to <2 x double>887  ret <2 x double> %cvtps2pd888}889 890define <4 x double> @stack_fold_cvtps2pd_ymm(<4 x float> %a0) {891; CHECK-LABEL: stack_fold_cvtps2pd_ymm:892; CHECK:       # %bb.0:893; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill894; CHECK-NEXT:    #APP895; CHECK-NEXT:    nop896; CHECK-NEXT:    #NO_APP897; CHECK-NEXT:    vcvtps2pd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 16-byte Folded Reload898; CHECK-NEXT:    retq899  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()900  %2 = fpext <4 x float> %a0 to <4 x double>901  ret <4 x double> %2902}903 904define <4 x double> @stack_fold_cvtps2pd_ymm_int(<4 x float> %a0) {905; CHECK-LABEL: stack_fold_cvtps2pd_ymm_int:906; CHECK:       # %bb.0:907; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill908; CHECK-NEXT:    #APP909; CHECK-NEXT:    nop910; CHECK-NEXT:    #NO_APP911; CHECK-NEXT:    vcvtps2pd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 16-byte Folded Reload912; CHECK-NEXT:    retq913  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()914  %cvtps2pd = fpext <4 x float> %a0 to <4 x double>915  ret <4 x double> %cvtps2pd916}917 918define <8 x i16> @stack_fold_cvtps2ph_ymm(<8 x float> %a0) {919; CHECK-LABEL: stack_fold_cvtps2ph_ymm:920; CHECK:       # %bb.0:921; CHECK-NEXT:    vcvtps2ph $0, %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Folded Spill922; CHECK-NEXT:    #APP923; CHECK-NEXT:    nop924; CHECK-NEXT:    #NO_APP925; CHECK-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload926; CHECK-NEXT:    vzeroupper927; CHECK-NEXT:    retq928  %1 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0)929  %2 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()930  ret <8 x i16> %1931}932declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly933 934; TODO stack_fold_cvtsd2si935 936define i32 @stack_fold_cvtsd2si_int(<2 x double> %a0) {937; CHECK-LABEL: stack_fold_cvtsd2si_int:938; CHECK:       # %bb.0:939; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill940; CHECK-NEXT:    #APP941; CHECK-NEXT:    nop942; CHECK-NEXT:    #NO_APP943; CHECK-NEXT:    vcvtsd2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload944; CHECK-NEXT:    retq945  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()946  %2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0)947  ret i32 %2948}949declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone950 951; TODO stack_fold_cvtsd2si64952 953define i64 @stack_fold_cvtsd2si64_int(<2 x double> %a0) {954; CHECK-LABEL: stack_fold_cvtsd2si64_int:955; CHECK:       # %bb.0:956; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill957; CHECK-NEXT:    #APP958; CHECK-NEXT:    nop959; CHECK-NEXT:    #NO_APP960; CHECK-NEXT:    vcvtsd2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload961; CHECK-NEXT:    retq962  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()963  %2 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0)964  ret i64 %2965}966declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone967 968define double @stack_fold_cvtsi2sd(i32 %a0) {969; CHECK-LABEL: stack_fold_cvtsi2sd:970; CHECK:       # %bb.0:971; CHECK-NEXT:    pushq %rbp972; CHECK-NEXT:    .cfi_def_cfa_offset 16973; CHECK-NEXT:    pushq %r15974; CHECK-NEXT:    .cfi_def_cfa_offset 24975; CHECK-NEXT:    pushq %r14976; CHECK-NEXT:    .cfi_def_cfa_offset 32977; CHECK-NEXT:    pushq %r13978; CHECK-NEXT:    .cfi_def_cfa_offset 40979; CHECK-NEXT:    pushq %r12980; CHECK-NEXT:    .cfi_def_cfa_offset 48981; CHECK-NEXT:    pushq %rbx982; CHECK-NEXT:    .cfi_def_cfa_offset 56983; CHECK-NEXT:    .cfi_offset %rbx, -56984; CHECK-NEXT:    .cfi_offset %r12, -48985; CHECK-NEXT:    .cfi_offset %r13, -40986; CHECK-NEXT:    .cfi_offset %r14, -32987; CHECK-NEXT:    .cfi_offset %r15, -24988; CHECK-NEXT:    .cfi_offset %rbp, -16989; CHECK-NEXT:    movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill990; CHECK-NEXT:    #APP991; CHECK-NEXT:    nop992; CHECK-NEXT:    #NO_APP993; CHECK-NEXT:    vcvtsi2sdl {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 4-byte Folded Reload994; CHECK-NEXT:    popq %rbx995; CHECK-NEXT:    .cfi_def_cfa_offset 48996; CHECK-NEXT:    popq %r12997; CHECK-NEXT:    .cfi_def_cfa_offset 40998; CHECK-NEXT:    popq %r13999; CHECK-NEXT:    .cfi_def_cfa_offset 321000; CHECK-NEXT:    popq %r141001; CHECK-NEXT:    .cfi_def_cfa_offset 241002; CHECK-NEXT:    popq %r151003; CHECK-NEXT:    .cfi_def_cfa_offset 161004; CHECK-NEXT:    popq %rbp1005; CHECK-NEXT:    .cfi_def_cfa_offset 81006; CHECK-NEXT:    retq1007  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1008  %2 = sitofp i32 %a0 to double1009  ret double %21010}1011 1012define <2 x double> @stack_fold_cvtsi2sd_int(i32 %a0) {1013; CHECK-LABEL: stack_fold_cvtsi2sd_int:1014; CHECK:       # %bb.0:1015; CHECK-NEXT:    pushq %rbp1016; CHECK-NEXT:    .cfi_def_cfa_offset 161017; CHECK-NEXT:    pushq %r151018; CHECK-NEXT:    .cfi_def_cfa_offset 241019; CHECK-NEXT:    pushq %r141020; CHECK-NEXT:    .cfi_def_cfa_offset 321021; CHECK-NEXT:    pushq %r131022; CHECK-NEXT:    .cfi_def_cfa_offset 401023; CHECK-NEXT:    pushq %r121024; CHECK-NEXT:    .cfi_def_cfa_offset 481025; CHECK-NEXT:    pushq %rbx1026; CHECK-NEXT:    .cfi_def_cfa_offset 561027; CHECK-NEXT:    .cfi_offset %rbx, -561028; CHECK-NEXT:    .cfi_offset %r12, -481029; CHECK-NEXT:    .cfi_offset %r13, -401030; CHECK-NEXT:    .cfi_offset %r14, -321031; CHECK-NEXT:    .cfi_offset %r15, -241032; CHECK-NEXT:    .cfi_offset %rbp, -161033; CHECK-NEXT:    movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1034; CHECK-NEXT:    #APP1035; CHECK-NEXT:    nop1036; CHECK-NEXT:    #NO_APP1037; CHECK-NEXT:    vcvtsi2sdl {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 4-byte Folded Reload1038; CHECK-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero1039; CHECK-NEXT:    popq %rbx1040; CHECK-NEXT:    .cfi_def_cfa_offset 481041; CHECK-NEXT:    popq %r121042; CHECK-NEXT:    .cfi_def_cfa_offset 401043; CHECK-NEXT:    popq %r131044; CHECK-NEXT:    .cfi_def_cfa_offset 321045; CHECK-NEXT:    popq %r141046; CHECK-NEXT:    .cfi_def_cfa_offset 241047; CHECK-NEXT:    popq %r151048; CHECK-NEXT:    .cfi_def_cfa_offset 161049; CHECK-NEXT:    popq %rbp1050; CHECK-NEXT:    .cfi_def_cfa_offset 81051; CHECK-NEXT:    retq1052  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1053  %2 = sitofp i32 %a0 to double1054  %3 = insertelement <2 x double> zeroinitializer, double %2, i64 01055  ret <2 x double> %31056}1057 1058define double @stack_fold_cvtsi642sd(i64 %a0) {1059; CHECK-LABEL: stack_fold_cvtsi642sd:1060; CHECK:       # %bb.0:1061; CHECK-NEXT:    pushq %rbp1062; CHECK-NEXT:    .cfi_def_cfa_offset 161063; CHECK-NEXT:    pushq %r151064; CHECK-NEXT:    .cfi_def_cfa_offset 241065; CHECK-NEXT:    pushq %r141066; CHECK-NEXT:    .cfi_def_cfa_offset 321067; CHECK-NEXT:    pushq %r131068; CHECK-NEXT:    .cfi_def_cfa_offset 401069; CHECK-NEXT:    pushq %r121070; CHECK-NEXT:    .cfi_def_cfa_offset 481071; CHECK-NEXT:    pushq %rbx1072; CHECK-NEXT:    .cfi_def_cfa_offset 561073; CHECK-NEXT:    .cfi_offset %rbx, -561074; CHECK-NEXT:    .cfi_offset %r12, -481075; CHECK-NEXT:    .cfi_offset %r13, -401076; CHECK-NEXT:    .cfi_offset %r14, -321077; CHECK-NEXT:    .cfi_offset %r15, -241078; CHECK-NEXT:    .cfi_offset %rbp, -161079; CHECK-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1080; CHECK-NEXT:    #APP1081; CHECK-NEXT:    nop1082; CHECK-NEXT:    #NO_APP1083; CHECK-NEXT:    vcvtsi2sdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload1084; CHECK-NEXT:    popq %rbx1085; CHECK-NEXT:    .cfi_def_cfa_offset 481086; CHECK-NEXT:    popq %r121087; CHECK-NEXT:    .cfi_def_cfa_offset 401088; CHECK-NEXT:    popq %r131089; CHECK-NEXT:    .cfi_def_cfa_offset 321090; CHECK-NEXT:    popq %r141091; CHECK-NEXT:    .cfi_def_cfa_offset 241092; CHECK-NEXT:    popq %r151093; CHECK-NEXT:    .cfi_def_cfa_offset 161094; CHECK-NEXT:    popq %rbp1095; CHECK-NEXT:    .cfi_def_cfa_offset 81096; CHECK-NEXT:    retq1097  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1098  %2 = sitofp i64 %a0 to double1099  ret double %21100}1101 1102define <2 x double> @stack_fold_cvtsi642sd_int(i64 %a0) {1103; CHECK-LABEL: stack_fold_cvtsi642sd_int:1104; CHECK:       # %bb.0:1105; CHECK-NEXT:    pushq %rbp1106; CHECK-NEXT:    .cfi_def_cfa_offset 161107; CHECK-NEXT:    pushq %r151108; CHECK-NEXT:    .cfi_def_cfa_offset 241109; CHECK-NEXT:    pushq %r141110; CHECK-NEXT:    .cfi_def_cfa_offset 321111; CHECK-NEXT:    pushq %r131112; CHECK-NEXT:    .cfi_def_cfa_offset 401113; CHECK-NEXT:    pushq %r121114; CHECK-NEXT:    .cfi_def_cfa_offset 481115; CHECK-NEXT:    pushq %rbx1116; CHECK-NEXT:    .cfi_def_cfa_offset 561117; CHECK-NEXT:    .cfi_offset %rbx, -561118; CHECK-NEXT:    .cfi_offset %r12, -481119; CHECK-NEXT:    .cfi_offset %r13, -401120; CHECK-NEXT:    .cfi_offset %r14, -321121; CHECK-NEXT:    .cfi_offset %r15, -241122; CHECK-NEXT:    .cfi_offset %rbp, -161123; CHECK-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1124; CHECK-NEXT:    #APP1125; CHECK-NEXT:    nop1126; CHECK-NEXT:    #NO_APP1127; CHECK-NEXT:    vcvtsi2sdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload1128; CHECK-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero1129; CHECK-NEXT:    popq %rbx1130; CHECK-NEXT:    .cfi_def_cfa_offset 481131; CHECK-NEXT:    popq %r121132; CHECK-NEXT:    .cfi_def_cfa_offset 401133; CHECK-NEXT:    popq %r131134; CHECK-NEXT:    .cfi_def_cfa_offset 321135; CHECK-NEXT:    popq %r141136; CHECK-NEXT:    .cfi_def_cfa_offset 241137; CHECK-NEXT:    popq %r151138; CHECK-NEXT:    .cfi_def_cfa_offset 161139; CHECK-NEXT:    popq %rbp1140; CHECK-NEXT:    .cfi_def_cfa_offset 81141; CHECK-NEXT:    retq1142  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1143  %2 = sitofp i64 %a0 to double1144  %3 = insertelement <2 x double> zeroinitializer, double %2, i64 01145  ret <2 x double> %31146}1147 1148define float @stack_fold_cvtsi2ss(i32 %a0) {1149; CHECK-LABEL: stack_fold_cvtsi2ss:1150; CHECK:       # %bb.0:1151; CHECK-NEXT:    pushq %rbp1152; CHECK-NEXT:    .cfi_def_cfa_offset 161153; CHECK-NEXT:    pushq %r151154; CHECK-NEXT:    .cfi_def_cfa_offset 241155; CHECK-NEXT:    pushq %r141156; CHECK-NEXT:    .cfi_def_cfa_offset 321157; CHECK-NEXT:    pushq %r131158; CHECK-NEXT:    .cfi_def_cfa_offset 401159; CHECK-NEXT:    pushq %r121160; CHECK-NEXT:    .cfi_def_cfa_offset 481161; CHECK-NEXT:    pushq %rbx1162; CHECK-NEXT:    .cfi_def_cfa_offset 561163; CHECK-NEXT:    .cfi_offset %rbx, -561164; CHECK-NEXT:    .cfi_offset %r12, -481165; CHECK-NEXT:    .cfi_offset %r13, -401166; CHECK-NEXT:    .cfi_offset %r14, -321167; CHECK-NEXT:    .cfi_offset %r15, -241168; CHECK-NEXT:    .cfi_offset %rbp, -161169; CHECK-NEXT:    movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1170; CHECK-NEXT:    #APP1171; CHECK-NEXT:    nop1172; CHECK-NEXT:    #NO_APP1173; CHECK-NEXT:    vcvtsi2ssl {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 4-byte Folded Reload1174; CHECK-NEXT:    popq %rbx1175; CHECK-NEXT:    .cfi_def_cfa_offset 481176; CHECK-NEXT:    popq %r121177; CHECK-NEXT:    .cfi_def_cfa_offset 401178; CHECK-NEXT:    popq %r131179; CHECK-NEXT:    .cfi_def_cfa_offset 321180; CHECK-NEXT:    popq %r141181; CHECK-NEXT:    .cfi_def_cfa_offset 241182; CHECK-NEXT:    popq %r151183; CHECK-NEXT:    .cfi_def_cfa_offset 161184; CHECK-NEXT:    popq %rbp1185; CHECK-NEXT:    .cfi_def_cfa_offset 81186; CHECK-NEXT:    retq1187  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1188  %2 = sitofp i32 %a0 to float1189  ret float %21190}1191 1192define <4 x float> @stack_fold_cvtsi2ss_int(i32 %a0) {1193; CHECK-LABEL: stack_fold_cvtsi2ss_int:1194; CHECK:       # %bb.0:1195; CHECK-NEXT:    pushq %rbp1196; CHECK-NEXT:    .cfi_def_cfa_offset 161197; CHECK-NEXT:    pushq %r151198; CHECK-NEXT:    .cfi_def_cfa_offset 241199; CHECK-NEXT:    pushq %r141200; CHECK-NEXT:    .cfi_def_cfa_offset 321201; CHECK-NEXT:    pushq %r131202; CHECK-NEXT:    .cfi_def_cfa_offset 401203; CHECK-NEXT:    pushq %r121204; CHECK-NEXT:    .cfi_def_cfa_offset 481205; CHECK-NEXT:    pushq %rbx1206; CHECK-NEXT:    .cfi_def_cfa_offset 561207; CHECK-NEXT:    .cfi_offset %rbx, -561208; CHECK-NEXT:    .cfi_offset %r12, -481209; CHECK-NEXT:    .cfi_offset %r13, -401210; CHECK-NEXT:    .cfi_offset %r14, -321211; CHECK-NEXT:    .cfi_offset %r15, -241212; CHECK-NEXT:    .cfi_offset %rbp, -161213; CHECK-NEXT:    movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1214; CHECK-NEXT:    #APP1215; CHECK-NEXT:    nop1216; CHECK-NEXT:    #NO_APP1217; CHECK-NEXT:    vcvtsi2ssl {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 4-byte Folded Reload1218; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm11219; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]1220; CHECK-NEXT:    popq %rbx1221; CHECK-NEXT:    .cfi_def_cfa_offset 481222; CHECK-NEXT:    popq %r121223; CHECK-NEXT:    .cfi_def_cfa_offset 401224; CHECK-NEXT:    popq %r131225; CHECK-NEXT:    .cfi_def_cfa_offset 321226; CHECK-NEXT:    popq %r141227; CHECK-NEXT:    .cfi_def_cfa_offset 241228; CHECK-NEXT:    popq %r151229; CHECK-NEXT:    .cfi_def_cfa_offset 161230; CHECK-NEXT:    popq %rbp1231; CHECK-NEXT:    .cfi_def_cfa_offset 81232; CHECK-NEXT:    retq1233  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1234  %2 = sitofp i32 %a0 to float1235  %3 = insertelement <4 x float> zeroinitializer, float %2, i64 01236  ret <4 x float> %31237}1238 1239define float @stack_fold_cvtsi642ss(i64 %a0) {1240; CHECK-LABEL: stack_fold_cvtsi642ss:1241; CHECK:       # %bb.0:1242; CHECK-NEXT:    pushq %rbp1243; CHECK-NEXT:    .cfi_def_cfa_offset 161244; CHECK-NEXT:    pushq %r151245; CHECK-NEXT:    .cfi_def_cfa_offset 241246; CHECK-NEXT:    pushq %r141247; CHECK-NEXT:    .cfi_def_cfa_offset 321248; CHECK-NEXT:    pushq %r131249; CHECK-NEXT:    .cfi_def_cfa_offset 401250; CHECK-NEXT:    pushq %r121251; CHECK-NEXT:    .cfi_def_cfa_offset 481252; CHECK-NEXT:    pushq %rbx1253; CHECK-NEXT:    .cfi_def_cfa_offset 561254; CHECK-NEXT:    .cfi_offset %rbx, -561255; CHECK-NEXT:    .cfi_offset %r12, -481256; CHECK-NEXT:    .cfi_offset %r13, -401257; CHECK-NEXT:    .cfi_offset %r14, -321258; CHECK-NEXT:    .cfi_offset %r15, -241259; CHECK-NEXT:    .cfi_offset %rbp, -161260; CHECK-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1261; CHECK-NEXT:    #APP1262; CHECK-NEXT:    nop1263; CHECK-NEXT:    #NO_APP1264; CHECK-NEXT:    vcvtsi2ssq {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload1265; CHECK-NEXT:    popq %rbx1266; CHECK-NEXT:    .cfi_def_cfa_offset 481267; CHECK-NEXT:    popq %r121268; CHECK-NEXT:    .cfi_def_cfa_offset 401269; CHECK-NEXT:    popq %r131270; CHECK-NEXT:    .cfi_def_cfa_offset 321271; CHECK-NEXT:    popq %r141272; CHECK-NEXT:    .cfi_def_cfa_offset 241273; CHECK-NEXT:    popq %r151274; CHECK-NEXT:    .cfi_def_cfa_offset 161275; CHECK-NEXT:    popq %rbp1276; CHECK-NEXT:    .cfi_def_cfa_offset 81277; CHECK-NEXT:    retq1278  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1279  %2 = sitofp i64 %a0 to float1280  ret float %21281}1282 1283define <4 x float> @stack_fold_cvtsi642ss_int(i64 %a0) {1284; CHECK-LABEL: stack_fold_cvtsi642ss_int:1285; CHECK:       # %bb.0:1286; CHECK-NEXT:    pushq %rbp1287; CHECK-NEXT:    .cfi_def_cfa_offset 161288; CHECK-NEXT:    pushq %r151289; CHECK-NEXT:    .cfi_def_cfa_offset 241290; CHECK-NEXT:    pushq %r141291; CHECK-NEXT:    .cfi_def_cfa_offset 321292; CHECK-NEXT:    pushq %r131293; CHECK-NEXT:    .cfi_def_cfa_offset 401294; CHECK-NEXT:    pushq %r121295; CHECK-NEXT:    .cfi_def_cfa_offset 481296; CHECK-NEXT:    pushq %rbx1297; CHECK-NEXT:    .cfi_def_cfa_offset 561298; CHECK-NEXT:    .cfi_offset %rbx, -561299; CHECK-NEXT:    .cfi_offset %r12, -481300; CHECK-NEXT:    .cfi_offset %r13, -401301; CHECK-NEXT:    .cfi_offset %r14, -321302; CHECK-NEXT:    .cfi_offset %r15, -241303; CHECK-NEXT:    .cfi_offset %rbp, -161304; CHECK-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1305; CHECK-NEXT:    #APP1306; CHECK-NEXT:    nop1307; CHECK-NEXT:    #NO_APP1308; CHECK-NEXT:    vcvtsi2ssq {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload1309; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm11310; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]1311; CHECK-NEXT:    popq %rbx1312; CHECK-NEXT:    .cfi_def_cfa_offset 481313; CHECK-NEXT:    popq %r121314; CHECK-NEXT:    .cfi_def_cfa_offset 401315; CHECK-NEXT:    popq %r131316; CHECK-NEXT:    .cfi_def_cfa_offset 321317; CHECK-NEXT:    popq %r141318; CHECK-NEXT:    .cfi_def_cfa_offset 241319; CHECK-NEXT:    popq %r151320; CHECK-NEXT:    .cfi_def_cfa_offset 161321; CHECK-NEXT:    popq %rbp1322; CHECK-NEXT:    .cfi_def_cfa_offset 81323; CHECK-NEXT:    retq1324  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1325  %2 = sitofp i64 %a0 to float1326  %3 = insertelement <4 x float> zeroinitializer, float %2, i64 01327  ret <4 x float> %31328}1329 1330; TODO stack_fold_cvtss2si1331 1332define i32 @stack_fold_cvtss2si_int(<4 x float> %a0) {1333; CHECK-LABEL: stack_fold_cvtss2si_int:1334; CHECK:       # %bb.0:1335; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1336; CHECK-NEXT:    #APP1337; CHECK-NEXT:    nop1338; CHECK-NEXT:    #NO_APP1339; CHECK-NEXT:    vcvtss2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload1340; CHECK-NEXT:    retq1341  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1342  %2 = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)1343  ret i32 %21344}1345declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone1346 1347; TODO stack_fold_cvtss2si641348 1349define i64 @stack_fold_cvtss2si64_int(<4 x float> %a0) {1350; CHECK-LABEL: stack_fold_cvtss2si64_int:1351; CHECK:       # %bb.0:1352; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1353; CHECK-NEXT:    #APP1354; CHECK-NEXT:    nop1355; CHECK-NEXT:    #NO_APP1356; CHECK-NEXT:    vcvtss2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload1357; CHECK-NEXT:    retq1358  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1359  %2 = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0)1360  ret i64 %21361}1362declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone1363 1364define <4 x i32> @stack_fold_cvttpd2dq(<2 x double> %a0) {1365; CHECK-LABEL: stack_fold_cvttpd2dq:1366; CHECK:       # %bb.0:1367; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1368; CHECK-NEXT:    #APP1369; CHECK-NEXT:    nop1370; CHECK-NEXT:    #NO_APP1371; CHECK-NEXT:    vcvttpd2dqx {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload1372; CHECK-NEXT:    retq1373  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1374  %2 = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0)1375  ret <4 x i32> %21376}1377declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone1378 1379define <4 x i32> @stack_fold_cvttpd2dq_ymm(<4 x double> %a0) {1380; CHECK-LABEL: stack_fold_cvttpd2dq_ymm:1381; CHECK:       # %bb.0:1382; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1383; CHECK-NEXT:    #APP1384; CHECK-NEXT:    nop1385; CHECK-NEXT:    #NO_APP1386; CHECK-NEXT:    vcvttpd2dqy {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 32-byte Folded Reload1387; CHECK-NEXT:    vzeroupper1388; CHECK-NEXT:    retq1389  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1390  %2 = fptosi <4 x double> %a0 to <4 x i32>1391  ret <4 x i32> %21392}1393 1394define <4 x i32> @stack_fold_cvttps2dq(<4 x float> %a0) {1395; CHECK-LABEL: stack_fold_cvttps2dq:1396; CHECK:       # %bb.0:1397; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1398; CHECK-NEXT:    #APP1399; CHECK-NEXT:    nop1400; CHECK-NEXT:    #NO_APP1401; CHECK-NEXT:    vcvttps2dq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload1402; CHECK-NEXT:    retq1403  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1404  %2 = fptosi <4 x float> %a0 to <4 x i32>1405  ret <4 x i32> %21406}1407 1408define <8 x i32> @stack_fold_cvttps2dq_ymm(<8 x float> %a0) {1409; CHECK-LABEL: stack_fold_cvttps2dq_ymm:1410; CHECK:       # %bb.0:1411; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1412; CHECK-NEXT:    #APP1413; CHECK-NEXT:    nop1414; CHECK-NEXT:    #NO_APP1415; CHECK-NEXT:    vcvttps2dq {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload1416; CHECK-NEXT:    retq1417  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1418  %2 = fptosi <8 x float> %a0 to <8 x i32>1419  ret <8 x i32> %21420}1421 1422define i32 @stack_fold_cvttsd2si(double %a0) {1423; CHECK-LABEL: stack_fold_cvttsd2si:1424; CHECK:       # %bb.0:1425; CHECK-NEXT:    vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1426; CHECK-NEXT:    #APP1427; CHECK-NEXT:    nop1428; CHECK-NEXT:    #NO_APP1429; CHECK-NEXT:    vcvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 8-byte Folded Reload1430; CHECK-NEXT:    retq1431  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1432  %2 = fptosi double %a0 to i321433  ret i32 %21434}1435 1436define i32 @stack_fold_cvttsd2si_int(<2 x double> %a0) {1437; CHECK-LABEL: stack_fold_cvttsd2si_int:1438; CHECK:       # %bb.0:1439; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1440; CHECK-NEXT:    #APP1441; CHECK-NEXT:    nop1442; CHECK-NEXT:    #NO_APP1443; CHECK-NEXT:    vcvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload1444; CHECK-NEXT:    retq1445  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1446  %2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0)1447  ret i32 %21448}1449declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone1450 1451define i64 @stack_fold_cvttsd2si64(double %a0) {1452; CHECK-LABEL: stack_fold_cvttsd2si64:1453; CHECK:       # %bb.0:1454; CHECK-NEXT:    vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1455; CHECK-NEXT:    #APP1456; CHECK-NEXT:    nop1457; CHECK-NEXT:    #NO_APP1458; CHECK-NEXT:    vcvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload1459; CHECK-NEXT:    retq1460  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1461  %2 = fptosi double %a0 to i641462  ret i64 %21463}1464 1465define i64 @stack_fold_cvttsd2si64_int(<2 x double> %a0) {1466; CHECK-LABEL: stack_fold_cvttsd2si64_int:1467; CHECK:       # %bb.0:1468; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1469; CHECK-NEXT:    #APP1470; CHECK-NEXT:    nop1471; CHECK-NEXT:    #NO_APP1472; CHECK-NEXT:    vcvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload1473; CHECK-NEXT:    retq1474  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1475  %2 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0)1476  ret i64 %21477}1478declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone1479 1480define i32 @stack_fold_cvttss2si(float %a0) {1481; CHECK-LABEL: stack_fold_cvttss2si:1482; CHECK:       # %bb.0:1483; CHECK-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1484; CHECK-NEXT:    #APP1485; CHECK-NEXT:    nop1486; CHECK-NEXT:    #NO_APP1487; CHECK-NEXT:    vcvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload1488; CHECK-NEXT:    retq1489  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1490  %2 = fptosi float %a0 to i321491  ret i32 %21492}1493 1494define i32 @stack_fold_cvttss2si_int(<4 x float> %a0) {1495; CHECK-LABEL: stack_fold_cvttss2si_int:1496; CHECK:       # %bb.0:1497; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1498; CHECK-NEXT:    #APP1499; CHECK-NEXT:    nop1500; CHECK-NEXT:    #NO_APP1501; CHECK-NEXT:    vcvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload1502; CHECK-NEXT:    retq1503  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1504  %2 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0)1505  ret i32 %21506}1507declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone1508 1509define i64 @stack_fold_cvttss2si64(float %a0) {1510; CHECK-LABEL: stack_fold_cvttss2si64:1511; CHECK:       # %bb.0:1512; CHECK-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1513; CHECK-NEXT:    #APP1514; CHECK-NEXT:    nop1515; CHECK-NEXT:    #NO_APP1516; CHECK-NEXT:    vcvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 4-byte Folded Reload1517; CHECK-NEXT:    retq1518  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1519  %2 = fptosi float %a0 to i641520  ret i64 %21521}1522 1523define i64 @stack_fold_cvttss2si64_int(<4 x float> %a0) {1524; CHECK-LABEL: stack_fold_cvttss2si64_int:1525; CHECK:       # %bb.0:1526; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1527; CHECK-NEXT:    #APP1528; CHECK-NEXT:    nop1529; CHECK-NEXT:    #NO_APP1530; CHECK-NEXT:    vcvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload1531; CHECK-NEXT:    retq1532  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1533  %2 = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0)1534  ret i64 %21535}1536declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone1537 1538define <2 x double> @stack_fold_divpd(<2 x double> %a0, <2 x double> %a1) {1539; CHECK-LABEL: stack_fold_divpd:1540; CHECK:       # %bb.0:1541; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1542; CHECK-NEXT:    #APP1543; CHECK-NEXT:    nop1544; CHECK-NEXT:    #NO_APP1545; CHECK-NEXT:    vdivpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1546; CHECK-NEXT:    retq1547  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1548  %2 = fdiv <2 x double> %a0, %a11549  ret <2 x double> %21550}1551 1552define <4 x double> @stack_fold_divpd_ymm(<4 x double> %a0, <4 x double> %a1) {1553; CHECK-LABEL: stack_fold_divpd_ymm:1554; CHECK:       # %bb.0:1555; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1556; CHECK-NEXT:    #APP1557; CHECK-NEXT:    nop1558; CHECK-NEXT:    #NO_APP1559; CHECK-NEXT:    vdivpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1560; CHECK-NEXT:    retq1561  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1562  %2 = fdiv <4 x double> %a0, %a11563  ret <4 x double> %21564}1565 1566define <4 x float> @stack_fold_divps(<4 x float> %a0, <4 x float> %a1) {1567; CHECK-LABEL: stack_fold_divps:1568; CHECK:       # %bb.0:1569; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1570; CHECK-NEXT:    #APP1571; CHECK-NEXT:    nop1572; CHECK-NEXT:    #NO_APP1573; CHECK-NEXT:    vdivps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1574; CHECK-NEXT:    retq1575  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1576  %2 = fdiv <4 x float> %a0, %a11577  ret <4 x float> %21578}1579 1580define <8 x float> @stack_fold_divps_ymm(<8 x float> %a0, <8 x float> %a1) {1581; CHECK-LABEL: stack_fold_divps_ymm:1582; CHECK:       # %bb.0:1583; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1584; CHECK-NEXT:    #APP1585; CHECK-NEXT:    nop1586; CHECK-NEXT:    #NO_APP1587; CHECK-NEXT:    vdivps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1588; CHECK-NEXT:    retq1589  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1590  %2 = fdiv <8 x float> %a0, %a11591  ret <8 x float> %21592}1593 1594define double @stack_fold_divsd(double %a0, double %a1) {1595; CHECK-LABEL: stack_fold_divsd:1596; CHECK:       # %bb.0:1597; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1598; CHECK-NEXT:    #APP1599; CHECK-NEXT:    nop1600; CHECK-NEXT:    #NO_APP1601; CHECK-NEXT:    vdivsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload1602; CHECK-NEXT:    retq1603  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1604  %2 = fdiv double %a0, %a11605  ret double %21606}1607 1608define <2 x double> @stack_fold_divsd_int(<2 x double> %a0, <2 x double> %a1) {1609; CHECK-LABEL: stack_fold_divsd_int:1610; CHECK:       # %bb.0:1611; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1612; CHECK-NEXT:    #APP1613; CHECK-NEXT:    nop1614; CHECK-NEXT:    #NO_APP1615; CHECK-NEXT:    vdivsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1616; CHECK-NEXT:    retq1617  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1618  %2 = extractelement <2 x double> %a0, i32 01619  %3 = extractelement <2 x double> %a1, i32 01620  %4 = fdiv double %2, %31621  %5 = insertelement <2 x double> %a0, double %4, i32 01622  ret <2 x double> %51623}1624 1625define float @stack_fold_divss(float %a0, float %a1) {1626; CHECK-LABEL: stack_fold_divss:1627; CHECK:       # %bb.0:1628; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1629; CHECK-NEXT:    #APP1630; CHECK-NEXT:    nop1631; CHECK-NEXT:    #NO_APP1632; CHECK-NEXT:    vdivss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload1633; CHECK-NEXT:    retq1634  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1635  %2 = fdiv float %a0, %a11636  ret float %21637}1638 1639define <4 x float> @stack_fold_divss_int(<4 x float> %a0, <4 x float> %a1) {1640; CHECK-LABEL: stack_fold_divss_int:1641; CHECK:       # %bb.0:1642; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1643; CHECK-NEXT:    #APP1644; CHECK-NEXT:    nop1645; CHECK-NEXT:    #NO_APP1646; CHECK-NEXT:    vdivss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1647; CHECK-NEXT:    retq1648  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1649  %2 = extractelement <4 x float> %a0, i32 01650  %3 = extractelement <4 x float> %a1, i32 01651  %4 = fdiv float %2, %31652  %5 = insertelement <4 x float> %a0, float %4, i32 01653  ret <4 x float> %51654}1655 1656define <2 x double> @stack_fold_dppd(<2 x double> %a0, <2 x double> %a1) {1657; CHECK-LABEL: stack_fold_dppd:1658; CHECK:       # %bb.0:1659; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1660; CHECK-NEXT:    #APP1661; CHECK-NEXT:    nop1662; CHECK-NEXT:    #NO_APP1663; CHECK-NEXT:    vdppd $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1664; CHECK-NEXT:    retq1665  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1666  %2 = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7)1667  ret <2 x double> %21668}1669declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwind readnone1670 1671define <4 x float> @stack_fold_dpps(<4 x float> %a0, <4 x float> %a1) {1672; CHECK-LABEL: stack_fold_dpps:1673; CHECK:       # %bb.0:1674; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1675; CHECK-NEXT:    #APP1676; CHECK-NEXT:    nop1677; CHECK-NEXT:    #NO_APP1678; CHECK-NEXT:    vdpps $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1679; CHECK-NEXT:    retq1680  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1681  %2 = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7)1682  ret <4 x float> %21683}1684declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind readnone1685 1686define <8 x float> @stack_fold_dpps_ymm(<8 x float> %a0, <8 x float> %a1) {1687; CHECK-LABEL: stack_fold_dpps_ymm:1688; CHECK:       # %bb.0:1689; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1690; CHECK-NEXT:    #APP1691; CHECK-NEXT:    nop1692; CHECK-NEXT:    #NO_APP1693; CHECK-NEXT:    vdpps $7, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1694; CHECK-NEXT:    retq1695  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1696  %2 = call <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7)1697  ret <8 x float> %21698}1699declare <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone1700 1701define <4 x float> @stack_fold_extractf128(<8 x float> %a0, <8 x float> %a1) {1702; CHECK-LABEL: stack_fold_extractf128:1703; CHECK:       # %bb.0:1704; CHECK-NEXT:    vextractf128 $1, %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Folded Spill1705; CHECK-NEXT:    #APP1706; CHECK-NEXT:    nop1707; CHECK-NEXT:    #NO_APP1708; CHECK-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload1709; CHECK-NEXT:    vzeroupper1710; CHECK-NEXT:    retq1711  %1 = shufflevector <8 x float> %a0, <8 x float> %a1, <4 x i32> <i32 4, i32 5, i32 6, i32 7>1712  %2 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1713  ret <4 x float> %11714}1715 1716define i32 @stack_fold_extractps(<4 x float> %a0, <4 x float> %a1) {1717; CHECK-LABEL: stack_fold_extractps:1718; CHECK:       # %bb.0:1719; CHECK-NEXT:    pushq %rbp1720; CHECK-NEXT:    .cfi_def_cfa_offset 161721; CHECK-NEXT:    pushq %r151722; CHECK-NEXT:    .cfi_def_cfa_offset 241723; CHECK-NEXT:    pushq %r141724; CHECK-NEXT:    .cfi_def_cfa_offset 321725; CHECK-NEXT:    pushq %r131726; CHECK-NEXT:    .cfi_def_cfa_offset 401727; CHECK-NEXT:    pushq %r121728; CHECK-NEXT:    .cfi_def_cfa_offset 481729; CHECK-NEXT:    pushq %rbx1730; CHECK-NEXT:    .cfi_def_cfa_offset 561731; CHECK-NEXT:    .cfi_offset %rbx, -561732; CHECK-NEXT:    .cfi_offset %r12, -481733; CHECK-NEXT:    .cfi_offset %r13, -401734; CHECK-NEXT:    .cfi_offset %r14, -321735; CHECK-NEXT:    .cfi_offset %r15, -241736; CHECK-NEXT:    .cfi_offset %rbp, -161737; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm01738; CHECK-NEXT:    vextractps $1, %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill1739; CHECK-NEXT:    #APP1740; CHECK-NEXT:    nop1741; CHECK-NEXT:    #NO_APP1742; CHECK-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1743; CHECK-NEXT:    popq %rbx1744; CHECK-NEXT:    .cfi_def_cfa_offset 481745; CHECK-NEXT:    popq %r121746; CHECK-NEXT:    .cfi_def_cfa_offset 401747; CHECK-NEXT:    popq %r131748; CHECK-NEXT:    .cfi_def_cfa_offset 321749; CHECK-NEXT:    popq %r141750; CHECK-NEXT:    .cfi_def_cfa_offset 241751; CHECK-NEXT:    popq %r151752; CHECK-NEXT:    .cfi_def_cfa_offset 161753; CHECK-NEXT:    popq %rbp1754; CHECK-NEXT:    .cfi_def_cfa_offset 81755; CHECK-NEXT:    retq1756  ; fadd forces execution domain1757  %1 = fadd <4 x float> %a0, %a11758  %2 = extractelement <4 x float> %1, i32 11759  %3 = bitcast float %2 to i321760  %4 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()1761  ret i32 %31762}1763 1764define <2 x double> @stack_fold_haddpd(<2 x double> %a0, <2 x double> %a1) {1765; CHECK-LABEL: stack_fold_haddpd:1766; CHECK:       # %bb.0:1767; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1768; CHECK-NEXT:    #APP1769; CHECK-NEXT:    nop1770; CHECK-NEXT:    #NO_APP1771; CHECK-NEXT:    vhaddpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1772; CHECK-NEXT:    retq1773  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1774  %2 = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)1775  ret <2 x double> %21776}1777declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone1778 1779define <4 x double> @stack_fold_haddpd_ymm(<4 x double> %a0, <4 x double> %a1) {1780; CHECK-LABEL: stack_fold_haddpd_ymm:1781; CHECK:       # %bb.0:1782; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1783; CHECK-NEXT:    #APP1784; CHECK-NEXT:    nop1785; CHECK-NEXT:    #NO_APP1786; CHECK-NEXT:    vhaddpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1787; CHECK-NEXT:    retq1788  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1789  %2 = call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %a0, <4 x double> %a1)1790  ret <4 x double> %21791}1792declare <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double>, <4 x double>) nounwind readnone1793 1794define <4 x float> @stack_fold_haddps(<4 x float> %a0, <4 x float> %a1) {1795; CHECK-LABEL: stack_fold_haddps:1796; CHECK:       # %bb.0:1797; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1798; CHECK-NEXT:    #APP1799; CHECK-NEXT:    nop1800; CHECK-NEXT:    #NO_APP1801; CHECK-NEXT:    vhaddps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1802; CHECK-NEXT:    retq1803  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1804  %2 = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)1805  ret <4 x float> %21806}1807declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone1808 1809define <8 x float> @stack_fold_haddps_ymm(<8 x float> %a0, <8 x float> %a1) {1810; CHECK-LABEL: stack_fold_haddps_ymm:1811; CHECK:       # %bb.0:1812; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1813; CHECK-NEXT:    #APP1814; CHECK-NEXT:    nop1815; CHECK-NEXT:    #NO_APP1816; CHECK-NEXT:    vhaddps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1817; CHECK-NEXT:    retq1818  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1819  %2 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %a0, <8 x float> %a1)1820  ret <8 x float> %21821}1822declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind readnone1823 1824define <2 x double> @stack_fold_hsubpd(<2 x double> %a0, <2 x double> %a1) {1825; CHECK-LABEL: stack_fold_hsubpd:1826; CHECK:       # %bb.0:1827; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1828; CHECK-NEXT:    #APP1829; CHECK-NEXT:    nop1830; CHECK-NEXT:    #NO_APP1831; CHECK-NEXT:    vhsubpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1832; CHECK-NEXT:    retq1833  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1834  %2 = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)1835  ret <2 x double> %21836}1837declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone1838 1839define <4 x double> @stack_fold_hsubpd_ymm(<4 x double> %a0, <4 x double> %a1) {1840; CHECK-LABEL: stack_fold_hsubpd_ymm:1841; CHECK:       # %bb.0:1842; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1843; CHECK-NEXT:    #APP1844; CHECK-NEXT:    nop1845; CHECK-NEXT:    #NO_APP1846; CHECK-NEXT:    vhsubpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1847; CHECK-NEXT:    retq1848  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1849  %2 = call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %a0, <4 x double> %a1)1850  ret <4 x double> %21851}1852declare <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double>, <4 x double>) nounwind readnone1853 1854define <4 x float> @stack_fold_hsubps(<4 x float> %a0, <4 x float> %a1) {1855; CHECK-LABEL: stack_fold_hsubps:1856; CHECK:       # %bb.0:1857; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1858; CHECK-NEXT:    #APP1859; CHECK-NEXT:    nop1860; CHECK-NEXT:    #NO_APP1861; CHECK-NEXT:    vhsubps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1862; CHECK-NEXT:    retq1863  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1864  %2 = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1)1865  ret <4 x float> %21866}1867declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone1868 1869define <8 x float> @stack_fold_hsubps_ymm(<8 x float> %a0, <8 x float> %a1) {1870; CHECK-LABEL: stack_fold_hsubps_ymm:1871; CHECK:       # %bb.0:1872; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1873; CHECK-NEXT:    #APP1874; CHECK-NEXT:    nop1875; CHECK-NEXT:    #NO_APP1876; CHECK-NEXT:    vhsubps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1877; CHECK-NEXT:    retq1878  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1879  %2 = call <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float> %a0, <8 x float> %a1)1880  ret <8 x float> %21881}1882declare <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float>, <8 x float>) nounwind readnone1883 1884define <8 x float> @stack_fold_insertf128(<4 x float> %a0, <4 x float> %a1) {1885; CHECK-LABEL: stack_fold_insertf128:1886; CHECK:       # %bb.0:1887; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1888; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm01889; CHECK-NEXT:    #APP1890; CHECK-NEXT:    nop1891; CHECK-NEXT:    #NO_APP1892; CHECK-NEXT:    vinsertf128 $1, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 16-byte Folded Reload1893; CHECK-NEXT:    retq1894  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1895  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1896  ret <8 x float> %21897}1898 1899define <4 x float> @stack_fold_insertps(<4 x float> %a0, <4 x float> %a1) {1900; CHECK-LABEL: stack_fold_insertps:1901; CHECK:       # %bb.0:1902; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1903; CHECK-NEXT:    #APP1904; CHECK-NEXT:    nop1905; CHECK-NEXT:    #NO_APP1906; CHECK-NEXT:    vinsertps $17, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1907; CHECK-NEXT:    # xmm0 = zero,mem[0],xmm0[2,3]1908; CHECK-NEXT:    retq1909  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1910  %2 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 209)1911  ret <4 x float> %21912}1913declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounwind readnone1914 1915define <2 x double> @stack_fold_maxpd(<2 x double> %a0, <2 x double> %a1) {1916; CHECK-LABEL: stack_fold_maxpd:1917; CHECK:       # %bb.0:1918; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1919; CHECK-NEXT:    #APP1920; CHECK-NEXT:    nop1921; CHECK-NEXT:    #NO_APP1922; CHECK-NEXT:    vmaxpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1923; CHECK-NEXT:    retq1924  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1925  %2 = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1)1926  ret <2 x double> %21927}1928declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind readnone1929 1930define <2 x double> @stack_fold_maxpd_commutable(<2 x double> %a0, <2 x double> %a1) {1931; CHECK-LABEL: stack_fold_maxpd_commutable:1932; CHECK:       # %bb.0:1933; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1934; CHECK-NEXT:    #APP1935; CHECK-NEXT:    nop1936; CHECK-NEXT:    #NO_APP1937; CHECK-NEXT:    vmaxpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1938; CHECK-NEXT:    retq1939  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1940  %2 = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1)1941  ret <2 x double> %21942}1943 1944define <4 x double> @stack_fold_maxpd_ymm(<4 x double> %a0, <4 x double> %a1) {1945; CHECK-LABEL: stack_fold_maxpd_ymm:1946; CHECK:       # %bb.0:1947; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1948; CHECK-NEXT:    #APP1949; CHECK-NEXT:    nop1950; CHECK-NEXT:    #NO_APP1951; CHECK-NEXT:    vmaxpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1952; CHECK-NEXT:    retq1953  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1954  %2 = call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %a0, <4 x double> %a1)1955  ret <4 x double> %21956}1957declare <4 x double> @llvm.x86.avx.max.pd.256(<4 x double>, <4 x double>) nounwind readnone1958 1959define <4 x double> @stack_fold_maxpd_ymm_commutable(<4 x double> %a0, <4 x double> %a1) {1960; CHECK-LABEL: stack_fold_maxpd_ymm_commutable:1961; CHECK:       # %bb.0:1962; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1963; CHECK-NEXT:    #APP1964; CHECK-NEXT:    nop1965; CHECK-NEXT:    #NO_APP1966; CHECK-NEXT:    vmaxpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload1967; CHECK-NEXT:    retq1968  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1969  %2 = call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %a0, <4 x double> %a1)1970  ret <4 x double> %21971}1972 1973define <4 x float> @stack_fold_maxps(<4 x float> %a0, <4 x float> %a1) {1974; CHECK-LABEL: stack_fold_maxps:1975; CHECK:       # %bb.0:1976; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1977; CHECK-NEXT:    #APP1978; CHECK-NEXT:    nop1979; CHECK-NEXT:    #NO_APP1980; CHECK-NEXT:    vmaxps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1981; CHECK-NEXT:    retq1982  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1983  %2 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1)1984  ret <4 x float> %21985}1986declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind readnone1987 1988define <4 x float> @stack_fold_maxps_commutable(<4 x float> %a0, <4 x float> %a1) {1989; CHECK-LABEL: stack_fold_maxps_commutable:1990; CHECK:       # %bb.0:1991; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1992; CHECK-NEXT:    #APP1993; CHECK-NEXT:    nop1994; CHECK-NEXT:    #NO_APP1995; CHECK-NEXT:    vmaxps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1996; CHECK-NEXT:    retq1997  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()1998  %2 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1)1999  ret <4 x float> %22000}2001 2002define <8 x float> @stack_fold_maxps_ymm(<8 x float> %a0, <8 x float> %a1) {2003; CHECK-LABEL: stack_fold_maxps_ymm:2004; CHECK:       # %bb.0:2005; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2006; CHECK-NEXT:    #APP2007; CHECK-NEXT:    nop2008; CHECK-NEXT:    #NO_APP2009; CHECK-NEXT:    vmaxps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2010; CHECK-NEXT:    retq2011  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2012  %2 = call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %a0, <8 x float> %a1)2013  ret <8 x float> %22014}2015declare <8 x float> @llvm.x86.avx.max.ps.256(<8 x float>, <8 x float>) nounwind readnone2016 2017define <8 x float> @stack_fold_maxps_ymm_commutable(<8 x float> %a0, <8 x float> %a1) {2018; CHECK-LABEL: stack_fold_maxps_ymm_commutable:2019; CHECK:       # %bb.0:2020; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2021; CHECK-NEXT:    #APP2022; CHECK-NEXT:    nop2023; CHECK-NEXT:    #NO_APP2024; CHECK-NEXT:    vmaxps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2025; CHECK-NEXT:    retq2026  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2027  %2 = call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %a0, <8 x float> %a1)2028  ret <8 x float> %22029}2030 2031define double @stack_fold_maxsd(double %a0, double %a1) {2032; CHECK-LABEL: stack_fold_maxsd:2033; CHECK:       # %bb.0:2034; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2035; CHECK-NEXT:    #APP2036; CHECK-NEXT:    nop2037; CHECK-NEXT:    #NO_APP2038; CHECK-NEXT:    vmaxsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload2039; CHECK-NEXT:    retq2040  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2041  %2 = fcmp ogt double %a0, %a12042  %3 = select i1 %2, double %a0, double %a12043  ret double %32044}2045 2046define double @stack_fold_maxsd_commutable(double %a0, double %a1) {2047; CHECK-LABEL: stack_fold_maxsd_commutable:2048; CHECK:       # %bb.0:2049; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2050; CHECK-NEXT:    #APP2051; CHECK-NEXT:    nop2052; CHECK-NEXT:    #NO_APP2053; CHECK-NEXT:    vmaxsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload2054; CHECK-NEXT:    retq2055  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2056  %2 = fcmp ogt double %a0, %a12057  %3 = select i1 %2, double %a0, double %a12058  ret double %32059}2060 2061define <2 x double> @stack_fold_maxsd_int(<2 x double> %a0, <2 x double> %a1) {2062; CHECK-LABEL: stack_fold_maxsd_int:2063; CHECK:       # %bb.0:2064; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2065; CHECK-NEXT:    #APP2066; CHECK-NEXT:    nop2067; CHECK-NEXT:    #NO_APP2068; CHECK-NEXT:    vmaxsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2069; CHECK-NEXT:    retq2070  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2071  %2 = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1)2072  ret <2 x double> %22073}2074declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind readnone2075 2076define float @stack_fold_maxss(float %a0, float %a1) {2077; CHECK-LABEL: stack_fold_maxss:2078; CHECK:       # %bb.0:2079; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2080; CHECK-NEXT:    #APP2081; CHECK-NEXT:    nop2082; CHECK-NEXT:    #NO_APP2083; CHECK-NEXT:    vmaxss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload2084; CHECK-NEXT:    retq2085  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2086  %2 = fcmp ogt float %a0, %a12087  %3 = select i1 %2, float %a0, float %a12088  ret float %32089}2090 2091define float @stack_fold_maxss_commutable(float %a0, float %a1) {2092; CHECK-LABEL: stack_fold_maxss_commutable:2093; CHECK:       # %bb.0:2094; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2095; CHECK-NEXT:    #APP2096; CHECK-NEXT:    nop2097; CHECK-NEXT:    #NO_APP2098; CHECK-NEXT:    vmaxss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload2099; CHECK-NEXT:    retq2100  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2101  %2 = fcmp ogt float %a0, %a12102  %3 = select i1 %2, float %a0, float %a12103  ret float %32104}2105 2106define <4 x float> @stack_fold_maxss_int(<4 x float> %a0, <4 x float> %a1) {2107; CHECK-LABEL: stack_fold_maxss_int:2108; CHECK:       # %bb.0:2109; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2110; CHECK-NEXT:    #APP2111; CHECK-NEXT:    nop2112; CHECK-NEXT:    #NO_APP2113; CHECK-NEXT:    vmaxss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2114; CHECK-NEXT:    retq2115  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2116  %2 = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1)2117  ret <4 x float> %22118}2119declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone2120 2121define <2 x double> @stack_fold_minpd(<2 x double> %a0, <2 x double> %a1) {2122; CHECK-LABEL: stack_fold_minpd:2123; CHECK:       # %bb.0:2124; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2125; CHECK-NEXT:    #APP2126; CHECK-NEXT:    nop2127; CHECK-NEXT:    #NO_APP2128; CHECK-NEXT:    vminpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2129; CHECK-NEXT:    retq2130  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2131  %2 = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1)2132  ret <2 x double> %22133}2134declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone2135 2136define <2 x double> @stack_fold_minpd_commutable(<2 x double> %a0, <2 x double> %a1) {2137; CHECK-LABEL: stack_fold_minpd_commutable:2138; CHECK:       # %bb.0:2139; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2140; CHECK-NEXT:    #APP2141; CHECK-NEXT:    nop2142; CHECK-NEXT:    #NO_APP2143; CHECK-NEXT:    vminpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2144; CHECK-NEXT:    retq2145  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2146  %2 = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1)2147  ret <2 x double> %22148}2149 2150define <4 x double> @stack_fold_minpd_ymm(<4 x double> %a0, <4 x double> %a1) {2151; CHECK-LABEL: stack_fold_minpd_ymm:2152; CHECK:       # %bb.0:2153; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2154; CHECK-NEXT:    #APP2155; CHECK-NEXT:    nop2156; CHECK-NEXT:    #NO_APP2157; CHECK-NEXT:    vminpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2158; CHECK-NEXT:    retq2159  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2160  %2 = call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %a0, <4 x double> %a1)2161  ret <4 x double> %22162}2163declare <4 x double> @llvm.x86.avx.min.pd.256(<4 x double>, <4 x double>) nounwind readnone2164 2165define <4 x double> @stack_fold_minpd_ymm_commutable(<4 x double> %a0, <4 x double> %a1) {2166; CHECK-LABEL: stack_fold_minpd_ymm_commutable:2167; CHECK:       # %bb.0:2168; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2169; CHECK-NEXT:    #APP2170; CHECK-NEXT:    nop2171; CHECK-NEXT:    #NO_APP2172; CHECK-NEXT:    vminpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2173; CHECK-NEXT:    retq2174  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2175  %2 = call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %a0, <4 x double> %a1)2176  ret <4 x double> %22177}2178 2179define <4 x float> @stack_fold_minps(<4 x float> %a0, <4 x float> %a1) {2180; CHECK-LABEL: stack_fold_minps:2181; CHECK:       # %bb.0:2182; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2183; CHECK-NEXT:    #APP2184; CHECK-NEXT:    nop2185; CHECK-NEXT:    #NO_APP2186; CHECK-NEXT:    vminps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2187; CHECK-NEXT:    retq2188  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2189  %2 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1)2190  ret <4 x float> %22191}2192declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind readnone2193 2194define <4 x float> @stack_fold_minps_commutable(<4 x float> %a0, <4 x float> %a1) {2195; CHECK-LABEL: stack_fold_minps_commutable:2196; CHECK:       # %bb.0:2197; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2198; CHECK-NEXT:    #APP2199; CHECK-NEXT:    nop2200; CHECK-NEXT:    #NO_APP2201; CHECK-NEXT:    vminps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2202; CHECK-NEXT:    retq2203  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2204  %2 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1)2205  ret <4 x float> %22206}2207 2208define <8 x float> @stack_fold_minps_ymm(<8 x float> %a0, <8 x float> %a1) {2209; CHECK-LABEL: stack_fold_minps_ymm:2210; CHECK:       # %bb.0:2211; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2212; CHECK-NEXT:    #APP2213; CHECK-NEXT:    nop2214; CHECK-NEXT:    #NO_APP2215; CHECK-NEXT:    vminps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2216; CHECK-NEXT:    retq2217  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2218  %2 = call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %a0, <8 x float> %a1)2219  ret <8 x float> %22220}2221declare <8 x float> @llvm.x86.avx.min.ps.256(<8 x float>, <8 x float>) nounwind readnone2222 2223define <8 x float> @stack_fold_minps_ymm_commutable(<8 x float> %a0, <8 x float> %a1) {2224; CHECK-LABEL: stack_fold_minps_ymm_commutable:2225; CHECK:       # %bb.0:2226; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2227; CHECK-NEXT:    #APP2228; CHECK-NEXT:    nop2229; CHECK-NEXT:    #NO_APP2230; CHECK-NEXT:    vminps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2231; CHECK-NEXT:    retq2232  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2233  %2 = call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %a0, <8 x float> %a1)2234  ret <8 x float> %22235}2236 2237define double @stack_fold_minsd(double %a0, double %a1) {2238; CHECK-LABEL: stack_fold_minsd:2239; CHECK:       # %bb.0:2240; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2241; CHECK-NEXT:    #APP2242; CHECK-NEXT:    nop2243; CHECK-NEXT:    #NO_APP2244; CHECK-NEXT:    vminsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload2245; CHECK-NEXT:    retq2246  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2247  %2 = fcmp olt double %a0, %a12248  %3 = select i1 %2, double %a0, double %a12249  ret double %32250}2251 2252define double @stack_fold_minsd_commutable(double %a0, double %a1) {2253; CHECK-LABEL: stack_fold_minsd_commutable:2254; CHECK:       # %bb.0:2255; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2256; CHECK-NEXT:    #APP2257; CHECK-NEXT:    nop2258; CHECK-NEXT:    #NO_APP2259; CHECK-NEXT:    vminsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload2260; CHECK-NEXT:    retq2261  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2262  %2 = fcmp olt double %a0, %a12263  %3 = select i1 %2, double %a0, double %a12264  ret double %32265}2266 2267define <2 x double> @stack_fold_minsd_int(<2 x double> %a0, <2 x double> %a1) {2268; CHECK-LABEL: stack_fold_minsd_int:2269; CHECK:       # %bb.0:2270; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2271; CHECK-NEXT:    #APP2272; CHECK-NEXT:    nop2273; CHECK-NEXT:    #NO_APP2274; CHECK-NEXT:    vminsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2275; CHECK-NEXT:    retq2276  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2277  %2 = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1)2278  ret <2 x double> %22279}2280declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind readnone2281 2282define float @stack_fold_minss(float %a0, float %a1) {2283; CHECK-LABEL: stack_fold_minss:2284; CHECK:       # %bb.0:2285; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2286; CHECK-NEXT:    #APP2287; CHECK-NEXT:    nop2288; CHECK-NEXT:    #NO_APP2289; CHECK-NEXT:    vminss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload2290; CHECK-NEXT:    retq2291  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2292  %2 = fcmp olt float %a0, %a12293  %3 = select i1 %2, float %a0, float %a12294  ret float %32295}2296 2297define float @stack_fold_minss_commutable(float %a0, float %a1) {2298; CHECK-LABEL: stack_fold_minss_commutable:2299; CHECK:       # %bb.0:2300; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2301; CHECK-NEXT:    #APP2302; CHECK-NEXT:    nop2303; CHECK-NEXT:    #NO_APP2304; CHECK-NEXT:    vminss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload2305; CHECK-NEXT:    retq2306  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2307  %2 = fcmp olt float %a0, %a12308  %3 = select i1 %2, float %a0, float %a12309  ret float %32310}2311 2312define <4 x float> @stack_fold_minss_int(<4 x float> %a0, <4 x float> %a1) {2313; CHECK-LABEL: stack_fold_minss_int:2314; CHECK:       # %bb.0:2315; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2316; CHECK-NEXT:    #APP2317; CHECK-NEXT:    nop2318; CHECK-NEXT:    #NO_APP2319; CHECK-NEXT:    vminss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2320; CHECK-NEXT:    retq2321  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2322  %2 = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1)2323  ret <4 x float> %22324}2325declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind readnone2326 2327define <2 x double> @stack_fold_movddup(<2 x double> %a0) {2328; CHECK-LABEL: stack_fold_movddup:2329; CHECK:       # %bb.0:2330; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2331; CHECK-NEXT:    #APP2332; CHECK-NEXT:    nop2333; CHECK-NEXT:    #NO_APP2334; CHECK-NEXT:    vmovddup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2335; CHECK-NEXT:    # xmm0 = mem[0,0]2336; CHECK-NEXT:    retq2337  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2338  %2 = shufflevector <2 x double> %a0, <2 x double> undef, <2 x i32> <i32 0, i32 0>2339  ret <2 x double> %22340}2341 2342define <4 x double> @stack_fold_movddup_ymm(<4 x double> %a0) {2343; CHECK-LABEL: stack_fold_movddup_ymm:2344; CHECK:       # %bb.0:2345; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2346; CHECK-NEXT:    #APP2347; CHECK-NEXT:    nop2348; CHECK-NEXT:    #NO_APP2349; CHECK-NEXT:    vmovddup {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2350; CHECK-NEXT:    # ymm0 = mem[0,0,2,2]2351; CHECK-NEXT:    retq2352  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2353  %2 = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>2354  ret <4 x double> %22355}2356 2357; TODO stack_fold_movhpd (load / store)2358; TODO stack_fold_movhps (load / store)2359 2360; TODO stack_fold_movlpd (load / store)2361; TODO stack_fold_movlps (load / store)2362 2363define <4 x float> @stack_fold_movshdup(<4 x float> %a0) {2364; CHECK-LABEL: stack_fold_movshdup:2365; CHECK:       # %bb.0:2366; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2367; CHECK-NEXT:    #APP2368; CHECK-NEXT:    nop2369; CHECK-NEXT:    #NO_APP2370; CHECK-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2371; CHECK-NEXT:    # xmm0 = mem[1,1,3,3]2372; CHECK-NEXT:    retq2373  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2374  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3>2375  ret <4 x float> %22376}2377 2378define <8 x float> @stack_fold_movshdup_ymm(<8 x float> %a0) {2379; CHECK-LABEL: stack_fold_movshdup_ymm:2380; CHECK:       # %bb.0:2381; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2382; CHECK-NEXT:    #APP2383; CHECK-NEXT:    nop2384; CHECK-NEXT:    #NO_APP2385; CHECK-NEXT:    vmovshdup {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2386; CHECK-NEXT:    # ymm0 = mem[1,1,3,3,5,5,7,7]2387; CHECK-NEXT:    retq2388  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2389  %2 = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7>2390  ret <8 x float> %22391}2392 2393define <4 x float> @stack_fold_movsldup(<4 x float> %a0) {2394; CHECK-LABEL: stack_fold_movsldup:2395; CHECK:       # %bb.0:2396; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2397; CHECK-NEXT:    #APP2398; CHECK-NEXT:    nop2399; CHECK-NEXT:    #NO_APP2400; CHECK-NEXT:    vmovsldup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2401; CHECK-NEXT:    # xmm0 = mem[0,0,2,2]2402; CHECK-NEXT:    retq2403  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2404  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>2405  ret <4 x float> %22406}2407 2408define <8 x float> @stack_fold_movsldup_ymm(<8 x float> %a0) {2409; CHECK-LABEL: stack_fold_movsldup_ymm:2410; CHECK:       # %bb.0:2411; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2412; CHECK-NEXT:    #APP2413; CHECK-NEXT:    nop2414; CHECK-NEXT:    #NO_APP2415; CHECK-NEXT:    vmovsldup {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2416; CHECK-NEXT:    # ymm0 = mem[0,0,2,2,4,4,6,6]2417; CHECK-NEXT:    retq2418  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2419  %2 = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>2420  ret <8 x float> %22421}2422 2423define <2 x double> @stack_fold_mulpd(<2 x double> %a0, <2 x double> %a1) {2424; CHECK-LABEL: stack_fold_mulpd:2425; CHECK:       # %bb.0:2426; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2427; CHECK-NEXT:    #APP2428; CHECK-NEXT:    nop2429; CHECK-NEXT:    #NO_APP2430; CHECK-NEXT:    vmulpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2431; CHECK-NEXT:    retq2432  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2433  %2 = fmul <2 x double> %a0, %a12434  ret <2 x double> %22435}2436 2437define <4 x double> @stack_fold_mulpd_ymm(<4 x double> %a0, <4 x double> %a1) {2438; CHECK-LABEL: stack_fold_mulpd_ymm:2439; CHECK:       # %bb.0:2440; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2441; CHECK-NEXT:    #APP2442; CHECK-NEXT:    nop2443; CHECK-NEXT:    #NO_APP2444; CHECK-NEXT:    vmulpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2445; CHECK-NEXT:    retq2446  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2447  %2 = fmul <4 x double> %a0, %a12448  ret <4 x double> %22449}2450 2451define <4 x float> @stack_fold_mulps(<4 x float> %a0, <4 x float> %a1) {2452; CHECK-LABEL: stack_fold_mulps:2453; CHECK:       # %bb.0:2454; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2455; CHECK-NEXT:    #APP2456; CHECK-NEXT:    nop2457; CHECK-NEXT:    #NO_APP2458; CHECK-NEXT:    vmulps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2459; CHECK-NEXT:    retq2460  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2461  %2 = fmul <4 x float> %a0, %a12462  ret <4 x float> %22463}2464 2465define <8 x float> @stack_fold_mulps_ymm(<8 x float> %a0, <8 x float> %a1) {2466; CHECK-LABEL: stack_fold_mulps_ymm:2467; CHECK:       # %bb.0:2468; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2469; CHECK-NEXT:    #APP2470; CHECK-NEXT:    nop2471; CHECK-NEXT:    #NO_APP2472; CHECK-NEXT:    vmulps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2473; CHECK-NEXT:    retq2474  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2475  %2 = fmul <8 x float> %a0, %a12476  ret <8 x float> %22477}2478 2479define double @stack_fold_mulsd(double %a0, double %a1) {2480; CHECK-LABEL: stack_fold_mulsd:2481; CHECK:       # %bb.0:2482; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2483; CHECK-NEXT:    #APP2484; CHECK-NEXT:    nop2485; CHECK-NEXT:    #NO_APP2486; CHECK-NEXT:    vmulsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload2487; CHECK-NEXT:    retq2488  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2489  %2 = fmul double %a0, %a12490  ret double %22491}2492 2493define <2 x double> @stack_fold_mulsd_int(<2 x double> %a0, <2 x double> %a1) {2494; CHECK-LABEL: stack_fold_mulsd_int:2495; CHECK:       # %bb.0:2496; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2497; CHECK-NEXT:    #APP2498; CHECK-NEXT:    nop2499; CHECK-NEXT:    #NO_APP2500; CHECK-NEXT:    vmulsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2501; CHECK-NEXT:    retq2502  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2503  %2 = extractelement <2 x double> %a0, i32 02504  %3 = extractelement <2 x double> %a1, i32 02505  %4 = fmul double %2, %32506  %5 = insertelement <2 x double> %a0, double %4, i32 02507  ret <2 x double> %52508}2509 2510define float @stack_fold_mulss(float %a0, float %a1) {2511; CHECK-LABEL: stack_fold_mulss:2512; CHECK:       # %bb.0:2513; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2514; CHECK-NEXT:    #APP2515; CHECK-NEXT:    nop2516; CHECK-NEXT:    #NO_APP2517; CHECK-NEXT:    vmulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload2518; CHECK-NEXT:    retq2519  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2520  %2 = fmul float %a0, %a12521  ret float %22522}2523 2524define <4 x float> @stack_fold_mulss_int(<4 x float> %a0, <4 x float> %a1) {2525; CHECK-LABEL: stack_fold_mulss_int:2526; CHECK:       # %bb.0:2527; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2528; CHECK-NEXT:    #APP2529; CHECK-NEXT:    nop2530; CHECK-NEXT:    #NO_APP2531; CHECK-NEXT:    vmulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2532; CHECK-NEXT:    retq2533  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2534  %2 = extractelement <4 x float> %a0, i32 02535  %3 = extractelement <4 x float> %a1, i32 02536  %4 = fmul float %2, %32537  %5 = insertelement <4 x float> %a0, float %4, i32 02538  ret <4 x float> %52539}2540 2541define <2 x double> @stack_fold_orpd(<2 x double> %a0, <2 x double> %a1) {2542; CHECK-LABEL: stack_fold_orpd:2543; CHECK:       # %bb.0:2544; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2545; CHECK-NEXT:    #APP2546; CHECK-NEXT:    nop2547; CHECK-NEXT:    #NO_APP2548; CHECK-NEXT:    vorpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2549; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm12550; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm02551; CHECK-NEXT:    retq2552  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2553  %2 = bitcast <2 x double> %a0 to <2 x i64>2554  %3 = bitcast <2 x double> %a1 to <2 x i64>2555  %4 = or <2 x i64> %2, %32556  %5 = bitcast <2 x i64> %4 to <2 x double>2557  ; fadd forces execution domain2558  %6 = fadd <2 x double> %5, <double 0x0, double 0x0>2559  ret <2 x double> %62560}2561 2562define <4 x double> @stack_fold_orpd_ymm(<4 x double> %a0, <4 x double> %a1) {2563; CHECK-LABEL: stack_fold_orpd_ymm:2564; CHECK:       # %bb.0:2565; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2566; CHECK-NEXT:    #APP2567; CHECK-NEXT:    nop2568; CHECK-NEXT:    #NO_APP2569; CHECK-NEXT:    vorpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2570; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm12571; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm02572; CHECK-NEXT:    retq2573  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2574  %2 = bitcast <4 x double> %a0 to <4 x i64>2575  %3 = bitcast <4 x double> %a1 to <4 x i64>2576  %4 = or <4 x i64> %2, %32577  %5 = bitcast <4 x i64> %4 to <4 x double>2578  ; fadd forces execution domain2579  %6 = fadd <4 x double> %5, <double 0x0, double 0x0, double 0x0, double 0x0>2580  ret <4 x double> %62581}2582 2583define <4 x float> @stack_fold_orps(<4 x float> %a0, <4 x float> %a1) {2584; CHECK-LABEL: stack_fold_orps:2585; CHECK:       # %bb.0:2586; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2587; CHECK-NEXT:    #APP2588; CHECK-NEXT:    nop2589; CHECK-NEXT:    #NO_APP2590; CHECK-NEXT:    vorps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2591; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm12592; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm02593; CHECK-NEXT:    retq2594  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2595  %2 = bitcast <4 x float> %a0 to <2 x i64>2596  %3 = bitcast <4 x float> %a1 to <2 x i64>2597  %4 = or <2 x i64> %2, %32598  %5 = bitcast <2 x i64> %4 to <4 x float>2599  ; fadd forces execution domain2600  %6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>2601  ret <4 x float> %62602}2603 2604define <8 x float> @stack_fold_orps_ymm(<8 x float> %a0, <8 x float> %a1) {2605; CHECK-LABEL: stack_fold_orps_ymm:2606; CHECK:       # %bb.0:2607; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2608; CHECK-NEXT:    #APP2609; CHECK-NEXT:    nop2610; CHECK-NEXT:    #NO_APP2611; CHECK-NEXT:    vorps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2612; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm12613; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm02614; CHECK-NEXT:    retq2615  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2616  %2 = bitcast <8 x float> %a0 to <4 x i64>2617  %3 = bitcast <8 x float> %a1 to <4 x i64>2618  %4 = or <4 x i64> %2, %32619  %5 = bitcast <4 x i64> %4 to <8 x float>2620  ; fadd forces execution domain2621  %6 = fadd <8 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>2622  ret <8 x float> %62623}2624 2625define <8 x float> @stack_fold_perm2f128(<8 x float> %a0, <8 x float> %a1) {2626; CHECK-LABEL: stack_fold_perm2f128:2627; CHECK:       # %bb.0:2628; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2629; CHECK-NEXT:    #APP2630; CHECK-NEXT:    nop2631; CHECK-NEXT:    #NO_APP2632; CHECK-NEXT:    vperm2f128 $33, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2633; CHECK-NEXT:    # ymm0 = ymm0[2,3],mem[0,1]2634; CHECK-NEXT:    retq2635  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2636  %2 = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>2637  ret <8 x float> %22638}2639 2640define <2 x double> @stack_fold_permilpd(<2 x double> %a0) {2641; CHECK-LABEL: stack_fold_permilpd:2642; CHECK:       # %bb.0:2643; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2644; CHECK-NEXT:    #APP2645; CHECK-NEXT:    nop2646; CHECK-NEXT:    #NO_APP2647; CHECK-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2648; CHECK-NEXT:    # xmm0 = mem[1,0]2649; CHECK-NEXT:    retq2650  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2651  %2 = shufflevector <2 x double> %a0, <2 x double> undef, <2 x i32> <i32 1, i32 0>2652  ret <2 x double> %22653}2654 2655define <4 x double> @stack_fold_permilpd_ymm(<4 x double> %a0) {2656; CHECK-LABEL: stack_fold_permilpd_ymm:2657; CHECK:       # %bb.0:2658; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2659; CHECK-NEXT:    #APP2660; CHECK-NEXT:    nop2661; CHECK-NEXT:    #NO_APP2662; CHECK-NEXT:    vpermilpd $5, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2663; CHECK-NEXT:    # ymm0 = mem[1,0,3,2]2664; CHECK-NEXT:    retq2665  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2666  %2 = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>2667  ret <4 x double> %22668}2669 2670define <2 x double> @stack_fold_permilpdvar(<2 x double> %a0, <2 x i64> %a1) {2671; CHECK-LABEL: stack_fold_permilpdvar:2672; CHECK:       # %bb.0:2673; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2674; CHECK-NEXT:    #APP2675; CHECK-NEXT:    nop2676; CHECK-NEXT:    #NO_APP2677; CHECK-NEXT:    vpermilpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2678; CHECK-NEXT:    retq2679  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2680  %2 = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> %a1)2681  ret <2 x double> %22682}2683declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>) nounwind readnone2684 2685define <4 x double> @stack_fold_permilpdvar_ymm(<4 x double> %a0, <4 x i64> %a1) {2686; CHECK-LABEL: stack_fold_permilpdvar_ymm:2687; CHECK:       # %bb.0:2688; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2689; CHECK-NEXT:    #APP2690; CHECK-NEXT:    nop2691; CHECK-NEXT:    #NO_APP2692; CHECK-NEXT:    vpermilpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2693; CHECK-NEXT:    retq2694  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2695  %2 = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> %a1)2696  ret <4 x double> %22697}2698declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>) nounwind readnone2699 2700define <4 x float> @stack_fold_permilps(<4 x float> %a0) {2701; CHECK-LABEL: stack_fold_permilps:2702; CHECK:       # %bb.0:2703; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2704; CHECK-NEXT:    #APP2705; CHECK-NEXT:    nop2706; CHECK-NEXT:    #NO_APP2707; CHECK-NEXT:    vpermilps $27, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2708; CHECK-NEXT:    # xmm0 = mem[3,2,1,0]2709; CHECK-NEXT:    retq2710  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2711  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>2712  ret <4 x float> %22713}2714 2715define <8 x float> @stack_fold_permilps_ymm(<8 x float> %a0) {2716; CHECK-LABEL: stack_fold_permilps_ymm:2717; CHECK:       # %bb.0:2718; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2719; CHECK-NEXT:    #APP2720; CHECK-NEXT:    nop2721; CHECK-NEXT:    #NO_APP2722; CHECK-NEXT:    vpermilps $27, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2723; CHECK-NEXT:    # ymm0 = mem[3,2,1,0,7,6,5,4]2724; CHECK-NEXT:    retq2725  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2726  %2 = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>2727  ret <8 x float> %22728}2729 2730define <4 x float> @stack_fold_permilpsvar(<4 x float> %a0, <4 x i32> %a1) {2731; CHECK-LABEL: stack_fold_permilpsvar:2732; CHECK:       # %bb.0:2733; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2734; CHECK-NEXT:    #APP2735; CHECK-NEXT:    nop2736; CHECK-NEXT:    #NO_APP2737; CHECK-NEXT:    vpermilps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2738; CHECK-NEXT:    retq2739  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2740  %2 = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %a1)2741  ret <4 x float> %22742}2743declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>) nounwind readnone2744 2745define <8 x float> @stack_fold_permilpsvar_ymm(<8 x float> %a0, <8 x i32> %a1) {2746; CHECK-LABEL: stack_fold_permilpsvar_ymm:2747; CHECK:       # %bb.0:2748; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2749; CHECK-NEXT:    #APP2750; CHECK-NEXT:    nop2751; CHECK-NEXT:    #NO_APP2752; CHECK-NEXT:    vpermilps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload2753; CHECK-NEXT:    retq2754  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2755  %2 = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> %a1)2756  ret <8 x float> %22757}2758declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>) nounwind readnone2759 2760; TODO stack_fold_rcpps2761 2762define <4 x float> @stack_fold_rcpps_int(<4 x float> %a0) {2763; CHECK-LABEL: stack_fold_rcpps_int:2764; CHECK:       # %bb.0:2765; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2766; CHECK-NEXT:    #APP2767; CHECK-NEXT:    nop2768; CHECK-NEXT:    #NO_APP2769; CHECK-NEXT:    vrcpps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2770; CHECK-NEXT:    retq2771  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2772  %2 = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0)2773  ret <4 x float> %22774}2775declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone2776 2777; TODO stack_fold_rcpps_ymm2778 2779define <8 x float> @stack_fold_rcpps_ymm_int(<8 x float> %a0) {2780; CHECK-LABEL: stack_fold_rcpps_ymm_int:2781; CHECK:       # %bb.0:2782; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2783; CHECK-NEXT:    #APP2784; CHECK-NEXT:    nop2785; CHECK-NEXT:    #NO_APP2786; CHECK-NEXT:    vrcpps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2787; CHECK-NEXT:    retq2788  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2789  %2 = call <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float> %a0)2790  ret <8 x float> %22791}2792declare <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float>) nounwind readnone2793 2794; TODO stack_fold_rcpss2795; TODO stack_fold_rcpss_int2796 2797define <2 x double> @stack_fold_roundpd(<2 x double> %a0) {2798; CHECK-LABEL: stack_fold_roundpd:2799; CHECK:       # %bb.0:2800; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2801; CHECK-NEXT:    #APP2802; CHECK-NEXT:    nop2803; CHECK-NEXT:    #NO_APP2804; CHECK-NEXT:    vroundpd $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2805; CHECK-NEXT:    retq2806  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2807  %2 = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7)2808  ret <2 x double> %22809}2810declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readnone2811 2812define <4 x double> @stack_fold_roundpd_ymm(<4 x double> %a0) {2813; CHECK-LABEL: stack_fold_roundpd_ymm:2814; CHECK:       # %bb.0:2815; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2816; CHECK-NEXT:    #APP2817; CHECK-NEXT:    nop2818; CHECK-NEXT:    #NO_APP2819; CHECK-NEXT:    vroundpd $7, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2820; CHECK-NEXT:    retq2821  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2822  %2 = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> %a0, i32 7)2823  ret <4 x double> %22824}2825declare <4 x double> @llvm.x86.avx.round.pd.256(<4 x double>, i32) nounwind readnone2826 2827define <4 x float> @stack_fold_roundps(<4 x float> %a0) {2828; CHECK-LABEL: stack_fold_roundps:2829; CHECK:       # %bb.0:2830; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2831; CHECK-NEXT:    #APP2832; CHECK-NEXT:    nop2833; CHECK-NEXT:    #NO_APP2834; CHECK-NEXT:    vroundps $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2835; CHECK-NEXT:    retq2836  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2837  %2 = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7)2838  ret <4 x float> %22839}2840declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone2841 2842define <8 x float> @stack_fold_roundps_ymm(<8 x float> %a0) {2843; CHECK-LABEL: stack_fold_roundps_ymm:2844; CHECK:       # %bb.0:2845; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2846; CHECK-NEXT:    #APP2847; CHECK-NEXT:    nop2848; CHECK-NEXT:    #NO_APP2849; CHECK-NEXT:    vroundps $7, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2850; CHECK-NEXT:    retq2851  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2852  %2 = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> %a0, i32 7)2853  ret <8 x float> %22854}2855declare <8 x float> @llvm.x86.avx.round.ps.256(<8 x float>, i32) nounwind readnone2856 2857define double @stack_fold_roundsd(double %a0) optsize {2858; CHECK-LABEL: stack_fold_roundsd:2859; CHECK:       # %bb.0:2860; CHECK-NEXT:    vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2861; CHECK-NEXT:    #APP2862; CHECK-NEXT:    nop2863; CHECK-NEXT:    #NO_APP2864; CHECK-NEXT:    vxorps %xmm15, %xmm15, %xmm152865; CHECK-NEXT:    vroundsd $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload2866; CHECK-NEXT:    retq2867  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2868  %2 = call double @llvm.floor.f64(double %a0)2869  ret double %22870}2871 2872define double @stack_fold_roundsd_minsize(double %a0) minsize {2873; CHECK-LABEL: stack_fold_roundsd_minsize:2874; CHECK:       # %bb.0:2875; CHECK-NEXT:    vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2876; CHECK-NEXT:    #APP2877; CHECK-NEXT:    nop2878; CHECK-NEXT:    #NO_APP2879; CHECK-NEXT:    vroundsd $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload2880; CHECK-NEXT:    retq2881  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2882  %2 = call double @llvm.floor.f64(double %a0)2883  ret double %22884}2885declare double @llvm.floor.f64(double) nounwind readnone2886 2887define <2 x double> @stack_fold_roundsd_int(<2 x double> %a0, <2 x double> %a1) optsize {2888; CHECK-LABEL: stack_fold_roundsd_int:2889; CHECK:       # %bb.0:2890; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2891; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2892; CHECK-NEXT:    #APP2893; CHECK-NEXT:    nop2894; CHECK-NEXT:    #NO_APP2895; CHECK-NEXT:    vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload2896; CHECK-NEXT:    vroundsd $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2897; CHECK-NEXT:    retq2898  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2899  %2 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7)2900  ret <2 x double> %22901}2902declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone2903 2904define float @stack_fold_roundss(float %a0) optsize {2905; CHECK-LABEL: stack_fold_roundss:2906; CHECK:       # %bb.0:2907; CHECK-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2908; CHECK-NEXT:    #APP2909; CHECK-NEXT:    nop2910; CHECK-NEXT:    #NO_APP2911; CHECK-NEXT:    vxorps %xmm15, %xmm15, %xmm152912; CHECK-NEXT:    vroundss $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 4-byte Folded Reload2913; CHECK-NEXT:    retq2914  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2915  %2 = call float @llvm.floor.f32(float %a0)2916  ret float %22917}2918declare float @llvm.floor.f32(float) nounwind readnone2919 2920define <4 x float> @stack_fold_roundss_int(<4 x float> %a0, <4 x float> %a1) optsize {2921; CHECK-LABEL: stack_fold_roundss_int:2922; CHECK:       # %bb.0:2923; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2924; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2925; CHECK-NEXT:    #APP2926; CHECK-NEXT:    nop2927; CHECK-NEXT:    #NO_APP2928; CHECK-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload2929; CHECK-NEXT:    vroundss $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2930; CHECK-NEXT:    retq2931  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2932  %2 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7)2933  ret <4 x float> %22934}2935declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone2936 2937; TODO stack_fold_rsqrtps2938 2939define <4 x float> @stack_fold_rsqrtps_int(<4 x float> %a0) {2940; CHECK-LABEL: stack_fold_rsqrtps_int:2941; CHECK:       # %bb.0:2942; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2943; CHECK-NEXT:    #APP2944; CHECK-NEXT:    nop2945; CHECK-NEXT:    #NO_APP2946; CHECK-NEXT:    vrsqrtps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload2947; CHECK-NEXT:    retq2948  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2949  %2 = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0)2950  ret <4 x float> %22951}2952declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone2953 2954; TODO stack_fold_rsqrtps_ymm2955 2956define <8 x float> @stack_fold_rsqrtps_ymm_int(<8 x float> %a0) {2957; CHECK-LABEL: stack_fold_rsqrtps_ymm_int:2958; CHECK:       # %bb.0:2959; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2960; CHECK-NEXT:    #APP2961; CHECK-NEXT:    nop2962; CHECK-NEXT:    #NO_APP2963; CHECK-NEXT:    vrsqrtps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload2964; CHECK-NEXT:    retq2965  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2966  %2 = call <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float> %a0)2967  ret <8 x float> %22968}2969declare <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float>) nounwind readnone2970 2971; TODO stack_fold_rsqrtss2972; TODO stack_fold_rsqrtss_int2973 2974define <2 x double> @stack_fold_shufpd(<2 x double> %a0, <2 x double> %a1) {2975; CHECK-LABEL: stack_fold_shufpd:2976; CHECK:       # %bb.0:2977; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2978; CHECK-NEXT:    #APP2979; CHECK-NEXT:    nop2980; CHECK-NEXT:    #NO_APP2981; CHECK-NEXT:    vshufpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2982; CHECK-NEXT:    # xmm0 = xmm0[1],mem[0]2983; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm12984; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm02985; CHECK-NEXT:    retq2986  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()2987  %2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 2>2988  ; fadd forces execution domain2989  %3 = fadd <2 x double> %2, <double 0x0, double 0x0>2990  ret <2 x double> %32991}2992 2993define <4 x double> @stack_fold_shufpd_ymm(<4 x double> %a0, <4 x double> %a1) {2994; CHECK-LABEL: stack_fold_shufpd_ymm:2995; CHECK:       # %bb.0:2996; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill2997; CHECK-NEXT:    #APP2998; CHECK-NEXT:    nop2999; CHECK-NEXT:    #NO_APP3000; CHECK-NEXT:    vshufpd $5, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3001; CHECK-NEXT:    # ymm0 = ymm0[1],mem[0],ymm0[3],mem[2]3002; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13003; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm03004; CHECK-NEXT:    retq3005  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3006  %2 = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 1, i32 4, i32 3, i32 6>3007  ; fadd forces execution domain3008  %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>3009  ret <4 x double> %33010}3011 3012define <4 x float> @stack_fold_shufps(<4 x float> %a0, <4 x float> %a1) {3013; CHECK-LABEL: stack_fold_shufps:3014; CHECK:       # %bb.0:3015; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3016; CHECK-NEXT:    #APP3017; CHECK-NEXT:    nop3018; CHECK-NEXT:    #NO_APP3019; CHECK-NEXT:    vshufps $200, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3020; CHECK-NEXT:    # xmm0 = xmm0[0,2],mem[0,3]3021; CHECK-NEXT:    retq3022  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3023  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 2, i32 4, i32 7>3024  ret <4 x float> %23025}3026 3027define <8 x float> @stack_fold_shufps_ymm(<8 x float> %a0, <8 x float> %a1) {3028; CHECK-LABEL: stack_fold_shufps_ymm:3029; CHECK:       # %bb.0:3030; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3031; CHECK-NEXT:    #APP3032; CHECK-NEXT:    nop3033; CHECK-NEXT:    #NO_APP3034; CHECK-NEXT:    vshufps $148, {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3035; CHECK-NEXT:    # ymm0 = ymm0[0,1],mem[1,2],ymm0[4,5],mem[5,6]3036; CHECK-NEXT:    retq3037  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3038  %2 = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 1, i32 9, i32 10, i32 4, i32 5, i32 13, i32 14>3039  ret <8 x float> %23040}3041 3042define <2 x double> @stack_fold_sqrtpd(<2 x double> %a0) {3043; CHECK-LABEL: stack_fold_sqrtpd:3044; CHECK:       # %bb.0:3045; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3046; CHECK-NEXT:    #APP3047; CHECK-NEXT:    nop3048; CHECK-NEXT:    #NO_APP3049; CHECK-NEXT:    vsqrtpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3050; CHECK-NEXT:    retq3051  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3052  %2 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> %a0)3053  ret <2 x double> %23054}3055declare <2 x double> @llvm.sqrt.v2f64(<2 x double>)3056 3057define <4 x double> @stack_fold_sqrtpd_ymm(<4 x double> %a0) {3058; CHECK-LABEL: stack_fold_sqrtpd_ymm:3059; CHECK:       # %bb.0:3060; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3061; CHECK-NEXT:    #APP3062; CHECK-NEXT:    nop3063; CHECK-NEXT:    #NO_APP3064; CHECK-NEXT:    vsqrtpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload3065; CHECK-NEXT:    retq3066  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3067  %2 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> %a0)3068  ret <4 x double> %23069}3070declare <4 x double> @llvm.sqrt.v4f64(<4 x double>)3071 3072define <4 x float> @stack_fold_sqrtps(<4 x float> %a0) {3073; CHECK-LABEL: stack_fold_sqrtps:3074; CHECK:       # %bb.0:3075; CHECK-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3076; CHECK-NEXT:    #APP3077; CHECK-NEXT:    nop3078; CHECK-NEXT:    #NO_APP3079; CHECK-NEXT:    vsqrtps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3080; CHECK-NEXT:    retq3081  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3082  %2 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a0)3083  ret <4 x float> %23084}3085declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)3086 3087define <8 x float> @stack_fold_sqrtps_ymm(<8 x float> %a0) {3088; CHECK-LABEL: stack_fold_sqrtps_ymm:3089; CHECK:       # %bb.0:3090; CHECK-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3091; CHECK-NEXT:    #APP3092; CHECK-NEXT:    nop3093; CHECK-NEXT:    #NO_APP3094; CHECK-NEXT:    vsqrtps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload3095; CHECK-NEXT:    retq3096  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3097  %2 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> %a0)3098  ret <8 x float> %23099}3100declare <8 x float> @llvm.sqrt.v8f32(<8 x float>)3101 3102define double @stack_fold_sqrtsd(double %a0) optsize {3103; CHECK-LABEL: stack_fold_sqrtsd:3104; CHECK:       # %bb.0:3105; CHECK-NEXT:    vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3106; CHECK-NEXT:    #APP3107; CHECK-NEXT:    nop3108; CHECK-NEXT:    #NO_APP3109; CHECK-NEXT:    vxorps %xmm15, %xmm15, %xmm153110; CHECK-NEXT:    vsqrtsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 8-byte Folded Reload3111; CHECK-NEXT:    retq3112  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3113  %2 = call double @llvm.sqrt.f64(double %a0)3114  ret double %23115}3116declare double @llvm.sqrt.f64(double) nounwind readnone3117 3118; TODO stack_fold_sqrtsd_int3119 3120define float @stack_fold_sqrtss(float %a0) optsize {3121; CHECK-LABEL: stack_fold_sqrtss:3122; CHECK:       # %bb.0:3123; CHECK-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3124; CHECK-NEXT:    #APP3125; CHECK-NEXT:    nop3126; CHECK-NEXT:    #NO_APP3127; CHECK-NEXT:    vxorps %xmm15, %xmm15, %xmm153128; CHECK-NEXT:    vsqrtss {{[-0-9]+}}(%r{{[sb]}}p), %xmm15, %xmm0 # 4-byte Folded Reload3129; CHECK-NEXT:    retq3130  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3131  %2 = call float @llvm.sqrt.f32(float %a0)3132  ret float %23133}3134declare float @llvm.sqrt.f32(float) nounwind readnone3135 3136; TODO stack_fold_sqrtss_int3137 3138define <2 x double> @stack_fold_subpd(<2 x double> %a0, <2 x double> %a1) {3139; CHECK-LABEL: stack_fold_subpd:3140; CHECK:       # %bb.0:3141; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3142; CHECK-NEXT:    #APP3143; CHECK-NEXT:    nop3144; CHECK-NEXT:    #NO_APP3145; CHECK-NEXT:    vsubpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3146; CHECK-NEXT:    retq3147  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3148  %2 = fsub <2 x double> %a0, %a13149  ret <2 x double> %23150}3151 3152define <4 x double> @stack_fold_subpd_ymm(<4 x double> %a0, <4 x double> %a1) {3153; CHECK-LABEL: stack_fold_subpd_ymm:3154; CHECK:       # %bb.0:3155; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3156; CHECK-NEXT:    #APP3157; CHECK-NEXT:    nop3158; CHECK-NEXT:    #NO_APP3159; CHECK-NEXT:    vsubpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3160; CHECK-NEXT:    retq3161  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3162  %2 = fsub <4 x double> %a0, %a13163  ret <4 x double> %23164}3165 3166define <4 x float> @stack_fold_subps(<4 x float> %a0, <4 x float> %a1) {3167; CHECK-LABEL: stack_fold_subps:3168; CHECK:       # %bb.0:3169; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3170; CHECK-NEXT:    #APP3171; CHECK-NEXT:    nop3172; CHECK-NEXT:    #NO_APP3173; CHECK-NEXT:    vsubps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3174; CHECK-NEXT:    retq3175  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3176  %2 = fsub <4 x float> %a0, %a13177  ret <4 x float> %23178}3179 3180define <8 x float> @stack_fold_subps_ymm(<8 x float> %a0, <8 x float> %a1) {3181; CHECK-LABEL: stack_fold_subps_ymm:3182; CHECK:       # %bb.0:3183; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3184; CHECK-NEXT:    #APP3185; CHECK-NEXT:    nop3186; CHECK-NEXT:    #NO_APP3187; CHECK-NEXT:    vsubps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3188; CHECK-NEXT:    retq3189  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3190  %2 = fsub <8 x float> %a0, %a13191  ret <8 x float> %23192}3193 3194define double @stack_fold_subsd(double %a0, double %a1) {3195; CHECK-LABEL: stack_fold_subsd:3196; CHECK:       # %bb.0:3197; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3198; CHECK-NEXT:    #APP3199; CHECK-NEXT:    nop3200; CHECK-NEXT:    #NO_APP3201; CHECK-NEXT:    vsubsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload3202; CHECK-NEXT:    retq3203  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3204  %2 = fsub double %a0, %a13205  ret double %23206}3207 3208define <2 x double> @stack_fold_subsd_int(<2 x double> %a0, <2 x double> %a1) {3209; CHECK-LABEL: stack_fold_subsd_int:3210; CHECK:       # %bb.0:3211; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3212; CHECK-NEXT:    #APP3213; CHECK-NEXT:    nop3214; CHECK-NEXT:    #NO_APP3215; CHECK-NEXT:    vsubsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3216; CHECK-NEXT:    retq3217  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3218  %2 = extractelement <2 x double> %a0, i32 03219  %3 = extractelement <2 x double> %a1, i32 03220  %4 = fsub double %2, %33221  %5 = insertelement <2 x double> %a0, double %4, i32 03222  ret <2 x double> %53223}3224 3225define float @stack_fold_subss(float %a0, float %a1) {3226; CHECK-LABEL: stack_fold_subss:3227; CHECK:       # %bb.0:3228; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3229; CHECK-NEXT:    #APP3230; CHECK-NEXT:    nop3231; CHECK-NEXT:    #NO_APP3232; CHECK-NEXT:    vsubss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 4-byte Folded Reload3233; CHECK-NEXT:    retq3234  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3235  %2 = fsub float %a0, %a13236  ret float %23237}3238 3239define <4 x float> @stack_fold_subss_int(<4 x float> %a0, <4 x float> %a1) {3240; CHECK-LABEL: stack_fold_subss_int:3241; CHECK:       # %bb.0:3242; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3243; CHECK-NEXT:    #APP3244; CHECK-NEXT:    nop3245; CHECK-NEXT:    #NO_APP3246; CHECK-NEXT:    vsubss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3247; CHECK-NEXT:    retq3248  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3249  %2 = extractelement <4 x float> %a0, i32 03250  %3 = extractelement <4 x float> %a1, i32 03251  %4 = fsub float %2, %33252  %5 = insertelement <4 x float> %a0, float %4, i32 03253  ret <4 x float> %53254}3255 3256define i32 @stack_fold_testpd(<2 x double> %a0, <2 x double> %a1) {3257; CHECK-LABEL: stack_fold_testpd:3258; CHECK:       # %bb.0:3259; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3260; CHECK-NEXT:    #APP3261; CHECK-NEXT:    nop3262; CHECK-NEXT:    #NO_APP3263; CHECK-NEXT:    xorl %eax, %eax3264; CHECK-NEXT:    vtestpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3265; CHECK-NEXT:    setb %al3266; CHECK-NEXT:    retq3267  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3268  %2 = call i32 @llvm.x86.avx.vtestc.pd(<2 x double> %a0, <2 x double> %a1)3269  ret i32 %23270}3271declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnone3272 3273define i32 @stack_fold_testpd_ymm(<4 x double> %a0, <4 x double> %a1) {3274; CHECK-LABEL: stack_fold_testpd_ymm:3275; CHECK:       # %bb.0:3276; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3277; CHECK-NEXT:    #APP3278; CHECK-NEXT:    nop3279; CHECK-NEXT:    #NO_APP3280; CHECK-NEXT:    xorl %eax, %eax3281; CHECK-NEXT:    vtestpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload3282; CHECK-NEXT:    setb %al3283; CHECK-NEXT:    vzeroupper3284; CHECK-NEXT:    retq3285  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3286  %2 = call i32 @llvm.x86.avx.vtestc.pd.256(<4 x double> %a0, <4 x double> %a1)3287  ret i32 %23288}3289declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind readnone3290 3291define i32 @stack_fold_testps(<4 x float> %a0, <4 x float> %a1) {3292; CHECK-LABEL: stack_fold_testps:3293; CHECK:       # %bb.0:3294; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3295; CHECK-NEXT:    #APP3296; CHECK-NEXT:    nop3297; CHECK-NEXT:    #NO_APP3298; CHECK-NEXT:    xorl %eax, %eax3299; CHECK-NEXT:    vtestps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3300; CHECK-NEXT:    setb %al3301; CHECK-NEXT:    retq3302  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3303  %2 = call i32 @llvm.x86.avx.vtestc.ps(<4 x float> %a0, <4 x float> %a1)3304  ret i32 %23305}3306declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone3307 3308define i32 @stack_fold_testps_ymm(<8 x float> %a0, <8 x float> %a1) {3309; CHECK-LABEL: stack_fold_testps_ymm:3310; CHECK:       # %bb.0:3311; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3312; CHECK-NEXT:    #APP3313; CHECK-NEXT:    nop3314; CHECK-NEXT:    #NO_APP3315; CHECK-NEXT:    xorl %eax, %eax3316; CHECK-NEXT:    vtestps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Folded Reload3317; CHECK-NEXT:    setb %al3318; CHECK-NEXT:    vzeroupper3319; CHECK-NEXT:    retq3320  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3321  %2 = call i32 @llvm.x86.avx.vtestc.ps.256(<8 x float> %a0, <8 x float> %a1)3322  ret i32 %23323}3324declare i32 @llvm.x86.avx.vtestc.ps.256(<8 x float>, <8 x float>) nounwind readnone3325 3326define i32 @stack_fold_ucomisd(double %a0, double %a1) {3327; CHECK-LABEL: stack_fold_ucomisd:3328; CHECK:       # %bb.0:3329; CHECK-NEXT:    vmovsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3330; CHECK-NEXT:    #APP3331; CHECK-NEXT:    nop3332; CHECK-NEXT:    #NO_APP3333; CHECK-NEXT:    xorl %eax, %eax3334; CHECK-NEXT:    vucomisd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload3335; CHECK-NEXT:    sete %al3336; CHECK-NEXT:    leal -1(%rax,%rax), %eax3337; CHECK-NEXT:    retq3338  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3339  %2 = fcmp ueq double %a0, %a13340  %3 = select i1 %2, i32 1, i32 -13341  ret i32 %33342}3343 3344define i32 @stack_fold_ucomisd_int(<2 x double> %a0, <2 x double> %a1) {3345; CHECK-LABEL: stack_fold_ucomisd_int:3346; CHECK:       # %bb.0:3347; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3348; CHECK-NEXT:    #APP3349; CHECK-NEXT:    nop3350; CHECK-NEXT:    #NO_APP3351; CHECK-NEXT:    vucomisd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3352; CHECK-NEXT:    setnp %al3353; CHECK-NEXT:    sete %cl3354; CHECK-NEXT:    andb %al, %cl3355; CHECK-NEXT:    movzbl %cl, %eax3356; CHECK-NEXT:    retq3357  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3358  %2 = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1)3359  ret i32 %23360}3361declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readnone3362 3363define i32 @stack_fold_ucomiss(float %a0, float %a1) {3364; CHECK-LABEL: stack_fold_ucomiss:3365; CHECK:       # %bb.0:3366; CHECK-NEXT:    vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3367; CHECK-NEXT:    #APP3368; CHECK-NEXT:    nop3369; CHECK-NEXT:    #NO_APP3370; CHECK-NEXT:    xorl %eax, %eax3371; CHECK-NEXT:    vucomiss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload3372; CHECK-NEXT:    sete %al3373; CHECK-NEXT:    leal -1(%rax,%rax), %eax3374; CHECK-NEXT:    retq3375  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3376  %2 = fcmp ueq float %a0, %a13377  %3 = select i1 %2, i32 1, i32 -13378  ret i32 %33379}3380 3381define i32 @stack_fold_ucomiss_int(<4 x float> %a0, <4 x float> %a1) {3382; CHECK-LABEL: stack_fold_ucomiss_int:3383; CHECK:       # %bb.0:3384; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3385; CHECK-NEXT:    #APP3386; CHECK-NEXT:    nop3387; CHECK-NEXT:    #NO_APP3388; CHECK-NEXT:    vucomiss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3389; CHECK-NEXT:    setnp %al3390; CHECK-NEXT:    sete %cl3391; CHECK-NEXT:    andb %al, %cl3392; CHECK-NEXT:    movzbl %cl, %eax3393; CHECK-NEXT:    retq3394  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3395  %2 = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1)3396  ret i32 %23397}3398declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone3399 3400define <2 x double> @stack_fold_unpckhpd(<2 x double> %a0, <2 x double> %a1) {3401; CHECK-LABEL: stack_fold_unpckhpd:3402; CHECK:       # %bb.0:3403; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3404; CHECK-NEXT:    #APP3405; CHECK-NEXT:    nop3406; CHECK-NEXT:    #NO_APP3407; CHECK-NEXT:    vunpckhpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3408; CHECK-NEXT:    # xmm0 = xmm0[1],mem[1]3409; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13410; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm03411; CHECK-NEXT:    retq3412  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3413  %2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 3>3414  ; fadd forces execution domain3415  %3 = fadd <2 x double> %2, <double 0x0, double 0x0>3416  ret <2 x double> %33417}3418 3419define <4 x double> @stack_fold_unpckhpd_ymm(<4 x double> %a0, <4 x double> %a1) {3420; CHECK-LABEL: stack_fold_unpckhpd_ymm:3421; CHECK:       # %bb.0:3422; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3423; CHECK-NEXT:    #APP3424; CHECK-NEXT:    nop3425; CHECK-NEXT:    #NO_APP3426; CHECK-NEXT:    vunpckhpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3427; CHECK-NEXT:    # ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]3428; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13429; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm03430; CHECK-NEXT:    retq3431  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3432  %2 = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>3433  ; fadd forces execution domain3434  %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>3435  ret <4 x double> %33436}3437 3438define <4 x float> @stack_fold_unpckhps(<4 x float> %a0, <4 x float> %a1) {3439; CHECK-LABEL: stack_fold_unpckhps:3440; CHECK:       # %bb.0:3441; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3442; CHECK-NEXT:    #APP3443; CHECK-NEXT:    nop3444; CHECK-NEXT:    #NO_APP3445; CHECK-NEXT:    vunpckhps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3446; CHECK-NEXT:    # xmm0 = xmm0[2],mem[2],xmm0[3],mem[3]3447; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm13448; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm03449; CHECK-NEXT:    retq3450  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3451  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 2, i32 6, i32 3, i32 7>3452  ; fadd forces execution domain3453  %3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>3454  ret <4 x float> %33455}3456 3457define <8 x float> @stack_fold_unpckhps_ymm(<8 x float> %a0, <8 x float> %a1) {3458; CHECK-LABEL: stack_fold_unpckhps_ymm:3459; CHECK:       # %bb.0:3460; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3461; CHECK-NEXT:    #APP3462; CHECK-NEXT:    nop3463; CHECK-NEXT:    #NO_APP3464; CHECK-NEXT:    vunpckhps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3465; CHECK-NEXT:    # ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7]3466; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm13467; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm03468; CHECK-NEXT:    retq3469  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3470  %2 = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15>3471  ; fadd forces execution domain3472  %3 = fadd <8 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>3473  ret <8 x float> %33474}3475 3476define <2 x double> @stack_fold_unpcklpd(<2 x double> %a0, <2 x double> %a1) {3477; CHECK-LABEL: stack_fold_unpcklpd:3478; CHECK:       # %bb.0:3479; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3480; CHECK-NEXT:    #APP3481; CHECK-NEXT:    nop3482; CHECK-NEXT:    #NO_APP3483; CHECK-NEXT:    vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3484; CHECK-NEXT:    # xmm0 = xmm0[0],mem[0]3485; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13486; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm03487; CHECK-NEXT:    retq3488  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3489  %2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 0, i32 2>3490  ; fadd forces execution domain3491  %3 = fadd <2 x double> %2, <double 0x0, double 0x0>3492  ret <2 x double> %33493}3494 3495define <4 x double> @stack_fold_unpcklpd_ymm(<4 x double> %a0, <4 x double> %a1) {3496; CHECK-LABEL: stack_fold_unpcklpd_ymm:3497; CHECK:       # %bb.0:3498; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3499; CHECK-NEXT:    #APP3500; CHECK-NEXT:    nop3501; CHECK-NEXT:    #NO_APP3502; CHECK-NEXT:    vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3503; CHECK-NEXT:    # ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]3504; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13505; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm03506; CHECK-NEXT:    retq3507  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3508  %2 = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>3509  ; fadd forces execution domain3510  %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>3511  ret <4 x double> %33512}3513 3514define <4 x float> @stack_fold_unpcklps(<4 x float> %a0, <4 x float> %a1) {3515; CHECK-LABEL: stack_fold_unpcklps:3516; CHECK:       # %bb.0:3517; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3518; CHECK-NEXT:    #APP3519; CHECK-NEXT:    nop3520; CHECK-NEXT:    #NO_APP3521; CHECK-NEXT:    vunpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3522; CHECK-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]3523; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm13524; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm03525; CHECK-NEXT:    retq3526  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3527  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 4, i32 1, i32 5>3528  ; fadd forces execution domain3529  %3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>3530  ret <4 x float> %33531}3532 3533define <8 x float> @stack_fold_unpcklps_ymm(<8 x float> %a0, <8 x float> %a1) {3534; CHECK-LABEL: stack_fold_unpcklps_ymm:3535; CHECK:       # %bb.0:3536; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3537; CHECK-NEXT:    #APP3538; CHECK-NEXT:    nop3539; CHECK-NEXT:    #NO_APP3540; CHECK-NEXT:    vunpcklps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3541; CHECK-NEXT:    # ymm0 = ymm0[0],mem[0],ymm0[1],mem[1],ymm0[4],mem[4],ymm0[5],mem[5]3542; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm13543; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm03544; CHECK-NEXT:    retq3545  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3546  %2 = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13>3547  ; fadd forces execution domain3548  %3 = fadd <8 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>3549  ret <8 x float> %33550}3551 3552define <2 x double> @stack_fold_xorpd(<2 x double> %a0, <2 x double> %a1) {3553; CHECK-LABEL: stack_fold_xorpd:3554; CHECK:       # %bb.0:3555; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3556; CHECK-NEXT:    #APP3557; CHECK-NEXT:    nop3558; CHECK-NEXT:    #NO_APP3559; CHECK-NEXT:    vxorpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3560; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13561; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm03562; CHECK-NEXT:    retq3563  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3564  %2 = bitcast <2 x double> %a0 to <2 x i64>3565  %3 = bitcast <2 x double> %a1 to <2 x i64>3566  %4 = xor <2 x i64> %2, %33567  %5 = bitcast <2 x i64> %4 to <2 x double>3568  ; fadd forces execution domain3569  %6 = fadd <2 x double> %5, <double 0x0, double 0x0>3570  ret <2 x double> %63571}3572 3573define <4 x double> @stack_fold_xorpd_ymm(<4 x double> %a0, <4 x double> %a1) {3574; CHECK-LABEL: stack_fold_xorpd_ymm:3575; CHECK:       # %bb.0:3576; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3577; CHECK-NEXT:    #APP3578; CHECK-NEXT:    nop3579; CHECK-NEXT:    #NO_APP3580; CHECK-NEXT:    vxorpd {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3581; CHECK-NEXT:    vxorpd %xmm1, %xmm1, %xmm13582; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm03583; CHECK-NEXT:    retq3584  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3585  %2 = bitcast <4 x double> %a0 to <4 x i64>3586  %3 = bitcast <4 x double> %a1 to <4 x i64>3587  %4 = xor <4 x i64> %2, %33588  %5 = bitcast <4 x i64> %4 to <4 x double>3589  ; fadd forces execution domain3590  %6 = fadd <4 x double> %5, <double 0x0, double 0x0, double 0x0, double 0x0>3591  ret <4 x double> %63592}3593 3594define <4 x float> @stack_fold_xorps(<4 x float> %a0, <4 x float> %a1) {3595; CHECK-LABEL: stack_fold_xorps:3596; CHECK:       # %bb.0:3597; CHECK-NEXT:    vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3598; CHECK-NEXT:    #APP3599; CHECK-NEXT:    nop3600; CHECK-NEXT:    #NO_APP3601; CHECK-NEXT:    vxorps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3602; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm13603; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm03604; CHECK-NEXT:    retq3605  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3606  %2 = bitcast <4 x float> %a0 to <2 x i64>3607  %3 = bitcast <4 x float> %a1 to <2 x i64>3608  %4 = xor <2 x i64> %2, %33609  %5 = bitcast <2 x i64> %4 to <4 x float>3610  ; fadd forces execution domain3611  %6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>3612  ret <4 x float> %63613}3614 3615define <8 x float> @stack_fold_xorps_ymm(<8 x float> %a0, <8 x float> %a1) {3616; CHECK-LABEL: stack_fold_xorps_ymm:3617; CHECK:       # %bb.0:3618; CHECK-NEXT:    vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill3619; CHECK-NEXT:    #APP3620; CHECK-NEXT:    nop3621; CHECK-NEXT:    #NO_APP3622; CHECK-NEXT:    vxorps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %ymm0 # 32-byte Folded Reload3623; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm13624; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm03625; CHECK-NEXT:    retq3626  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()3627  %2 = bitcast <8 x float> %a0 to <4 x i64>3628  %3 = bitcast <8 x float> %a1 to <4 x i64>3629  %4 = xor <4 x i64> %2, %33630  %5 = bitcast <4 x i64> %4 to <8 x float>3631  ; fadd forces execution domain3632  %6 = fadd <8 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0, float 0x0>3633  ret <8 x float> %63634}3635