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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl < %s | FileCheck %s3 4declare <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64>, <8 x i64>, <8 x i64>)5declare <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64>, <8 x i64>, <8 x i64>)6 7define <8 x i64> @stack_fold_vpmadd52huq(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2) {8; CHECK-LABEL: stack_fold_vpmadd52huq:9; CHECK: # %bb.0:10; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill11; CHECK-NEXT: #APP12; CHECK-NEXT: nop13; CHECK-NEXT: #NO_APP14; CHECK-NEXT: vpmadd52huq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload15; CHECK-NEXT: retq16 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()17 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2)18 ret <8 x i64> %219}20 21define <8 x i64> @stack_fold_vpmadd52huq_commuted(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2) {22; CHECK-LABEL: stack_fold_vpmadd52huq_commuted:23; CHECK: # %bb.0:24; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill25; CHECK-NEXT: #APP26; CHECK-NEXT: nop27; CHECK-NEXT: #NO_APP28; CHECK-NEXT: vpmadd52huq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload29; CHECK-NEXT: retq30 %1 = tail call <8 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()31 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64> %a0, <8 x i64> %a2, <8 x i64> %a1)32 ret <8 x i64> %233}34 35define <8 x i64> @stack_fold_vpmadd52huq_mask(ptr %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {36; CHECK-LABEL: stack_fold_vpmadd52huq_mask:37; CHECK: # %bb.0:38; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill39; CHECK-NEXT: #APP40; CHECK-NEXT: nop41; CHECK-NEXT: #NO_APP42; CHECK-NEXT: vmovdqa64 (%rdi), %zmm243; CHECK-NEXT: kmovw %esi, %k144; CHECK-NEXT: vpmadd52huq {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload45; CHECK-NEXT: vmovdqa64 %zmm2, %zmm046; CHECK-NEXT: retq47 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()48 %2 = load <8 x i64>, ptr %a049 %3 = call <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64> %2, <8 x i64> %a1, <8 x i64> %a2)50 %4 = bitcast i8 %mask to <8 x i1>51 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %252 ret <8 x i64> %553}54 55define <8 x i64> @stack_fold_vpmadd52huq_mask_commuted(ptr %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {56; CHECK-LABEL: stack_fold_vpmadd52huq_mask_commuted:57; CHECK: # %bb.0:58; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill59; CHECK-NEXT: #APP60; CHECK-NEXT: nop61; CHECK-NEXT: #NO_APP62; CHECK-NEXT: vmovdqa64 (%rdi), %zmm263; CHECK-NEXT: kmovw %esi, %k164; CHECK-NEXT: vpmadd52huq {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload65; CHECK-NEXT: vmovdqa64 %zmm2, %zmm066; CHECK-NEXT: retq67 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()68 %2 = load <8 x i64>, ptr %a069 %3 = call <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64> %2, <8 x i64> %a2, <8 x i64> %a1)70 %4 = bitcast i8 %mask to <8 x i1>71 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %272 ret <8 x i64> %573}74 75define <8 x i64> @stack_fold_vpmadd52huq_maskz(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, ptr %mask) {76; CHECK-LABEL: stack_fold_vpmadd52huq_maskz:77; CHECK: # %bb.0:78; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill79; CHECK-NEXT: #APP80; CHECK-NEXT: nop81; CHECK-NEXT: #NO_APP82; CHECK-NEXT: movzbl (%rdi), %eax83; CHECK-NEXT: kmovw %eax, %k184; CHECK-NEXT: vpmadd52huq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload85; CHECK-NEXT: retq86 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()87 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2)88 %3 = load i8, ptr %mask89 %4 = bitcast i8 %3 to <8 x i1>90 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> zeroinitializer91 ret <8 x i64> %592}93 94define <8 x i64> @stack_fold_vpmadd52huq_maskz_commuted(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, ptr %mask) {95; CHECK-LABEL: stack_fold_vpmadd52huq_maskz_commuted:96; CHECK: # %bb.0:97; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill98; CHECK-NEXT: #APP99; CHECK-NEXT: nop100; CHECK-NEXT: #NO_APP101; CHECK-NEXT: movzbl (%rdi), %eax102; CHECK-NEXT: kmovw %eax, %k1103; CHECK-NEXT: vpmadd52huq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload104; CHECK-NEXT: retq105 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()106 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64> %a0, <8 x i64> %a2, <8 x i64> %a1)107 %3 = load i8, ptr %mask108 %4 = bitcast i8 %3 to <8 x i1>109 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> zeroinitializer110 ret <8 x i64> %5111}112 113define <8 x i64> @stack_fold_vpmadd52luq(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2) {114; CHECK-LABEL: stack_fold_vpmadd52luq:115; CHECK: # %bb.0:116; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill117; CHECK-NEXT: #APP118; CHECK-NEXT: nop119; CHECK-NEXT: #NO_APP120; CHECK-NEXT: vpmadd52luq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload121; CHECK-NEXT: retq122 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()123 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2)124 ret <8 x i64> %2125}126 127define <8 x i64> @stack_fold_vpmadd52luq_commuted(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2) {128; CHECK-LABEL: stack_fold_vpmadd52luq_commuted:129; CHECK: # %bb.0:130; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill131; CHECK-NEXT: #APP132; CHECK-NEXT: nop133; CHECK-NEXT: #NO_APP134; CHECK-NEXT: vpmadd52luq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload135; CHECK-NEXT: retq136 %1 = tail call <8 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()137 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64> %a0, <8 x i64> %a2, <8 x i64> %a1)138 ret <8 x i64> %2139}140 141define <8 x i64> @stack_fold_vpmadd52luq_mask(ptr %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {142; CHECK-LABEL: stack_fold_vpmadd52luq_mask:143; CHECK: # %bb.0:144; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill145; CHECK-NEXT: #APP146; CHECK-NEXT: nop147; CHECK-NEXT: #NO_APP148; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2149; CHECK-NEXT: kmovw %esi, %k1150; CHECK-NEXT: vpmadd52luq {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload151; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0152; CHECK-NEXT: retq153 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()154 %2 = load <8 x i64>, ptr %a0155 %3 = call <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64> %2, <8 x i64> %a1, <8 x i64> %a2)156 %4 = bitcast i8 %mask to <8 x i1>157 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %2158 ret <8 x i64> %5159}160 161define <8 x i64> @stack_fold_vpmadd52luq_mask_commuted(ptr %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {162; CHECK-LABEL: stack_fold_vpmadd52luq_mask_commuted:163; CHECK: # %bb.0:164; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill165; CHECK-NEXT: #APP166; CHECK-NEXT: nop167; CHECK-NEXT: #NO_APP168; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2169; CHECK-NEXT: kmovw %esi, %k1170; CHECK-NEXT: vpmadd52luq {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload171; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0172; CHECK-NEXT: retq173 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()174 %2 = load <8 x i64>, ptr %a0175 %3 = call <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64> %2, <8 x i64> %a2, <8 x i64> %a1)176 %4 = bitcast i8 %mask to <8 x i1>177 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %2178 ret <8 x i64> %5179}180 181define <8 x i64> @stack_fold_vpmadd52luq_maskz(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, ptr %mask) {182; CHECK-LABEL: stack_fold_vpmadd52luq_maskz:183; CHECK: # %bb.0:184; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill185; CHECK-NEXT: #APP186; CHECK-NEXT: nop187; CHECK-NEXT: #NO_APP188; CHECK-NEXT: movzbl (%rdi), %eax189; CHECK-NEXT: kmovw %eax, %k1190; CHECK-NEXT: vpmadd52luq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload191; CHECK-NEXT: retq192 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()193 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2)194 %3 = load i8, ptr %mask195 %4 = bitcast i8 %3 to <8 x i1>196 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> zeroinitializer197 ret <8 x i64> %5198}199 200define <8 x i64> @stack_fold_vpmadd52luq_maskz_commuted(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, ptr %mask) {201; CHECK-LABEL: stack_fold_vpmadd52luq_maskz_commuted:202; CHECK: # %bb.0:203; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill204; CHECK-NEXT: #APP205; CHECK-NEXT: nop206; CHECK-NEXT: #NO_APP207; CHECK-NEXT: movzbl (%rdi), %eax208; CHECK-NEXT: kmovw %eax, %k1209; CHECK-NEXT: vpmadd52luq {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload210; CHECK-NEXT: retq211 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()212 %2 = call <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64> %a0, <8 x i64> %a2, <8 x i64> %a1)213 %3 = load i8, ptr %mask214 %4 = bitcast i8 %3 to <8 x i1>215 %5 = select <8 x i1> %4, <8 x i64> %2, <8 x i64> zeroinitializer216 ret <8 x i64> %5217}218