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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vbmi,+avx512cd,+avx512vpopcntdq,+avx512vnni < %s | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-unknown-unknown"6 7define <16 x i32> @stack_fold_vpdpwssd(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2) {8; CHECK-LABEL: stack_fold_vpdpwssd:9; CHECK: # %bb.0:10; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill11; CHECK-NEXT: #APP12; CHECK-NEXT: nop13; CHECK-NEXT: #NO_APP14; CHECK-NEXT: vpdpwssd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload15; CHECK-NEXT: retq16 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()17 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2)18 ret <16 x i32> %219}20 21define <16 x i32> @stack_fold_vpdpwssd_commuted(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2) {22; CHECK-LABEL: stack_fold_vpdpwssd_commuted:23; CHECK: # %bb.0:24; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill25; CHECK-NEXT: #APP26; CHECK-NEXT: nop27; CHECK-NEXT: #NO_APP28; CHECK-NEXT: vpdpwssd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload29; CHECK-NEXT: retq30 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()31 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32> %a0, <16 x i32> %a2, <16 x i32> %a1)32 ret <16 x i32> %233}34 35define <16 x i32> @stack_fold_vpdpwssd_mask(ptr %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {36; CHECK-LABEL: stack_fold_vpdpwssd_mask:37; CHECK: # %bb.0:38; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill39; CHECK-NEXT: #APP40; CHECK-NEXT: nop41; CHECK-NEXT: #NO_APP42; CHECK-NEXT: vmovdqa64 (%rdi), %zmm243; CHECK-NEXT: kmovd %esi, %k144; CHECK-NEXT: vpdpwssd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload45; CHECK-NEXT: vmovdqa64 %zmm2, %zmm046; CHECK-NEXT: retq47 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()48 %2 = load <16 x i32>, ptr %a049 %3 = call <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32> %2, <16 x i32> %a1, <16 x i32> %a2)50 %4 = bitcast i16 %mask to <16 x i1>51 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %252 ret <16 x i32> %553}54 55define <16 x i32> @stack_fold_vpdpwssd_mask_commuted(ptr %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {56; CHECK-LABEL: stack_fold_vpdpwssd_mask_commuted:57; CHECK: # %bb.0:58; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill59; CHECK-NEXT: #APP60; CHECK-NEXT: nop61; CHECK-NEXT: #NO_APP62; CHECK-NEXT: vmovdqa64 (%rdi), %zmm263; CHECK-NEXT: kmovd %esi, %k164; CHECK-NEXT: vpdpwssd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload65; CHECK-NEXT: vmovdqa64 %zmm2, %zmm066; CHECK-NEXT: retq67 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()68 %2 = load <16 x i32>, ptr %a069 %3 = call <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32> %2, <16 x i32> %a2, <16 x i32> %a1)70 %4 = bitcast i16 %mask to <16 x i1>71 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %272 ret <16 x i32> %573}74 75define <16 x i32> @stack_fold_vpdpwssd_maskz(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, ptr %mask) {76; CHECK-LABEL: stack_fold_vpdpwssd_maskz:77; CHECK: # %bb.0:78; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill79; CHECK-NEXT: #APP80; CHECK-NEXT: nop81; CHECK-NEXT: #NO_APP82; CHECK-NEXT: kmovw (%rdi), %k183; CHECK-NEXT: vpdpwssd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload84; CHECK-NEXT: retq85 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()86 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2)87 %3 = load i16, ptr %mask88 %4 = bitcast i16 %3 to <16 x i1>89 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> zeroinitializer90 ret <16 x i32> %591}92 93define <16 x i32> @stack_fold_vpdpwssd_maskz_commuted(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, ptr %mask) {94; CHECK-LABEL: stack_fold_vpdpwssd_maskz_commuted:95; CHECK: # %bb.0:96; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill97; CHECK-NEXT: #APP98; CHECK-NEXT: nop99; CHECK-NEXT: #NO_APP100; CHECK-NEXT: kmovw (%rdi), %k1101; CHECK-NEXT: vpdpwssd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload102; CHECK-NEXT: retq103 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()104 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32> %a0, <16 x i32> %a2, <16 x i32> %a1)105 %3 = load i16, ptr %mask106 %4 = bitcast i16 %3 to <16 x i1>107 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> zeroinitializer108 ret <16 x i32> %5109}110 111define <16 x i32> @stack_fold_vpdpwssds(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2) {112; CHECK-LABEL: stack_fold_vpdpwssds:113; CHECK: # %bb.0:114; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill115; CHECK-NEXT: #APP116; CHECK-NEXT: nop117; CHECK-NEXT: #NO_APP118; CHECK-NEXT: vpdpwssds {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload119; CHECK-NEXT: retq120 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()121 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2)122 ret <16 x i32> %2123}124 125define <16 x i32> @stack_fold_vpdpwssds_commuted(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2) {126; CHECK-LABEL: stack_fold_vpdpwssds_commuted:127; CHECK: # %bb.0:128; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill129; CHECK-NEXT: #APP130; CHECK-NEXT: nop131; CHECK-NEXT: #NO_APP132; CHECK-NEXT: vpdpwssds {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 # 64-byte Folded Reload133; CHECK-NEXT: retq134 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()135 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32> %a0, <16 x i32> %a2, <16 x i32> %a1)136 ret <16 x i32> %2137}138 139define <16 x i32> @stack_fold_vpdpwssds_mask(ptr %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {140; CHECK-LABEL: stack_fold_vpdpwssds_mask:141; CHECK: # %bb.0:142; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill143; CHECK-NEXT: #APP144; CHECK-NEXT: nop145; CHECK-NEXT: #NO_APP146; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2147; CHECK-NEXT: kmovd %esi, %k1148; CHECK-NEXT: vpdpwssds {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload149; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0150; CHECK-NEXT: retq151 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()152 %2 = load <16 x i32>, ptr %a0153 %3 = call <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32> %2, <16 x i32> %a1, <16 x i32> %a2)154 %4 = bitcast i16 %mask to <16 x i1>155 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %2156 ret <16 x i32> %5157}158 159define <16 x i32> @stack_fold_vpdpwssds_mask_commuted(ptr %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {160; CHECK-LABEL: stack_fold_vpdpwssds_mask_commuted:161; CHECK: # %bb.0:162; CHECK-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill163; CHECK-NEXT: #APP164; CHECK-NEXT: nop165; CHECK-NEXT: #NO_APP166; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2167; CHECK-NEXT: kmovd %esi, %k1168; CHECK-NEXT: vpdpwssds {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm2 {%k1} # 64-byte Folded Reload169; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0170; CHECK-NEXT: retq171 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()172 %2 = load <16 x i32>, ptr %a0173 %3 = call <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32> %2, <16 x i32> %a2, <16 x i32> %a1)174 %4 = bitcast i16 %mask to <16 x i1>175 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %2176 ret <16 x i32> %5177}178 179define <16 x i32> @stack_fold_vpdpwssds_maskz(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, ptr %mask) {180; CHECK-LABEL: stack_fold_vpdpwssds_maskz:181; CHECK: # %bb.0:182; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill183; CHECK-NEXT: #APP184; CHECK-NEXT: nop185; CHECK-NEXT: #NO_APP186; CHECK-NEXT: kmovw (%rdi), %k1187; CHECK-NEXT: vpdpwssds {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload188; CHECK-NEXT: retq189 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()190 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2)191 %3 = load i16, ptr %mask192 %4 = bitcast i16 %3 to <16 x i1>193 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> zeroinitializer194 ret <16 x i32> %5195}196 197define <16 x i32> @stack_fold_vpdpwssds_maskz_commuted(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, ptr %mask) {198; CHECK-LABEL: stack_fold_vpdpwssds_maskz_commuted:199; CHECK: # %bb.0:200; CHECK-NEXT: vmovups %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill201; CHECK-NEXT: #APP202; CHECK-NEXT: nop203; CHECK-NEXT: #NO_APP204; CHECK-NEXT: kmovw (%rdi), %k1205; CHECK-NEXT: vpdpwssds {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm0 {%k1} {z} # 64-byte Folded Reload206; CHECK-NEXT: retq207 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()208 %2 = call <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32> %a0, <16 x i32> %a2, <16 x i32> %a1)209 %3 = load i16, ptr %mask210 %4 = bitcast i16 %3 to <16 x i1>211 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> zeroinitializer212 ret <16 x i32> %5213}214 215declare <16 x i32> @llvm.x86.avx512.vpdpwssd.512(<16 x i32>, <16 x i32>, <16 x i32>)216declare <16 x i32> @llvm.x86.avx512.vpdpwssds.512(<16 x i32>, <16 x i32>, <16 x i32>)217