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1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -terminal-rule=0 | FileCheck %s2;3; Note: Print verbose stackmaps using -debug-only=stackmaps.4 5; FIXME: Test should be fixed to produce the correct sized spill with6; -terminal-rule=0 flag removed7 8; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps9; CHECK-NEXT: __LLVM_StackMaps:10; Header11; CHECK-NEXT: .byte 312; CHECK-NEXT: .byte 013; CHECK-NEXT: .short 014; Num Functions15; CHECK-NEXT: .long 1616; Num LargeConstants17; CHECK-NEXT: .long 418; Num Callsites19; CHECK-NEXT: .long 2020 21; Functions and stack size22; CHECK-NEXT: .quad _constantargs23; CHECK-NEXT: .quad 824; CHECK-NEXT: .quad 125; CHECK-NEXT: .quad _osrinline26; CHECK-NEXT: .quad 2427; CHECK-NEXT: .quad 128; CHECK-NEXT: .quad _osrcold29; CHECK-NEXT: .quad 830; CHECK-NEXT: .quad 131; CHECK-NEXT: .quad _propertyRead32; CHECK-NEXT: .quad 833; CHECK-NEXT: .quad 134; CHECK-NEXT: .quad _propertyWrite35; CHECK-NEXT: .quad 836; CHECK-NEXT: .quad 137; CHECK-NEXT: .quad _jsVoidCall38; CHECK-NEXT: .quad 839; CHECK-NEXT: .quad 140; CHECK-NEXT: .quad _jsIntCall41; CHECK-NEXT: .quad 842; CHECK-NEXT: .quad 143; CHECK-NEXT: .quad _spilledValue44; CHECK-NEXT: .quad 845; CHECK-NEXT: .quad 146; CHECK-NEXT: .quad _spillSubReg47; CHECK-NEXT: .quad 5648; CHECK-NEXT: .quad 149; CHECK-NEXT: .quad _subRegOffset50; CHECK-NEXT: .quad 5651; CHECK-NEXT: .quad 152; CHECK-NEXT: .quad _liveConstant53; CHECK-NEXT: .quad 854; CHECK-NEXT: .quad 155; CHECK-NEXT: .quad _directFrameIdx56; CHECK-NEXT: .quad 5657; CHECK-NEXT: .quad 258; CHECK-NEXT: .quad _longid59; CHECK-NEXT: .quad 860; CHECK-NEXT: .quad 461; CHECK-NEXT: .quad _clobberScratch62; CHECK-NEXT: .quad 5663; CHECK-NEXT: .quad 164; CHECK-NEXT: .quad _needsStackRealignment65; CHECK-NEXT: .quad -166; CHECK-NEXT: .quad 167; CHECK-NEXT: .quad _floats68; CHECK-NEXT: .quad 2469; CHECK-NEXT: .quad 170 71; Large Constants72; CHECK-NEXT: .quad 214748364873; CHECK-NEXT: .quad 429496729574; CHECK-NEXT: .quad 429496729675; CHECK-NEXT: .quad 429496729776 77; Callsites78; Constant arguments79;80; CHECK-NEXT: .quad 181; CHECK-NEXT: .long L{{.*}}-_constantargs82; CHECK-NEXT: .short 083; CHECK-NEXT: .short 1484; SmallConstant85; CHECK-NEXT: .byte 486; CHECK-NEXT: .byte 087; CHECK-NEXT: .short 888; CHECK-NEXT: .short 089; CHECK-NEXT: .short 090; CHECK-NEXT: .long -191; SmallConstant92; CHECK-NEXT: .byte 493; CHECK-NEXT: .byte 094; CHECK-NEXT: .short 895; CHECK-NEXT: .short 096; CHECK-NEXT: .short 097; CHECK-NEXT: .long -198; SmallConstant99; CHECK-NEXT: .byte 4100; CHECK-NEXT: .byte 0101; CHECK-NEXT: .short 8102; CHECK-NEXT: .short 0103; CHECK-NEXT: .short 0104; CHECK-NEXT: .long 65536105; SmallConstant106; CHECK-NEXT: .byte 4107; CHECK-NEXT: .byte 0108; CHECK-NEXT: .short 8109; CHECK-NEXT: .short 0110; CHECK-NEXT: .short 0111; CHECK-NEXT: .long 2000000000112; SmallConstant113; CHECK-NEXT: .byte 4114; CHECK-NEXT: .byte 0115; CHECK-NEXT: .short 8116; CHECK-NEXT: .short 0117; CHECK-NEXT: .short 0118; CHECK-NEXT: .long 2147483647119; SmallConstant120; CHECK-NEXT: .byte 4121; CHECK-NEXT: .byte 0122; CHECK-NEXT: .short 8123; CHECK-NEXT: .short 0124; CHECK-NEXT: .short 0125; CHECK-NEXT: .long -1126; SmallConstant127; CHECK-NEXT: .byte 4128; CHECK-NEXT: .byte 0129; CHECK-NEXT: .short 8130; CHECK-NEXT: .short 0131; CHECK-NEXT: .short 0132; CHECK-NEXT: .long -1133; SmallConstant134; CHECK-NEXT: .byte 4135; CHECK-NEXT: .byte 0136; CHECK-NEXT: .short 8137; CHECK-NEXT: .short 0138; CHECK-NEXT: .short 0139; CHECK-NEXT: .long 0140; LargeConstant at index 0141; CHECK-NEXT: .byte 5142; CHECK-NEXT: .byte 0143; CHECK-NEXT: .short 8144; CHECK-NEXT: .short 0145; CHECK-NEXT: .short 0146; CHECK-NEXT: .long 0147; LargeConstant at index 1148; CHECK-NEXT: .byte 5149; CHECK-NEXT: .byte 0150; CHECK-NEXT: .short 8151; CHECK-NEXT: .short 0152; CHECK-NEXT: .short 0153; CHECK-NEXT: .long 1154; LargeConstant at index 2155; CHECK-NEXT: .byte 5156; CHECK-NEXT: .byte 0157; CHECK-NEXT: .short 8158; CHECK-NEXT: .short 0159; CHECK-NEXT: .short 0160; CHECK-NEXT: .long 2161; SmallConstant162; CHECK-NEXT: .byte 4163; CHECK-NEXT: .byte 0164; CHECK-NEXT: .short 8165; CHECK-NEXT: .short 0166; CHECK-NEXT: .short 0167; CHECK-NEXT: .long -1168; SmallConstant169; CHECK-NEXT: .byte 4170; CHECK-NEXT: .byte 0171; CHECK-NEXT: .short 8172; CHECK-NEXT: .short 0173; CHECK-NEXT: .short 0174; CHECK-NEXT: .long 66175; LargeConstant at index 3176; CHECK-NEXT: .byte 5177; CHECK-NEXT: .byte 0178; CHECK-NEXT: .short 8179; CHECK-NEXT: .short 0180; CHECK-NEXT: .short 0181; CHECK-NEXT: .long 3182 183define void @constantargs() {184entry:185 %0 = inttoptr i64 12345 to ptr186 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 15, ptr %0, i32 0, i16 65535, i16 -1, i32 65536, i32 2000000000, i32 2147483647, i32 -1, i32 4294967295, i32 4294967296, i64 2147483648, i64 4294967295, i64 4294967296, i64 -1, i128 66, i128 4294967297)187 ret void188}189 190; Inline OSR Exit191;192; CHECK-LABEL: .long L{{.*}}-_osrinline193; CHECK-NEXT: .short 0194; CHECK-NEXT: .short 2195; CHECK-NEXT: .byte 1196; CHECK-NEXT: .byte 0197; CHECK-NEXT: .short 8198; CHECK-NEXT: .short {{[0-9]+}}199; CHECK-NEXT: .short 0200; CHECK-NEXT: .long 0201; CHECK-NEXT: .byte 1202; CHECK-NEXT: .byte 0203; CHECK-NEXT: .short 8204; CHECK-NEXT: .short {{[0-9]+}}205; CHECK-NEXT: .short 0206; CHECK-NEXT: .long 0207define void @osrinline(i64 %a, i64 %b) {208entry:209 ; Runtime void->void call.210 call void inttoptr (i64 -559038737 to ptr)()211 ; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars.212 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b)213 ret void214}215 216; Cold OSR Exit217;218; 2 live variables in register.219;220; CHECK-LABEL: .long L{{.*}}-_osrcold221; CHECK-NEXT: .short 0222; CHECK-NEXT: .short 2223; CHECK-NEXT: .byte 1224; CHECK-NEXT: .byte 0225; CHECK-NEXT: .short 8226; CHECK-NEXT: .short {{[0-9]+}}227; CHECK-NEXT: .short 0228; CHECK-NEXT: .long 0229; CHECK-NEXT: .byte 1230; CHECK-NEXT: .byte 0231; CHECK-NEXT: .short 8232; CHECK-NEXT: .short {{[0-9]+}}233; CHECK-NEXT: .short 0234; CHECK-NEXT: .long 0235define void @osrcold(i64 %a, i64 %b) {236entry:237 %test = icmp slt i64 %a, %b238 br i1 %test, label %ret, label %cold239cold:240 ; OSR patchpoint with 12-byte nop-slide and 2 live vars.241 %thunk = inttoptr i64 -559038737 to ptr242 call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4, i32 15, ptr %thunk, i32 0, i64 %a, i64 %b)243 unreachable244ret:245 ret void246}247 248; Property Read249; CHECK-LABEL: .long L{{.*}}-_propertyRead250; CHECK-NEXT: .short 0251; CHECK-NEXT: .short 2252; CHECK-NEXT: .byte 1253; CHECK-NEXT: .byte 0254; CHECK-NEXT: .short 8255; CHECK-NEXT: .short {{[0-9]+}}256; CHECK-NEXT: .short 0257; CHECK-NEXT: .long 0258; CHECK-NEXT: .byte 1259; CHECK-NEXT: .byte 0260; CHECK-NEXT: .short 8261; CHECK-NEXT: .short {{[0-9]+}}262; CHECK-NEXT: .short 0263; CHECK-NEXT: .long 0264define i64 @propertyRead(ptr %obj) {265entry:266 %resolveRead = inttoptr i64 -559038737 to ptr267 %result = call anyregcc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 15, ptr %resolveRead, i32 1, ptr %obj)268 %add = add i64 %result, 3269 ret i64 %add270}271 272; Property Write273; CHECK-LABEL: .long L{{.*}}-_propertyWrite274; CHECK-NEXT: .short 0275; CHECK-NEXT: .short 2276; CHECK-NEXT: .byte 1277; CHECK-NEXT: .byte 0278; CHECK-NEXT: .short 8279; CHECK-NEXT: .short {{[0-9]+}}280; CHECK-NEXT: .short 0281; CHECK-NEXT: .long 0282; CHECK-NEXT: .byte 1283; CHECK-NEXT: .byte 0284; CHECK-NEXT: .short 8285; CHECK-NEXT: .short {{[0-9]+}}286; CHECK-NEXT: .short 0287; CHECK-NEXT: .long 0288define void @propertyWrite(i64 %dummy1, ptr %obj, i64 %dummy2, i64 %a) {289entry:290 %resolveWrite = inttoptr i64 -559038737 to ptr291 call anyregcc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 15, ptr %resolveWrite, i32 2, ptr %obj, i64 %a)292 ret void293}294 295; Void JS Call296;297; 2 live variables in registers.298;299; CHECK-LABEL: .long L{{.*}}-_jsVoidCall300; CHECK-NEXT: .short 0301; CHECK-NEXT: .short 2302; CHECK-NEXT: .byte 1303; CHECK-NEXT: .byte 0304; CHECK-NEXT: .short 8305; CHECK-NEXT: .short {{[0-9]+}}306; CHECK-NEXT: .short 0307; CHECK-NEXT: .long 0308; CHECK-NEXT: .byte 1309; CHECK-NEXT: .byte 0310; CHECK-NEXT: .short 8311; CHECK-NEXT: .short {{[0-9]+}}312; CHECK-NEXT: .short 0313; CHECK-NEXT: .long 0314define void @jsVoidCall(i64 %dummy1, ptr %obj, i64 %arg, i64 %l1, i64 %l2) {315entry:316 %resolveCall = inttoptr i64 -559038737 to ptr317 call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 7, i32 15, ptr %resolveCall, i32 2, ptr %obj, i64 %arg, i64 %l1, i64 %l2)318 ret void319}320 321; i64 JS Call322;323; 2 live variables in registers.324;325; CHECK-LABEL: .long L{{.*}}-_jsIntCall326; CHECK-NEXT: .short 0327; CHECK-NEXT: .short 2328; CHECK-NEXT: .byte 1329; CHECK-NEXT: .byte 0330; CHECK-NEXT: .short 8331; CHECK-NEXT: .short {{[0-9]+}}332; CHECK-NEXT: .short 0333; CHECK-NEXT: .long 0334; CHECK-NEXT: .byte 1335; CHECK-NEXT: .byte 0336; CHECK-NEXT: .short 8337; CHECK-NEXT: .short {{[0-9]+}}338; CHECK-NEXT: .short 0339; CHECK-NEXT: .long 0340define i64 @jsIntCall(i64 %dummy1, ptr %obj, i64 %arg, i64 %l1, i64 %l2) {341entry:342 %resolveCall = inttoptr i64 -559038737 to ptr343 %result = call i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 8, i32 15, ptr %resolveCall, i32 2, ptr %obj, i64 %arg, i64 %l1, i64 %l2)344 %add = add i64 %result, 3345 ret i64 %add346}347 348; Spilled stack map values.349;350; Verify 17 stack map entries.351;352; CHECK-LABEL: .long L{{.*}}-_spilledValue353; CHECK-NEXT: .short 0354; CHECK-NEXT: .short 17355;356; Check that at least one is a spilled entry from RBP.357; Location: Indirect RBP + ...358; CHECK: .byte 3359; CHECK-NEXT: .byte 0360; CHECK-NEXT: .short 8361; CHECK-NEXT: .short 6362; CHECK-NEXT: .short 0363; CHECK-NEXT: .long364define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {365entry:366 call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 15, ptr null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)367 ret void368}369 370; Spill a subregister stackmap operand.371;372; CHECK-LABEL: .long L{{.*}}-_spillSubReg373; CHECK-NEXT: .short 0374; 4 locations375; CHECK-NEXT: .short 1376;377; Check that the subregister operand is a 4-byte spill.378; Location: Indirect, 4-byte, RBP + ...379; CHECK: .byte 3380; CHECK-NEXT: .byte 0381; CHECK-NEXT: .short 4382; CHECK-NEXT: .short 6383; CHECK-NEXT: .short 0384; CHECK-NEXT: .long385define void @spillSubReg(i64 %arg, i1 %arg2) #0 {386bb:387 br i1 %arg2, label %bb1, label %bb2388 389bb1:390 unreachable391 392bb2:393 %tmp = load i64, ptr inttoptr (i64 140685446136880 to ptr)394 br i1 %arg2, label %bb16, label %bb17395 396bb16:397 unreachable398 399bb17:400 %tmp32 = trunc i64 %tmp to i32401 br i1 %arg2, label %bb60, label %bb61402 403bb60:404 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind405 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 13, i32 5, i32 %tmp32)406 unreachable407 408bb61:409 unreachable410}411 412; Map a single byte subregister. There is no DWARF register number, so413; we expect the register to be encoded with the proper size and spill offset. We don't know which414;415; CHECK-LABEL: .long L{{.*}}-_subRegOffset416; CHECK-NEXT: .short 0417; 2 locations418; CHECK-NEXT: .short 2419;420; Check that the subregister operands are 1-byte spills.421; Location 0: Register, 4-byte, AL422; CHECK-NEXT: .byte 1423; CHECK-NEXT: .byte 0424; CHECK-NEXT: .short 1425; CHECK-NEXT: .short 0426; CHECK-NEXT: .short 0427; CHECK-NEXT: .long 0428;429; Location 1: Register, 4-byte, BL430; CHECK-NEXT: .byte 1431; CHECK-NEXT: .byte 0432; CHECK-NEXT: .short 1433; CHECK-NEXT: .short 3434; CHECK-NEXT: .short 0435; CHECK-NEXT: .long 0436define void @subRegOffset(i16 %arg) {437 %v = mul i16 %arg, 5438 %a0 = trunc i16 %v to i8439 tail call void asm sideeffect "nop", "~{bx}"() nounwind440 %arghi = lshr i16 %v, 8441 %a1 = trunc i16 %arghi to i8442 tail call void asm sideeffect "nop", "~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind443 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 5, i8 %a0, i8 %a1)444 ret void445}446 447; Map a constant value.448;449; CHECK-LABEL: .long L{{.*}}-_liveConstant450; CHECK-NEXT: .short 0451; 1 location452; CHECK-NEXT: .short 1453; Loc 0: SmallConstant454; CHECK-NEXT: .byte 4455; CHECK-NEXT: .byte 0456; CHECK-NEXT: .short 8457; CHECK-NEXT: .short 0458; CHECK-NEXT: .short 0459; CHECK-NEXT: .long 33460 461define void @liveConstant() {462 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 15, i32 5, i32 33)463 ret void464}465 466; Directly map an alloca's address.467;468; Callsite 16469; CHECK-LABEL: .long L{{.*}}-_directFrameIdx470; CHECK-NEXT: .short 0471; 1 location472; CHECK-NEXT: .short 1473; Loc 0: Direct RBP - ofs474; CHECK-NEXT: .byte 2475; CHECK-NEXT: .byte 0476; CHECK-NEXT: .short 8477; CHECK-NEXT: .short 6478; CHECK-NEXT: .short 0479; CHECK-NEXT: .long480 481; Callsite 17482; CHECK-LABEL: .long L{{.*}}-_directFrameIdx483; CHECK-NEXT: .short 0484; 2 locations485; CHECK-NEXT: .short 2486; Loc 0: Direct RBP - ofs487; CHECK-NEXT: .byte 2488; CHECK-NEXT: .byte 0489; CHECK-NEXT: .short 8490; CHECK-NEXT: .short 6491; CHECK-NEXT: .short 0492; CHECK-NEXT: .long493; Loc 1: Direct RBP - ofs494; CHECK-NEXT: .byte 2495; CHECK-NEXT: .byte 0496; CHECK-NEXT: .short 8497; CHECK-NEXT: .short 6498; CHECK-NEXT: .short 0499; CHECK-NEXT: .long500define void @directFrameIdx() {501entry:502 %metadata1 = alloca i64, i32 3, align 8503 store i64 11, ptr %metadata1504 store i64 12, ptr %metadata1505 store i64 13, ptr %metadata1506 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 0, ptr %metadata1)507 %metadata2 = alloca i8, i32 4, align 8508 %metadata3 = alloca i16, i32 4, align 8509 call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 17, i32 5, ptr null, i32 0, ptr %metadata2, ptr %metadata3)510 ret void511}512 513; Test a 64-bit ID.514;515; CHECK: .quad 4294967295516; CHECK-LABEL: .long L{{.*}}-_longid517; CHECK: .quad 4294967296518; CHECK-LABEL: .long L{{.*}}-_longid519; CHECK: .quad 9223372036854775807520; CHECK-LABEL: .long L{{.*}}-_longid521; CHECK: .quad -1522; CHECK-LABEL: .long L{{.*}}-_longid523define void @longid() {524entry:525 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967295, i32 0, ptr null, i32 0)526 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 4294967296, i32 0, ptr null, i32 0)527 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 9223372036854775807, i32 0, ptr null, i32 0)528 tail call void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 -1, i32 0, ptr null, i32 0)529 ret void530}531 532; Map a value when R11 is the only free register.533; The scratch register should not be used for a live stackmap value.534;535; CHECK-LABEL: .long L{{.*}}-_clobberScratch536; CHECK-NEXT: .short 0537; 1 location538; CHECK-NEXT: .short 1539; Loc 0: Indirect fp - offset540; CHECK-NEXT: .byte 3541; CHECK-NEXT: .byte 0542; CHECK-NEXT: .short 4543; CHECK-NEXT: .short 6544; CHECK-NEXT: .short 0545; CHECK-NEXT: .long -{{[0-9]+}}546define void @clobberScratch(i32 %a) {547 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r12},~{r13},~{r14},~{r15}"() nounwind548 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 16, i32 8, i32 %a)549 ret void550}551 552; A stack frame which needs to be realigned at runtime (to meet alignment553; criteria for values on the stack) does not have a fixed frame size.554; CHECK-LABEL: .long L{{.*}}-_needsStackRealignment555; CHECK-NEXT: .short 0556; 0 locations557; CHECK-NEXT: .short 0558define void @needsStackRealignment() {559 %val = alloca i64, i32 3, align 128560 tail call void (...) @escape_values(ptr %val)561; Note: Adding any non-constant to the stackmap would fail because we562; expected to be able to address off the frame pointer. In a realigned563; frame, we must use the stack pointer instead. This is a separate bug.564 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0)565 ret void566}567declare void @escape_values(...)568 569; CHECK-LABEL: .long L{{.*}}-_floats570; CHECK-NEXT: .short 0571; Num Locations572; CHECK-NEXT: .short 6573; Loc 0: constant float stored to FP register574; CHECK-NEXT: .byte 1575; CHECK-NEXT: .byte 0576; CHECK-NEXT: .short 16577; CHECK-NEXT: .short {{.*}}578; CHECK-NEXT: .short 0579; CHECK-NEXT: .long 0580; Loc 0: constant double stored to FP register581; CHECK-NEXT: .byte 1582; CHECK-NEXT: .byte 0583; CHECK-NEXT: .short 16584; CHECK-NEXT: .short {{.*}}585; CHECK-NEXT: .short 0586; CHECK-NEXT: .long 0587; Loc 1: float value in FP register588; CHECK-NEXT: .byte 1589; CHECK-NEXT: .byte 0590; CHECK-NEXT: .short 16591; CHECK-NEXT: .short {{.*}}592; CHECK-NEXT: .short 0593; CHECK-NEXT: .long 0594; Loc 2: double value in FP register595; CHECK-NEXT: .byte 1596; CHECK-NEXT: .byte 0597; CHECK-NEXT: .short 16598; CHECK-NEXT: .short {{.*}}599; CHECK-NEXT: .short 0600; CHECK-NEXT: .long 0601; Loc 3: float on stack602; CHECK-NEXT: .byte 2603; CHECK-NEXT: .byte 0604; CHECK-NEXT: .short 8605; CHECK-NEXT: .short {{.*}}606; CHECK-NEXT: .short 0607; CHECK-NEXT: .long -{{.*}}608; Loc 4: double on stack609; CHECK-NEXT: .byte 2610; CHECK-NEXT: .byte 0611; CHECK-NEXT: .short 8612; CHECK-NEXT: .short {{.*}}613; CHECK-NEXT: .short 0614; CHECK-NEXT: .long -{{.*}}615define void @floats(float %f, double %g) {616 %ff = alloca float617 %gg = alloca double618 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 888, i32 0, float 1.25,619 double 1.5, float %f, double %g, ptr %ff, ptr %gg)620 ret void621}622 623declare void @llvm.experimental.stackmap(i64, i32, ...)624declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)625declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)626