159 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2# RUN: llc -o - %s -fixup-allow-gcptr-in-csr=true -start-after=finalize-isel | FileCheck %s3 4--- |5 ; ModuleID = 'test/CodeGen/X86/statepoint-vreg.ll'6 source_filename = "test/CodeGen/X86/statepoint-vreg.ll"7 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"8 target triple = "x86_64-pc-linux-gnu"9 10 declare void @bar()11 12 define i32 @test_basic(ptr addrspace(1) %obj1, ptr addrspace(1) %obj2) gc "statepoint-example" {13 ; CHECK-LABEL: test_basic:14 ; CHECK: # %bb.0:15 ; CHECK-NEXT: pushq %r1416 ; CHECK-NEXT: .cfi_def_cfa_offset 1617 ; CHECK-NEXT: pushq %rbx18 ; CHECK-NEXT: .cfi_def_cfa_offset 2419 ; CHECK-NEXT: pushq %rax20 ; CHECK-NEXT: .cfi_def_cfa_offset 3221 ; CHECK-NEXT: .cfi_offset %rbx, -2422 ; CHECK-NEXT: .cfi_offset %r14, -1623 ; CHECK-NEXT: movq %rsi, %rbx24 ; CHECK-NEXT: movq %rdi, %r1425 ; CHECK-NEXT: callq bar26 ; CHECK-NEXT: .Ltmp0:27 ; CHECK-NEXT: movl (%r14), %eax28 ; CHECK-NEXT: addl (%rbx), %eax29 ; CHECK-NEXT: addq $8, %rsp30 ; CHECK-NEXT: .cfi_def_cfa_offset 2431 ; CHECK-NEXT: popq %rbx32 ; CHECK-NEXT: .cfi_def_cfa_offset 1633 ; CHECK-NEXT: popq %r1434 ; CHECK-NEXT: .cfi_def_cfa_offset 835 ; CHECK-NEXT: retq36 %token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 2882400000, i32 0, ptr elementtype(void ()) @bar, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) %obj1, ptr addrspace(1) %obj2) ]37 %rel1 = call coldcc ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 0, i32 0) ; (%obj1, %obj1)38 %rel2 = call coldcc ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 1, i32 1) ; (%obj2, %obj2)39 %a = load i32, ptr addrspace(1) %rel1, align 440 %b = load i32, ptr addrspace(1) %rel2, align 441 %c = add i32 %a, %b42 ret i32 %c43 }44 45 ; CHECK-LABEL: __LLVM_StackMaps:46 ; CHECK-NEXT: .byte 347 ; CHECK-NEXT: .byte 048 ; CHECK-NEXT: .short 049 ; CHECK-NEXT: .long 150 ; CHECK-NEXT: .long 051 ; CHECK-NEXT: .long 152 ; CHECK-NEXT: .quad test_basic53 ; CHECK-NEXT: .quad 2454 ; CHECK-NEXT: .quad 155 ; CHECK-NEXT: .quad 288240000056 ; CHECK-NEXT: .long .Ltmp0-test_basic57 ; CHECK-NEXT: .short 058 ; CHECK-NEXT: .short 859 ; CHECK-NEXT: .byte 460 ; CHECK-NEXT: .byte 061 ; CHECK-NEXT: .short 862 ; CHECK-NEXT: .short 063 ; CHECK-NEXT: .short 064 ; CHECK-NEXT: .long 065 ; CHECK-NEXT: .byte 466 ; CHECK-NEXT: .byte 067 ; CHECK-NEXT: .short 868 ; CHECK-NEXT: .short 069 ; CHECK-NEXT: .short 070 ; CHECK-NEXT: .long 071 ; CHECK-NEXT: .byte 472 ; CHECK-NEXT: .byte 073 ; CHECK-NEXT: .short 874 ; CHECK-NEXT: .short 075 ; CHECK-NEXT: .short 076 ; CHECK-NEXT: .long 177 ; CHECK-NEXT: .byte 478 ; CHECK-NEXT: .byte 079 ; CHECK-NEXT: .short 880 ; CHECK-NEXT: .short 081 ; CHECK-NEXT: .short 082 ; CHECK-NEXT: .long 083 ; CHECK-NEXT: .byte 184 ; CHECK-NEXT: .byte 085 ; CHECK-NEXT: .short 886 ; CHECK-NEXT: .short 387 ; CHECK-NEXT: .short 088 ; CHECK-NEXT: .long 089 ; CHECK-NEXT: .byte 190 ; CHECK-NEXT: .byte 091 ; CHECK-NEXT: .short 892 ; CHECK-NEXT: .short 393 ; CHECK-NEXT: .short 094 ; CHECK-NEXT: .long 095 ; CHECK-NEXT: .byte 196 ; CHECK-NEXT: .byte 097 ; CHECK-NEXT: .short 898 ; CHECK-NEXT: .short 1499 ; CHECK-NEXT: .short 0100 ; CHECK-NEXT: .long 0101 ; CHECK-NEXT: .byte 1102 ; CHECK-NEXT: .byte 0103 ; CHECK-NEXT: .short 8104 ; CHECK-NEXT: .short 14105 ; CHECK-NEXT: .short 0106 ; CHECK-NEXT: .long 0107 ; CHECK-NEXT: .p2align 3108 ; CHECK-NEXT: .short 0109 ; CHECK-NEXT: .short 0110 ; CHECK-NEXT: .p2align 3111 112 declare token @llvm.experimental.gc.statepoint.p0(i64 immarg, i32 immarg, ptr, i32 immarg, i32 immarg, ...)113 114 ; Function Attrs: nounwind readonly115 declare ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token, i32 immarg, i32 immarg) #0116 117 attributes #0 = { nounwind readonly }118 attributes #1 = { nounwind }119 120...121---122name: test_basic123alignment: 16124selected: false125failedISel: false126tracksRegLiveness: true127registers:128 - { id: 0, class: gr64, preferred-register: '' }129 - { id: 1, class: gr64, preferred-register: '' }130 - { id: 2, class: gr64, preferred-register: '' }131 - { id: 3, class: gr64, preferred-register: '' }132 - { id: 4, class: gr32, preferred-register: '' }133 - { id: 5, class: gr32, preferred-register: '' }134liveins:135 - { reg: '$rdi', virtual-reg: '%0' }136 - { reg: '$rsi', virtual-reg: '%1' }137frameInfo:138 adjustsStack: true139fixedStack: []140stack: []141callSites: []142constants: []143machineFunctionInfo: {}144body: |145 bb.0 (%ir-block.0):146 liveins: $rdi, $rsi147 148 %1:gr64 = COPY $rsi149 %0:gr64 = COPY $rdi150 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp151 %2:gr64, %3:gr64 = STATEPOINT 2882400000, 0, 0, @bar, 2, 0, 2, 0, 2, 1, 2, 0, 2, 2, %1(tied-def 0), %0(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp152 ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp153 %4:gr32 = MOV32rm killed %3, 1, $noreg, 0, $noreg :: (load (s32) from %ir.rel1, addrspace 1)154 %5:gr32 = ADD32rm %4, killed %2, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.rel2, addrspace 1)155 $eax = COPY %5156 RET 0, $eax157 158...159