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1; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT2; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL3 4target datalayout = "e-p:32:32"5 %struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], ptr, ptr, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }6 7define internal fastcc i32 @dct_chroma(i32 %uv, i32 %cr_cbp) nounwind {8cond_true2732.preheader: ; preds = %entry9 %tmp2666 = getelementptr %struct.Macroblock, ptr null, i32 0, i32 13 ; <ptr> [#uses=2]10 %tmp2674 = trunc i32 0 to i8 ; <i8> [#uses=1]11 %tmp2667.us.us = load i64, ptr %tmp2666 ; <i64> [#uses=1]12 %tmp2670.us.us = load i64, ptr null ; <i64> [#uses=1]13 %shift.upgrd.1 = zext i8 %tmp2674 to i64 ; <i64> [#uses=1]14 %tmp2675.us.us = shl i64 %tmp2670.us.us, %shift.upgrd.1 ; <i64> [#uses=1]15 %tmp2675not.us.us = xor i64 %tmp2675.us.us, -1 ; <i64> [#uses=1]16 %tmp2676.us.us = and i64 %tmp2667.us.us, %tmp2675not.us.us ; <i64> [#uses=1]17 store i64 %tmp2676.us.us, ptr %tmp266618 ret i32 019 20; INTEL-DAG: and {{e..}}, dword ptr [356]21; INTEL-DAG: and dword ptr [360], {{e..}}22; INTEL: mov dword ptr [356], {{e..}}23 24; ATT-DAG: andl 356, %{{e..}}25; ATT-DAG: andl %{{e..}}, 36026; ATT: movl %{{e..}}, 35627 28}29 30