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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s3; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck --check-prefix=CHECK-O0 %s4 5@var = dso_local global i32 06 7; Test how llvm handles return type of {i16, i8}. The return value will be8; passed in %eax and %dl.9define i16 @test(i32 %key) {10; CHECK-LABEL: test:11; CHECK: # %bb.0: # %entry12; CHECK-NEXT: pushq %rax13; CHECK-NEXT: .cfi_def_cfa_offset 1614; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)15; CHECK-NEXT: callq gen@PLT16; CHECK-NEXT: # kill: def $ax killed $ax def $eax17; CHECK-NEXT: movsbl %dl, %ecx18; CHECK-NEXT: addl %ecx, %eax19; CHECK-NEXT: # kill: def $ax killed $ax killed $eax20; CHECK-NEXT: popq %rcx21; CHECK-NEXT: .cfi_def_cfa_offset 822; CHECK-NEXT: retq23;24; CHECK-O0-LABEL: test:25; CHECK-O0: # %bb.0: # %entry26; CHECK-O0-NEXT: pushq %rax27; CHECK-O0-NEXT: .cfi_def_cfa_offset 1628; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)29; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi30; CHECK-O0-NEXT: callq gen@PLT31; CHECK-O0-NEXT: cwtl32; CHECK-O0-NEXT: movsbl %dl, %ecx33; CHECK-O0-NEXT: addl %ecx, %eax34; CHECK-O0-NEXT: # kill: def $ax killed $ax killed $eax35; CHECK-O0-NEXT: popq %rcx36; CHECK-O0-NEXT: .cfi_def_cfa_offset 837; CHECK-O0-NEXT: retq38entry:39 %key.addr = alloca i32, align 440 store i32 %key, ptr %key.addr, align 441 %0 = load i32, ptr %key.addr, align 442 %call = call swiftcc { i16, i8 } @gen(i32 %0)43 %v3 = extractvalue { i16, i8 } %call, 044 %v1 = sext i16 %v3 to i3245 %v5 = extractvalue { i16, i8 } %call, 146 %v2 = sext i8 %v5 to i3247 %add = add nsw i32 %v1, %v248 %conv = trunc i32 %add to i1649 ret i16 %conv50}51 52declare swiftcc { i16, i8 } @gen(i32)53 54; If we can't pass every return value in register, we will pass everything55; in memroy. The caller provides space for the return value and passes56; the address in %rax. The first input argument will be in %rdi.57define dso_local i32 @test2(i32 %key) #0 {58; CHECK-LABEL: test2:59; CHECK: # %bb.0: # %entry60; CHECK-NEXT: subq $24, %rsp61; CHECK-NEXT: .cfi_def_cfa_offset 3262; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)63; CHECK-NEXT: movq %rsp, %rax64; CHECK-NEXT: callq gen2@PLT65; CHECK-NEXT: movl (%rsp), %eax66; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax67; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax68; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax69; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax70; CHECK-NEXT: addq $24, %rsp71; CHECK-NEXT: .cfi_def_cfa_offset 872; CHECK-NEXT: retq73;74; CHECK-O0-LABEL: test2:75; CHECK-O0: # %bb.0: # %entry76; CHECK-O0-NEXT: subq $24, %rsp77; CHECK-O0-NEXT: .cfi_def_cfa_offset 3278; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)79; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi80; CHECK-O0-NEXT: movq %rsp, %rax81; CHECK-O0-NEXT: callq gen2@PLT82; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %ecx83; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edx84; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %esi85; CHECK-O0-NEXT: movl (%rsp), %eax86; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi87; CHECK-O0-NEXT: addl %edi, %eax88; CHECK-O0-NEXT: addl %esi, %eax89; CHECK-O0-NEXT: addl %edx, %eax90; CHECK-O0-NEXT: addl %ecx, %eax91; CHECK-O0-NEXT: addq $24, %rsp92; CHECK-O0-NEXT: .cfi_def_cfa_offset 893; CHECK-O0-NEXT: retq94entry:95 %key.addr = alloca i32, align 496 store i32 %key, ptr %key.addr, align 497 %0 = load i32, ptr %key.addr, align 498 %call = call swiftcc { i32, i32, i32, i32, i32 } @gen2(i32 %0)99 100 %v3 = extractvalue { i32, i32, i32, i32, i32 } %call, 0101 %v5 = extractvalue { i32, i32, i32, i32, i32 } %call, 1102 %v6 = extractvalue { i32, i32, i32, i32, i32 } %call, 2103 %v7 = extractvalue { i32, i32, i32, i32, i32 } %call, 3104 %v8 = extractvalue { i32, i32, i32, i32, i32 } %call, 4105 106 %add = add nsw i32 %v3, %v5107 %add1 = add nsw i32 %add, %v6108 %add2 = add nsw i32 %add1, %v7109 %add3 = add nsw i32 %add2, %v8110 ret i32 %add3111}112 113; The address of the return value is passed in %rax.114; On return, we don't keep the address in %rax.115define swiftcc { i32, i32, i32, i32, i32 } @gen2(i32 %key) {116; CHECK-LABEL: gen2:117; CHECK: # %bb.0:118; CHECK-NEXT: movl %edi, 16(%rax)119; CHECK-NEXT: movl %edi, 12(%rax)120; CHECK-NEXT: movl %edi, 8(%rax)121; CHECK-NEXT: movl %edi, 4(%rax)122; CHECK-NEXT: movl %edi, (%rax)123; CHECK-NEXT: retq124;125; CHECK-O0-LABEL: gen2:126; CHECK-O0: # %bb.0:127; CHECK-O0-NEXT: movl %edi, 16(%rax)128; CHECK-O0-NEXT: movl %edi, 12(%rax)129; CHECK-O0-NEXT: movl %edi, 8(%rax)130; CHECK-O0-NEXT: movl %edi, 4(%rax)131; CHECK-O0-NEXT: movl %edi, (%rax)132; CHECK-O0-NEXT: retq133 %Y = insertvalue { i32, i32, i32, i32, i32 } undef, i32 %key, 0134 %Z = insertvalue { i32, i32, i32, i32, i32 } %Y, i32 %key, 1135 %Z2 = insertvalue { i32, i32, i32, i32, i32 } %Z, i32 %key, 2136 %Z3 = insertvalue { i32, i32, i32, i32, i32 } %Z2, i32 %key, 3137 %Z4 = insertvalue { i32, i32, i32, i32, i32 } %Z3, i32 %key, 4138 ret { i32, i32, i32, i32, i32 } %Z4139}140 141; The return value {i32, i32, i32, i32} will be returned via registers %eax,142; %edx, %ecx, %r8d.143define dso_local i32 @test3(i32 %key) #0 {144; CHECK-LABEL: test3:145; CHECK: # %bb.0: # %entry146; CHECK-NEXT: pushq %rax147; CHECK-NEXT: .cfi_def_cfa_offset 16148; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)149; CHECK-NEXT: callq gen3@PLT150; CHECK-NEXT: # kill: def $ecx killed $ecx def $rcx151; CHECK-NEXT: # kill: def $r8d killed $r8d def $r8152; CHECK-NEXT: addl %edx, %eax153; CHECK-NEXT: addl %r8d, %ecx154; CHECK-NEXT: addl %ecx, %eax155; CHECK-NEXT: popq %rcx156; CHECK-NEXT: .cfi_def_cfa_offset 8157; CHECK-NEXT: retq158;159; CHECK-O0-LABEL: test3:160; CHECK-O0: # %bb.0: # %entry161; CHECK-O0-NEXT: pushq %rax162; CHECK-O0-NEXT: .cfi_def_cfa_offset 16163; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)164; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi165; CHECK-O0-NEXT: callq gen3@PLT166; CHECK-O0-NEXT: addl %edx, %eax167; CHECK-O0-NEXT: addl %ecx, %eax168; CHECK-O0-NEXT: addl %r8d, %eax169; CHECK-O0-NEXT: popq %rcx170; CHECK-O0-NEXT: .cfi_def_cfa_offset 8171; CHECK-O0-NEXT: retq172entry:173 %key.addr = alloca i32, align 4174 store i32 %key, ptr %key.addr, align 4175 %0 = load i32, ptr %key.addr, align 4176 %call = call swiftcc { i32, i32, i32, i32 } @gen3(i32 %0)177 178 %v3 = extractvalue { i32, i32, i32, i32 } %call, 0179 %v5 = extractvalue { i32, i32, i32, i32 } %call, 1180 %v6 = extractvalue { i32, i32, i32, i32 } %call, 2181 %v7 = extractvalue { i32, i32, i32, i32 } %call, 3182 183 %add = add nsw i32 %v3, %v5184 %add1 = add nsw i32 %add, %v6185 %add2 = add nsw i32 %add1, %v7186 ret i32 %add2187}188 189declare swiftcc { i32, i32, i32, i32 } @gen3(i32 %key)190 191; The return value {float, float, float, float} will be returned via registers192; %xmm0, %xmm1, %xmm2, %xmm3.193define dso_local float @test4(float %key) #0 {194; CHECK-LABEL: test4:195; CHECK: # %bb.0: # %entry196; CHECK-NEXT: pushq %rax197; CHECK-NEXT: .cfi_def_cfa_offset 16198; CHECK-NEXT: movss %xmm0, {{[0-9]+}}(%rsp)199; CHECK-NEXT: callq gen4@PLT200; CHECK-NEXT: addss %xmm1, %xmm0201; CHECK-NEXT: addss %xmm2, %xmm0202; CHECK-NEXT: addss %xmm3, %xmm0203; CHECK-NEXT: popq %rax204; CHECK-NEXT: .cfi_def_cfa_offset 8205; CHECK-NEXT: retq206;207; CHECK-O0-LABEL: test4:208; CHECK-O0: # %bb.0: # %entry209; CHECK-O0-NEXT: pushq %rax210; CHECK-O0-NEXT: .cfi_def_cfa_offset 16211; CHECK-O0-NEXT: movss %xmm0, {{[0-9]+}}(%rsp)212; CHECK-O0-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero213; CHECK-O0-NEXT: callq gen4@PLT214; CHECK-O0-NEXT: addss %xmm1, %xmm0215; CHECK-O0-NEXT: addss %xmm2, %xmm0216; CHECK-O0-NEXT: addss %xmm3, %xmm0217; CHECK-O0-NEXT: popq %rax218; CHECK-O0-NEXT: .cfi_def_cfa_offset 8219; CHECK-O0-NEXT: retq220entry:221 %key.addr = alloca float, align 4222 store float %key, ptr %key.addr, align 4223 %0 = load float, ptr %key.addr, align 4224 %call = call swiftcc { float, float, float, float } @gen4(float %0)225 226 %v3 = extractvalue { float, float, float, float } %call, 0227 %v5 = extractvalue { float, float, float, float } %call, 1228 %v6 = extractvalue { float, float, float, float } %call, 2229 %v7 = extractvalue { float, float, float, float } %call, 3230 231 %add = fadd float %v3, %v5232 %add1 = fadd float %add, %v6233 %add2 = fadd float %add1, %v7234 ret float %add2235}236 237declare swiftcc { float, float, float, float } @gen4(float %key)238 239define dso_local void @consume_i1_ret() {240; CHECK-LABEL: consume_i1_ret:241; CHECK: # %bb.0:242; CHECK-NEXT: pushq %rax243; CHECK-NEXT: .cfi_def_cfa_offset 16244; CHECK-NEXT: callq produce_i1_ret@PLT245; CHECK-NEXT: movzbl %al, %eax246; CHECK-NEXT: andl $1, %eax247; CHECK-NEXT: movl %eax, var(%rip)248; CHECK-NEXT: movzbl %dl, %eax249; CHECK-NEXT: andl $1, %eax250; CHECK-NEXT: movl %eax, var(%rip)251; CHECK-NEXT: movzbl %cl, %eax252; CHECK-NEXT: andl $1, %eax253; CHECK-NEXT: movl %eax, var(%rip)254; CHECK-NEXT: movzbl %r8b, %eax255; CHECK-NEXT: andl $1, %eax256; CHECK-NEXT: movl %eax, var(%rip)257; CHECK-NEXT: popq %rax258; CHECK-NEXT: .cfi_def_cfa_offset 8259; CHECK-NEXT: retq260;261; CHECK-O0-LABEL: consume_i1_ret:262; CHECK-O0: # %bb.0:263; CHECK-O0-NEXT: pushq %rax264; CHECK-O0-NEXT: .cfi_def_cfa_offset 16265; CHECK-O0-NEXT: callq produce_i1_ret@PLT266; CHECK-O0-NEXT: andb $1, %al267; CHECK-O0-NEXT: movzbl %al, %eax268; CHECK-O0-NEXT: movl %eax, var269; CHECK-O0-NEXT: andb $1, %dl270; CHECK-O0-NEXT: movzbl %dl, %eax271; CHECK-O0-NEXT: movl %eax, var272; CHECK-O0-NEXT: andb $1, %cl273; CHECK-O0-NEXT: movzbl %cl, %eax274; CHECK-O0-NEXT: movl %eax, var275; CHECK-O0-NEXT: andb $1, %r8b276; CHECK-O0-NEXT: movzbl %r8b, %eax277; CHECK-O0-NEXT: movl %eax, var278; CHECK-O0-NEXT: popq %rax279; CHECK-O0-NEXT: .cfi_def_cfa_offset 8280; CHECK-O0-NEXT: retq281 %call = call swiftcc { i1, i1, i1, i1 } @produce_i1_ret()282 %v3 = extractvalue { i1, i1, i1, i1 } %call, 0283 %v5 = extractvalue { i1, i1, i1, i1 } %call, 1284 %v6 = extractvalue { i1, i1, i1, i1 } %call, 2285 %v7 = extractvalue { i1, i1, i1, i1 } %call, 3286 %val = zext i1 %v3 to i32287 store volatile i32 %val, ptr @var288 %val2 = zext i1 %v5 to i32289 store volatile i32 %val2, ptr @var290 %val3 = zext i1 %v6 to i32291 store volatile i32 %val3, ptr @var292 %val4 = zext i1 %v7 to i32293 store i32 %val4, ptr @var294 ret void295}296 297declare swiftcc { i1, i1, i1, i1 } @produce_i1_ret()298 299define swiftcc void @foo(ptr sret(i64) %agg.result, i64 %val) {300; CHECK-LABEL: foo:301; CHECK: # %bb.0:302; CHECK-NEXT: movq %rdi, (%rax)303; CHECK-NEXT: retq304;305; CHECK-O0-LABEL: foo:306; CHECK-O0: # %bb.0:307; CHECK-O0-NEXT: movq %rdi, (%rax)308; CHECK-O0-NEXT: retq309 store i64 %val, ptr %agg.result310 ret void311}312 313define swiftcc double @test5() #0 {314; CHECK-LABEL: test5:315; CHECK: # %bb.0: # %entry316; CHECK-NEXT: pushq %rax317; CHECK-NEXT: .cfi_def_cfa_offset 16318; CHECK-NEXT: callq gen5@PLT319; CHECK-NEXT: addsd %xmm1, %xmm0320; CHECK-NEXT: addsd %xmm2, %xmm0321; CHECK-NEXT: addsd %xmm3, %xmm0322; CHECK-NEXT: popq %rax323; CHECK-NEXT: .cfi_def_cfa_offset 8324; CHECK-NEXT: retq325;326; CHECK-O0-LABEL: test5:327; CHECK-O0: # %bb.0: # %entry328; CHECK-O0-NEXT: pushq %rax329; CHECK-O0-NEXT: .cfi_def_cfa_offset 16330; CHECK-O0-NEXT: callq gen5@PLT331; CHECK-O0-NEXT: addsd %xmm1, %xmm0332; CHECK-O0-NEXT: addsd %xmm2, %xmm0333; CHECK-O0-NEXT: addsd %xmm3, %xmm0334; CHECK-O0-NEXT: popq %rax335; CHECK-O0-NEXT: .cfi_def_cfa_offset 8336; CHECK-O0-NEXT: retq337entry:338 %call = call swiftcc { double, double, double, double } @gen5()339 340 %v3 = extractvalue { double, double, double, double } %call, 0341 %v5 = extractvalue { double, double, double, double } %call, 1342 %v6 = extractvalue { double, double, double, double } %call, 2343 %v7 = extractvalue { double, double, double, double } %call, 3344 345 %add = fadd double %v3, %v5346 %add1 = fadd double %add, %v6347 %add2 = fadd double %add1, %v7348 ret double %add2349}350 351declare swiftcc { double, double, double, double } @gen5()352 353 354define swiftcc { double, i64 } @test6() #0 {355; CHECK-LABEL: test6:356; CHECK: # %bb.0: # %entry357; CHECK-NEXT: pushq %rax358; CHECK-NEXT: .cfi_def_cfa_offset 16359; CHECK-NEXT: callq gen6@PLT360; CHECK-NEXT: addsd %xmm1, %xmm0361; CHECK-NEXT: addsd %xmm2, %xmm0362; CHECK-NEXT: addsd %xmm3, %xmm0363; CHECK-NEXT: addq %rdx, %rax364; CHECK-NEXT: addq %r8, %rcx365; CHECK-NEXT: addq %rcx, %rax366; CHECK-NEXT: popq %rcx367; CHECK-NEXT: .cfi_def_cfa_offset 8368; CHECK-NEXT: retq369;370; CHECK-O0-LABEL: test6:371; CHECK-O0: # %bb.0: # %entry372; CHECK-O0-NEXT: pushq %rax373; CHECK-O0-NEXT: .cfi_def_cfa_offset 16374; CHECK-O0-NEXT: callq gen6@PLT375; CHECK-O0-NEXT: addsd %xmm1, %xmm0376; CHECK-O0-NEXT: addsd %xmm2, %xmm0377; CHECK-O0-NEXT: addsd %xmm3, %xmm0378; CHECK-O0-NEXT: addq %rdx, %rax379; CHECK-O0-NEXT: addq %rcx, %rax380; CHECK-O0-NEXT: addq %r8, %rax381; CHECK-O0-NEXT: popq %rcx382; CHECK-O0-NEXT: .cfi_def_cfa_offset 8383; CHECK-O0-NEXT: retq384entry:385 %call = call swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen6()386 387 %v3 = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 0388 %v5 = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 1389 %v6 = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 2390 %v7 = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 3391 %v3.i = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 4392 %v5.i = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 5393 %v6.i = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 6394 %v7.i = extractvalue { double, double, double, double, i64, i64, i64, i64 } %call, 7395 396 %add = fadd double %v3, %v5397 %add1 = fadd double %add, %v6398 %add2 = fadd double %add1, %v7399 400 %add.i = add nsw i64 %v3.i, %v5.i401 %add1.i = add nsw i64 %add.i, %v6.i402 %add2.i = add nsw i64 %add1.i, %v7.i403 404 %Y = insertvalue { double, i64 } undef, double %add2, 0405 %Z = insertvalue { double, i64 } %Y, i64 %add2.i, 1406 ret { double, i64} %Z407}408 409declare swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen6()410 411define swiftcc { i32, i32, i32, i32 } @gen7(i32 %key) {412; CHECK-LABEL: gen7:413; CHECK: # %bb.0:414; CHECK-NEXT: movl %edi, %eax415; CHECK-NEXT: movl %edi, %edx416; CHECK-NEXT: movl %edi, %ecx417; CHECK-NEXT: movl %edi, %r8d418; CHECK-NEXT: retq419;420; CHECK-O0-LABEL: gen7:421; CHECK-O0: # %bb.0:422; CHECK-O0-NEXT: movl %edi, %r8d423; CHECK-O0-NEXT: movl %r8d, %eax424; CHECK-O0-NEXT: movl %r8d, %edx425; CHECK-O0-NEXT: movl %r8d, %ecx426; CHECK-O0-NEXT: retq427 %v0 = insertvalue { i32, i32, i32, i32 } undef, i32 %key, 0428 %v1 = insertvalue { i32, i32, i32, i32 } %v0, i32 %key, 1429 %v2 = insertvalue { i32, i32, i32, i32 } %v1, i32 %key, 2430 %v3 = insertvalue { i32, i32, i32, i32 } %v2, i32 %key, 3431 ret { i32, i32, i32, i32 } %v3432}433 434define swiftcc { i64, i64, i64, i64 } @gen8(i64 %key) {435; CHECK-LABEL: gen8:436; CHECK: # %bb.0:437; CHECK-NEXT: movq %rdi, %rax438; CHECK-NEXT: movq %rdi, %rdx439; CHECK-NEXT: movq %rdi, %rcx440; CHECK-NEXT: movq %rdi, %r8441; CHECK-NEXT: retq442;443; CHECK-O0-LABEL: gen8:444; CHECK-O0: # %bb.0:445; CHECK-O0-NEXT: movq %rdi, %r8446; CHECK-O0-NEXT: movq %r8, %rax447; CHECK-O0-NEXT: movq %r8, %rdx448; CHECK-O0-NEXT: movq %r8, %rcx449; CHECK-O0-NEXT: retq450 %v0 = insertvalue { i64, i64, i64, i64 } undef, i64 %key, 0451 %v1 = insertvalue { i64, i64, i64, i64 } %v0, i64 %key, 1452 %v2 = insertvalue { i64, i64, i64, i64 } %v1, i64 %key, 2453 %v3 = insertvalue { i64, i64, i64, i64 } %v2, i64 %key, 3454 ret { i64, i64, i64, i64 } %v3455}456 457define swiftcc { i8, i8, i8, i8 } @gen9(i8 %key) {458; CHECK-LABEL: gen9:459; CHECK: # %bb.0:460; CHECK-NEXT: movl %edi, %eax461; CHECK-NEXT: movl %eax, %edx462; CHECK-NEXT: movl %eax, %ecx463; CHECK-NEXT: movl %eax, %r8d464; CHECK-NEXT: retq465;466; CHECK-O0-LABEL: gen9:467; CHECK-O0: # %bb.0:468; CHECK-O0-NEXT: movb %dil, %r8b469; CHECK-O0-NEXT: movb %r8b, %al470; CHECK-O0-NEXT: movb %r8b, %dl471; CHECK-O0-NEXT: movb %r8b, %cl472; CHECK-O0-NEXT: retq473 %v0 = insertvalue { i8, i8, i8, i8 } undef, i8 %key, 0474 %v1 = insertvalue { i8, i8, i8, i8 } %v0, i8 %key, 1475 %v2 = insertvalue { i8, i8, i8, i8 } %v1, i8 %key, 2476 %v3 = insertvalue { i8, i8, i8, i8 } %v2, i8 %key, 3477 ret { i8, i8, i8, i8 } %v3478}479define swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen10(double %keyd, i64 %keyi) {480; CHECK-LABEL: gen10:481; CHECK: # %bb.0:482; CHECK-NEXT: movq %rdi, %rax483; CHECK-NEXT: movaps %xmm0, %xmm1484; CHECK-NEXT: movaps %xmm0, %xmm2485; CHECK-NEXT: movaps %xmm0, %xmm3486; CHECK-NEXT: movq %rdi, %rdx487; CHECK-NEXT: movq %rdi, %rcx488; CHECK-NEXT: movq %rdi, %r8489; CHECK-NEXT: retq490;491; CHECK-O0-LABEL: gen10:492; CHECK-O0: # %bb.0:493; CHECK-O0-NEXT: movq %rdi, %r8494; CHECK-O0-NEXT: movaps %xmm0, %xmm3495; CHECK-O0-NEXT: movaps %xmm3, %xmm0496; CHECK-O0-NEXT: movaps %xmm3, %xmm1497; CHECK-O0-NEXT: movaps %xmm3, %xmm2498; CHECK-O0-NEXT: movq %r8, %rax499; CHECK-O0-NEXT: movq %r8, %rdx500; CHECK-O0-NEXT: movq %r8, %rcx501; CHECK-O0-NEXT: retq502 %v0 = insertvalue { double, double, double, double, i64, i64, i64, i64 } undef, double %keyd, 0503 %v1 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v0, double %keyd, 1504 %v2 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v1, double %keyd, 2505 %v3 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v2, double %keyd, 3506 %v4 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v3, i64 %keyi, 4507 %v5 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v4, i64 %keyi, 5508 %v6 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v5, i64 %keyi, 6509 %v7 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v6, i64 %keyi, 7510 ret { double, double, double, double, i64, i64, i64, i64 } %v7511}512 513 514define swiftcc <4 x float> @test11() #0 {515; CHECK-LABEL: test11:516; CHECK: # %bb.0: # %entry517; CHECK-NEXT: pushq %rax518; CHECK-NEXT: .cfi_def_cfa_offset 16519; CHECK-NEXT: callq gen11@PLT520; CHECK-NEXT: addps %xmm1, %xmm0521; CHECK-NEXT: addps %xmm2, %xmm0522; CHECK-NEXT: addps %xmm3, %xmm0523; CHECK-NEXT: popq %rax524; CHECK-NEXT: .cfi_def_cfa_offset 8525; CHECK-NEXT: retq526;527; CHECK-O0-LABEL: test11:528; CHECK-O0: # %bb.0: # %entry529; CHECK-O0-NEXT: pushq %rax530; CHECK-O0-NEXT: .cfi_def_cfa_offset 16531; CHECK-O0-NEXT: callq gen11@PLT532; CHECK-O0-NEXT: addps %xmm1, %xmm0533; CHECK-O0-NEXT: addps %xmm2, %xmm0534; CHECK-O0-NEXT: addps %xmm3, %xmm0535; CHECK-O0-NEXT: popq %rax536; CHECK-O0-NEXT: .cfi_def_cfa_offset 8537; CHECK-O0-NEXT: retq538entry:539 %call = call swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @gen11()540 541 %v3 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 0542 %v5 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 1543 %v6 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 2544 %v7 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 3545 546 %add = fadd <4 x float> %v3, %v5547 %add1 = fadd <4 x float> %add, %v6548 %add2 = fadd <4 x float> %add1, %v7549 ret <4 x float> %add2550}551 552declare swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @gen11()553 554define swiftcc { <4 x float>, float } @test12() #0 {555; CHECK-LABEL: test12:556; CHECK: # %bb.0: # %entry557; CHECK-NEXT: pushq %rax558; CHECK-NEXT: .cfi_def_cfa_offset 16559; CHECK-NEXT: callq gen12@PLT560; CHECK-NEXT: addps %xmm1, %xmm0561; CHECK-NEXT: addps %xmm2, %xmm0562; CHECK-NEXT: movaps %xmm3, %xmm1563; CHECK-NEXT: popq %rax564; CHECK-NEXT: .cfi_def_cfa_offset 8565; CHECK-NEXT: retq566;567; CHECK-O0-LABEL: test12:568; CHECK-O0: # %bb.0: # %entry569; CHECK-O0-NEXT: subq $24, %rsp570; CHECK-O0-NEXT: .cfi_def_cfa_offset 32571; CHECK-O0-NEXT: callq gen12@PLT572; CHECK-O0-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill573; CHECK-O0-NEXT: movaps %xmm3, %xmm1574; CHECK-O0-NEXT: movaps (%rsp), %xmm3 # 16-byte Reload575; CHECK-O0-NEXT: addps %xmm3, %xmm0576; CHECK-O0-NEXT: addps %xmm2, %xmm0577; CHECK-O0-NEXT: addq $24, %rsp578; CHECK-O0-NEXT: .cfi_def_cfa_offset 8579; CHECK-O0-NEXT: retq580entry:581 %call = call swiftcc { <4 x float>, <4 x float>, <4 x float>, float } @gen12()582 583 %v3 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 0584 %v5 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 1585 %v6 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 2586 %v8 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 3587 588 %add = fadd <4 x float> %v3, %v5589 %add1 = fadd <4 x float> %add, %v6590 %res.0 = insertvalue { <4 x float>, float } undef, <4 x float> %add1, 0591 %res = insertvalue { <4 x float>, float } %res.0, float %v8, 1592 ret { <4 x float>, float } %res593}594 595declare swiftcc { <4 x float>, <4 x float>, <4 x float>, float } @gen12()596