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1; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=corei7 -fast-isel=false -O0 < %s | FileCheck %s2 3; Gather non-machine specific tests for the transformations in4; CodeGen/SelectionDAG/TargetLowering. Currently, these5; can't be tested easily by checking the SDNodes that are6; the data structures that these transformations act on.7; Therefore, use X86 assembler output to check against.8 9; rdar://11195364 A problem with the transformation:10; If all of the demanded bits on one side are known, and all of the set11; bits on that side are also known to be set on the other side, turn this12; into an AND, as we know the bits will be cleared.13; The known set (one) bits for the arguments %xor1 are not the same, so the14; transformation should not occur15define void @foo(i32 %i32In1, i32 %i32In2, i32 %i32In3, i32 %i32In4, 16 i32 %i32In5, i32 %i32In6, ptr %i32StarOut, i1 %i1In1, 17 ptr %i32SelOut) nounwind {18 %and3 = and i32 %i32In1, 136277977719 %or2 = or i32 %i32In2, %i32In320 %and2 = and i32 %or2, 136277977721 %xor3 = xor i32 %and3, %and222 ; CHECK: shll23 %shl1 = shl i32 %xor3, %i32In424 %sub1 = sub i32 %or2, %shl125 %add1 = add i32 %sub1, %i32In526 %and1 = and i32 %add1, 127 %xor2 = xor i32 %and1, 128 %or1 = or i32 %xor2, 364806994 ;0x15BE835229 ; CHECK-NOT: andl $9623995530 %xor1 = xor i32 %or1, 268567040 ;0x1002020031 ; force an output so not DCE'd32 store i32 %xor1, ptr %i32StarOut33 ; force not fast isel by using a select34 %i32SelVal = select i1 %i1In1, i32 %i32In1, i32 %xor135 store i32 %i32SelVal, ptr %i32SelOut36 ; CHECK: ret37 ret void38}39