125 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X643 4; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/tbm-builtins.c5 6define i64 @test__bextri_u64(i64 %a0) {7; X64-LABEL: test__bextri_u64:8; X64: # %bb.0:9; X64-NEXT: bextrq $3841, %rdi, %rax # imm = 0xF0110; X64-NEXT: retq11 %1 = call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 3841)12 ret i64 %113}14 15define i64 @test__blcfill_u64(i64 %a0) {16; X64-LABEL: test__blcfill_u64:17; X64: # %bb.0:18; X64-NEXT: leaq 1(%rdi), %rax19; X64-NEXT: andq %rdi, %rax20; X64-NEXT: retq21 %1 = add i64 %a0, 122 %2 = and i64 %a0, %123 ret i64 %224}25 26define i64 @test__blci_u64(i64 %a0) {27; X64-LABEL: test__blci_u64:28; X64: # %bb.0:29; X64-NEXT: leaq 1(%rdi), %rax30; X64-NEXT: xorq $-1, %rax31; X64-NEXT: orq %rdi, %rax32; X64-NEXT: retq33 %1 = add i64 %a0, 134 %2 = xor i64 %1, -135 %3 = or i64 %a0, %236 ret i64 %337}38 39define i64 @test__blcic_u64(i64 %a0) {40; X64-LABEL: test__blcic_u64:41; X64: # %bb.0:42; X64-NEXT: leaq 1(%rdi), %rax43; X64-NEXT: xorq $-1, %rdi44; X64-NEXT: andq %rdi, %rax45; X64-NEXT: retq46 %1 = xor i64 %a0, -147 %2 = add i64 %a0, 148 %3 = and i64 %1, %249 ret i64 %350}51 52define i64 @test__blcmsk_u64(i64 %a0) {53; X64-LABEL: test__blcmsk_u64:54; X64: # %bb.0:55; X64-NEXT: leaq 1(%rdi), %rax56; X64-NEXT: xorq %rdi, %rax57; X64-NEXT: retq58 %1 = add i64 %a0, 159 %2 = xor i64 %a0, %160 ret i64 %261}62 63define i64 @test__blcs_u64(i64 %a0) {64; X64-LABEL: test__blcs_u64:65; X64: # %bb.0:66; X64-NEXT: leaq 1(%rdi), %rax67; X64-NEXT: orq %rdi, %rax68; X64-NEXT: retq69 %1 = add i64 %a0, 170 %2 = or i64 %a0, %171 ret i64 %272}73 74define i64 @test__blsfill_u64(i64 %a0) {75; X64-LABEL: test__blsfill_u64:76; X64: # %bb.0:77; X64-NEXT: leaq -1(%rdi), %rax78; X64-NEXT: orq %rdi, %rax79; X64-NEXT: retq80 %1 = sub i64 %a0, 181 %2 = or i64 %a0, %182 ret i64 %283}84 85define i64 @test__blsic_u64(i64 %a0) {86; X64-LABEL: test__blsic_u64:87; X64: # %bb.0:88; X64-NEXT: leaq -1(%rdi), %rax89; X64-NEXT: xorq $-1, %rdi90; X64-NEXT: orq %rdi, %rax91; X64-NEXT: retq92 %1 = xor i64 %a0, -193 %2 = sub i64 %a0, 194 %3 = or i64 %1, %295 ret i64 %396}97 98define i64 @test__t1mskc_u64(i64 %a0) {99; X64-LABEL: test__t1mskc_u64:100; X64: # %bb.0:101; X64-NEXT: leaq 1(%rdi), %rax102; X64-NEXT: xorq $-1, %rdi103; X64-NEXT: orq %rdi, %rax104; X64-NEXT: retq105 %1 = xor i64 %a0, -1106 %2 = add i64 %a0, 1107 %3 = or i64 %1, %2108 ret i64 %3109}110 111define i64 @test__tzmsk_u64(i64 %a0) {112; X64-LABEL: test__tzmsk_u64:113; X64: # %bb.0:114; X64-NEXT: leaq -1(%rdi), %rax115; X64-NEXT: xorq $-1, %rdi116; X64-NEXT: andq %rdi, %rax117; X64-NEXT: retq118 %1 = xor i64 %a0, -1119 %2 = sub i64 %a0, 1120 %3 = and i64 %1, %2121 ret i64 %3122}123 124declare i64 @llvm.x86.tbm.bextri.u64(i64, i64)125