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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s3 4define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind {5; CHECK-LABEL: test_x86_tbm_bextri_u32:6; CHECK: # %bb.0:7; CHECK-NEXT: bextrl $3076, %edi, %eax # imm = 0xC048; CHECK-NEXT: retq9 %t0 = lshr i32 %a, 410 %t1 = and i32 %t0, 409511 ret i32 %t112}13 14; Make sure we still use AH subreg trick for extracting bits 15:815define i32 @test_x86_tbm_bextri_u32_subreg(i32 %a) nounwind {16; CHECK-LABEL: test_x86_tbm_bextri_u32_subreg:17; CHECK: # %bb.0:18; CHECK-NEXT: movl %edi, %eax19; CHECK-NEXT: movzbl %ah, %eax20; CHECK-NEXT: retq21 %t0 = lshr i32 %a, 822 %t1 = and i32 %t0, 25523 ret i32 %t124}25 26define i32 @test_x86_tbm_bextri_u32_m(ptr nocapture %a) nounwind {27; CHECK-LABEL: test_x86_tbm_bextri_u32_m:28; CHECK: # %bb.0:29; CHECK-NEXT: bextrl $3076, (%rdi), %eax # imm = 0xC0430; CHECK-NEXT: retq31 %t0 = load i32, ptr %a32 %t1 = lshr i32 %t0, 433 %t2 = and i32 %t1, 409534 ret i32 %t235}36 37define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind {38; CHECK-LABEL: test_x86_tbm_bextri_u32_z:39; CHECK: # %bb.0:40; CHECK-NEXT: bextrl $3076, %edi, %eax # imm = 0xC0441; CHECK-NEXT: cmovel %esi, %eax42; CHECK-NEXT: retq43 %t0 = lshr i32 %a, 444 %t1 = and i32 %t0, 409545 %t2 = icmp eq i32 %t1, 046 %t3 = select i1 %t2, i32 %b, i32 %t147 ret i32 %t348}49 50define i32 @test_x86_tbm_bextri_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {51; CHECK-LABEL: test_x86_tbm_bextri_u32_z2:52; CHECK: # %bb.0:53; CHECK-NEXT: movl %esi, %eax54; CHECK-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC0455; CHECK-NEXT: cmovnel %edx, %eax56; CHECK-NEXT: retq57 %t0 = lshr i32 %a, 458 %t1 = and i32 %t0, 409559 %t2 = icmp eq i32 %t1, 060 %t3 = select i1 %t2, i32 %b, i32 %c61 ret i32 %t362}63 64define i32 @test_x86_tbm_bextri_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {65; CHECK-LABEL: test_x86_tbm_bextri_u32_sle:66; CHECK: # %bb.0:67; CHECK-NEXT: movl %esi, %eax68; CHECK-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC0469; CHECK-NEXT: testl %ecx, %ecx70; CHECK-NEXT: cmovgl %edx, %eax71; CHECK-NEXT: retq72 %t0 = lshr i32 %a, 473 %t1 = and i32 %t0, 409574 %t2 = icmp sle i32 %t1, 075 %t3 = select i1 %t2, i32 %b, i32 %c76 ret i32 %t377}78 79define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind {80; CHECK-LABEL: test_x86_tbm_bextri_u64:81; CHECK: # %bb.0:82; CHECK-NEXT: bextrl $3076, %edi, %eax # imm = 0xC0483; CHECK-NEXT: retq84 %t0 = lshr i64 %a, 485 %t1 = and i64 %t0, 409586 ret i64 %t187}88 89; Make sure we still use AH subreg trick for extracting bits 15:890define i64 @test_x86_tbm_bextri_u64_subreg(i64 %a) nounwind {91; CHECK-LABEL: test_x86_tbm_bextri_u64_subreg:92; CHECK: # %bb.0:93; CHECK-NEXT: movq %rdi, %rax94; CHECK-NEXT: movzbl %ah, %eax95; CHECK-NEXT: retq96 %t0 = lshr i64 %a, 897 %t1 = and i64 %t0, 25598 ret i64 %t199}100 101define i64 @test_x86_tbm_bextri_u64_m(ptr nocapture %a) nounwind {102; CHECK-LABEL: test_x86_tbm_bextri_u64_m:103; CHECK: # %bb.0:104; CHECK-NEXT: bextrl $3076, (%rdi), %eax # imm = 0xC04105; CHECK-NEXT: retq106 %t0 = load i64, ptr %a107 %t1 = lshr i64 %t0, 4108 %t2 = and i64 %t1, 4095109 ret i64 %t2110}111 112define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind {113; CHECK-LABEL: test_x86_tbm_bextri_u64_z:114; CHECK: # %bb.0:115; CHECK-NEXT: bextrl $3076, %edi, %eax # imm = 0xC04116; CHECK-NEXT: cmoveq %rsi, %rax117; CHECK-NEXT: retq118 %t0 = lshr i64 %a, 4119 %t1 = and i64 %t0, 4095120 %t2 = icmp eq i64 %t1, 0121 %t3 = select i1 %t2, i64 %b, i64 %t1122 ret i64 %t3123}124 125define i64 @test_x86_tbm_bextri_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {126; CHECK-LABEL: test_x86_tbm_bextri_u64_z2:127; CHECK: # %bb.0:128; CHECK-NEXT: movq %rsi, %rax129; CHECK-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04130; CHECK-NEXT: cmovneq %rdx, %rax131; CHECK-NEXT: retq132 %t0 = lshr i64 %a, 4133 %t1 = and i64 %t0, 4095134 %t2 = icmp eq i64 %t1, 0135 %t3 = select i1 %t2, i64 %b, i64 %c136 ret i64 %t3137}138 139define i64 @test_x86_tbm_bextri_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {140; CHECK-LABEL: test_x86_tbm_bextri_u64_sle:141; CHECK: # %bb.0:142; CHECK-NEXT: movq %rsi, %rax143; CHECK-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04144; CHECK-NEXT: testq %rcx, %rcx145; CHECK-NEXT: cmovgq %rdx, %rax146; CHECK-NEXT: retq147 %t0 = lshr i64 %a, 4148 %t1 = and i64 %t0, 4095149 %t2 = icmp sle i64 %t1, 0150 %t3 = select i1 %t2, i64 %b, i64 %c151 ret i64 %t3152}153 154define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind {155; CHECK-LABEL: test_x86_tbm_blcfill_u32:156; CHECK: # %bb.0:157; CHECK-NEXT: blcfilll %edi, %eax158; CHECK-NEXT: retq159 %t0 = add i32 %a, 1160 %t1 = and i32 %t0, %a161 ret i32 %t1162}163 164define i32 @test_x86_tbm_blcfill_u32_z(i32 %a, i32 %b) nounwind {165; CHECK-LABEL: test_x86_tbm_blcfill_u32_z:166; CHECK: # %bb.0:167; CHECK-NEXT: blcfilll %edi, %eax168; CHECK-NEXT: cmovel %esi, %eax169; CHECK-NEXT: retq170 %t0 = add i32 %a, 1171 %t1 = and i32 %t0, %a172 %t2 = icmp eq i32 %t1, 0173 %t3 = select i1 %t2, i32 %b, i32 %t1174 ret i32 %t3175}176 177define i32 @test_x86_tbm_blcfill_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {178; CHECK-LABEL: test_x86_tbm_blcfill_u32_z2:179; CHECK: # %bb.0:180; CHECK-NEXT: movl %esi, %eax181; CHECK-NEXT: blcfilll %edi, %ecx182; CHECK-NEXT: cmovnel %edx, %eax183; CHECK-NEXT: retq184 %t0 = add i32 %a, 1185 %t1 = and i32 %t0, %a186 %t2 = icmp eq i32 %t1, 0187 %t3 = select i1 %t2, i32 %b, i32 %c188 ret i32 %t3189}190 191define i32 @test_x86_tbm_blcfill_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {192; CHECK-LABEL: test_x86_tbm_blcfill_u32_sle:193; CHECK: # %bb.0:194; CHECK-NEXT: movl %esi, %eax195; CHECK-NEXT: blcfilll %edi, %ecx196; CHECK-NEXT: cmovgl %edx, %eax197; CHECK-NEXT: retq198 %t0 = add i32 %a, 1199 %t1 = and i32 %t0, %a200 %t2 = icmp sle i32 %t1, 0201 %t3 = select i1 %t2, i32 %b, i32 %c202 ret i32 %t3203}204 205define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind {206; CHECK-LABEL: test_x86_tbm_blcfill_u64:207; CHECK: # %bb.0:208; CHECK-NEXT: blcfillq %rdi, %rax209; CHECK-NEXT: retq210 %t0 = add i64 %a, 1211 %t1 = and i64 %t0, %a212 ret i64 %t1213}214 215define i64 @test_x86_tbm_blcfill_u64_z(i64 %a, i64 %b) nounwind {216; CHECK-LABEL: test_x86_tbm_blcfill_u64_z:217; CHECK: # %bb.0:218; CHECK-NEXT: blcfillq %rdi, %rax219; CHECK-NEXT: cmoveq %rsi, %rax220; CHECK-NEXT: retq221 %t0 = add i64 %a, 1222 %t1 = and i64 %t0, %a223 %t2 = icmp eq i64 %t1, 0224 %t3 = select i1 %t2, i64 %b, i64 %t1225 ret i64 %t3226}227 228define i64 @test_x86_tbm_blcfill_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {229; CHECK-LABEL: test_x86_tbm_blcfill_u64_z2:230; CHECK: # %bb.0:231; CHECK-NEXT: movq %rsi, %rax232; CHECK-NEXT: blcfillq %rdi, %rcx233; CHECK-NEXT: cmovneq %rdx, %rax234; CHECK-NEXT: retq235 %t0 = add i64 %a, 1236 %t1 = and i64 %t0, %a237 %t2 = icmp eq i64 %t1, 0238 %t3 = select i1 %t2, i64 %b, i64 %c239 ret i64 %t3240}241 242define i64 @test_x86_tbm_blcfill_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {243; CHECK-LABEL: test_x86_tbm_blcfill_u64_sle:244; CHECK: # %bb.0:245; CHECK-NEXT: movq %rsi, %rax246; CHECK-NEXT: blcfillq %rdi, %rcx247; CHECK-NEXT: cmovgq %rdx, %rax248; CHECK-NEXT: retq249 %t0 = add i64 %a, 1250 %t1 = and i64 %t0, %a251 %t2 = icmp sle i64 %t1, 0252 %t3 = select i1 %t2, i64 %b, i64 %c253 ret i64 %t3254}255 256define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind {257; CHECK-LABEL: test_x86_tbm_blci_u32:258; CHECK: # %bb.0:259; CHECK-NEXT: blcil %edi, %eax260; CHECK-NEXT: retq261 %t0 = add i32 1, %a262 %t1 = xor i32 %t0, -1263 %t2 = or i32 %t1, %a264 ret i32 %t2265}266 267define i32 @test_x86_tbm_blci_u32_z(i32 %a, i32 %b) nounwind {268; CHECK-LABEL: test_x86_tbm_blci_u32_z:269; CHECK: # %bb.0:270; CHECK-NEXT: blcil %edi, %eax271; CHECK-NEXT: cmovel %esi, %eax272; CHECK-NEXT: retq273 %t0 = add i32 1, %a274 %t1 = xor i32 %t0, -1275 %t2 = or i32 %t1, %a276 %t3 = icmp eq i32 %t2, 0277 %t4 = select i1 %t3, i32 %b, i32 %t2278 ret i32 %t4279}280 281define i32 @test_x86_tbm_blci_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {282; CHECK-LABEL: test_x86_tbm_blci_u32_z2:283; CHECK: # %bb.0:284; CHECK-NEXT: movl %esi, %eax285; CHECK-NEXT: blcil %edi, %ecx286; CHECK-NEXT: cmovnel %edx, %eax287; CHECK-NEXT: retq288 %t0 = add i32 1, %a289 %t1 = xor i32 %t0, -1290 %t2 = or i32 %t1, %a291 %t3 = icmp eq i32 %t2, 0292 %t4 = select i1 %t3, i32 %b, i32 %c293 ret i32 %t4294}295 296define i32 @test_x86_tbm_blci_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {297; CHECK-LABEL: test_x86_tbm_blci_u32_sle:298; CHECK: # %bb.0:299; CHECK-NEXT: movl %esi, %eax300; CHECK-NEXT: blcil %edi, %ecx301; CHECK-NEXT: cmovgl %edx, %eax302; CHECK-NEXT: retq303 %t0 = add i32 1, %a304 %t1 = xor i32 %t0, -1305 %t2 = or i32 %t1, %a306 %t3 = icmp sle i32 %t2, 0307 %t4 = select i1 %t3, i32 %b, i32 %c308 ret i32 %t4309}310 311define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind {312; CHECK-LABEL: test_x86_tbm_blci_u64:313; CHECK: # %bb.0:314; CHECK-NEXT: blciq %rdi, %rax315; CHECK-NEXT: retq316 %t0 = add i64 1, %a317 %t1 = xor i64 %t0, -1318 %t2 = or i64 %t1, %a319 ret i64 %t2320}321 322define i64 @test_x86_tbm_blci_u64_z(i64 %a, i64 %b) nounwind {323; CHECK-LABEL: test_x86_tbm_blci_u64_z:324; CHECK: # %bb.0:325; CHECK-NEXT: blciq %rdi, %rax326; CHECK-NEXT: cmoveq %rsi, %rax327; CHECK-NEXT: retq328 %t0 = add i64 1, %a329 %t1 = xor i64 %t0, -1330 %t2 = or i64 %t1, %a331 %t3 = icmp eq i64 %t2, 0332 %t4 = select i1 %t3, i64 %b, i64 %t2333 ret i64 %t4334}335 336define i64 @test_x86_tbm_blci_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {337; CHECK-LABEL: test_x86_tbm_blci_u64_z2:338; CHECK: # %bb.0:339; CHECK-NEXT: movq %rsi, %rax340; CHECK-NEXT: blciq %rdi, %rcx341; CHECK-NEXT: cmovneq %rdx, %rax342; CHECK-NEXT: retq343 %t0 = add i64 1, %a344 %t1 = xor i64 %t0, -1345 %t2 = or i64 %t1, %a346 %t3 = icmp eq i64 %t2, 0347 %t4 = select i1 %t3, i64 %b, i64 %c348 ret i64 %t4349}350 351define i64 @test_x86_tbm_blci_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {352; CHECK-LABEL: test_x86_tbm_blci_u64_sle:353; CHECK: # %bb.0:354; CHECK-NEXT: movq %rsi, %rax355; CHECK-NEXT: blciq %rdi, %rcx356; CHECK-NEXT: cmovgq %rdx, %rax357; CHECK-NEXT: retq358 %t0 = add i64 1, %a359 %t1 = xor i64 %t0, -1360 %t2 = or i64 %t1, %a361 %t3 = icmp sle i64 %t2, 0362 %t4 = select i1 %t3, i64 %b, i64 %c363 ret i64 %t4364}365 366define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind {367; CHECK-LABEL: test_x86_tbm_blci_u32_b:368; CHECK: # %bb.0:369; CHECK-NEXT: blcil %edi, %eax370; CHECK-NEXT: retq371 %t0 = sub i32 -2, %a372 %t1 = or i32 %t0, %a373 ret i32 %t1374}375 376define i64 @test_x86_tbm_blci_u64_b(i64 %a) nounwind {377; CHECK-LABEL: test_x86_tbm_blci_u64_b:378; CHECK: # %bb.0:379; CHECK-NEXT: blciq %rdi, %rax380; CHECK-NEXT: retq381 %t0 = sub i64 -2, %a382 %t1 = or i64 %t0, %a383 ret i64 %t1384}385 386define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind {387; CHECK-LABEL: test_x86_tbm_blcic_u32:388; CHECK: # %bb.0:389; CHECK-NEXT: blcicl %edi, %eax390; CHECK-NEXT: retq391 %t0 = xor i32 %a, -1392 %t1 = add i32 %a, 1393 %t2 = and i32 %t1, %t0394 ret i32 %t2395}396 397define i32 @test_x86_tbm_blcic_u32_z(i32 %a, i32 %b) nounwind {398; CHECK-LABEL: test_x86_tbm_blcic_u32_z:399; CHECK: # %bb.0:400; CHECK-NEXT: blcicl %edi, %eax401; CHECK-NEXT: cmovel %esi, %eax402; CHECK-NEXT: retq403 %t0 = xor i32 %a, -1404 %t1 = add i32 %a, 1405 %t2 = and i32 %t1, %t0406 %t3 = icmp eq i32 %t2, 0407 %t4 = select i1 %t3, i32 %b, i32 %t2408 ret i32 %t4409}410 411define i32 @test_x86_tbm_blcic_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {412; CHECK-LABEL: test_x86_tbm_blcic_u32_z2:413; CHECK: # %bb.0:414; CHECK-NEXT: movl %esi, %eax415; CHECK-NEXT: blcicl %edi, %ecx416; CHECK-NEXT: cmovnel %edx, %eax417; CHECK-NEXT: retq418 %t0 = xor i32 %a, -1419 %t1 = add i32 %a, 1420 %t2 = and i32 %t1, %t0421 %t3 = icmp eq i32 %t2, 0422 %t4 = select i1 %t3, i32 %b, i32 %c423 ret i32 %t4424}425 426define i32 @test_x86_tbm_blcic_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {427; CHECK-LABEL: test_x86_tbm_blcic_u32_sle:428; CHECK: # %bb.0:429; CHECK-NEXT: movl %esi, %eax430; CHECK-NEXT: blcicl %edi, %ecx431; CHECK-NEXT: cmovgl %edx, %eax432; CHECK-NEXT: retq433 %t0 = xor i32 %a, -1434 %t1 = add i32 %a, 1435 %t2 = and i32 %t1, %t0436 %t3 = icmp sle i32 %t2, 0437 %t4 = select i1 %t3, i32 %b, i32 %c438 ret i32 %t4439}440 441define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind {442; CHECK-LABEL: test_x86_tbm_blcic_u64:443; CHECK: # %bb.0:444; CHECK-NEXT: blcicq %rdi, %rax445; CHECK-NEXT: retq446 %t0 = xor i64 %a, -1447 %t1 = add i64 %a, 1448 %t2 = and i64 %t1, %t0449 ret i64 %t2450}451 452define i64 @test_x86_tbm_blcic_u64_z(i64 %a, i64 %b) nounwind {453; CHECK-LABEL: test_x86_tbm_blcic_u64_z:454; CHECK: # %bb.0:455; CHECK-NEXT: blcicq %rdi, %rax456; CHECK-NEXT: cmoveq %rsi, %rax457; CHECK-NEXT: retq458 %t0 = xor i64 %a, -1459 %t1 = add i64 %a, 1460 %t2 = and i64 %t1, %t0461 %t3 = icmp eq i64 %t2, 0462 %t4 = select i1 %t3, i64 %b, i64 %t2463 ret i64 %t4464}465 466define i64 @test_x86_tbm_blcic_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {467; CHECK-LABEL: test_x86_tbm_blcic_u64_z2:468; CHECK: # %bb.0:469; CHECK-NEXT: movq %rsi, %rax470; CHECK-NEXT: blcicq %rdi, %rcx471; CHECK-NEXT: cmovneq %rdx, %rax472; CHECK-NEXT: retq473 %t0 = xor i64 %a, -1474 %t1 = add i64 %a, 1475 %t2 = and i64 %t1, %t0476 %t3 = icmp eq i64 %t2, 0477 %t4 = select i1 %t3, i64 %b, i64 %c478 ret i64 %t4479}480 481define i64 @test_x86_tbm_blcic_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {482; CHECK-LABEL: test_x86_tbm_blcic_u64_sle:483; CHECK: # %bb.0:484; CHECK-NEXT: movq %rsi, %rax485; CHECK-NEXT: blcicq %rdi, %rcx486; CHECK-NEXT: cmovgq %rdx, %rax487; CHECK-NEXT: retq488 %t0 = xor i64 %a, -1489 %t1 = add i64 %a, 1490 %t2 = and i64 %t1, %t0491 %t3 = icmp sle i64 %t2, 0492 %t4 = select i1 %t3, i64 %b, i64 %c493 ret i64 %t4494}495 496define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind {497; CHECK-LABEL: test_x86_tbm_blcmsk_u32:498; CHECK: # %bb.0:499; CHECK-NEXT: blcmskl %edi, %eax500; CHECK-NEXT: retq501 %t0 = add i32 %a, 1502 %t1 = xor i32 %t0, %a503 ret i32 %t1504}505 506define i32 @test_x86_tbm_blcmsk_u32_z(i32 %a, i32 %b) nounwind {507; CHECK-LABEL: test_x86_tbm_blcmsk_u32_z:508; CHECK: # %bb.0:509; CHECK-NEXT: blcmskl %edi, %eax510; CHECK-NEXT: cmovel %esi, %eax511; CHECK-NEXT: retq512 %t0 = add i32 %a, 1513 %t1 = xor i32 %t0, %a514 %t2 = icmp eq i32 %t1, 0515 %t3 = select i1 %t2, i32 %b, i32 %t1516 ret i32 %t3517}518 519define i32 @test_x86_tbm_blcmsk_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {520; CHECK-LABEL: test_x86_tbm_blcmsk_u32_z2:521; CHECK: # %bb.0:522; CHECK-NEXT: movl %esi, %eax523; CHECK-NEXT: blcmskl %edi, %ecx524; CHECK-NEXT: cmovnel %edx, %eax525; CHECK-NEXT: retq526 %t0 = add i32 %a, 1527 %t1 = xor i32 %t0, %a528 %t2 = icmp eq i32 %t1, 0529 %t3 = select i1 %t2, i32 %b, i32 %c530 ret i32 %t3531}532 533define i32 @test_x86_tbm_blcmsk_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {534; CHECK-LABEL: test_x86_tbm_blcmsk_u32_sle:535; CHECK: # %bb.0:536; CHECK-NEXT: movl %esi, %eax537; CHECK-NEXT: blcmskl %edi, %ecx538; CHECK-NEXT: cmovgl %edx, %eax539; CHECK-NEXT: retq540 %t0 = add i32 %a, 1541 %t1 = xor i32 %t0, %a542 %t2 = icmp sle i32 %t1, 0543 %t3 = select i1 %t2, i32 %b, i32 %c544 ret i32 %t3545}546 547define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind {548; CHECK-LABEL: test_x86_tbm_blcmsk_u64:549; CHECK: # %bb.0:550; CHECK-NEXT: blcmskq %rdi, %rax551; CHECK-NEXT: retq552 %t0 = add i64 %a, 1553 %t1 = xor i64 %t0, %a554 ret i64 %t1555}556 557define i64 @test_x86_tbm_blcmsk_u64_z(i64 %a, i64 %b) nounwind {558; CHECK-LABEL: test_x86_tbm_blcmsk_u64_z:559; CHECK: # %bb.0:560; CHECK-NEXT: blcmskq %rdi, %rax561; CHECK-NEXT: cmoveq %rsi, %rax562; CHECK-NEXT: retq563 %t0 = add i64 %a, 1564 %t1 = xor i64 %t0, %a565 %t2 = icmp eq i64 %t1, 0566 %t3 = select i1 %t2, i64 %b, i64 %t1567 ret i64 %t3568}569 570define i64 @test_x86_tbm_blcmsk_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {571; CHECK-LABEL: test_x86_tbm_blcmsk_u64_z2:572; CHECK: # %bb.0:573; CHECK-NEXT: movq %rsi, %rax574; CHECK-NEXT: blcmskq %rdi, %rcx575; CHECK-NEXT: cmovneq %rdx, %rax576; CHECK-NEXT: retq577 %t0 = add i64 %a, 1578 %t1 = xor i64 %t0, %a579 %t2 = icmp eq i64 %t1, 0580 %t3 = select i1 %t2, i64 %b, i64 %c581 ret i64 %t3582}583 584define i64 @test_x86_tbm_blcmsk_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {585; CHECK-LABEL: test_x86_tbm_blcmsk_u64_sle:586; CHECK: # %bb.0:587; CHECK-NEXT: movq %rsi, %rax588; CHECK-NEXT: blcmskq %rdi, %rcx589; CHECK-NEXT: cmovgq %rdx, %rax590; CHECK-NEXT: retq591 %t0 = add i64 %a, 1592 %t1 = xor i64 %t0, %a593 %t2 = icmp sle i64 %t1, 0594 %t3 = select i1 %t2, i64 %b, i64 %c595 ret i64 %t3596}597 598define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind {599; CHECK-LABEL: test_x86_tbm_blcs_u32:600; CHECK: # %bb.0:601; CHECK-NEXT: blcsl %edi, %eax602; CHECK-NEXT: retq603 %t0 = add i32 %a, 1604 %t1 = or i32 %t0, %a605 ret i32 %t1606}607 608define i32 @test_x86_tbm_blcs_u32_z(i32 %a, i32 %b) nounwind {609; CHECK-LABEL: test_x86_tbm_blcs_u32_z:610; CHECK: # %bb.0:611; CHECK-NEXT: blcsl %edi, %eax612; CHECK-NEXT: cmovel %esi, %eax613; CHECK-NEXT: retq614 %t0 = add i32 %a, 1615 %t1 = or i32 %t0, %a616 %t2 = icmp eq i32 %t1, 0617 %t3 = select i1 %t2, i32 %b, i32 %t1618 ret i32 %t3619}620 621define i32 @test_x86_tbm_blcs_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {622; CHECK-LABEL: test_x86_tbm_blcs_u32_z2:623; CHECK: # %bb.0:624; CHECK-NEXT: movl %esi, %eax625; CHECK-NEXT: blcsl %edi, %ecx626; CHECK-NEXT: cmovnel %edx, %eax627; CHECK-NEXT: retq628 %t0 = add i32 %a, 1629 %t1 = or i32 %t0, %a630 %t2 = icmp eq i32 %t1, 0631 %t3 = select i1 %t2, i32 %b, i32 %c632 ret i32 %t3633}634 635define i32 @test_x86_tbm_blcs_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {636; CHECK-LABEL: test_x86_tbm_blcs_u32_sle:637; CHECK: # %bb.0:638; CHECK-NEXT: movl %esi, %eax639; CHECK-NEXT: blcsl %edi, %ecx640; CHECK-NEXT: cmovgl %edx, %eax641; CHECK-NEXT: retq642 %t0 = add i32 %a, 1643 %t1 = or i32 %t0, %a644 %t2 = icmp sle i32 %t1, 0645 %t3 = select i1 %t2, i32 %b, i32 %c646 ret i32 %t3647}648 649define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind {650; CHECK-LABEL: test_x86_tbm_blcs_u64:651; CHECK: # %bb.0:652; CHECK-NEXT: blcsq %rdi, %rax653; CHECK-NEXT: retq654 %t0 = add i64 %a, 1655 %t1 = or i64 %t0, %a656 ret i64 %t1657}658 659define i64 @test_x86_tbm_blcs_u64_z(i64 %a, i64 %b) nounwind {660; CHECK-LABEL: test_x86_tbm_blcs_u64_z:661; CHECK: # %bb.0:662; CHECK-NEXT: blcsq %rdi, %rax663; CHECK-NEXT: cmoveq %rsi, %rax664; CHECK-NEXT: retq665 %t0 = add i64 %a, 1666 %t1 = or i64 %t0, %a667 %t2 = icmp eq i64 %t1, 0668 %t3 = select i1 %t2, i64 %b, i64 %t1669 ret i64 %t3670}671 672define i64 @test_x86_tbm_blcs_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {673; CHECK-LABEL: test_x86_tbm_blcs_u64_z2:674; CHECK: # %bb.0:675; CHECK-NEXT: movq %rsi, %rax676; CHECK-NEXT: blcsq %rdi, %rcx677; CHECK-NEXT: cmovneq %rdx, %rax678; CHECK-NEXT: retq679 %t0 = add i64 %a, 1680 %t1 = or i64 %t0, %a681 %t2 = icmp eq i64 %t1, 0682 %t3 = select i1 %t2, i64 %b, i64 %c683 ret i64 %t3684}685 686define i64 @test_x86_tbm_blcs_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {687; CHECK-LABEL: test_x86_tbm_blcs_u64_sle:688; CHECK: # %bb.0:689; CHECK-NEXT: movq %rsi, %rax690; CHECK-NEXT: blcsq %rdi, %rcx691; CHECK-NEXT: cmovgq %rdx, %rax692; CHECK-NEXT: retq693 %t0 = add i64 %a, 1694 %t1 = or i64 %t0, %a695 %t2 = icmp sle i64 %t1, 0696 %t3 = select i1 %t2, i64 %b, i64 %c697 ret i64 %t3698}699 700define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind {701; CHECK-LABEL: test_x86_tbm_blsfill_u32:702; CHECK: # %bb.0:703; CHECK-NEXT: blsfilll %edi, %eax704; CHECK-NEXT: retq705 %t0 = add i32 %a, -1706 %t1 = or i32 %t0, %a707 ret i32 %t1708}709 710define i32 @test_x86_tbm_blsfill_u32_z(i32 %a, i32 %b) nounwind {711; CHECK-LABEL: test_x86_tbm_blsfill_u32_z:712; CHECK: # %bb.0:713; CHECK-NEXT: blsfilll %edi, %eax714; CHECK-NEXT: cmovel %esi, %eax715; CHECK-NEXT: retq716 %t0 = add i32 %a, -1717 %t1 = or i32 %t0, %a718 %t2 = icmp eq i32 %t1, 0719 %t3 = select i1 %t2, i32 %b, i32 %t1720 ret i32 %t3721}722 723define i32 @test_x86_tbm_blsfill_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {724; CHECK-LABEL: test_x86_tbm_blsfill_u32_z2:725; CHECK: # %bb.0:726; CHECK-NEXT: movl %esi, %eax727; CHECK-NEXT: blsfilll %edi, %ecx728; CHECK-NEXT: cmovnel %edx, %eax729; CHECK-NEXT: retq730 %t0 = add i32 %a, -1731 %t1 = or i32 %t0, %a732 %t2 = icmp eq i32 %t1, 0733 %t3 = select i1 %t2, i32 %b, i32 %c734 ret i32 %t3735}736 737define i32 @test_x86_tbm_blsfill_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {738; CHECK-LABEL: test_x86_tbm_blsfill_u32_sle:739; CHECK: # %bb.0:740; CHECK-NEXT: movl %esi, %eax741; CHECK-NEXT: blsfilll %edi, %ecx742; CHECK-NEXT: cmovgl %edx, %eax743; CHECK-NEXT: retq744 %t0 = add i32 %a, -1745 %t1 = or i32 %t0, %a746 %t2 = icmp sle i32 %t1, 0747 %t3 = select i1 %t2, i32 %b, i32 %c748 ret i32 %t3749}750 751define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind {752; CHECK-LABEL: test_x86_tbm_blsfill_u64:753; CHECK: # %bb.0:754; CHECK-NEXT: blsfillq %rdi, %rax755; CHECK-NEXT: retq756 %t0 = add i64 %a, -1757 %t1 = or i64 %t0, %a758 ret i64 %t1759}760 761define i64 @test_x86_tbm_blsfill_u64_z(i64 %a, i64 %b) nounwind {762; CHECK-LABEL: test_x86_tbm_blsfill_u64_z:763; CHECK: # %bb.0:764; CHECK-NEXT: blsfillq %rdi, %rax765; CHECK-NEXT: cmoveq %rsi, %rax766; CHECK-NEXT: retq767 %t0 = add i64 %a, -1768 %t1 = or i64 %t0, %a769 %t2 = icmp eq i64 %t1, 0770 %t3 = select i1 %t2, i64 %b, i64 %t1771 ret i64 %t3772}773 774define i64 @test_x86_tbm_blsfill_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {775; CHECK-LABEL: test_x86_tbm_blsfill_u64_z2:776; CHECK: # %bb.0:777; CHECK-NEXT: movq %rsi, %rax778; CHECK-NEXT: blsfillq %rdi, %rcx779; CHECK-NEXT: cmovneq %rdx, %rax780; CHECK-NEXT: retq781 %t0 = add i64 %a, -1782 %t1 = or i64 %t0, %a783 %t2 = icmp eq i64 %t1, 0784 %t3 = select i1 %t2, i64 %b, i64 %c785 ret i64 %t3786}787 788define i64 @test_x86_tbm_blsfill_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {789; CHECK-LABEL: test_x86_tbm_blsfill_u64_sle:790; CHECK: # %bb.0:791; CHECK-NEXT: movq %rsi, %rax792; CHECK-NEXT: blsfillq %rdi, %rcx793; CHECK-NEXT: cmovgq %rdx, %rax794; CHECK-NEXT: retq795 %t0 = add i64 %a, -1796 %t1 = or i64 %t0, %a797 %t2 = icmp sle i64 %t1, 0798 %t3 = select i1 %t2, i64 %b, i64 %c799 ret i64 %t3800}801 802define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind {803; CHECK-LABEL: test_x86_tbm_blsic_u32:804; CHECK: # %bb.0:805; CHECK-NEXT: blsicl %edi, %eax806; CHECK-NEXT: retq807 %t0 = xor i32 %a, -1808 %t1 = add i32 %a, -1809 %t2 = or i32 %t0, %t1810 ret i32 %t2811}812 813define i32 @test_x86_tbm_blsic_u32_z(i32 %a, i32 %b) nounwind {814; CHECK-LABEL: test_x86_tbm_blsic_u32_z:815; CHECK: # %bb.0:816; CHECK-NEXT: blsicl %edi, %eax817; CHECK-NEXT: cmovel %esi, %eax818; CHECK-NEXT: retq819 %t0 = xor i32 %a, -1820 %t1 = add i32 %a, -1821 %t2 = or i32 %t0, %t1822 %t3 = icmp eq i32 %t2, 0823 %t4 = select i1 %t3, i32 %b, i32 %t2824 ret i32 %t4825}826 827define i32 @test_x86_tbm_blsic_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {828; CHECK-LABEL: test_x86_tbm_blsic_u32_z2:829; CHECK: # %bb.0:830; CHECK-NEXT: movl %esi, %eax831; CHECK-NEXT: blsicl %edi, %ecx832; CHECK-NEXT: cmovnel %edx, %eax833; CHECK-NEXT: retq834 %t0 = xor i32 %a, -1835 %t1 = add i32 %a, -1836 %t2 = or i32 %t0, %t1837 %t3 = icmp eq i32 %t2, 0838 %t4 = select i1 %t3, i32 %b, i32 %c839 ret i32 %t4840}841 842define i32 @test_x86_tbm_blsic_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {843; CHECK-LABEL: test_x86_tbm_blsic_u32_sle:844; CHECK: # %bb.0:845; CHECK-NEXT: movl %esi, %eax846; CHECK-NEXT: blsicl %edi, %ecx847; CHECK-NEXT: cmovgl %edx, %eax848; CHECK-NEXT: retq849 %t0 = xor i32 %a, -1850 %t1 = add i32 %a, -1851 %t2 = or i32 %t0, %t1852 %t3 = icmp sle i32 %t2, 0853 %t4 = select i1 %t3, i32 %b, i32 %c854 ret i32 %t4855}856 857define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind {858; CHECK-LABEL: test_x86_tbm_blsic_u64:859; CHECK: # %bb.0:860; CHECK-NEXT: blsicq %rdi, %rax861; CHECK-NEXT: retq862 %t0 = xor i64 %a, -1863 %t1 = add i64 %a, -1864 %t2 = or i64 %t0, %t1865 ret i64 %t2866}867 868define i64 @test_x86_tbm_blsic_u64_z(i64 %a, i64 %b) nounwind {869; CHECK-LABEL: test_x86_tbm_blsic_u64_z:870; CHECK: # %bb.0:871; CHECK-NEXT: blsicq %rdi, %rax872; CHECK-NEXT: cmoveq %rsi, %rax873; CHECK-NEXT: retq874 %t0 = xor i64 %a, -1875 %t1 = add i64 %a, -1876 %t2 = or i64 %t0, %t1877 %t3 = icmp eq i64 %t2, 0878 %t4 = select i1 %t3, i64 %b, i64 %t2879 ret i64 %t4880}881 882define i64 @test_x86_tbm_blsic_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {883; CHECK-LABEL: test_x86_tbm_blsic_u64_z2:884; CHECK: # %bb.0:885; CHECK-NEXT: movq %rsi, %rax886; CHECK-NEXT: blsicq %rdi, %rcx887; CHECK-NEXT: cmovneq %rdx, %rax888; CHECK-NEXT: retq889 %t0 = xor i64 %a, -1890 %t1 = add i64 %a, -1891 %t2 = or i64 %t0, %t1892 %t3 = icmp eq i64 %t2, 0893 %t4 = select i1 %t3, i64 %b, i64 %c894 ret i64 %t4895}896 897define i64 @test_x86_tbm_blsic_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {898; CHECK-LABEL: test_x86_tbm_blsic_u64_sle:899; CHECK: # %bb.0:900; CHECK-NEXT: movq %rsi, %rax901; CHECK-NEXT: blsicq %rdi, %rcx902; CHECK-NEXT: cmovgq %rdx, %rax903; CHECK-NEXT: retq904 %t0 = xor i64 %a, -1905 %t1 = add i64 %a, -1906 %t2 = or i64 %t0, %t1907 %t3 = icmp sle i64 %t2, 0908 %t4 = select i1 %t3, i64 %b, i64 %c909 ret i64 %t4910}911 912define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind {913; CHECK-LABEL: test_x86_tbm_t1mskc_u32:914; CHECK: # %bb.0:915; CHECK-NEXT: t1mskcl %edi, %eax916; CHECK-NEXT: retq917 %t0 = xor i32 %a, -1918 %t1 = add i32 %a, 1919 %t2 = or i32 %t0, %t1920 ret i32 %t2921}922 923define i32 @test_x86_tbm_t1mskc_u32_z(i32 %a, i32 %b) nounwind {924; CHECK-LABEL: test_x86_tbm_t1mskc_u32_z:925; CHECK: # %bb.0:926; CHECK-NEXT: t1mskcl %edi, %eax927; CHECK-NEXT: cmovel %esi, %eax928; CHECK-NEXT: retq929 %t0 = xor i32 %a, -1930 %t1 = add i32 %a, 1931 %t2 = or i32 %t0, %t1932 %t3 = icmp eq i32 %t2, 0933 %t4 = select i1 %t3, i32 %b, i32 %t2934 ret i32 %t4935}936 937define i32 @test_x86_tbm_t1mskc_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {938; CHECK-LABEL: test_x86_tbm_t1mskc_u32_z2:939; CHECK: # %bb.0:940; CHECK-NEXT: movl %esi, %eax941; CHECK-NEXT: t1mskcl %edi, %ecx942; CHECK-NEXT: cmovnel %edx, %eax943; CHECK-NEXT: retq944 %t0 = xor i32 %a, -1945 %t1 = add i32 %a, 1946 %t2 = or i32 %t0, %t1947 %t3 = icmp eq i32 %t2, 0948 %t4 = select i1 %t3, i32 %b, i32 %c949 ret i32 %t4950}951 952define i32 @test_x86_tbm_t1mskc_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {953; CHECK-LABEL: test_x86_tbm_t1mskc_u32_sle:954; CHECK: # %bb.0:955; CHECK-NEXT: movl %esi, %eax956; CHECK-NEXT: t1mskcl %edi, %ecx957; CHECK-NEXT: cmovgl %edx, %eax958; CHECK-NEXT: retq959 %t0 = xor i32 %a, -1960 %t1 = add i32 %a, 1961 %t2 = or i32 %t0, %t1962 %t3 = icmp sle i32 %t2, 0963 %t4 = select i1 %t3, i32 %b, i32 %c964 ret i32 %t4965}966 967define i64 @test_x86_tbm_t1mskc_u64(i64 %a) nounwind {968; CHECK-LABEL: test_x86_tbm_t1mskc_u64:969; CHECK: # %bb.0:970; CHECK-NEXT: t1mskcq %rdi, %rax971; CHECK-NEXT: retq972 %t0 = xor i64 %a, -1973 %t1 = add i64 %a, 1974 %t2 = or i64 %t0, %t1975 ret i64 %t2976}977 978define i64 @test_x86_tbm_t1mskc_u64_z(i64 %a, i64 %b) nounwind {979; CHECK-LABEL: test_x86_tbm_t1mskc_u64_z:980; CHECK: # %bb.0:981; CHECK-NEXT: t1mskcq %rdi, %rax982; CHECK-NEXT: cmoveq %rsi, %rax983; CHECK-NEXT: retq984 %t0 = xor i64 %a, -1985 %t1 = add i64 %a, 1986 %t2 = or i64 %t0, %t1987 %t3 = icmp eq i64 %t2, 0988 %t4 = select i1 %t3, i64 %b, i64 %t2989 ret i64 %t4990}991 992define i64 @test_x86_tbm_t1mskc_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {993; CHECK-LABEL: test_x86_tbm_t1mskc_u64_z2:994; CHECK: # %bb.0:995; CHECK-NEXT: movq %rsi, %rax996; CHECK-NEXT: t1mskcq %rdi, %rcx997; CHECK-NEXT: cmovneq %rdx, %rax998; CHECK-NEXT: retq999 %t0 = xor i64 %a, -11000 %t1 = add i64 %a, 11001 %t2 = or i64 %t0, %t11002 %t3 = icmp eq i64 %t2, 01003 %t4 = select i1 %t3, i64 %b, i64 %c1004 ret i64 %t41005}1006 1007define i64 @test_x86_tbm_t1mskc_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {1008; CHECK-LABEL: test_x86_tbm_t1mskc_u64_sle:1009; CHECK: # %bb.0:1010; CHECK-NEXT: movq %rsi, %rax1011; CHECK-NEXT: t1mskcq %rdi, %rcx1012; CHECK-NEXT: cmovgq %rdx, %rax1013; CHECK-NEXT: retq1014 %t0 = xor i64 %a, -11015 %t1 = add i64 %a, 11016 %t2 = or i64 %t0, %t11017 %t3 = icmp sle i64 %t2, 01018 %t4 = select i1 %t3, i64 %b, i64 %c1019 ret i64 %t41020}1021 1022define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind {1023; CHECK-LABEL: test_x86_tbm_tzmsk_u32:1024; CHECK: # %bb.0:1025; CHECK-NEXT: tzmskl %edi, %eax1026; CHECK-NEXT: retq1027 %t0 = xor i32 %a, -11028 %t1 = add i32 %a, -11029 %t2 = and i32 %t0, %t11030 ret i32 %t21031}1032 1033define i32 @test_x86_tbm_tzmsk_u32_z(i32 %a, i32 %b) nounwind {1034; CHECK-LABEL: test_x86_tbm_tzmsk_u32_z:1035; CHECK: # %bb.0:1036; CHECK-NEXT: tzmskl %edi, %eax1037; CHECK-NEXT: cmovel %esi, %eax1038; CHECK-NEXT: retq1039 %t0 = xor i32 %a, -11040 %t1 = add i32 %a, -11041 %t2 = and i32 %t0, %t11042 %t3 = icmp eq i32 %t2, 01043 %t4 = select i1 %t3, i32 %b, i32 %t21044 ret i32 %t41045}1046 1047define i32 @test_x86_tbm_tzmsk_u32_z2(i32 %a, i32 %b, i32 %c) nounwind {1048; CHECK-LABEL: test_x86_tbm_tzmsk_u32_z2:1049; CHECK: # %bb.0:1050; CHECK-NEXT: movl %esi, %eax1051; CHECK-NEXT: tzmskl %edi, %ecx1052; CHECK-NEXT: cmovnel %edx, %eax1053; CHECK-NEXT: retq1054 %t0 = xor i32 %a, -11055 %t1 = add i32 %a, -11056 %t2 = and i32 %t0, %t11057 %t3 = icmp eq i32 %t2, 01058 %t4 = select i1 %t3, i32 %b, i32 %c1059 ret i32 %t41060}1061 1062define i32 @test_x86_tbm_tzmsk_u32_sle(i32 %a, i32 %b, i32 %c) nounwind {1063; CHECK-LABEL: test_x86_tbm_tzmsk_u32_sle:1064; CHECK: # %bb.0:1065; CHECK-NEXT: movl %esi, %eax1066; CHECK-NEXT: tzmskl %edi, %ecx1067; CHECK-NEXT: cmovgl %edx, %eax1068; CHECK-NEXT: retq1069 %t0 = xor i32 %a, -11070 %t1 = add i32 %a, -11071 %t2 = and i32 %t0, %t11072 %t3 = icmp sle i32 %t2, 01073 %t4 = select i1 %t3, i32 %b, i32 %c1074 ret i32 %t41075}1076 1077define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind {1078; CHECK-LABEL: test_x86_tbm_tzmsk_u64:1079; CHECK: # %bb.0:1080; CHECK-NEXT: tzmskq %rdi, %rax1081; CHECK-NEXT: retq1082 %t0 = xor i64 %a, -11083 %t1 = add i64 %a, -11084 %t2 = and i64 %t0, %t11085 ret i64 %t21086}1087 1088define i64 @test_x86_tbm_tzmsk_u64_z(i64 %a, i64 %b) nounwind {1089; CHECK-LABEL: test_x86_tbm_tzmsk_u64_z:1090; CHECK: # %bb.0:1091; CHECK-NEXT: tzmskq %rdi, %rax1092; CHECK-NEXT: cmoveq %rsi, %rax1093; CHECK-NEXT: retq1094 %t0 = xor i64 %a, -11095 %t1 = add i64 %a, -11096 %t2 = and i64 %t0, %t11097 %t3 = icmp eq i64 %t2, 01098 %t4 = select i1 %t3, i64 %b, i64 %t21099 ret i64 %t41100}1101 1102define i64 @test_x86_tbm_tzmsk_u64_z2(i64 %a, i64 %b, i64 %c) nounwind {1103; CHECK-LABEL: test_x86_tbm_tzmsk_u64_z2:1104; CHECK: # %bb.0:1105; CHECK-NEXT: movq %rsi, %rax1106; CHECK-NEXT: tzmskq %rdi, %rcx1107; CHECK-NEXT: cmovneq %rdx, %rax1108; CHECK-NEXT: retq1109 %t0 = xor i64 %a, -11110 %t1 = add i64 %a, -11111 %t2 = and i64 %t0, %t11112 %t3 = icmp eq i64 %t2, 01113 %t4 = select i1 %t3, i64 %b, i64 %c1114 ret i64 %t41115}1116 1117define i64 @test_x86_tbm_tzmsk_u64_sle(i64 %a, i64 %b, i64 %c) nounwind {1118; CHECK-LABEL: test_x86_tbm_tzmsk_u64_sle:1119; CHECK: # %bb.0:1120; CHECK-NEXT: movq %rsi, %rax1121; CHECK-NEXT: tzmskq %rdi, %rcx1122; CHECK-NEXT: cmovgq %rdx, %rax1123; CHECK-NEXT: retq1124 %t0 = xor i64 %a, -11125 %t1 = add i64 %a, -11126 %t2 = and i64 %t0, %t11127 %t3 = icmp sle i64 %t2, 01128 %t4 = select i1 %t3, i64 %b, i64 %c1129 ret i64 %t41130}1131 1132define i64 @test_and_large_constant_mask(i64 %x) {1133; CHECK-LABEL: test_and_large_constant_mask:1134; CHECK: # %bb.0: # %entry1135; CHECK-NEXT: bextrq $15872, %rdi, %rax # imm = 0x3E001136; CHECK-NEXT: retq1137entry:1138 %and = and i64 %x, 46116860184273879031139 ret i64 %and1140}1141 1142define i64 @test_and_large_constant_mask_load(ptr %x) {1143; CHECK-LABEL: test_and_large_constant_mask_load:1144; CHECK: # %bb.0: # %entry1145; CHECK-NEXT: bextrq $15872, (%rdi), %rax # imm = 0x3E001146; CHECK-NEXT: retq1147entry:1148 %x1 = load i64, ptr %x1149 %and = and i64 %x1, 46116860184273879031150 ret i64 %and1151}1152 1153; Make sure the mask doesn't break our matching of blcic1154define i64 @masked_blcic(i64) {1155; CHECK-LABEL: masked_blcic:1156; CHECK: # %bb.0:1157; CHECK-NEXT: movzwl %di, %eax1158; CHECK-NEXT: blcicl %eax, %eax1159; CHECK-NEXT: retq1160 %2 = and i64 %0, 655351161 %3 = xor i64 %2, -11162 %4 = add nuw nsw i64 %2, 11163 %5 = and i64 %4, %31164 ret i64 %51165}1166 1167define i32 @blcic32_branch(i32 %x) nounwind {1168; CHECK-LABEL: blcic32_branch:1169; CHECK: # %bb.0:1170; CHECK-NEXT: pushq %rbx1171; CHECK-NEXT: blcicl %edi, %ebx1172; CHECK-NEXT: jne .LBB89_21173; CHECK-NEXT: # %bb.1:1174; CHECK-NEXT: callq bar@PLT1175; CHECK-NEXT: .LBB89_2:1176; CHECK-NEXT: movl %ebx, %eax1177; CHECK-NEXT: popq %rbx1178; CHECK-NEXT: retq1179 %tmp = xor i32 %x, -11180 %tmp2 = add i32 %x, 11181 %tmp3 = and i32 %tmp, %tmp21182 %cmp = icmp eq i32 %tmp3, 01183 br i1 %cmp, label %1, label %21184 1185 tail call void @bar()1186 br label %21187 ret i32 %tmp31188}1189 1190define i64 @blcic64_branch(i64 %x) nounwind {1191; CHECK-LABEL: blcic64_branch:1192; CHECK: # %bb.0:1193; CHECK-NEXT: pushq %rbx1194; CHECK-NEXT: blcicq %rdi, %rbx1195; CHECK-NEXT: jne .LBB90_21196; CHECK-NEXT: # %bb.1:1197; CHECK-NEXT: callq bar@PLT1198; CHECK-NEXT: .LBB90_2:1199; CHECK-NEXT: movq %rbx, %rax1200; CHECK-NEXT: popq %rbx1201; CHECK-NEXT: retq1202 %tmp = xor i64 %x, -11203 %tmp2 = add i64 %x, 11204 %tmp3 = and i64 %tmp, %tmp21205 %cmp = icmp eq i64 %tmp3, 01206 br i1 %cmp, label %1, label %21207 1208 tail call void @bar()1209 br label %21210 ret i64 %tmp31211}1212 1213define i32 @tzmsk32_branch(i32 %x) nounwind {1214; CHECK-LABEL: tzmsk32_branch:1215; CHECK: # %bb.0:1216; CHECK-NEXT: pushq %rbx1217; CHECK-NEXT: tzmskl %edi, %ebx1218; CHECK-NEXT: jne .LBB91_21219; CHECK-NEXT: # %bb.1:1220; CHECK-NEXT: callq bar@PLT1221; CHECK-NEXT: .LBB91_2:1222; CHECK-NEXT: movl %ebx, %eax1223; CHECK-NEXT: popq %rbx1224; CHECK-NEXT: retq1225 %tmp = xor i32 %x, -11226 %tmp2 = add i32 %x, -11227 %tmp3 = and i32 %tmp, %tmp21228 %cmp = icmp eq i32 %tmp3, 01229 br i1 %cmp, label %1, label %21230 1231 tail call void @bar()1232 br label %21233 ret i32 %tmp31234}1235 1236define i64 @tzmsk64_branch(i64 %x) nounwind {1237; CHECK-LABEL: tzmsk64_branch:1238; CHECK: # %bb.0:1239; CHECK-NEXT: pushq %rbx1240; CHECK-NEXT: tzmskq %rdi, %rbx1241; CHECK-NEXT: jne .LBB92_21242; CHECK-NEXT: # %bb.1:1243; CHECK-NEXT: callq bar@PLT1244; CHECK-NEXT: .LBB92_2:1245; CHECK-NEXT: movq %rbx, %rax1246; CHECK-NEXT: popq %rbx1247; CHECK-NEXT: retq1248 %tmp = xor i64 %x, -11249 %tmp2 = add i64 %x, -11250 %tmp3 = and i64 %tmp, %tmp21251 %cmp = icmp eq i64 %tmp3, 01252 br i1 %cmp, label %1, label %21253 1254 tail call void @bar()1255 br label %21256 ret i64 %tmp31257}1258 1259define i32 @blcfill32_branch(i32 %x) nounwind {1260; CHECK-LABEL: blcfill32_branch:1261; CHECK: # %bb.0:1262; CHECK-NEXT: pushq %rbx1263; CHECK-NEXT: blcfilll %edi, %ebx1264; CHECK-NEXT: jne .LBB93_21265; CHECK-NEXT: # %bb.1:1266; CHECK-NEXT: callq bar@PLT1267; CHECK-NEXT: .LBB93_2:1268; CHECK-NEXT: movl %ebx, %eax1269; CHECK-NEXT: popq %rbx1270; CHECK-NEXT: retq1271 %tmp2 = add i32 %x, 11272 %tmp3 = and i32 %tmp2, %x1273 %cmp = icmp eq i32 %tmp3, 01274 br i1 %cmp, label %1, label %21275 1276 tail call void @bar()1277 br label %21278 ret i32 %tmp31279}1280 1281define i64 @blcfill64_branch(i64 %x) nounwind {1282; CHECK-LABEL: blcfill64_branch:1283; CHECK: # %bb.0:1284; CHECK-NEXT: pushq %rbx1285; CHECK-NEXT: blcfillq %rdi, %rbx1286; CHECK-NEXT: jne .LBB94_21287; CHECK-NEXT: # %bb.1:1288; CHECK-NEXT: callq bar@PLT1289; CHECK-NEXT: .LBB94_2:1290; CHECK-NEXT: movq %rbx, %rax1291; CHECK-NEXT: popq %rbx1292; CHECK-NEXT: retq1293 %tmp2 = add i64 %x, 11294 %tmp3 = and i64 %tmp2, %x1295 %cmp = icmp eq i64 %tmp3, 01296 br i1 %cmp, label %1, label %21297 1298 tail call void @bar()1299 br label %21300 ret i64 %tmp31301}1302 1303declare void @bar()1304