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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s3; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl -early-live-intervals | FileCheck %s4 5;; This is just a simple test to make sure there are no regressions6;; cause by splitting/recombining ternlog intrinsics.7 8declare <4 x i64> @use_merge_4xi64(<4 x i64>, <4 x i64>)9 10declare <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32>, <4 x i32>, <4 x i32>, i32 immarg)11declare <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64>, <4 x i64>, <4 x i64>, i32 immarg)12declare <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32 immarg)13declare <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64>, <2 x i64>, <2 x i64>, i32 immarg)14declare <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32 immarg)15declare <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32>, <8 x i32>, <8 x i32>, i32 immarg)16 17define <16 x i32> @vpternlog_d_v512_imm0(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {18; CHECK-LABEL: vpternlog_d_v512_imm0:19; CHECK: # %bb.0:20; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm021; CHECK-NEXT: retq22 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 0)23 ret <16 x i32> %r24}25 26define <2 x i64> @vpternlog_q_v128_imm1(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {27; CHECK-LABEL: vpternlog_q_v128_imm1:28; CHECK: # %bb.0:29; CHECK-NEXT: vpternlogq $1, %xmm2, %xmm1, %xmm030; CHECK-NEXT: retq31 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 1)32 ret <2 x i64> %r33}34 35define <8 x i32> @vpternlog_d_v256_imm2(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {36; CHECK-LABEL: vpternlog_d_v256_imm2:37; CHECK: # %bb.0:38; CHECK-NEXT: vpternlogd $2, %ymm2, %ymm1, %ymm039; CHECK-NEXT: retq40 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 2)41 ret <8 x i32> %r42}43 44define <8 x i64> @vpternlog_q_v512_imm3(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {45; CHECK-LABEL: vpternlog_q_v512_imm3:46; CHECK: # %bb.0:47; CHECK-NEXT: vpternlogq $3, %zmm2, %zmm1, %zmm048; CHECK-NEXT: retq49 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 3)50 ret <8 x i64> %r51}52 53define <4 x i32> @vpternlog_d_v128_imm4(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {54; CHECK-LABEL: vpternlog_d_v128_imm4:55; CHECK: # %bb.0:56; CHECK-NEXT: vpternlogd $4, %xmm2, %xmm1, %xmm057; CHECK-NEXT: retq58 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 4)59 ret <4 x i32> %r60}61 62define <4 x i64> @vpternlog_q_v256_imm5(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {63; CHECK-LABEL: vpternlog_q_v256_imm5:64; CHECK: # %bb.0:65; CHECK-NEXT: vpternlogq $5, %ymm2, %ymm1, %ymm066; CHECK-NEXT: retq67 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 5)68 ret <4 x i64> %r69}70 71define <16 x i32> @vpternlog_d_v512_imm6(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {72; CHECK-LABEL: vpternlog_d_v512_imm6:73; CHECK: # %bb.0:74; CHECK-NEXT: vpternlogd $6, %zmm2, %zmm1, %zmm075; CHECK-NEXT: retq76 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 6)77 ret <16 x i32> %r78}79 80define <2 x i64> @vpternlog_q_v128_imm7(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {81; CHECK-LABEL: vpternlog_q_v128_imm7:82; CHECK: # %bb.0:83; CHECK-NEXT: vpternlogq $7, %xmm2, %xmm1, %xmm084; CHECK-NEXT: retq85 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 7)86 ret <2 x i64> %r87}88 89define <8 x i32> @vpternlog_d_v256_imm8(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {90; CHECK-LABEL: vpternlog_d_v256_imm8:91; CHECK: # %bb.0:92; CHECK-NEXT: vpternlogd $8, %ymm2, %ymm1, %ymm093; CHECK-NEXT: retq94 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 8)95 ret <8 x i32> %r96}97 98define <8 x i64> @vpternlog_q_v512_imm9(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {99; CHECK-LABEL: vpternlog_q_v512_imm9:100; CHECK: # %bb.0:101; CHECK-NEXT: vpternlogq $9, %zmm2, %zmm1, %zmm0102; CHECK-NEXT: retq103 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 9)104 ret <8 x i64> %r105}106 107define <4 x i32> @vpternlog_d_v128_imm10(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {108; CHECK-LABEL: vpternlog_d_v128_imm10:109; CHECK: # %bb.0:110; CHECK-NEXT: vpternlogd $10, %xmm2, %xmm1, %xmm0111; CHECK-NEXT: retq112 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 10)113 ret <4 x i32> %r114}115 116define <4 x i64> @vpternlog_q_v256_imm11(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {117; CHECK-LABEL: vpternlog_q_v256_imm11:118; CHECK: # %bb.0:119; CHECK-NEXT: vpternlogq $11, %ymm2, %ymm1, %ymm0120; CHECK-NEXT: retq121 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 11)122 ret <4 x i64> %r123}124 125define <16 x i32> @vpternlog_d_v512_imm12(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {126; CHECK-LABEL: vpternlog_d_v512_imm12:127; CHECK: # %bb.0:128; CHECK-NEXT: vpternlogd $12, %zmm2, %zmm1, %zmm0129; CHECK-NEXT: retq130 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 12)131 ret <16 x i32> %r132}133 134define <2 x i64> @vpternlog_q_v128_imm13(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {135; CHECK-LABEL: vpternlog_q_v128_imm13:136; CHECK: # %bb.0:137; CHECK-NEXT: vpternlogq $13, %xmm2, %xmm1, %xmm0138; CHECK-NEXT: retq139 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 13)140 ret <2 x i64> %r141}142 143define <8 x i32> @vpternlog_d_v256_imm14(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {144; CHECK-LABEL: vpternlog_d_v256_imm14:145; CHECK: # %bb.0:146; CHECK-NEXT: vpternlogd $14, %ymm2, %ymm1, %ymm0147; CHECK-NEXT: retq148 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 14)149 ret <8 x i32> %r150}151 152define <8 x i64> @vpternlog_q_v512_imm15(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {153; CHECK-LABEL: vpternlog_q_v512_imm15:154; CHECK: # %bb.0:155; CHECK-NEXT: vpternlogq $51, %zmm0, %zmm0, %zmm0156; CHECK-NEXT: retq157 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 15)158 ret <8 x i64> %r159}160 161define <4 x i32> @vpternlog_d_v128_imm16(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {162; CHECK-LABEL: vpternlog_d_v128_imm16:163; CHECK: # %bb.0:164; CHECK-NEXT: vpternlogd $16, %xmm2, %xmm1, %xmm0165; CHECK-NEXT: retq166 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 16)167 ret <4 x i32> %r168}169 170define <4 x i64> @vpternlog_q_v256_imm17(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {171; CHECK-LABEL: vpternlog_q_v256_imm17:172; CHECK: # %bb.0:173; CHECK-NEXT: vpternlogq $17, %ymm2, %ymm1, %ymm0174; CHECK-NEXT: retq175 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 17)176 ret <4 x i64> %r177}178 179define <16 x i32> @vpternlog_d_v512_imm18(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {180; CHECK-LABEL: vpternlog_d_v512_imm18:181; CHECK: # %bb.0:182; CHECK-NEXT: vpternlogd $18, %zmm2, %zmm1, %zmm0183; CHECK-NEXT: retq184 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 18)185 ret <16 x i32> %r186}187 188define <2 x i64> @vpternlog_q_v128_imm19(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {189; CHECK-LABEL: vpternlog_q_v128_imm19:190; CHECK: # %bb.0:191; CHECK-NEXT: vpternlogq $19, %xmm2, %xmm1, %xmm0192; CHECK-NEXT: retq193 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 19)194 ret <2 x i64> %r195}196 197define <8 x i32> @vpternlog_d_v256_imm20(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {198; CHECK-LABEL: vpternlog_d_v256_imm20:199; CHECK: # %bb.0:200; CHECK-NEXT: vpternlogd $20, %ymm2, %ymm1, %ymm0201; CHECK-NEXT: retq202 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 20)203 ret <8 x i32> %r204}205 206define <8 x i64> @vpternlog_q_v512_imm21(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {207; CHECK-LABEL: vpternlog_q_v512_imm21:208; CHECK: # %bb.0:209; CHECK-NEXT: vpternlogq $21, %zmm2, %zmm1, %zmm0210; CHECK-NEXT: retq211 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 21)212 ret <8 x i64> %r213}214 215;; This is one_bit_set pattern216define <4 x i32> @vpternlog_d_v128_imm22(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {217; CHECK-LABEL: vpternlog_d_v128_imm22:218; CHECK: # %bb.0:219; CHECK-NEXT: vpternlogd $22, %xmm2, %xmm1, %xmm0220; CHECK-NEXT: retq221 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 22)222 ret <4 x i32> %r223}224 225define <4 x i64> @vpternlog_q_v256_imm23(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {226; CHECK-LABEL: vpternlog_q_v256_imm23:227; CHECK: # %bb.0:228; CHECK-NEXT: vpternlogq $23, %ymm2, %ymm1, %ymm0229; CHECK-NEXT: retq230 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 23)231 ret <4 x i64> %r232}233 234define <16 x i32> @vpternlog_d_v512_imm24(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {235; CHECK-LABEL: vpternlog_d_v512_imm24:236; CHECK: # %bb.0:237; CHECK-NEXT: vpternlogd $24, %zmm2, %zmm1, %zmm0238; CHECK-NEXT: retq239 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 24)240 ret <16 x i32> %r241}242 243define <2 x i64> @vpternlog_q_v128_imm25(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {244; CHECK-LABEL: vpternlog_q_v128_imm25:245; CHECK: # %bb.0:246; CHECK-NEXT: vpternlogq $25, %xmm2, %xmm1, %xmm0247; CHECK-NEXT: retq248 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 25)249 ret <2 x i64> %r250}251 252define <8 x i32> @vpternlog_d_v256_imm26(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {253; CHECK-LABEL: vpternlog_d_v256_imm26:254; CHECK: # %bb.0:255; CHECK-NEXT: vpternlogd $26, %ymm2, %ymm1, %ymm0256; CHECK-NEXT: retq257 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 26)258 ret <8 x i32> %r259}260 261define <8 x i64> @vpternlog_q_v512_imm27(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {262; CHECK-LABEL: vpternlog_q_v512_imm27:263; CHECK: # %bb.0:264; CHECK-NEXT: vpternlogq $27, %zmm2, %zmm1, %zmm0265; CHECK-NEXT: retq266 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 27)267 ret <8 x i64> %r268}269 270define <4 x i32> @vpternlog_d_v128_imm28(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {271; CHECK-LABEL: vpternlog_d_v128_imm28:272; CHECK: # %bb.0:273; CHECK-NEXT: vpternlogd $28, %xmm2, %xmm1, %xmm0274; CHECK-NEXT: retq275 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 28)276 ret <4 x i32> %r277}278 279define <4 x i64> @vpternlog_q_v256_imm29(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {280; CHECK-LABEL: vpternlog_q_v256_imm29:281; CHECK: # %bb.0:282; CHECK-NEXT: vpternlogq $29, %ymm2, %ymm1, %ymm0283; CHECK-NEXT: retq284 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 29)285 ret <4 x i64> %r286}287 288define <16 x i32> @vpternlog_d_v512_imm30(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {289; CHECK-LABEL: vpternlog_d_v512_imm30:290; CHECK: # %bb.0:291; CHECK-NEXT: vpternlogd $30, %zmm2, %zmm1, %zmm0292; CHECK-NEXT: retq293 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 30)294 ret <16 x i32> %r295}296 297define <2 x i64> @vpternlog_q_v128_imm31(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {298; CHECK-LABEL: vpternlog_q_v128_imm31:299; CHECK: # %bb.0:300; CHECK-NEXT: vpternlogq $31, %xmm2, %xmm1, %xmm0301; CHECK-NEXT: retq302 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 31)303 ret <2 x i64> %r304}305 306define <8 x i32> @vpternlog_d_v256_imm32(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {307; CHECK-LABEL: vpternlog_d_v256_imm32:308; CHECK: # %bb.0:309; CHECK-NEXT: vpternlogd $32, %ymm2, %ymm1, %ymm0310; CHECK-NEXT: retq311 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 32)312 ret <8 x i32> %r313}314 315define <8 x i64> @vpternlog_q_v512_imm33(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {316; CHECK-LABEL: vpternlog_q_v512_imm33:317; CHECK: # %bb.0:318; CHECK-NEXT: vpternlogq $33, %zmm2, %zmm1, %zmm0319; CHECK-NEXT: retq320 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 33)321 ret <8 x i64> %r322}323 324define <4 x i32> @vpternlog_d_v128_imm34(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {325; CHECK-LABEL: vpternlog_d_v128_imm34:326; CHECK: # %bb.0:327; CHECK-NEXT: vpternlogd $34, %xmm2, %xmm1, %xmm0328; CHECK-NEXT: retq329 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 34)330 ret <4 x i32> %r331}332 333define <4 x i64> @vpternlog_q_v256_imm35(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {334; CHECK-LABEL: vpternlog_q_v256_imm35:335; CHECK: # %bb.0:336; CHECK-NEXT: vpternlogq $35, %ymm2, %ymm1, %ymm0337; CHECK-NEXT: retq338 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 35)339 ret <4 x i64> %r340}341 342define <16 x i32> @vpternlog_d_v512_imm36(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {343; CHECK-LABEL: vpternlog_d_v512_imm36:344; CHECK: # %bb.0:345; CHECK-NEXT: vpternlogd $36, %zmm2, %zmm1, %zmm0346; CHECK-NEXT: retq347 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 36)348 ret <16 x i32> %r349}350 351define <2 x i64> @vpternlog_q_v128_imm37(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {352; CHECK-LABEL: vpternlog_q_v128_imm37:353; CHECK: # %bb.0:354; CHECK-NEXT: vpternlogq $37, %xmm2, %xmm1, %xmm0355; CHECK-NEXT: retq356 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 37)357 ret <2 x i64> %r358}359 360define <8 x i32> @vpternlog_d_v256_imm38(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {361; CHECK-LABEL: vpternlog_d_v256_imm38:362; CHECK: # %bb.0:363; CHECK-NEXT: vpternlogd $38, %ymm2, %ymm1, %ymm0364; CHECK-NEXT: retq365 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 38)366 ret <8 x i32> %r367}368 369define <8 x i64> @vpternlog_q_v512_imm39(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {370; CHECK-LABEL: vpternlog_q_v512_imm39:371; CHECK: # %bb.0:372; CHECK-NEXT: vpternlogq $39, %zmm2, %zmm1, %zmm0373; CHECK-NEXT: retq374 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 39)375 ret <8 x i64> %r376}377 378define <4 x i32> @vpternlog_d_v128_imm40(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {379; CHECK-LABEL: vpternlog_d_v128_imm40:380; CHECK: # %bb.0:381; CHECK-NEXT: vpternlogd $40, %xmm2, %xmm1, %xmm0382; CHECK-NEXT: retq383 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 40)384 ret <4 x i32> %r385}386 387define <4 x i64> @vpternlog_q_v256_imm41(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {388; CHECK-LABEL: vpternlog_q_v256_imm41:389; CHECK: # %bb.0:390; CHECK-NEXT: vpternlogq $41, %ymm2, %ymm1, %ymm0391; CHECK-NEXT: retq392 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 41)393 ret <4 x i64> %r394}395 396define <16 x i32> @vpternlog_d_v512_imm42(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {397; CHECK-LABEL: vpternlog_d_v512_imm42:398; CHECK: # %bb.0:399; CHECK-NEXT: vpternlogd $42, %zmm2, %zmm1, %zmm0400; CHECK-NEXT: retq401 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 42)402 ret <16 x i32> %r403}404 405define <2 x i64> @vpternlog_q_v128_imm43(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {406; CHECK-LABEL: vpternlog_q_v128_imm43:407; CHECK: # %bb.0:408; CHECK-NEXT: vpternlogq $43, %xmm2, %xmm1, %xmm0409; CHECK-NEXT: retq410 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 43)411 ret <2 x i64> %r412}413 414define <8 x i32> @vpternlog_d_v256_imm44(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {415; CHECK-LABEL: vpternlog_d_v256_imm44:416; CHECK: # %bb.0:417; CHECK-NEXT: vpternlogd $44, %ymm2, %ymm1, %ymm0418; CHECK-NEXT: retq419 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 44)420 ret <8 x i32> %r421}422 423define <8 x i64> @vpternlog_q_v512_imm45(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {424; CHECK-LABEL: vpternlog_q_v512_imm45:425; CHECK: # %bb.0:426; CHECK-NEXT: vpternlogq $45, %zmm2, %zmm1, %zmm0427; CHECK-NEXT: retq428 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 45)429 ret <8 x i64> %r430}431 432define <4 x i32> @vpternlog_d_v128_imm46(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {433; CHECK-LABEL: vpternlog_d_v128_imm46:434; CHECK: # %bb.0:435; CHECK-NEXT: vpternlogd $46, %xmm2, %xmm1, %xmm0436; CHECK-NEXT: retq437 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 46)438 ret <4 x i32> %r439}440 441define <4 x i64> @vpternlog_q_v256_imm47(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {442; CHECK-LABEL: vpternlog_q_v256_imm47:443; CHECK: # %bb.0:444; CHECK-NEXT: vpternlogq $47, %ymm2, %ymm1, %ymm0445; CHECK-NEXT: retq446 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 47)447 ret <4 x i64> %r448}449 450define <16 x i32> @vpternlog_d_v512_imm48(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {451; CHECK-LABEL: vpternlog_d_v512_imm48:452; CHECK: # %bb.0:453; CHECK-NEXT: vpternlogd $48, %zmm2, %zmm1, %zmm0454; CHECK-NEXT: retq455 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 48)456 ret <16 x i32> %r457}458 459define <2 x i64> @vpternlog_q_v128_imm49(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {460; CHECK-LABEL: vpternlog_q_v128_imm49:461; CHECK: # %bb.0:462; CHECK-NEXT: vpternlogq $49, %xmm2, %xmm1, %xmm0463; CHECK-NEXT: retq464 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 49)465 ret <2 x i64> %r466}467 468define <8 x i32> @vpternlog_d_v256_imm50(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {469; CHECK-LABEL: vpternlog_d_v256_imm50:470; CHECK: # %bb.0:471; CHECK-NEXT: vpternlogd $50, %ymm2, %ymm1, %ymm0472; CHECK-NEXT: retq473 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 50)474 ret <8 x i32> %r475}476 477define <8 x i64> @vpternlog_q_v512_imm51(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {478; CHECK-LABEL: vpternlog_q_v512_imm51:479; CHECK: # %bb.0:480; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0481; CHECK-NEXT: vpternlogq $15, %zmm1, %zmm1, %zmm0482; CHECK-NEXT: retq483 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 51)484 ret <8 x i64> %r485}486 487define <4 x i32> @vpternlog_d_v128_imm52(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {488; CHECK-LABEL: vpternlog_d_v128_imm52:489; CHECK: # %bb.0:490; CHECK-NEXT: vpternlogd $52, %xmm2, %xmm1, %xmm0491; CHECK-NEXT: retq492 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 52)493 ret <4 x i32> %r494}495 496define <4 x i64> @vpternlog_q_v256_imm53(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {497; CHECK-LABEL: vpternlog_q_v256_imm53:498; CHECK: # %bb.0:499; CHECK-NEXT: vpternlogq $53, %ymm2, %ymm1, %ymm0500; CHECK-NEXT: retq501 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 53)502 ret <4 x i64> %r503}504 505define <16 x i32> @vpternlog_d_v512_imm54(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {506; CHECK-LABEL: vpternlog_d_v512_imm54:507; CHECK: # %bb.0:508; CHECK-NEXT: vpternlogd $54, %zmm2, %zmm1, %zmm0509; CHECK-NEXT: retq510 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 54)511 ret <16 x i32> %r512}513 514define <2 x i64> @vpternlog_q_v128_imm55(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {515; CHECK-LABEL: vpternlog_q_v128_imm55:516; CHECK: # %bb.0:517; CHECK-NEXT: vpternlogq $55, %xmm2, %xmm1, %xmm0518; CHECK-NEXT: retq519 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 55)520 ret <2 x i64> %r521}522 523define <8 x i32> @vpternlog_d_v256_imm56(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {524; CHECK-LABEL: vpternlog_d_v256_imm56:525; CHECK: # %bb.0:526; CHECK-NEXT: vpternlogd $56, %ymm2, %ymm1, %ymm0527; CHECK-NEXT: retq528 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 56)529 ret <8 x i32> %r530}531 532define <8 x i64> @vpternlog_q_v512_imm57(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {533; CHECK-LABEL: vpternlog_q_v512_imm57:534; CHECK: # %bb.0:535; CHECK-NEXT: vpternlogq $57, %zmm2, %zmm1, %zmm0536; CHECK-NEXT: retq537 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 57)538 ret <8 x i64> %r539}540 541define <4 x i32> @vpternlog_d_v128_imm58(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {542; CHECK-LABEL: vpternlog_d_v128_imm58:543; CHECK: # %bb.0:544; CHECK-NEXT: vpternlogd $58, %xmm2, %xmm1, %xmm0545; CHECK-NEXT: retq546 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 58)547 ret <4 x i32> %r548}549 550define <4 x i64> @vpternlog_q_v256_imm59(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {551; CHECK-LABEL: vpternlog_q_v256_imm59:552; CHECK: # %bb.0:553; CHECK-NEXT: vpternlogq $59, %ymm2, %ymm1, %ymm0554; CHECK-NEXT: retq555 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 59)556 ret <4 x i64> %r557}558 559define <16 x i32> @vpternlog_d_v512_imm60(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {560; CHECK-LABEL: vpternlog_d_v512_imm60:561; CHECK: # %bb.0:562; CHECK-NEXT: vpxord %zmm1, %zmm0, %zmm0563; CHECK-NEXT: retq564 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 60)565 ret <16 x i32> %r566}567 568define <2 x i64> @vpternlog_q_v128_imm61(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {569; CHECK-LABEL: vpternlog_q_v128_imm61:570; CHECK: # %bb.0:571; CHECK-NEXT: vpternlogq $61, %xmm2, %xmm1, %xmm0572; CHECK-NEXT: retq573 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 61)574 ret <2 x i64> %r575}576 577define <8 x i32> @vpternlog_d_v256_imm62(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {578; CHECK-LABEL: vpternlog_d_v256_imm62:579; CHECK: # %bb.0:580; CHECK-NEXT: vpternlogd $62, %ymm2, %ymm1, %ymm0581; CHECK-NEXT: retq582 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 62)583 ret <8 x i32> %r584}585 586define <8 x i64> @vpternlog_q_v512_imm63(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {587; CHECK-LABEL: vpternlog_q_v512_imm63:588; CHECK: # %bb.0:589; CHECK-NEXT: vpternlogq $63, %zmm2, %zmm1, %zmm0590; CHECK-NEXT: retq591 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 63)592 ret <8 x i64> %r593}594 595define <4 x i32> @vpternlog_d_v128_imm64(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {596; CHECK-LABEL: vpternlog_d_v128_imm64:597; CHECK: # %bb.0:598; CHECK-NEXT: vpternlogd $64, %xmm2, %xmm1, %xmm0599; CHECK-NEXT: retq600 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 64)601 ret <4 x i32> %r602}603 604define <4 x i64> @vpternlog_q_v256_imm65(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {605; CHECK-LABEL: vpternlog_q_v256_imm65:606; CHECK: # %bb.0:607; CHECK-NEXT: vpternlogq $65, %ymm2, %ymm1, %ymm0608; CHECK-NEXT: retq609 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 65)610 ret <4 x i64> %r611}612 613define <16 x i32> @vpternlog_d_v512_imm66(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {614; CHECK-LABEL: vpternlog_d_v512_imm66:615; CHECK: # %bb.0:616; CHECK-NEXT: vpternlogd $66, %zmm2, %zmm1, %zmm0617; CHECK-NEXT: retq618 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 66)619 ret <16 x i32> %r620}621 622define <2 x i64> @vpternlog_q_v128_imm67(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {623; CHECK-LABEL: vpternlog_q_v128_imm67:624; CHECK: # %bb.0:625; CHECK-NEXT: vpternlogq $67, %xmm2, %xmm1, %xmm0626; CHECK-NEXT: retq627 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 67)628 ret <2 x i64> %r629}630 631define <8 x i32> @vpternlog_d_v256_imm68(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {632; CHECK-LABEL: vpternlog_d_v256_imm68:633; CHECK: # %bb.0:634; CHECK-NEXT: vpternlogd $68, %ymm2, %ymm1, %ymm0635; CHECK-NEXT: retq636 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 68)637 ret <8 x i32> %r638}639 640define <8 x i64> @vpternlog_q_v512_imm69(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {641; CHECK-LABEL: vpternlog_q_v512_imm69:642; CHECK: # %bb.0:643; CHECK-NEXT: vpternlogq $69, %zmm2, %zmm1, %zmm0644; CHECK-NEXT: retq645 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 69)646 ret <8 x i64> %r647}648 649define <4 x i32> @vpternlog_d_v128_imm70(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {650; CHECK-LABEL: vpternlog_d_v128_imm70:651; CHECK: # %bb.0:652; CHECK-NEXT: vpternlogd $70, %xmm2, %xmm1, %xmm0653; CHECK-NEXT: retq654 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 70)655 ret <4 x i32> %r656}657 658define <4 x i64> @vpternlog_q_v256_imm71(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {659; CHECK-LABEL: vpternlog_q_v256_imm71:660; CHECK: # %bb.0:661; CHECK-NEXT: vpternlogq $71, %ymm2, %ymm1, %ymm0662; CHECK-NEXT: retq663 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 71)664 ret <4 x i64> %r665}666 667define <16 x i32> @vpternlog_d_v512_imm72(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {668; CHECK-LABEL: vpternlog_d_v512_imm72:669; CHECK: # %bb.0:670; CHECK-NEXT: vpternlogd $72, %zmm2, %zmm1, %zmm0671; CHECK-NEXT: retq672 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 72)673 ret <16 x i32> %r674}675 676define <2 x i64> @vpternlog_q_v128_imm73(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {677; CHECK-LABEL: vpternlog_q_v128_imm73:678; CHECK: # %bb.0:679; CHECK-NEXT: vpternlogq $73, %xmm2, %xmm1, %xmm0680; CHECK-NEXT: retq681 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 73)682 ret <2 x i64> %r683}684 685define <8 x i32> @vpternlog_d_v256_imm74(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {686; CHECK-LABEL: vpternlog_d_v256_imm74:687; CHECK: # %bb.0:688; CHECK-NEXT: vpternlogd $74, %ymm2, %ymm1, %ymm0689; CHECK-NEXT: retq690 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 74)691 ret <8 x i32> %r692}693 694define <8 x i64> @vpternlog_q_v512_imm75(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {695; CHECK-LABEL: vpternlog_q_v512_imm75:696; CHECK: # %bb.0:697; CHECK-NEXT: vpternlogq $75, %zmm2, %zmm1, %zmm0698; CHECK-NEXT: retq699 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 75)700 ret <8 x i64> %r701}702 703define <4 x i32> @vpternlog_d_v128_imm76(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {704; CHECK-LABEL: vpternlog_d_v128_imm76:705; CHECK: # %bb.0:706; CHECK-NEXT: vpternlogd $76, %xmm2, %xmm1, %xmm0707; CHECK-NEXT: retq708 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 76)709 ret <4 x i32> %r710}711 712define <4 x i64> @vpternlog_q_v256_imm77(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {713; CHECK-LABEL: vpternlog_q_v256_imm77:714; CHECK: # %bb.0:715; CHECK-NEXT: vpternlogq $77, %ymm2, %ymm1, %ymm0716; CHECK-NEXT: retq717 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 77)718 ret <4 x i64> %r719}720 721define <16 x i32> @vpternlog_d_v512_imm78(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {722; CHECK-LABEL: vpternlog_d_v512_imm78:723; CHECK: # %bb.0:724; CHECK-NEXT: vpternlogd $78, %zmm2, %zmm1, %zmm0725; CHECK-NEXT: retq726 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 78)727 ret <16 x i32> %r728}729 730define <2 x i64> @vpternlog_q_v128_imm79(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {731; CHECK-LABEL: vpternlog_q_v128_imm79:732; CHECK: # %bb.0:733; CHECK-NEXT: vpternlogq $79, %xmm2, %xmm1, %xmm0734; CHECK-NEXT: retq735 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 79)736 ret <2 x i64> %r737}738 739define <8 x i32> @vpternlog_d_v256_imm80(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {740; CHECK-LABEL: vpternlog_d_v256_imm80:741; CHECK: # %bb.0:742; CHECK-NEXT: vpternlogd $80, %ymm2, %ymm1, %ymm0743; CHECK-NEXT: retq744 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 80)745 ret <8 x i32> %r746}747 748define <8 x i64> @vpternlog_q_v512_imm81(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {749; CHECK-LABEL: vpternlog_q_v512_imm81:750; CHECK: # %bb.0:751; CHECK-NEXT: vpternlogq $81, %zmm2, %zmm1, %zmm0752; CHECK-NEXT: retq753 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 81)754 ret <8 x i64> %r755}756 757define <4 x i32> @vpternlog_d_v128_imm82(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {758; CHECK-LABEL: vpternlog_d_v128_imm82:759; CHECK: # %bb.0:760; CHECK-NEXT: vpternlogd $82, %xmm2, %xmm1, %xmm0761; CHECK-NEXT: retq762 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 82)763 ret <4 x i32> %r764}765 766define <4 x i64> @vpternlog_q_v256_imm83(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {767; CHECK-LABEL: vpternlog_q_v256_imm83:768; CHECK: # %bb.0:769; CHECK-NEXT: vpternlogq $83, %ymm2, %ymm1, %ymm0770; CHECK-NEXT: retq771 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 83)772 ret <4 x i64> %r773}774 775define <16 x i32> @vpternlog_d_v512_imm84(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {776; CHECK-LABEL: vpternlog_d_v512_imm84:777; CHECK: # %bb.0:778; CHECK-NEXT: vpternlogd $84, %zmm2, %zmm1, %zmm0779; CHECK-NEXT: retq780 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 84)781 ret <16 x i32> %r782}783 784define <2 x i64> @vpternlog_q_v128_imm85(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {785; CHECK-LABEL: vpternlog_q_v128_imm85:786; CHECK: # %bb.0:787; CHECK-NEXT: vmovdqa %xmm2, %xmm0788; CHECK-NEXT: vpternlogq $15, %xmm2, %xmm2, %xmm0789; CHECK-NEXT: retq790 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 85)791 ret <2 x i64> %r792}793 794define <8 x i32> @vpternlog_d_v256_imm86(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {795; CHECK-LABEL: vpternlog_d_v256_imm86:796; CHECK: # %bb.0:797; CHECK-NEXT: vpternlogd $86, %ymm2, %ymm1, %ymm0798; CHECK-NEXT: retq799 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 86)800 ret <8 x i32> %r801}802 803define <8 x i64> @vpternlog_q_v512_imm87(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {804; CHECK-LABEL: vpternlog_q_v512_imm87:805; CHECK: # %bb.0:806; CHECK-NEXT: vpternlogq $87, %zmm2, %zmm1, %zmm0807; CHECK-NEXT: retq808 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 87)809 ret <8 x i64> %r810}811 812define <4 x i32> @vpternlog_d_v128_imm88(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {813; CHECK-LABEL: vpternlog_d_v128_imm88:814; CHECK: # %bb.0:815; CHECK-NEXT: vpternlogd $88, %xmm2, %xmm1, %xmm0816; CHECK-NEXT: retq817 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 88)818 ret <4 x i32> %r819}820 821define <4 x i64> @vpternlog_q_v256_imm89(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {822; CHECK-LABEL: vpternlog_q_v256_imm89:823; CHECK: # %bb.0:824; CHECK-NEXT: vpternlogq $89, %ymm2, %ymm1, %ymm0825; CHECK-NEXT: retq826 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 89)827 ret <4 x i64> %r828}829 830define <16 x i32> @vpternlog_d_v512_imm90(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {831; CHECK-LABEL: vpternlog_d_v512_imm90:832; CHECK: # %bb.0:833; CHECK-NEXT: vpxord %zmm2, %zmm0, %zmm0834; CHECK-NEXT: retq835 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 90)836 ret <16 x i32> %r837}838 839define <2 x i64> @vpternlog_q_v128_imm91(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {840; CHECK-LABEL: vpternlog_q_v128_imm91:841; CHECK: # %bb.0:842; CHECK-NEXT: vpternlogq $91, %xmm2, %xmm1, %xmm0843; CHECK-NEXT: retq844 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 91)845 ret <2 x i64> %r846}847 848define <8 x i32> @vpternlog_d_v256_imm92(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {849; CHECK-LABEL: vpternlog_d_v256_imm92:850; CHECK: # %bb.0:851; CHECK-NEXT: vpternlogd $92, %ymm2, %ymm1, %ymm0852; CHECK-NEXT: retq853 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 92)854 ret <8 x i32> %r855}856 857define <8 x i64> @vpternlog_q_v512_imm93(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {858; CHECK-LABEL: vpternlog_q_v512_imm93:859; CHECK: # %bb.0:860; CHECK-NEXT: vpternlogq $93, %zmm2, %zmm1, %zmm0861; CHECK-NEXT: retq862 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 93)863 ret <8 x i64> %r864}865 866define <4 x i32> @vpternlog_d_v128_imm94(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {867; CHECK-LABEL: vpternlog_d_v128_imm94:868; CHECK: # %bb.0:869; CHECK-NEXT: vpternlogd $94, %xmm2, %xmm1, %xmm0870; CHECK-NEXT: retq871 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 94)872 ret <4 x i32> %r873}874 875define <4 x i64> @vpternlog_q_v256_imm95(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {876; CHECK-LABEL: vpternlog_q_v256_imm95:877; CHECK: # %bb.0:878; CHECK-NEXT: vpternlogq $95, %ymm2, %ymm1, %ymm0879; CHECK-NEXT: retq880 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 95)881 ret <4 x i64> %r882}883 884define <16 x i32> @vpternlog_d_v512_imm96(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {885; CHECK-LABEL: vpternlog_d_v512_imm96:886; CHECK: # %bb.0:887; CHECK-NEXT: vpternlogd $96, %zmm2, %zmm1, %zmm0888; CHECK-NEXT: retq889 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 96)890 ret <16 x i32> %r891}892 893define <2 x i64> @vpternlog_q_v128_imm97(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {894; CHECK-LABEL: vpternlog_q_v128_imm97:895; CHECK: # %bb.0:896; CHECK-NEXT: vpternlogq $97, %xmm2, %xmm1, %xmm0897; CHECK-NEXT: retq898 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 97)899 ret <2 x i64> %r900}901 902define <8 x i32> @vpternlog_d_v256_imm98(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {903; CHECK-LABEL: vpternlog_d_v256_imm98:904; CHECK: # %bb.0:905; CHECK-NEXT: vpternlogd $98, %ymm2, %ymm1, %ymm0906; CHECK-NEXT: retq907 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 98)908 ret <8 x i32> %r909}910 911define <8 x i64> @vpternlog_q_v512_imm99(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {912; CHECK-LABEL: vpternlog_q_v512_imm99:913; CHECK: # %bb.0:914; CHECK-NEXT: vpternlogq $99, %zmm2, %zmm1, %zmm0915; CHECK-NEXT: retq916 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 99)917 ret <8 x i64> %r918}919 920define <4 x i32> @vpternlog_d_v128_imm100(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {921; CHECK-LABEL: vpternlog_d_v128_imm100:922; CHECK: # %bb.0:923; CHECK-NEXT: vpternlogd $100, %xmm2, %xmm1, %xmm0924; CHECK-NEXT: retq925 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 100)926 ret <4 x i32> %r927}928 929define <4 x i64> @vpternlog_q_v256_imm101(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {930; CHECK-LABEL: vpternlog_q_v256_imm101:931; CHECK: # %bb.0:932; CHECK-NEXT: vpternlogq $101, %ymm2, %ymm1, %ymm0933; CHECK-NEXT: retq934 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 101)935 ret <4 x i64> %r936}937 938define <16 x i32> @vpternlog_d_v512_imm102(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {939; CHECK-LABEL: vpternlog_d_v512_imm102:940; CHECK: # %bb.0:941; CHECK-NEXT: vpxord %zmm2, %zmm1, %zmm0942; CHECK-NEXT: retq943 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 102)944 ret <16 x i32> %r945}946 947define <2 x i64> @vpternlog_q_v128_imm103(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {948; CHECK-LABEL: vpternlog_q_v128_imm103:949; CHECK: # %bb.0:950; CHECK-NEXT: vpternlogq $103, %xmm2, %xmm1, %xmm0951; CHECK-NEXT: retq952 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 103)953 ret <2 x i64> %r954}955 956; This is two_bits_set pattern957define <8 x i32> @vpternlog_d_v256_imm104(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {958; CHECK-LABEL: vpternlog_d_v256_imm104:959; CHECK: # %bb.0:960; CHECK-NEXT: vpternlogd $104, %ymm2, %ymm1, %ymm0961; CHECK-NEXT: retq962 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 104)963 ret <8 x i32> %r964}965 966define <8 x i64> @vpternlog_q_v512_imm105(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {967; CHECK-LABEL: vpternlog_q_v512_imm105:968; CHECK: # %bb.0:969; CHECK-NEXT: vpternlogq $105, %zmm2, %zmm1, %zmm0970; CHECK-NEXT: retq971 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 105)972 ret <8 x i64> %r973}974 975define <4 x i32> @vpternlog_d_v128_imm106(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {976; CHECK-LABEL: vpternlog_d_v128_imm106:977; CHECK: # %bb.0:978; CHECK-NEXT: vpternlogd $106, %xmm2, %xmm1, %xmm0979; CHECK-NEXT: retq980 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 106)981 ret <4 x i32> %r982}983 984define <4 x i64> @vpternlog_q_v256_imm107(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {985; CHECK-LABEL: vpternlog_q_v256_imm107:986; CHECK: # %bb.0:987; CHECK-NEXT: vpternlogq $107, %ymm2, %ymm1, %ymm0988; CHECK-NEXT: retq989 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 107)990 ret <4 x i64> %r991}992 993define <16 x i32> @vpternlog_d_v512_imm108(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {994; CHECK-LABEL: vpternlog_d_v512_imm108:995; CHECK: # %bb.0:996; CHECK-NEXT: vpternlogd $108, %zmm2, %zmm1, %zmm0997; CHECK-NEXT: retq998 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 108)999 ret <16 x i32> %r1000}1001 1002define <2 x i64> @vpternlog_q_v128_imm109(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1003; CHECK-LABEL: vpternlog_q_v128_imm109:1004; CHECK: # %bb.0:1005; CHECK-NEXT: vpternlogq $109, %xmm2, %xmm1, %xmm01006; CHECK-NEXT: retq1007 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 109)1008 ret <2 x i64> %r1009}1010 1011define <8 x i32> @vpternlog_d_v256_imm110(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1012; CHECK-LABEL: vpternlog_d_v256_imm110:1013; CHECK: # %bb.0:1014; CHECK-NEXT: vpternlogd $110, %ymm2, %ymm1, %ymm01015; CHECK-NEXT: retq1016 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 110)1017 ret <8 x i32> %r1018}1019 1020define <8 x i64> @vpternlog_q_v512_imm111(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1021; CHECK-LABEL: vpternlog_q_v512_imm111:1022; CHECK: # %bb.0:1023; CHECK-NEXT: vpternlogq $111, %zmm2, %zmm1, %zmm01024; CHECK-NEXT: retq1025 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 111)1026 ret <8 x i64> %r1027}1028 1029define <4 x i32> @vpternlog_d_v128_imm112(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1030; CHECK-LABEL: vpternlog_d_v128_imm112:1031; CHECK: # %bb.0:1032; CHECK-NEXT: vpternlogd $112, %xmm2, %xmm1, %xmm01033; CHECK-NEXT: retq1034 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 112)1035 ret <4 x i32> %r1036}1037 1038define <4 x i64> @vpternlog_q_v256_imm113(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1039; CHECK-LABEL: vpternlog_q_v256_imm113:1040; CHECK: # %bb.0:1041; CHECK-NEXT: vpternlogq $113, %ymm2, %ymm1, %ymm01042; CHECK-NEXT: retq1043 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 113)1044 ret <4 x i64> %r1045}1046 1047define <16 x i32> @vpternlog_d_v512_imm114(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1048; CHECK-LABEL: vpternlog_d_v512_imm114:1049; CHECK: # %bb.0:1050; CHECK-NEXT: vpternlogd $114, %zmm2, %zmm1, %zmm01051; CHECK-NEXT: retq1052 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 114)1053 ret <16 x i32> %r1054}1055 1056define <2 x i64> @vpternlog_q_v128_imm115(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1057; CHECK-LABEL: vpternlog_q_v128_imm115:1058; CHECK: # %bb.0:1059; CHECK-NEXT: vpternlogq $115, %xmm2, %xmm1, %xmm01060; CHECK-NEXT: retq1061 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 115)1062 ret <2 x i64> %r1063}1064 1065define <8 x i32> @vpternlog_d_v256_imm116(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1066; CHECK-LABEL: vpternlog_d_v256_imm116:1067; CHECK: # %bb.0:1068; CHECK-NEXT: vpternlogd $116, %ymm2, %ymm1, %ymm01069; CHECK-NEXT: retq1070 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 116)1071 ret <8 x i32> %r1072}1073 1074define <8 x i64> @vpternlog_q_v512_imm117(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1075; CHECK-LABEL: vpternlog_q_v512_imm117:1076; CHECK: # %bb.0:1077; CHECK-NEXT: vpternlogq $117, %zmm2, %zmm1, %zmm01078; CHECK-NEXT: retq1079 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 117)1080 ret <8 x i64> %r1081}1082 1083define <4 x i32> @vpternlog_d_v128_imm118(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1084; CHECK-LABEL: vpternlog_d_v128_imm118:1085; CHECK: # %bb.0:1086; CHECK-NEXT: vpternlogd $118, %xmm2, %xmm1, %xmm01087; CHECK-NEXT: retq1088 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 118)1089 ret <4 x i32> %r1090}1091 1092define <4 x i64> @vpternlog_q_v256_imm119(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1093; CHECK-LABEL: vpternlog_q_v256_imm119:1094; CHECK: # %bb.0:1095; CHECK-NEXT: vpternlogq $119, %ymm2, %ymm1, %ymm01096; CHECK-NEXT: retq1097 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 119)1098 ret <4 x i64> %r1099}1100 1101define <16 x i32> @vpternlog_d_v512_imm120(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1102; CHECK-LABEL: vpternlog_d_v512_imm120:1103; CHECK: # %bb.0:1104; CHECK-NEXT: vpternlogd $120, %zmm2, %zmm1, %zmm01105; CHECK-NEXT: retq1106 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 120)1107 ret <16 x i32> %r1108}1109 1110define <2 x i64> @vpternlog_q_v128_imm121(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1111; CHECK-LABEL: vpternlog_q_v128_imm121:1112; CHECK: # %bb.0:1113; CHECK-NEXT: vpternlogq $121, %xmm2, %xmm1, %xmm01114; CHECK-NEXT: retq1115 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 121)1116 ret <2 x i64> %r1117}1118 1119define <8 x i32> @vpternlog_d_v256_imm122(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1120; CHECK-LABEL: vpternlog_d_v256_imm122:1121; CHECK: # %bb.0:1122; CHECK-NEXT: vpternlogd $122, %ymm2, %ymm1, %ymm01123; CHECK-NEXT: retq1124 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 122)1125 ret <8 x i32> %r1126}1127 1128define <8 x i64> @vpternlog_q_v512_imm123(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1129; CHECK-LABEL: vpternlog_q_v512_imm123:1130; CHECK: # %bb.0:1131; CHECK-NEXT: vpternlogq $123, %zmm2, %zmm1, %zmm01132; CHECK-NEXT: retq1133 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 123)1134 ret <8 x i64> %r1135}1136 1137define <4 x i32> @vpternlog_d_v128_imm124(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1138; CHECK-LABEL: vpternlog_d_v128_imm124:1139; CHECK: # %bb.0:1140; CHECK-NEXT: vpternlogd $124, %xmm2, %xmm1, %xmm01141; CHECK-NEXT: retq1142 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 124)1143 ret <4 x i32> %r1144}1145 1146define <4 x i64> @vpternlog_q_v256_imm125(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1147; CHECK-LABEL: vpternlog_q_v256_imm125:1148; CHECK: # %bb.0:1149; CHECK-NEXT: vpternlogq $125, %ymm2, %ymm1, %ymm01150; CHECK-NEXT: retq1151 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 125)1152 ret <4 x i64> %r1153}1154 1155define <16 x i32> @vpternlog_d_v512_imm126(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1156; CHECK-LABEL: vpternlog_d_v512_imm126:1157; CHECK: # %bb.0:1158; CHECK-NEXT: vpternlogd $126, %zmm2, %zmm1, %zmm01159; CHECK-NEXT: retq1160 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 126)1161 ret <16 x i32> %r1162}1163 1164define <2 x i64> @vpternlog_q_v128_imm127(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1165; CHECK-LABEL: vpternlog_q_v128_imm127:1166; CHECK: # %bb.0:1167; CHECK-NEXT: vpternlogq $127, %xmm2, %xmm1, %xmm01168; CHECK-NEXT: retq1169 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 127)1170 ret <2 x i64> %r1171}1172 1173define <8 x i32> @vpternlog_d_v256_imm128(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1174; CHECK-LABEL: vpternlog_d_v256_imm128:1175; CHECK: # %bb.0:1176; CHECK-NEXT: vpternlogd $128, %ymm2, %ymm1, %ymm01177; CHECK-NEXT: retq1178 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 128)1179 ret <8 x i32> %r1180}1181 1182define <8 x i64> @vpternlog_q_v512_imm129(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1183; CHECK-LABEL: vpternlog_q_v512_imm129:1184; CHECK: # %bb.0:1185; CHECK-NEXT: vpternlogq $129, %zmm2, %zmm1, %zmm01186; CHECK-NEXT: retq1187 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 129)1188 ret <8 x i64> %r1189}1190 1191define <4 x i32> @vpternlog_d_v128_imm130(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1192; CHECK-LABEL: vpternlog_d_v128_imm130:1193; CHECK: # %bb.0:1194; CHECK-NEXT: vpternlogd $130, %xmm2, %xmm1, %xmm01195; CHECK-NEXT: retq1196 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 130)1197 ret <4 x i32> %r1198}1199 1200define <4 x i64> @vpternlog_q_v256_imm131(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1201; CHECK-LABEL: vpternlog_q_v256_imm131:1202; CHECK: # %bb.0:1203; CHECK-NEXT: vpternlogq $131, %ymm2, %ymm1, %ymm01204; CHECK-NEXT: retq1205 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 131)1206 ret <4 x i64> %r1207}1208 1209define <16 x i32> @vpternlog_d_v512_imm132(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1210; CHECK-LABEL: vpternlog_d_v512_imm132:1211; CHECK: # %bb.0:1212; CHECK-NEXT: vpternlogd $132, %zmm2, %zmm1, %zmm01213; CHECK-NEXT: retq1214 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 132)1215 ret <16 x i32> %r1216}1217 1218define <2 x i64> @vpternlog_q_v128_imm133(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1219; CHECK-LABEL: vpternlog_q_v128_imm133:1220; CHECK: # %bb.0:1221; CHECK-NEXT: vpternlogq $133, %xmm2, %xmm1, %xmm01222; CHECK-NEXT: retq1223 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 133)1224 ret <2 x i64> %r1225}1226 1227define <8 x i32> @vpternlog_d_v256_imm134(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1228; CHECK-LABEL: vpternlog_d_v256_imm134:1229; CHECK: # %bb.0:1230; CHECK-NEXT: vpternlogd $134, %ymm2, %ymm1, %ymm01231; CHECK-NEXT: retq1232 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 134)1233 ret <8 x i32> %r1234}1235 1236define <8 x i64> @vpternlog_q_v512_imm135(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1237; CHECK-LABEL: vpternlog_q_v512_imm135:1238; CHECK: # %bb.0:1239; CHECK-NEXT: vpternlogq $135, %zmm2, %zmm1, %zmm01240; CHECK-NEXT: retq1241 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 135)1242 ret <8 x i64> %r1243}1244 1245define <4 x i32> @vpternlog_d_v128_imm136(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1246; CHECK-LABEL: vpternlog_d_v128_imm136:1247; CHECK: # %bb.0:1248; CHECK-NEXT: vandps %xmm2, %xmm1, %xmm01249; CHECK-NEXT: retq1250 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 136)1251 ret <4 x i32> %r1252}1253 1254define <4 x i64> @vpternlog_q_v256_imm137(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1255; CHECK-LABEL: vpternlog_q_v256_imm137:1256; CHECK: # %bb.0:1257; CHECK-NEXT: vpternlogq $137, %ymm2, %ymm1, %ymm01258; CHECK-NEXT: retq1259 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 137)1260 ret <4 x i64> %r1261}1262 1263define <16 x i32> @vpternlog_d_v512_imm138(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1264; CHECK-LABEL: vpternlog_d_v512_imm138:1265; CHECK: # %bb.0:1266; CHECK-NEXT: vpternlogd $138, %zmm2, %zmm1, %zmm01267; CHECK-NEXT: retq1268 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 138)1269 ret <16 x i32> %r1270}1271 1272define <2 x i64> @vpternlog_q_v128_imm139(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1273; CHECK-LABEL: vpternlog_q_v128_imm139:1274; CHECK: # %bb.0:1275; CHECK-NEXT: vpternlogq $139, %xmm2, %xmm1, %xmm01276; CHECK-NEXT: retq1277 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 139)1278 ret <2 x i64> %r1279}1280 1281define <8 x i32> @vpternlog_d_v256_imm140(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1282; CHECK-LABEL: vpternlog_d_v256_imm140:1283; CHECK: # %bb.0:1284; CHECK-NEXT: vpternlogd $140, %ymm2, %ymm1, %ymm01285; CHECK-NEXT: retq1286 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 140)1287 ret <8 x i32> %r1288}1289 1290define <8 x i64> @vpternlog_q_v512_imm141(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1291; CHECK-LABEL: vpternlog_q_v512_imm141:1292; CHECK: # %bb.0:1293; CHECK-NEXT: vpternlogq $141, %zmm2, %zmm1, %zmm01294; CHECK-NEXT: retq1295 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 141)1296 ret <8 x i64> %r1297}1298 1299define <4 x i32> @vpternlog_d_v128_imm142(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1300; CHECK-LABEL: vpternlog_d_v128_imm142:1301; CHECK: # %bb.0:1302; CHECK-NEXT: vpternlogd $142, %xmm2, %xmm1, %xmm01303; CHECK-NEXT: retq1304 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 142)1305 ret <4 x i32> %r1306}1307 1308define <4 x i64> @vpternlog_q_v256_imm143(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1309; CHECK-LABEL: vpternlog_q_v256_imm143:1310; CHECK: # %bb.0:1311; CHECK-NEXT: vpternlogq $143, %ymm2, %ymm1, %ymm01312; CHECK-NEXT: retq1313 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 143)1314 ret <4 x i64> %r1315}1316 1317define <16 x i32> @vpternlog_d_v512_imm144(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1318; CHECK-LABEL: vpternlog_d_v512_imm144:1319; CHECK: # %bb.0:1320; CHECK-NEXT: vpternlogd $144, %zmm2, %zmm1, %zmm01321; CHECK-NEXT: retq1322 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 144)1323 ret <16 x i32> %r1324}1325 1326define <2 x i64> @vpternlog_q_v128_imm145(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1327; CHECK-LABEL: vpternlog_q_v128_imm145:1328; CHECK: # %bb.0:1329; CHECK-NEXT: vpternlogq $145, %xmm2, %xmm1, %xmm01330; CHECK-NEXT: retq1331 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 145)1332 ret <2 x i64> %r1333}1334 1335define <8 x i32> @vpternlog_d_v256_imm146(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1336; CHECK-LABEL: vpternlog_d_v256_imm146:1337; CHECK: # %bb.0:1338; CHECK-NEXT: vpternlogd $146, %ymm2, %ymm1, %ymm01339; CHECK-NEXT: retq1340 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 146)1341 ret <8 x i32> %r1342}1343 1344define <8 x i64> @vpternlog_q_v512_imm147(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1345; CHECK-LABEL: vpternlog_q_v512_imm147:1346; CHECK: # %bb.0:1347; CHECK-NEXT: vpternlogq $147, %zmm2, %zmm1, %zmm01348; CHECK-NEXT: retq1349 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 147)1350 ret <8 x i64> %r1351}1352 1353define <4 x i32> @vpternlog_d_v128_imm148(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1354; CHECK-LABEL: vpternlog_d_v128_imm148:1355; CHECK: # %bb.0:1356; CHECK-NEXT: vpternlogd $148, %xmm2, %xmm1, %xmm01357; CHECK-NEXT: retq1358 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 148)1359 ret <4 x i32> %r1360}1361 1362define <4 x i64> @vpternlog_q_v256_imm149(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1363; CHECK-LABEL: vpternlog_q_v256_imm149:1364; CHECK: # %bb.0:1365; CHECK-NEXT: vpternlogq $149, %ymm2, %ymm1, %ymm01366; CHECK-NEXT: retq1367 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 149)1368 ret <4 x i64> %r1369}1370 1371define <16 x i32> @vpternlog_d_v512_imm150(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1372; CHECK-LABEL: vpternlog_d_v512_imm150:1373; CHECK: # %bb.0:1374; CHECK-NEXT: vpternlogd $150, %zmm2, %zmm1, %zmm01375; CHECK-NEXT: retq1376 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 150)1377 ret <16 x i32> %r1378}1379 1380define <2 x i64> @vpternlog_q_v128_imm151(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1381; CHECK-LABEL: vpternlog_q_v128_imm151:1382; CHECK: # %bb.0:1383; CHECK-NEXT: vpternlogq $151, %xmm2, %xmm1, %xmm01384; CHECK-NEXT: retq1385 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 151)1386 ret <2 x i64> %r1387}1388 1389define <8 x i32> @vpternlog_d_v256_imm152(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1390; CHECK-LABEL: vpternlog_d_v256_imm152:1391; CHECK: # %bb.0:1392; CHECK-NEXT: vpternlogd $152, %ymm2, %ymm1, %ymm01393; CHECK-NEXT: retq1394 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 152)1395 ret <8 x i32> %r1396}1397 1398define <8 x i64> @vpternlog_q_v512_imm153(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1399; CHECK-LABEL: vpternlog_q_v512_imm153:1400; CHECK: # %bb.0:1401; CHECK-NEXT: vpternlogq $153, %zmm2, %zmm1, %zmm01402; CHECK-NEXT: retq1403 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 153)1404 ret <8 x i64> %r1405}1406 1407define <4 x i32> @vpternlog_d_v128_imm154(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1408; CHECK-LABEL: vpternlog_d_v128_imm154:1409; CHECK: # %bb.0:1410; CHECK-NEXT: vpternlogd $154, %xmm2, %xmm1, %xmm01411; CHECK-NEXT: retq1412 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 154)1413 ret <4 x i32> %r1414}1415 1416define <4 x i64> @vpternlog_q_v256_imm155(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1417; CHECK-LABEL: vpternlog_q_v256_imm155:1418; CHECK: # %bb.0:1419; CHECK-NEXT: vpternlogq $155, %ymm2, %ymm1, %ymm01420; CHECK-NEXT: retq1421 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 155)1422 ret <4 x i64> %r1423}1424 1425define <16 x i32> @vpternlog_d_v512_imm156(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1426; CHECK-LABEL: vpternlog_d_v512_imm156:1427; CHECK: # %bb.0:1428; CHECK-NEXT: vpternlogd $156, %zmm2, %zmm1, %zmm01429; CHECK-NEXT: retq1430 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 156)1431 ret <16 x i32> %r1432}1433 1434define <2 x i64> @vpternlog_q_v128_imm157(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1435; CHECK-LABEL: vpternlog_q_v128_imm157:1436; CHECK: # %bb.0:1437; CHECK-NEXT: vpternlogq $157, %xmm2, %xmm1, %xmm01438; CHECK-NEXT: retq1439 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 157)1440 ret <2 x i64> %r1441}1442 1443define <8 x i32> @vpternlog_d_v256_imm158(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1444; CHECK-LABEL: vpternlog_d_v256_imm158:1445; CHECK: # %bb.0:1446; CHECK-NEXT: vpternlogd $158, %ymm2, %ymm1, %ymm01447; CHECK-NEXT: retq1448 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 158)1449 ret <8 x i32> %r1450}1451 1452define <8 x i64> @vpternlog_q_v512_imm159(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1453; CHECK-LABEL: vpternlog_q_v512_imm159:1454; CHECK: # %bb.0:1455; CHECK-NEXT: vpternlogq $159, %zmm2, %zmm1, %zmm01456; CHECK-NEXT: retq1457 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 159)1458 ret <8 x i64> %r1459}1460 1461define <4 x i32> @vpternlog_d_v128_imm160(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1462; CHECK-LABEL: vpternlog_d_v128_imm160:1463; CHECK: # %bb.0:1464; CHECK-NEXT: vandps %xmm2, %xmm0, %xmm01465; CHECK-NEXT: retq1466 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 160)1467 ret <4 x i32> %r1468}1469 1470define <4 x i64> @vpternlog_q_v256_imm161(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1471; CHECK-LABEL: vpternlog_q_v256_imm161:1472; CHECK: # %bb.0:1473; CHECK-NEXT: vpternlogq $161, %ymm2, %ymm1, %ymm01474; CHECK-NEXT: retq1475 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 161)1476 ret <4 x i64> %r1477}1478 1479define <16 x i32> @vpternlog_d_v512_imm162(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1480; CHECK-LABEL: vpternlog_d_v512_imm162:1481; CHECK: # %bb.0:1482; CHECK-NEXT: vpternlogd $162, %zmm2, %zmm1, %zmm01483; CHECK-NEXT: retq1484 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 162)1485 ret <16 x i32> %r1486}1487 1488define <2 x i64> @vpternlog_q_v128_imm163(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1489; CHECK-LABEL: vpternlog_q_v128_imm163:1490; CHECK: # %bb.0:1491; CHECK-NEXT: vpternlogq $163, %xmm2, %xmm1, %xmm01492; CHECK-NEXT: retq1493 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 163)1494 ret <2 x i64> %r1495}1496 1497define <8 x i32> @vpternlog_d_v256_imm164(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1498; CHECK-LABEL: vpternlog_d_v256_imm164:1499; CHECK: # %bb.0:1500; CHECK-NEXT: vpternlogd $164, %ymm2, %ymm1, %ymm01501; CHECK-NEXT: retq1502 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 164)1503 ret <8 x i32> %r1504}1505 1506define <8 x i64> @vpternlog_q_v512_imm165(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1507; CHECK-LABEL: vpternlog_q_v512_imm165:1508; CHECK: # %bb.0:1509; CHECK-NEXT: vpternlogq $165, %zmm2, %zmm1, %zmm01510; CHECK-NEXT: retq1511 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 165)1512 ret <8 x i64> %r1513}1514 1515define <4 x i32> @vpternlog_d_v128_imm166(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1516; CHECK-LABEL: vpternlog_d_v128_imm166:1517; CHECK: # %bb.0:1518; CHECK-NEXT: vpternlogd $166, %xmm2, %xmm1, %xmm01519; CHECK-NEXT: retq1520 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 166)1521 ret <4 x i32> %r1522}1523 1524define <4 x i64> @vpternlog_q_v256_imm167(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1525; CHECK-LABEL: vpternlog_q_v256_imm167:1526; CHECK: # %bb.0:1527; CHECK-NEXT: vpternlogq $167, %ymm2, %ymm1, %ymm01528; CHECK-NEXT: retq1529 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 167)1530 ret <4 x i64> %r1531}1532 1533define <16 x i32> @vpternlog_d_v512_imm168(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1534; CHECK-LABEL: vpternlog_d_v512_imm168:1535; CHECK: # %bb.0:1536; CHECK-NEXT: vpternlogd $168, %zmm2, %zmm1, %zmm01537; CHECK-NEXT: retq1538 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 168)1539 ret <16 x i32> %r1540}1541 1542define <2 x i64> @vpternlog_q_v128_imm169(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1543; CHECK-LABEL: vpternlog_q_v128_imm169:1544; CHECK: # %bb.0:1545; CHECK-NEXT: vpternlogq $169, %xmm2, %xmm1, %xmm01546; CHECK-NEXT: retq1547 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 169)1548 ret <2 x i64> %r1549}1550 1551define <8 x i32> @vpternlog_d_v256_imm170(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1552; CHECK-LABEL: vpternlog_d_v256_imm170:1553; CHECK: # %bb.0:1554; CHECK-NEXT: vmovaps %ymm2, %ymm01555; CHECK-NEXT: retq1556 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 170)1557 ret <8 x i32> %r1558}1559 1560define <8 x i64> @vpternlog_q_v512_imm171(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1561; CHECK-LABEL: vpternlog_q_v512_imm171:1562; CHECK: # %bb.0:1563; CHECK-NEXT: vpternlogq $171, %zmm2, %zmm1, %zmm01564; CHECK-NEXT: retq1565 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 171)1566 ret <8 x i64> %r1567}1568 1569define <4 x i32> @vpternlog_d_v128_imm172(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1570; CHECK-LABEL: vpternlog_d_v128_imm172:1571; CHECK: # %bb.0:1572; CHECK-NEXT: vpternlogd $172, %xmm2, %xmm1, %xmm01573; CHECK-NEXT: retq1574 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 172)1575 ret <4 x i32> %r1576}1577 1578define <4 x i64> @vpternlog_q_v256_imm173(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1579; CHECK-LABEL: vpternlog_q_v256_imm173:1580; CHECK: # %bb.0:1581; CHECK-NEXT: vpternlogq $173, %ymm2, %ymm1, %ymm01582; CHECK-NEXT: retq1583 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 173)1584 ret <4 x i64> %r1585}1586 1587define <16 x i32> @vpternlog_d_v512_imm174(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1588; CHECK-LABEL: vpternlog_d_v512_imm174:1589; CHECK: # %bb.0:1590; CHECK-NEXT: vpternlogd $174, %zmm2, %zmm1, %zmm01591; CHECK-NEXT: retq1592 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 174)1593 ret <16 x i32> %r1594}1595 1596define <2 x i64> @vpternlog_q_v128_imm175(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1597; CHECK-LABEL: vpternlog_q_v128_imm175:1598; CHECK: # %bb.0:1599; CHECK-NEXT: vpternlogq $175, %xmm2, %xmm1, %xmm01600; CHECK-NEXT: retq1601 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 175)1602 ret <2 x i64> %r1603}1604 1605define <8 x i32> @vpternlog_d_v256_imm176(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1606; CHECK-LABEL: vpternlog_d_v256_imm176:1607; CHECK: # %bb.0:1608; CHECK-NEXT: vpternlogd $176, %ymm2, %ymm1, %ymm01609; CHECK-NEXT: retq1610 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 176)1611 ret <8 x i32> %r1612}1613 1614define <8 x i64> @vpternlog_q_v512_imm177(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1615; CHECK-LABEL: vpternlog_q_v512_imm177:1616; CHECK: # %bb.0:1617; CHECK-NEXT: vpternlogq $177, %zmm2, %zmm1, %zmm01618; CHECK-NEXT: retq1619 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 177)1620 ret <8 x i64> %r1621}1622 1623define <4 x i32> @vpternlog_d_v128_imm178(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1624; CHECK-LABEL: vpternlog_d_v128_imm178:1625; CHECK: # %bb.0:1626; CHECK-NEXT: vpternlogd $178, %xmm2, %xmm1, %xmm01627; CHECK-NEXT: retq1628 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 178)1629 ret <4 x i32> %r1630}1631 1632define <4 x i64> @vpternlog_q_v256_imm179(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1633; CHECK-LABEL: vpternlog_q_v256_imm179:1634; CHECK: # %bb.0:1635; CHECK-NEXT: vpternlogq $179, %ymm2, %ymm1, %ymm01636; CHECK-NEXT: retq1637 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 179)1638 ret <4 x i64> %r1639}1640 1641define <16 x i32> @vpternlog_d_v512_imm180(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1642; CHECK-LABEL: vpternlog_d_v512_imm180:1643; CHECK: # %bb.0:1644; CHECK-NEXT: vpternlogd $180, %zmm2, %zmm1, %zmm01645; CHECK-NEXT: retq1646 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 180)1647 ret <16 x i32> %r1648}1649 1650define <2 x i64> @vpternlog_q_v128_imm181(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1651; CHECK-LABEL: vpternlog_q_v128_imm181:1652; CHECK: # %bb.0:1653; CHECK-NEXT: vpternlogq $181, %xmm2, %xmm1, %xmm01654; CHECK-NEXT: retq1655 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 181)1656 ret <2 x i64> %r1657}1658 1659define <8 x i32> @vpternlog_d_v256_imm182(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1660; CHECK-LABEL: vpternlog_d_v256_imm182:1661; CHECK: # %bb.0:1662; CHECK-NEXT: vpternlogd $182, %ymm2, %ymm1, %ymm01663; CHECK-NEXT: retq1664 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 182)1665 ret <8 x i32> %r1666}1667 1668define <8 x i64> @vpternlog_q_v512_imm183(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1669; CHECK-LABEL: vpternlog_q_v512_imm183:1670; CHECK: # %bb.0:1671; CHECK-NEXT: vpternlogq $183, %zmm2, %zmm1, %zmm01672; CHECK-NEXT: retq1673 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 183)1674 ret <8 x i64> %r1675}1676 1677define <4 x i32> @vpternlog_d_v128_imm184(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1678; CHECK-LABEL: vpternlog_d_v128_imm184:1679; CHECK: # %bb.0:1680; CHECK-NEXT: vpternlogd $184, %xmm2, %xmm1, %xmm01681; CHECK-NEXT: retq1682 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 184)1683 ret <4 x i32> %r1684}1685 1686define <4 x i64> @vpternlog_q_v256_imm185(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1687; CHECK-LABEL: vpternlog_q_v256_imm185:1688; CHECK: # %bb.0:1689; CHECK-NEXT: vpternlogq $185, %ymm2, %ymm1, %ymm01690; CHECK-NEXT: retq1691 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 185)1692 ret <4 x i64> %r1693}1694 1695define <16 x i32> @vpternlog_d_v512_imm186(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1696; CHECK-LABEL: vpternlog_d_v512_imm186:1697; CHECK: # %bb.0:1698; CHECK-NEXT: vpternlogd $186, %zmm2, %zmm1, %zmm01699; CHECK-NEXT: retq1700 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 186)1701 ret <16 x i32> %r1702}1703 1704define <2 x i64> @vpternlog_q_v128_imm187(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1705; CHECK-LABEL: vpternlog_q_v128_imm187:1706; CHECK: # %bb.0:1707; CHECK-NEXT: vpternlogq $187, %xmm2, %xmm1, %xmm01708; CHECK-NEXT: retq1709 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 187)1710 ret <2 x i64> %r1711}1712 1713define <8 x i32> @vpternlog_d_v256_imm188(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1714; CHECK-LABEL: vpternlog_d_v256_imm188:1715; CHECK: # %bb.0:1716; CHECK-NEXT: vpternlogd $188, %ymm2, %ymm1, %ymm01717; CHECK-NEXT: retq1718 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 188)1719 ret <8 x i32> %r1720}1721 1722define <8 x i64> @vpternlog_q_v512_imm189(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1723; CHECK-LABEL: vpternlog_q_v512_imm189:1724; CHECK: # %bb.0:1725; CHECK-NEXT: vpternlogq $189, %zmm2, %zmm1, %zmm01726; CHECK-NEXT: retq1727 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 189)1728 ret <8 x i64> %r1729}1730 1731define <4 x i32> @vpternlog_d_v128_imm190(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1732; CHECK-LABEL: vpternlog_d_v128_imm190:1733; CHECK: # %bb.0:1734; CHECK-NEXT: vpternlogd $190, %xmm2, %xmm1, %xmm01735; CHECK-NEXT: retq1736 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 190)1737 ret <4 x i32> %r1738}1739 1740define <4 x i64> @vpternlog_q_v256_imm191(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1741; CHECK-LABEL: vpternlog_q_v256_imm191:1742; CHECK: # %bb.0:1743; CHECK-NEXT: vpternlogq $191, %ymm2, %ymm1, %ymm01744; CHECK-NEXT: retq1745 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 191)1746 ret <4 x i64> %r1747}1748 1749define <16 x i32> @vpternlog_d_v512_imm192(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1750; CHECK-LABEL: vpternlog_d_v512_imm192:1751; CHECK: # %bb.0:1752; CHECK-NEXT: vpandd %zmm1, %zmm0, %zmm01753; CHECK-NEXT: retq1754 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 192)1755 ret <16 x i32> %r1756}1757 1758define <2 x i64> @vpternlog_q_v128_imm193(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1759; CHECK-LABEL: vpternlog_q_v128_imm193:1760; CHECK: # %bb.0:1761; CHECK-NEXT: vpternlogq $193, %xmm2, %xmm1, %xmm01762; CHECK-NEXT: retq1763 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 193)1764 ret <2 x i64> %r1765}1766 1767define <8 x i32> @vpternlog_d_v256_imm194(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1768; CHECK-LABEL: vpternlog_d_v256_imm194:1769; CHECK: # %bb.0:1770; CHECK-NEXT: vpternlogd $194, %ymm2, %ymm1, %ymm01771; CHECK-NEXT: retq1772 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 194)1773 ret <8 x i32> %r1774}1775 1776define <8 x i64> @vpternlog_q_v512_imm195(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1777; CHECK-LABEL: vpternlog_q_v512_imm195:1778; CHECK: # %bb.0:1779; CHECK-NEXT: vpternlogq $195, %zmm2, %zmm1, %zmm01780; CHECK-NEXT: retq1781 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 195)1782 ret <8 x i64> %r1783}1784 1785define <4 x i32> @vpternlog_d_v128_imm196(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1786; CHECK-LABEL: vpternlog_d_v128_imm196:1787; CHECK: # %bb.0:1788; CHECK-NEXT: vpternlogd $196, %xmm2, %xmm1, %xmm01789; CHECK-NEXT: retq1790 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 196)1791 ret <4 x i32> %r1792}1793 1794define <4 x i64> @vpternlog_q_v256_imm197(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1795; CHECK-LABEL: vpternlog_q_v256_imm197:1796; CHECK: # %bb.0:1797; CHECK-NEXT: vpternlogq $197, %ymm2, %ymm1, %ymm01798; CHECK-NEXT: retq1799 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 197)1800 ret <4 x i64> %r1801}1802 1803define <16 x i32> @vpternlog_d_v512_imm198(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1804; CHECK-LABEL: vpternlog_d_v512_imm198:1805; CHECK: # %bb.0:1806; CHECK-NEXT: vpternlogd $198, %zmm2, %zmm1, %zmm01807; CHECK-NEXT: retq1808 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 198)1809 ret <16 x i32> %r1810}1811 1812define <2 x i64> @vpternlog_q_v128_imm199(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1813; CHECK-LABEL: vpternlog_q_v128_imm199:1814; CHECK: # %bb.0:1815; CHECK-NEXT: vpternlogq $199, %xmm2, %xmm1, %xmm01816; CHECK-NEXT: retq1817 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 199)1818 ret <2 x i64> %r1819}1820 1821define <8 x i32> @vpternlog_d_v256_imm200(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1822; CHECK-LABEL: vpternlog_d_v256_imm200:1823; CHECK: # %bb.0:1824; CHECK-NEXT: vpternlogd $200, %ymm2, %ymm1, %ymm01825; CHECK-NEXT: retq1826 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 200)1827 ret <8 x i32> %r1828}1829 1830define <8 x i64> @vpternlog_q_v512_imm201(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1831; CHECK-LABEL: vpternlog_q_v512_imm201:1832; CHECK: # %bb.0:1833; CHECK-NEXT: vpternlogq $201, %zmm2, %zmm1, %zmm01834; CHECK-NEXT: retq1835 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 201)1836 ret <8 x i64> %r1837}1838 1839define <4 x i32> @vpternlog_d_v128_imm202(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1840; CHECK-LABEL: vpternlog_d_v128_imm202:1841; CHECK: # %bb.0:1842; CHECK-NEXT: vpternlogd $202, %xmm2, %xmm1, %xmm01843; CHECK-NEXT: retq1844 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 202)1845 ret <4 x i32> %r1846}1847 1848define <4 x i64> @vpternlog_q_v256_imm203(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1849; CHECK-LABEL: vpternlog_q_v256_imm203:1850; CHECK: # %bb.0:1851; CHECK-NEXT: vpternlogq $203, %ymm2, %ymm1, %ymm01852; CHECK-NEXT: retq1853 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 203)1854 ret <4 x i64> %r1855}1856 1857define <16 x i32> @vpternlog_d_v512_imm204(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1858; CHECK-LABEL: vpternlog_d_v512_imm204:1859; CHECK: # %bb.0:1860; CHECK-NEXT: vmovaps %zmm1, %zmm01861; CHECK-NEXT: retq1862 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 204)1863 ret <16 x i32> %r1864}1865 1866define <2 x i64> @vpternlog_q_v128_imm205(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1867; CHECK-LABEL: vpternlog_q_v128_imm205:1868; CHECK: # %bb.0:1869; CHECK-NEXT: vpternlogq $205, %xmm2, %xmm1, %xmm01870; CHECK-NEXT: retq1871 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 205)1872 ret <2 x i64> %r1873}1874 1875define <8 x i32> @vpternlog_d_v256_imm206(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1876; CHECK-LABEL: vpternlog_d_v256_imm206:1877; CHECK: # %bb.0:1878; CHECK-NEXT: vpternlogd $206, %ymm2, %ymm1, %ymm01879; CHECK-NEXT: retq1880 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 206)1881 ret <8 x i32> %r1882}1883 1884define <8 x i64> @vpternlog_q_v512_imm207(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1885; CHECK-LABEL: vpternlog_q_v512_imm207:1886; CHECK: # %bb.0:1887; CHECK-NEXT: vpternlogq $207, %zmm2, %zmm1, %zmm01888; CHECK-NEXT: retq1889 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 207)1890 ret <8 x i64> %r1891}1892 1893define <4 x i32> @vpternlog_d_v128_imm208(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1894; CHECK-LABEL: vpternlog_d_v128_imm208:1895; CHECK: # %bb.0:1896; CHECK-NEXT: vpternlogd $208, %xmm2, %xmm1, %xmm01897; CHECK-NEXT: retq1898 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 208)1899 ret <4 x i32> %r1900}1901 1902define <4 x i64> @vpternlog_q_v256_imm209(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1903; CHECK-LABEL: vpternlog_q_v256_imm209:1904; CHECK: # %bb.0:1905; CHECK-NEXT: vpternlogq $209, %ymm2, %ymm1, %ymm01906; CHECK-NEXT: retq1907 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 209)1908 ret <4 x i64> %r1909}1910 1911define <16 x i32> @vpternlog_d_v512_imm210(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1912; CHECK-LABEL: vpternlog_d_v512_imm210:1913; CHECK: # %bb.0:1914; CHECK-NEXT: vpternlogd $210, %zmm2, %zmm1, %zmm01915; CHECK-NEXT: retq1916 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 210)1917 ret <16 x i32> %r1918}1919 1920define <2 x i64> @vpternlog_q_v128_imm211(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1921; CHECK-LABEL: vpternlog_q_v128_imm211:1922; CHECK: # %bb.0:1923; CHECK-NEXT: vpternlogq $211, %xmm2, %xmm1, %xmm01924; CHECK-NEXT: retq1925 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 211)1926 ret <2 x i64> %r1927}1928 1929define <8 x i32> @vpternlog_d_v256_imm212(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1930; CHECK-LABEL: vpternlog_d_v256_imm212:1931; CHECK: # %bb.0:1932; CHECK-NEXT: vpternlogd $212, %ymm2, %ymm1, %ymm01933; CHECK-NEXT: retq1934 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 212)1935 ret <8 x i32> %r1936}1937 1938define <8 x i64> @vpternlog_q_v512_imm213(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1939; CHECK-LABEL: vpternlog_q_v512_imm213:1940; CHECK: # %bb.0:1941; CHECK-NEXT: vpternlogq $213, %zmm2, %zmm1, %zmm01942; CHECK-NEXT: retq1943 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 213)1944 ret <8 x i64> %r1945}1946 1947define <4 x i32> @vpternlog_d_v128_imm214(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {1948; CHECK-LABEL: vpternlog_d_v128_imm214:1949; CHECK: # %bb.0:1950; CHECK-NEXT: vpternlogd $214, %xmm2, %xmm1, %xmm01951; CHECK-NEXT: retq1952 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 214)1953 ret <4 x i32> %r1954}1955 1956define <4 x i64> @vpternlog_q_v256_imm215(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {1957; CHECK-LABEL: vpternlog_q_v256_imm215:1958; CHECK: # %bb.0:1959; CHECK-NEXT: vpternlogq $215, %ymm2, %ymm1, %ymm01960; CHECK-NEXT: retq1961 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 215)1962 ret <4 x i64> %r1963}1964 1965define <16 x i32> @vpternlog_d_v512_imm216(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {1966; CHECK-LABEL: vpternlog_d_v512_imm216:1967; CHECK: # %bb.0:1968; CHECK-NEXT: vpternlogd $216, %zmm2, %zmm1, %zmm01969; CHECK-NEXT: retq1970 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 216)1971 ret <16 x i32> %r1972}1973 1974define <2 x i64> @vpternlog_q_v128_imm217(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {1975; CHECK-LABEL: vpternlog_q_v128_imm217:1976; CHECK: # %bb.0:1977; CHECK-NEXT: vpternlogq $217, %xmm2, %xmm1, %xmm01978; CHECK-NEXT: retq1979 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 217)1980 ret <2 x i64> %r1981}1982 1983define <8 x i32> @vpternlog_d_v256_imm218(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {1984; CHECK-LABEL: vpternlog_d_v256_imm218:1985; CHECK: # %bb.0:1986; CHECK-NEXT: vpternlogd $218, %ymm2, %ymm1, %ymm01987; CHECK-NEXT: retq1988 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 218)1989 ret <8 x i32> %r1990}1991 1992define <8 x i64> @vpternlog_q_v512_imm219(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {1993; CHECK-LABEL: vpternlog_q_v512_imm219:1994; CHECK: # %bb.0:1995; CHECK-NEXT: vpternlogq $219, %zmm2, %zmm1, %zmm01996; CHECK-NEXT: retq1997 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 219)1998 ret <8 x i64> %r1999}2000 2001define <4 x i32> @vpternlog_d_v128_imm220(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {2002; CHECK-LABEL: vpternlog_d_v128_imm220:2003; CHECK: # %bb.0:2004; CHECK-NEXT: vpternlogd $220, %xmm2, %xmm1, %xmm02005; CHECK-NEXT: retq2006 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 220)2007 ret <4 x i32> %r2008}2009 2010define <4 x i64> @vpternlog_q_v256_imm221(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2011; CHECK-LABEL: vpternlog_q_v256_imm221:2012; CHECK: # %bb.0:2013; CHECK-NEXT: vpternlogq $221, %ymm2, %ymm1, %ymm02014; CHECK-NEXT: retq2015 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 221)2016 ret <4 x i64> %r2017}2018 2019define <16 x i32> @vpternlog_d_v512_imm222(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {2020; CHECK-LABEL: vpternlog_d_v512_imm222:2021; CHECK: # %bb.0:2022; CHECK-NEXT: vpternlogd $222, %zmm2, %zmm1, %zmm02023; CHECK-NEXT: retq2024 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 222)2025 ret <16 x i32> %r2026}2027 2028define <2 x i64> @vpternlog_q_v128_imm223(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {2029; CHECK-LABEL: vpternlog_q_v128_imm223:2030; CHECK: # %bb.0:2031; CHECK-NEXT: vpternlogq $223, %xmm2, %xmm1, %xmm02032; CHECK-NEXT: retq2033 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 223)2034 ret <2 x i64> %r2035}2036 2037define <8 x i32> @vpternlog_d_v256_imm224(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {2038; CHECK-LABEL: vpternlog_d_v256_imm224:2039; CHECK: # %bb.0:2040; CHECK-NEXT: vpternlogd $224, %ymm2, %ymm1, %ymm02041; CHECK-NEXT: retq2042 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 224)2043 ret <8 x i32> %r2044}2045 2046define <8 x i64> @vpternlog_q_v512_imm225(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {2047; CHECK-LABEL: vpternlog_q_v512_imm225:2048; CHECK: # %bb.0:2049; CHECK-NEXT: vpternlogq $225, %zmm2, %zmm1, %zmm02050; CHECK-NEXT: retq2051 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 225)2052 ret <8 x i64> %r2053}2054 2055define <4 x i32> @vpternlog_d_v128_imm226(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {2056; CHECK-LABEL: vpternlog_d_v128_imm226:2057; CHECK: # %bb.0:2058; CHECK-NEXT: vpternlogd $226, %xmm2, %xmm1, %xmm02059; CHECK-NEXT: retq2060 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 226)2061 ret <4 x i32> %r2062}2063 2064define <4 x i64> @vpternlog_q_v256_imm227(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2065; CHECK-LABEL: vpternlog_q_v256_imm227:2066; CHECK: # %bb.0:2067; CHECK-NEXT: vpternlogq $227, %ymm2, %ymm1, %ymm02068; CHECK-NEXT: retq2069 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 227)2070 ret <4 x i64> %r2071}2072 2073define <16 x i32> @vpternlog_d_v512_imm228(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {2074; CHECK-LABEL: vpternlog_d_v512_imm228:2075; CHECK: # %bb.0:2076; CHECK-NEXT: vpternlogd $228, %zmm2, %zmm1, %zmm02077; CHECK-NEXT: retq2078 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 228)2079 ret <16 x i32> %r2080}2081 2082define <2 x i64> @vpternlog_q_v128_imm229(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {2083; CHECK-LABEL: vpternlog_q_v128_imm229:2084; CHECK: # %bb.0:2085; CHECK-NEXT: vpternlogq $229, %xmm2, %xmm1, %xmm02086; CHECK-NEXT: retq2087 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 229)2088 ret <2 x i64> %r2089}2090 2091define <8 x i32> @vpternlog_d_v256_imm230(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {2092; CHECK-LABEL: vpternlog_d_v256_imm230:2093; CHECK: # %bb.0:2094; CHECK-NEXT: vpternlogd $230, %ymm2, %ymm1, %ymm02095; CHECK-NEXT: retq2096 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 230)2097 ret <8 x i32> %r2098}2099 2100define <8 x i64> @vpternlog_q_v512_imm231(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {2101; CHECK-LABEL: vpternlog_q_v512_imm231:2102; CHECK: # %bb.0:2103; CHECK-NEXT: vpternlogq $231, %zmm2, %zmm1, %zmm02104; CHECK-NEXT: retq2105 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 231)2106 ret <8 x i64> %r2107}2108 2109define <4 x i32> @vpternlog_d_v128_imm232(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {2110; CHECK-LABEL: vpternlog_d_v128_imm232:2111; CHECK: # %bb.0:2112; CHECK-NEXT: vpternlogd $232, %xmm2, %xmm1, %xmm02113; CHECK-NEXT: retq2114 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 232)2115 ret <4 x i32> %r2116}2117 2118define <4 x i64> @vpternlog_q_v256_imm233(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2119; CHECK-LABEL: vpternlog_q_v256_imm233:2120; CHECK: # %bb.0:2121; CHECK-NEXT: vpternlogq $233, %ymm2, %ymm1, %ymm02122; CHECK-NEXT: retq2123 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 233)2124 ret <4 x i64> %r2125}2126 2127define <16 x i32> @vpternlog_d_v512_imm234(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {2128; CHECK-LABEL: vpternlog_d_v512_imm234:2129; CHECK: # %bb.0:2130; CHECK-NEXT: vpternlogd $234, %zmm2, %zmm1, %zmm02131; CHECK-NEXT: retq2132 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 234)2133 ret <16 x i32> %r2134}2135 2136define <2 x i64> @vpternlog_q_v128_imm235(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {2137; CHECK-LABEL: vpternlog_q_v128_imm235:2138; CHECK: # %bb.0:2139; CHECK-NEXT: vpternlogq $235, %xmm2, %xmm1, %xmm02140; CHECK-NEXT: retq2141 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 235)2142 ret <2 x i64> %r2143}2144 2145define <8 x i32> @vpternlog_d_v256_imm236(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {2146; CHECK-LABEL: vpternlog_d_v256_imm236:2147; CHECK: # %bb.0:2148; CHECK-NEXT: vpternlogd $236, %ymm2, %ymm1, %ymm02149; CHECK-NEXT: retq2150 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 236)2151 ret <8 x i32> %r2152}2153 2154define <8 x i64> @vpternlog_q_v512_imm237(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {2155; CHECK-LABEL: vpternlog_q_v512_imm237:2156; CHECK: # %bb.0:2157; CHECK-NEXT: vpternlogq $237, %zmm2, %zmm1, %zmm02158; CHECK-NEXT: retq2159 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 237)2160 ret <8 x i64> %r2161}2162 2163define <4 x i32> @vpternlog_d_v128_imm238(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {2164; CHECK-LABEL: vpternlog_d_v128_imm238:2165; CHECK: # %bb.0:2166; CHECK-NEXT: vorps %xmm2, %xmm1, %xmm02167; CHECK-NEXT: retq2168 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 238)2169 ret <4 x i32> %r2170}2171 2172define <4 x i64> @vpternlog_q_v256_imm239(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2173; CHECK-LABEL: vpternlog_q_v256_imm239:2174; CHECK: # %bb.0:2175; CHECK-NEXT: vpternlogq $239, %ymm2, %ymm1, %ymm02176; CHECK-NEXT: retq2177 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 239)2178 ret <4 x i64> %r2179}2180 2181define <16 x i32> @vpternlog_d_v512_imm240(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {2182; CHECK-LABEL: vpternlog_d_v512_imm240:2183; CHECK: # %bb.0:2184; CHECK-NEXT: retq2185 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 240)2186 ret <16 x i32> %r2187}2188 2189define <2 x i64> @vpternlog_q_v128_imm241(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {2190; CHECK-LABEL: vpternlog_q_v128_imm241:2191; CHECK: # %bb.0:2192; CHECK-NEXT: vpternlogq $241, %xmm2, %xmm1, %xmm02193; CHECK-NEXT: retq2194 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 241)2195 ret <2 x i64> %r2196}2197 2198define <8 x i32> @vpternlog_d_v256_imm242(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {2199; CHECK-LABEL: vpternlog_d_v256_imm242:2200; CHECK: # %bb.0:2201; CHECK-NEXT: vpternlogd $242, %ymm2, %ymm1, %ymm02202; CHECK-NEXT: retq2203 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 242)2204 ret <8 x i32> %r2205}2206 2207define <8 x i64> @vpternlog_q_v512_imm243(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {2208; CHECK-LABEL: vpternlog_q_v512_imm243:2209; CHECK: # %bb.0:2210; CHECK-NEXT: vpternlogq $243, %zmm2, %zmm1, %zmm02211; CHECK-NEXT: retq2212 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 243)2213 ret <8 x i64> %r2214}2215 2216define <4 x i32> @vpternlog_d_v128_imm244(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {2217; CHECK-LABEL: vpternlog_d_v128_imm244:2218; CHECK: # %bb.0:2219; CHECK-NEXT: vpternlogd $244, %xmm2, %xmm1, %xmm02220; CHECK-NEXT: retq2221 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 244)2222 ret <4 x i32> %r2223}2224 2225define <4 x i64> @vpternlog_q_v256_imm245(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2226; CHECK-LABEL: vpternlog_q_v256_imm245:2227; CHECK: # %bb.0:2228; CHECK-NEXT: vpternlogq $245, %ymm2, %ymm1, %ymm02229; CHECK-NEXT: retq2230 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 245)2231 ret <4 x i64> %r2232}2233 2234define <16 x i32> @vpternlog_d_v512_imm246(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {2235; CHECK-LABEL: vpternlog_d_v512_imm246:2236; CHECK: # %bb.0:2237; CHECK-NEXT: vpternlogd $246, %zmm2, %zmm1, %zmm02238; CHECK-NEXT: retq2239 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 246)2240 ret <16 x i32> %r2241}2242 2243define <2 x i64> @vpternlog_q_v128_imm247(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {2244; CHECK-LABEL: vpternlog_q_v128_imm247:2245; CHECK: # %bb.0:2246; CHECK-NEXT: vpternlogq $247, %xmm2, %xmm1, %xmm02247; CHECK-NEXT: retq2248 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 247)2249 ret <2 x i64> %r2250}2251 2252define <8 x i32> @vpternlog_d_v256_imm248(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {2253; CHECK-LABEL: vpternlog_d_v256_imm248:2254; CHECK: # %bb.0:2255; CHECK-NEXT: vpternlogd $248, %ymm2, %ymm1, %ymm02256; CHECK-NEXT: retq2257 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 248)2258 ret <8 x i32> %r2259}2260 2261define <8 x i64> @vpternlog_q_v512_imm249(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {2262; CHECK-LABEL: vpternlog_q_v512_imm249:2263; CHECK: # %bb.0:2264; CHECK-NEXT: vpternlogq $249, %zmm2, %zmm1, %zmm02265; CHECK-NEXT: retq2266 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 249)2267 ret <8 x i64> %r2268}2269 2270define <4 x i32> @vpternlog_d_v128_imm250(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2) nounwind {2271; CHECK-LABEL: vpternlog_d_v128_imm250:2272; CHECK: # %bb.0:2273; CHECK-NEXT: vorps %xmm2, %xmm0, %xmm02274; CHECK-NEXT: retq2275 %r = tail call <4 x i32> @llvm.x86.avx512.pternlog.d.128(<4 x i32> %v0, <4 x i32> %v1, <4 x i32> %v2, i32 250)2276 ret <4 x i32> %r2277}2278 2279define <4 x i64> @vpternlog_q_v256_imm251(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2280; CHECK-LABEL: vpternlog_q_v256_imm251:2281; CHECK: # %bb.0:2282; CHECK-NEXT: vpternlogq $251, %ymm2, %ymm1, %ymm02283; CHECK-NEXT: retq2284 %r = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 251)2285 ret <4 x i64> %r2286}2287 2288define <16 x i32> @vpternlog_d_v512_imm252(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2) nounwind {2289; CHECK-LABEL: vpternlog_d_v512_imm252:2290; CHECK: # %bb.0:2291; CHECK-NEXT: vpord %zmm1, %zmm0, %zmm02292; CHECK-NEXT: retq2293 %r = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %v0, <16 x i32> %v1, <16 x i32> %v2, i32 252)2294 ret <16 x i32> %r2295}2296 2297; This is bitselect pattern2298define <2 x i64> @vpternlog_q_v128_imm253(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2) nounwind {2299; CHECK-LABEL: vpternlog_q_v128_imm253:2300; CHECK: # %bb.0:2301; CHECK-NEXT: vpternlogq $253, %xmm2, %xmm1, %xmm02302; CHECK-NEXT: retq2303 %r = tail call <2 x i64> @llvm.x86.avx512.pternlog.q.128(<2 x i64> %v0, <2 x i64> %v1, <2 x i64> %v2, i32 253)2304 ret <2 x i64> %r2305}2306 2307define <8 x i32> @vpternlog_d_v256_imm254(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2) nounwind {2308; CHECK-LABEL: vpternlog_d_v256_imm254:2309; CHECK: # %bb.0:2310; CHECK-NEXT: vpternlogd $254, %ymm2, %ymm1, %ymm02311; CHECK-NEXT: retq2312 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, i32 254)2313 ret <8 x i32> %r2314}2315 2316define <8 x i64> @vpternlog_q_v512_imm255(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2) nounwind {2317; CHECK-LABEL: vpternlog_q_v512_imm255:2318; CHECK: # %bb.0:2319; CHECK-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm02320; CHECK-NEXT: retq2321 %r = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %v0, <8 x i64> %v1, <8 x i64> %v2, i32 255)2322 ret <8 x i64> %r2323}2324 2325define <8 x i32> @vpternlog_vselect_8xi32(<8 x i32> %v0, <8 x i32> %v1, <8 x i32> %v2, <8 x i32> %v3) nounwind {2326; CHECK-LABEL: vpternlog_vselect_8xi32:2327; CHECK: # %bb.0:2328; CHECK-NEXT: vpcmpeqd %ymm1, %ymm0, %ymm02329; CHECK-NEXT: vpternlogd $202, %ymm2, %ymm1, %ymm02330; CHECK-NEXT: retq2331 %vcmp = icmp eq <8 x i32> %v0, %v12332 %vmask = sext <8 x i1> %vcmp to <8 x i32>2333 %r = tail call <8 x i32> @llvm.x86.avx512.pternlog.d.256(<8 x i32> %vmask, <8 x i32> %v1, <8 x i32> %v2, i32 202)2334 ret <8 x i32> %r2335}2336 2337define <4 x i64> @vpternlog_carry_save_add_4xi64(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2) nounwind {2338; CHECK-LABEL: vpternlog_carry_save_add_4xi64:2339; CHECK: # %bb.0:2340; CHECK-NEXT: vmovdqa %ymm0, %ymm32341; CHECK-NEXT: vpternlogq $150, %ymm2, %ymm1, %ymm32342; CHECK-NEXT: vpternlogq $232, %ymm2, %ymm0, %ymm12343; CHECK-NEXT: vmovdqa %ymm3, %ymm02344; CHECK-NEXT: jmp use_merge_4xi64@PLT # TAILCALL2345 %l = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 150)2346 %h = tail call <4 x i64> @llvm.x86.avx512.pternlog.q.256(<4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, i32 232)2347 %r = tail call <4 x i64> @use_merge_4xi64(<4 x i64> %l, <4 x i64> %h)2348 ret <4 x i64> %r2349}2350