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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s3 4;; X's live range extends beyond the shift, so the register allocator5;; cannot coalesce it with Y. Because of this, a copy needs to be6;; emitted before the shift to save the register value before it is7;; clobbered. However, this copy is not needed if the register8;; allocator turns the shift into an LEA. This also occurs for ADD.9 10; Check that the shift gets turned into an LEA.11 12@G = external global i3213 14define i32 @test1(i32 %X) nounwind {15; CHECK-LABEL: test1:16; CHECK: ## %bb.0:17; CHECK-NEXT: movl %edi, %eax18; CHECK-NEXT: leal 1(%rax), %ecx19; CHECK-NEXT: movq _G@GOTPCREL(%rip), %rdx20; CHECK-NEXT: movl %ecx, (%rdx)21; CHECK-NEXT: ## kill: def $eax killed $eax killed $rax22; CHECK-NEXT: retq23 %Z = add i32 %X, 124 store volatile i32 %Z, ptr @G25 ret i32 %X26}27 28; rdar://897750829; The second add should not be transformed to leal nor should it be30; commutted (which would require inserting a copy).31define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {32; CHECK-LABEL: test2:33; CHECK: ## %bb.0: ## %entry34; CHECK-NEXT: ## kill: def $ecx killed $ecx def $rcx35; CHECK-NEXT: ## kill: def $edx killed $edx def $rdx36; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi37; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi38; CHECK-NEXT: addl %edi, %esi39; CHECK-NEXT: leal (%rdx,%rcx), %eax40; CHECK-NEXT: addl %esi, %eax41; CHECK-NEXT: retq42entry:43 %add = add i32 %b, %a44 %add3 = add i32 %add, %c45 %add5 = add i32 %add3, %d46 ret i32 %add547}48 49; rdar://900264850define i64 @test3(i64 %x) nounwind readnone ssp {51; CHECK-LABEL: test3:52; CHECK: ## %bb.0: ## %entry53; CHECK-NEXT: leaq (%rdi,%rdi), %rax54; CHECK-NEXT: retq55entry:56 %0 = shl i64 %x, 157 ret i64 %058}59 60@global = external global i32, align 461@global2 = external global i64, align 862 63; Test that liveness is properly updated and we do not encounter the64; assert/crash from http://llvm.org/PR2830165define void @ham() {66; CHECK-LABEL: ham:67; CHECK: ## %bb.0: ## %bb68; CHECK-NEXT: xorl %eax, %eax69; CHECK-NEXT: xorl %ecx, %ecx70; CHECK-NEXT: movq _global@GOTPCREL(%rip), %rdx71; CHECK-NEXT: movq _global2@GOTPCREL(%rip), %rsi72; CHECK-NEXT: testb %cl, %cl73; CHECK-NEXT: je LBB3_274; CHECK-NEXT: .p2align 475; CHECK-NEXT: LBB3_6: ## %bb276; CHECK-NEXT: ## =>This Loop Header: Depth=177; CHECK-NEXT: ## Child Loop BB3_7 Depth 278; CHECK-NEXT: movl (%rdx), %edi79; CHECK-NEXT: leal (%rdi,%rax), %r8d80; CHECK-NEXT: movslq %r8d, %r881; CHECK-NEXT: .p2align 482; CHECK-NEXT: LBB3_7: ## %bb683; CHECK-NEXT: ## Parent Loop BB3_6 Depth=184; CHECK-NEXT: ## => This Inner Loop Header: Depth=285; CHECK-NEXT: movq %rax, (%rsi)86; CHECK-NEXT: movq %r8, (%rsi)87; CHECK-NEXT: movl %edi, (%rdx)88; CHECK-NEXT: testb %cl, %cl89; CHECK-NEXT: jne LBB3_790; CHECK-NEXT: ## %bb.8: ## %bb991; CHECK-NEXT: ## in Loop: Header=BB3_6 Depth=192; CHECK-NEXT: addq $4, %rax93; CHECK-NEXT: testb %cl, %cl94; CHECK-NEXT: jne LBB3_695; CHECK-NEXT: LBB3_2: ## %bb3.preheader96; CHECK-NEXT: xorl %ecx, %ecx97; CHECK-NEXT: .p2align 498; CHECK-NEXT: LBB3_3: ## %bb399; CHECK-NEXT: ## =>This Loop Header: Depth=1100; CHECK-NEXT: ## Child Loop BB3_4 Depth 2101; CHECK-NEXT: movq %rcx, %rdx102; CHECK-NEXT: addq $4, %rcx103; CHECK-NEXT: movl %eax, %esi104; CHECK-NEXT: subl %edx, %esi105; CHECK-NEXT: .p2align 4106; CHECK-NEXT: LBB3_4: ## %bb4107; CHECK-NEXT: ## Parent Loop BB3_3 Depth=1108; CHECK-NEXT: ## => This Inner Loop Header: Depth=2109; CHECK-NEXT: testl %esi, %esi110; CHECK-NEXT: jne LBB3_9111; CHECK-NEXT: ## %bb.5: ## %bb5112; CHECK-NEXT: ## in Loop: Header=BB3_4 Depth=2113; CHECK-NEXT: incq %rdx114; CHECK-NEXT: cmpq %rcx, %rdx115; CHECK-NEXT: jl LBB3_4116; CHECK-NEXT: jmp LBB3_3117; CHECK-NEXT: LBB3_9: ## %bb8118; CHECK-NEXT: ud2119bb:120 br label %bb1121 122bb1:123 %tmp = phi i64 [ %tmp40, %bb9 ], [ 0, %bb ]124 %tmp2 = phi i32 [ %tmp39, %bb9 ], [ 0, %bb ]125 %tmp3 = icmp sgt i32 undef, 10126 br i1 %tmp3, label %bb2, label %bb3127 128bb2:129 %tmp6 = load i32, ptr @global, align 4130 %tmp8 = add nsw i32 %tmp6, %tmp2131 %tmp9 = sext i32 %tmp8 to i64132 br label %bb6133 134bb3:135 %tmp14 = phi i64 [ %tmp15, %bb5 ], [ 0, %bb1 ]136 %tmp15 = add nuw i64 %tmp14, 4137 %tmp16 = trunc i64 %tmp14 to i32138 %tmp17 = sub i32 %tmp2, %tmp16139 br label %bb4140 141bb4:142 %tmp20 = phi i64 [ %tmp14, %bb3 ], [ %tmp34, %bb5 ]143 %tmp28 = icmp eq i32 %tmp17, 0144 br i1 %tmp28, label %bb5, label %bb8145 146bb5:147 %tmp34 = add nuw nsw i64 %tmp20, 1148 %tmp35 = icmp slt i64 %tmp34, %tmp15149 br i1 %tmp35, label %bb4, label %bb3150 151bb6:152 store volatile i64 %tmp, ptr @global2, align 8153 store volatile i64 %tmp9, ptr @global2, align 8154 store volatile i32 %tmp6, ptr @global, align 4155 %tmp45 = icmp slt i32 undef, undef156 br i1 %tmp45, label %bb6, label %bb9157 158bb8:159 unreachable160 161bb9:162 %tmp39 = add nuw nsw i32 %tmp2, 4163 %tmp40 = add nuw i64 %tmp, 4164 br label %bb1165}166