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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,-sse2 < %s | FileCheck %s --check-prefix=CHECK-SSE13; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s | FileCheck %s --check-prefix=CHECK-SSE24; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+xop < %s | FileCheck %s --check-prefix=CHECK-XOP5 6; ============================================================================ ;7; Various cases with %x and/or %y being a constant8; ============================================================================ ;9 10define <4 x i32> @out_constant_varx_mone(ptr%px, ptr%py, ptr%pmask) {11; CHECK-SSE1-LABEL: out_constant_varx_mone:12; CHECK-SSE1: # %bb.0:13; CHECK-SSE1-NEXT: movq %rdi, %rax14; CHECK-SSE1-NEXT: movaps (%rcx), %xmm015; CHECK-SSE1-NEXT: movaps {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]16; CHECK-SSE1-NEXT: xorps %xmm0, %xmm117; CHECK-SSE1-NEXT: andps (%rsi), %xmm018; CHECK-SSE1-NEXT: orps %xmm1, %xmm019; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)20; CHECK-SSE1-NEXT: retq21;22; CHECK-SSE2-LABEL: out_constant_varx_mone:23; CHECK-SSE2: # %bb.0:24; CHECK-SSE2-NEXT: movdqa (%rdx), %xmm025; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm126; CHECK-SSE2-NEXT: pxor %xmm0, %xmm127; CHECK-SSE2-NEXT: pand (%rdi), %xmm028; CHECK-SSE2-NEXT: por %xmm1, %xmm029; CHECK-SSE2-NEXT: retq30;31; CHECK-XOP-LABEL: out_constant_varx_mone:32; CHECK-XOP: # %bb.0:33; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm034; CHECK-XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm135; CHECK-XOP-NEXT: vpxor %xmm1, %xmm0, %xmm136; CHECK-XOP-NEXT: vpand (%rdi), %xmm0, %xmm037; CHECK-XOP-NEXT: vpor %xmm1, %xmm0, %xmm038; CHECK-XOP-NEXT: retq39 %x = load <4 x i32>, ptr%px, align 1640 %y = load <4 x i32>, ptr%py, align 1641 %mask = load <4 x i32>, ptr%pmask, align 1642 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>43 %mx = and <4 x i32> %mask, %x44 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>45 %r = or <4 x i32> %mx, %my46 ret <4 x i32> %r47}48 49define <4 x i32> @in_constant_varx_mone(ptr%px, ptr%py, ptr%pmask) {50; CHECK-SSE1-LABEL: in_constant_varx_mone:51; CHECK-SSE1: # %bb.0:52; CHECK-SSE1-NEXT: movq %rdi, %rax53; CHECK-SSE1-NEXT: movaps (%rsi), %xmm054; CHECK-SSE1-NEXT: andnps (%rcx), %xmm055; CHECK-SSE1-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm056; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)57; CHECK-SSE1-NEXT: retq58;59; CHECK-SSE2-LABEL: in_constant_varx_mone:60; CHECK-SSE2: # %bb.0:61; CHECK-SSE2-NEXT: movdqa (%rdi), %xmm062; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm163; CHECK-SSE2-NEXT: pandn (%rdx), %xmm064; CHECK-SSE2-NEXT: pxor %xmm1, %xmm065; CHECK-SSE2-NEXT: retq66;67; CHECK-XOP-LABEL: in_constant_varx_mone:68; CHECK-XOP: # %bb.0:69; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm070; CHECK-XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm171; CHECK-XOP-NEXT: vpandn (%rdx), %xmm0, %xmm072; CHECK-XOP-NEXT: vpxor %xmm1, %xmm0, %xmm073; CHECK-XOP-NEXT: retq74 %x = load <4 x i32>, ptr%px, align 1675 %y = load <4 x i32>, ptr%py, align 1676 %mask = load <4 x i32>, ptr%pmask, align 1677 %n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x78 %n1 = and <4 x i32> %n0, %mask79 %r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1>80 ret <4 x i32> %r81}82 83; This is not a canonical form. Testing for completeness only.84define <4 x i32> @out_constant_varx_mone_invmask(ptr%px, ptr%py, ptr%pmask) {85; CHECK-SSE1-LABEL: out_constant_varx_mone_invmask:86; CHECK-SSE1: # %bb.0:87; CHECK-SSE1-NEXT: movq %rdi, %rax88; CHECK-SSE1-NEXT: movaps (%rsi), %xmm089; CHECK-SSE1-NEXT: orps (%rcx), %xmm090; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)91; CHECK-SSE1-NEXT: retq92;93; CHECK-SSE2-LABEL: out_constant_varx_mone_invmask:94; CHECK-SSE2: # %bb.0:95; CHECK-SSE2-NEXT: movaps (%rdi), %xmm096; CHECK-SSE2-NEXT: orps (%rdx), %xmm097; CHECK-SSE2-NEXT: retq98;99; CHECK-XOP-LABEL: out_constant_varx_mone_invmask:100; CHECK-XOP: # %bb.0:101; CHECK-XOP-NEXT: vmovaps (%rdi), %xmm0102; CHECK-XOP-NEXT: vorps (%rdx), %xmm0, %xmm0103; CHECK-XOP-NEXT: retq104 %x = load <4 x i32>, ptr%px, align 16105 %y = load <4 x i32>, ptr%py, align 16106 %mask = load <4 x i32>, ptr%pmask, align 16107 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>108 %mx = and <4 x i32> %notmask, %x109 %my = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>110 %r = or <4 x i32> %mx, %my111 ret <4 x i32> %r112}113 114; This is not a canonical form. Testing for completeness only.115define <4 x i32> @in_constant_varx_mone_invmask(ptr%px, ptr%py, ptr%pmask) {116; CHECK-SSE1-LABEL: in_constant_varx_mone_invmask:117; CHECK-SSE1: # %bb.0:118; CHECK-SSE1-NEXT: movq %rdi, %rax119; CHECK-SSE1-NEXT: movaps (%rsi), %xmm0120; CHECK-SSE1-NEXT: movaps {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]121; CHECK-SSE1-NEXT: movaps (%rcx), %xmm2122; CHECK-SSE1-NEXT: xorps %xmm1, %xmm2123; CHECK-SSE1-NEXT: andnps %xmm2, %xmm0124; CHECK-SSE1-NEXT: xorps %xmm1, %xmm0125; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)126; CHECK-SSE1-NEXT: retq127;128; CHECK-SSE2-LABEL: in_constant_varx_mone_invmask:129; CHECK-SSE2: # %bb.0:130; CHECK-SSE2-NEXT: movaps (%rdi), %xmm0131; CHECK-SSE2-NEXT: orps (%rdx), %xmm0132; CHECK-SSE2-NEXT: retq133;134; CHECK-XOP-LABEL: in_constant_varx_mone_invmask:135; CHECK-XOP: # %bb.0:136; CHECK-XOP-NEXT: vmovaps (%rdi), %xmm0137; CHECK-XOP-NEXT: vorps (%rdx), %xmm0, %xmm0138; CHECK-XOP-NEXT: retq139 %x = load <4 x i32>, ptr%px, align 16140 %y = load <4 x i32>, ptr%py, align 16141 %mask = load <4 x i32>, ptr%pmask, align 16142 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>143 %n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x144 %n1 = and <4 x i32> %n0, %notmask145 %r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1>146 ret <4 x i32> %r147}148 149define <4 x i32> @out_constant_varx_42(ptr%px, ptr%py, ptr%pmask) {150; CHECK-SSE1-LABEL: out_constant_varx_42:151; CHECK-SSE1: # %bb.0:152; CHECK-SSE1-NEXT: movq %rdi, %rax153; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0154; CHECK-SSE1-NEXT: movaps (%rsi), %xmm1155; CHECK-SSE1-NEXT: andps %xmm0, %xmm1156; CHECK-SSE1-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0157; CHECK-SSE1-NEXT: orps %xmm1, %xmm0158; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)159; CHECK-SSE1-NEXT: retq160;161; CHECK-SSE2-LABEL: out_constant_varx_42:162; CHECK-SSE2: # %bb.0:163; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0164; CHECK-SSE2-NEXT: movaps (%rdi), %xmm1165; CHECK-SSE2-NEXT: andps %xmm0, %xmm1166; CHECK-SSE2-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0167; CHECK-SSE2-NEXT: orps %xmm1, %xmm0168; CHECK-SSE2-NEXT: retq169;170; CHECK-XOP-LABEL: out_constant_varx_42:171; CHECK-XOP: # %bb.0:172; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm0173; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1174; CHECK-XOP-NEXT: vpcmov %xmm1, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0175; CHECK-XOP-NEXT: retq176 %x = load <4 x i32>, ptr%px, align 16177 %y = load <4 x i32>, ptr%py, align 16178 %mask = load <4 x i32>, ptr%pmask, align 16179 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>180 %mx = and <4 x i32> %mask, %x181 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>182 %r = or <4 x i32> %mx, %my183 ret <4 x i32> %r184}185 186define <4 x i32> @in_constant_varx_42(ptr%px, ptr%py, ptr%pmask) {187; CHECK-SSE1-LABEL: in_constant_varx_42:188; CHECK-SSE1: # %bb.0:189; CHECK-SSE1-NEXT: movq %rdi, %rax190; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0191; CHECK-SSE1-NEXT: movaps (%rsi), %xmm1192; CHECK-SSE1-NEXT: andps %xmm0, %xmm1193; CHECK-SSE1-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0194; CHECK-SSE1-NEXT: orps %xmm1, %xmm0195; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)196; CHECK-SSE1-NEXT: retq197;198; CHECK-SSE2-LABEL: in_constant_varx_42:199; CHECK-SSE2: # %bb.0:200; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0201; CHECK-SSE2-NEXT: movaps (%rdi), %xmm1202; CHECK-SSE2-NEXT: andps %xmm0, %xmm1203; CHECK-SSE2-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0204; CHECK-SSE2-NEXT: orps %xmm1, %xmm0205; CHECK-SSE2-NEXT: retq206;207; CHECK-XOP-LABEL: in_constant_varx_42:208; CHECK-XOP: # %bb.0:209; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm0210; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1211; CHECK-XOP-NEXT: vpcmov %xmm1, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0212; CHECK-XOP-NEXT: retq213 %x = load <4 x i32>, ptr%px, align 16214 %y = load <4 x i32>, ptr%py, align 16215 %mask = load <4 x i32>, ptr%pmask, align 16216 %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x217 %n1 = and <4 x i32> %n0, %mask218 %r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42>219 ret <4 x i32> %r220}221 222; This is not a canonical form. Testing for completeness only.223define <4 x i32> @out_constant_varx_42_invmask(ptr%px, ptr%py, ptr%pmask) {224; CHECK-SSE1-LABEL: out_constant_varx_42_invmask:225; CHECK-SSE1: # %bb.0:226; CHECK-SSE1-NEXT: movq %rdi, %rax227; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0228; CHECK-SSE1-NEXT: movaps %xmm0, %xmm1229; CHECK-SSE1-NEXT: andnps (%rsi), %xmm1230; CHECK-SSE1-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0231; CHECK-SSE1-NEXT: orps %xmm1, %xmm0232; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)233; CHECK-SSE1-NEXT: retq234;235; CHECK-SSE2-LABEL: out_constant_varx_42_invmask:236; CHECK-SSE2: # %bb.0:237; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0238; CHECK-SSE2-NEXT: movaps %xmm0, %xmm1239; CHECK-SSE2-NEXT: andnps (%rdi), %xmm1240; CHECK-SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0241; CHECK-SSE2-NEXT: orps %xmm1, %xmm0242; CHECK-SSE2-NEXT: retq243;244; CHECK-XOP-LABEL: out_constant_varx_42_invmask:245; CHECK-XOP: # %bb.0:246; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm0247; CHECK-XOP-NEXT: vbroadcastss {{.*#+}} xmm1 = [42,42,42,42]248; CHECK-XOP-NEXT: vpcmov %xmm0, (%rdi), %xmm1, %xmm0249; CHECK-XOP-NEXT: retq250 %x = load <4 x i32>, ptr%px, align 16251 %y = load <4 x i32>, ptr%py, align 16252 %mask = load <4 x i32>, ptr%pmask, align 16253 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>254 %mx = and <4 x i32> %notmask, %x255 %my = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42>256 %r = or <4 x i32> %mx, %my257 ret <4 x i32> %r258}259 260; This is not a canonical form. Testing for completeness only.261define <4 x i32> @in_constant_varx_42_invmask(ptr%px, ptr%py, ptr%pmask) {262; CHECK-SSE1-LABEL: in_constant_varx_42_invmask:263; CHECK-SSE1: # %bb.0:264; CHECK-SSE1-NEXT: movq %rdi, %rax265; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0266; CHECK-SSE1-NEXT: movaps %xmm0, %xmm1267; CHECK-SSE1-NEXT: andnps (%rsi), %xmm1268; CHECK-SSE1-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0269; CHECK-SSE1-NEXT: orps %xmm1, %xmm0270; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)271; CHECK-SSE1-NEXT: retq272;273; CHECK-SSE2-LABEL: in_constant_varx_42_invmask:274; CHECK-SSE2: # %bb.0:275; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0276; CHECK-SSE2-NEXT: movaps %xmm0, %xmm1277; CHECK-SSE2-NEXT: andnps (%rdi), %xmm1278; CHECK-SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0279; CHECK-SSE2-NEXT: orps %xmm1, %xmm0280; CHECK-SSE2-NEXT: retq281;282; CHECK-XOP-LABEL: in_constant_varx_42_invmask:283; CHECK-XOP: # %bb.0:284; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm0285; CHECK-XOP-NEXT: vbroadcastss {{.*#+}} xmm1 = [42,42,42,42]286; CHECK-XOP-NEXT: vpcmov %xmm0, (%rdi), %xmm1, %xmm0287; CHECK-XOP-NEXT: retq288 %x = load <4 x i32>, ptr%px, align 16289 %y = load <4 x i32>, ptr%py, align 16290 %mask = load <4 x i32>, ptr%pmask, align 16291 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>292 %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x293 %n1 = and <4 x i32> %n0, %notmask294 %r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42>295 ret <4 x i32> %r296}297 298define <4 x i32> @out_constant_mone_vary(ptr%px, ptr%py, ptr%pmask) {299; CHECK-SSE1-LABEL: out_constant_mone_vary:300; CHECK-SSE1: # %bb.0:301; CHECK-SSE1-NEXT: movq %rdi, %rax302; CHECK-SSE1-NEXT: movaps (%rdx), %xmm0303; CHECK-SSE1-NEXT: orps (%rcx), %xmm0304; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)305; CHECK-SSE1-NEXT: retq306;307; CHECK-SSE2-LABEL: out_constant_mone_vary:308; CHECK-SSE2: # %bb.0:309; CHECK-SSE2-NEXT: movaps (%rsi), %xmm0310; CHECK-SSE2-NEXT: orps (%rdx), %xmm0311; CHECK-SSE2-NEXT: retq312;313; CHECK-XOP-LABEL: out_constant_mone_vary:314; CHECK-XOP: # %bb.0:315; CHECK-XOP-NEXT: vmovaps (%rsi), %xmm0316; CHECK-XOP-NEXT: vorps (%rdx), %xmm0, %xmm0317; CHECK-XOP-NEXT: retq318 %x = load <4 x i32>, ptr%px, align 16319 %y = load <4 x i32>, ptr%py, align 16320 %mask = load <4 x i32>, ptr%pmask, align 16321 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>322 %mx = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>323 %my = and <4 x i32> %notmask, %y324 %r = or <4 x i32> %mx, %my325 ret <4 x i32> %r326}327 328define <4 x i32> @in_constant_mone_vary(ptr%px, ptr%py, ptr%pmask) {329; CHECK-SSE1-LABEL: in_constant_mone_vary:330; CHECK-SSE1: # %bb.0:331; CHECK-SSE1-NEXT: movq %rdi, %rax332; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0333; CHECK-SSE1-NEXT: orps (%rdx), %xmm0334; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)335; CHECK-SSE1-NEXT: retq336;337; CHECK-SSE2-LABEL: in_constant_mone_vary:338; CHECK-SSE2: # %bb.0:339; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0340; CHECK-SSE2-NEXT: orps (%rsi), %xmm0341; CHECK-SSE2-NEXT: retq342;343; CHECK-XOP-LABEL: in_constant_mone_vary:344; CHECK-XOP: # %bb.0:345; CHECK-XOP-NEXT: vmovaps (%rdx), %xmm0346; CHECK-XOP-NEXT: vorps (%rsi), %xmm0, %xmm0347; CHECK-XOP-NEXT: retq348 %x = load <4 x i32>, ptr%px, align 16349 %y = load <4 x i32>, ptr%py, align 16350 %mask = load <4 x i32>, ptr%pmask, align 16351 %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x352 %n1 = and <4 x i32> %n0, %mask353 %r = xor <4 x i32> %n1, %y354 ret <4 x i32> %r355}356 357; This is not a canonical form. Testing for completeness only.358define <4 x i32> @out_constant_mone_vary_invmask(ptr%px, ptr%py, ptr%pmask) {359; CHECK-SSE1-LABEL: out_constant_mone_vary_invmask:360; CHECK-SSE1: # %bb.0:361; CHECK-SSE1-NEXT: movq %rdi, %rax362; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0363; CHECK-SSE1-NEXT: movaps {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]364; CHECK-SSE1-NEXT: xorps %xmm0, %xmm1365; CHECK-SSE1-NEXT: andps (%rdx), %xmm0366; CHECK-SSE1-NEXT: orps %xmm1, %xmm0367; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)368; CHECK-SSE1-NEXT: retq369;370; CHECK-SSE2-LABEL: out_constant_mone_vary_invmask:371; CHECK-SSE2: # %bb.0:372; CHECK-SSE2-NEXT: movdqa (%rdx), %xmm0373; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm1374; CHECK-SSE2-NEXT: pxor %xmm0, %xmm1375; CHECK-SSE2-NEXT: pand (%rsi), %xmm0376; CHECK-SSE2-NEXT: por %xmm1, %xmm0377; CHECK-SSE2-NEXT: retq378;379; CHECK-XOP-LABEL: out_constant_mone_vary_invmask:380; CHECK-XOP: # %bb.0:381; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm0382; CHECK-XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1383; CHECK-XOP-NEXT: vpxor %xmm1, %xmm0, %xmm1384; CHECK-XOP-NEXT: vpand (%rsi), %xmm0, %xmm0385; CHECK-XOP-NEXT: vpor %xmm0, %xmm1, %xmm0386; CHECK-XOP-NEXT: retq387 %x = load <4 x i32>, ptr%px, align 16388 %y = load <4 x i32>, ptr%py, align 16389 %mask = load <4 x i32>, ptr%pmask, align 16390 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>391 %mx = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>392 %my = and <4 x i32> %mask, %y393 %r = or <4 x i32> %mx, %my394 ret <4 x i32> %r395}396 397; This is not a canonical form. Testing for completeness only.398define <4 x i32> @in_constant_mone_vary_invmask(ptr%px, ptr%py, ptr%pmask) {399; CHECK-SSE1-LABEL: in_constant_mone_vary_invmask:400; CHECK-SSE1: # %bb.0:401; CHECK-SSE1-NEXT: movq %rdi, %rax402; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0403; CHECK-SSE1-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0404; CHECK-SSE1-NEXT: orps (%rdx), %xmm0405; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)406; CHECK-SSE1-NEXT: retq407;408; CHECK-SSE2-LABEL: in_constant_mone_vary_invmask:409; CHECK-SSE2: # %bb.0:410; CHECK-SSE2-NEXT: pcmpeqd %xmm0, %xmm0411; CHECK-SSE2-NEXT: pxor (%rdx), %xmm0412; CHECK-SSE2-NEXT: por (%rsi), %xmm0413; CHECK-SSE2-NEXT: retq414;415; CHECK-XOP-LABEL: in_constant_mone_vary_invmask:416; CHECK-XOP: # %bb.0:417; CHECK-XOP-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0418; CHECK-XOP-NEXT: vpxor (%rdx), %xmm0, %xmm0419; CHECK-XOP-NEXT: vpor (%rsi), %xmm0, %xmm0420; CHECK-XOP-NEXT: retq421 %x = load <4 x i32>, ptr%px, align 16422 %y = load <4 x i32>, ptr%py, align 16423 %mask = load <4 x i32>, ptr%pmask, align 16424 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>425 %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x426 %n1 = and <4 x i32> %n0, %notmask427 %r = xor <4 x i32> %n1, %y428 ret <4 x i32> %r429}430 431define <4 x i32> @out_constant_42_vary(ptr%px, ptr%py, ptr%pmask) {432; CHECK-SSE1-LABEL: out_constant_42_vary:433; CHECK-SSE1: # %bb.0:434; CHECK-SSE1-NEXT: movq %rdi, %rax435; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0436; CHECK-SSE1-NEXT: movaps {{.*#+}} xmm1 = [5.88545355E-44,5.88545355E-44,5.88545355E-44,5.88545355E-44]437; CHECK-SSE1-NEXT: andps %xmm0, %xmm1438; CHECK-SSE1-NEXT: andnps (%rdx), %xmm0439; CHECK-SSE1-NEXT: orps %xmm1, %xmm0440; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)441; CHECK-SSE1-NEXT: retq442;443; CHECK-SSE2-LABEL: out_constant_42_vary:444; CHECK-SSE2: # %bb.0:445; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0446; CHECK-SSE2-NEXT: movaps {{.*#+}} xmm1 = [42,42,42,42]447; CHECK-SSE2-NEXT: andps %xmm0, %xmm1448; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0449; CHECK-SSE2-NEXT: orps %xmm1, %xmm0450; CHECK-SSE2-NEXT: retq451;452; CHECK-XOP-LABEL: out_constant_42_vary:453; CHECK-XOP: # %bb.0:454; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm0455; CHECK-XOP-NEXT: vbroadcastss {{.*#+}} xmm1 = [42,42,42,42]456; CHECK-XOP-NEXT: vpcmov %xmm0, (%rsi), %xmm1, %xmm0457; CHECK-XOP-NEXT: retq458 %x = load <4 x i32>, ptr%px, align 16459 %y = load <4 x i32>, ptr%py, align 16460 %mask = load <4 x i32>, ptr%pmask, align 16461 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>462 %mx = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42>463 %my = and <4 x i32> %notmask, %y464 %r = or <4 x i32> %mx, %my465 ret <4 x i32> %r466}467 468define <4 x i32> @in_constant_42_vary(ptr%px, ptr%py, ptr%pmask) {469; CHECK-SSE1-LABEL: in_constant_42_vary:470; CHECK-SSE1: # %bb.0:471; CHECK-SSE1-NEXT: movq %rdi, %rax472; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0473; CHECK-SSE1-NEXT: movaps %xmm0, %xmm1474; CHECK-SSE1-NEXT: andnps (%rdx), %xmm1475; CHECK-SSE1-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0476; CHECK-SSE1-NEXT: orps %xmm1, %xmm0477; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)478; CHECK-SSE1-NEXT: retq479;480; CHECK-SSE2-LABEL: in_constant_42_vary:481; CHECK-SSE2: # %bb.0:482; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0483; CHECK-SSE2-NEXT: movaps %xmm0, %xmm1484; CHECK-SSE2-NEXT: andnps (%rsi), %xmm1485; CHECK-SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0486; CHECK-SSE2-NEXT: orps %xmm1, %xmm0487; CHECK-SSE2-NEXT: retq488;489; CHECK-XOP-LABEL: in_constant_42_vary:490; CHECK-XOP: # %bb.0:491; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm0492; CHECK-XOP-NEXT: vbroadcastss {{.*#+}} xmm1 = [42,42,42,42]493; CHECK-XOP-NEXT: vpcmov %xmm0, (%rsi), %xmm1, %xmm0494; CHECK-XOP-NEXT: retq495 %x = load <4 x i32>, ptr%px, align 16496 %y = load <4 x i32>, ptr%py, align 16497 %mask = load <4 x i32>, ptr%pmask, align 16498 %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x499 %n1 = and <4 x i32> %n0, %mask500 %r = xor <4 x i32> %n1, %y501 ret <4 x i32> %r502}503 504; This is not a canonical form. Testing for completeness only.505define <4 x i32> @out_constant_42_vary_invmask(ptr%px, ptr%py, ptr%pmask) {506; CHECK-SSE1-LABEL: out_constant_42_vary_invmask:507; CHECK-SSE1: # %bb.0:508; CHECK-SSE1-NEXT: movq %rdi, %rax509; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0510; CHECK-SSE1-NEXT: movaps %xmm0, %xmm1511; CHECK-SSE1-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1512; CHECK-SSE1-NEXT: andps (%rdx), %xmm0513; CHECK-SSE1-NEXT: orps %xmm1, %xmm0514; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)515; CHECK-SSE1-NEXT: retq516;517; CHECK-SSE2-LABEL: out_constant_42_vary_invmask:518; CHECK-SSE2: # %bb.0:519; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0520; CHECK-SSE2-NEXT: movaps %xmm0, %xmm1521; CHECK-SSE2-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1522; CHECK-SSE2-NEXT: andps (%rsi), %xmm0523; CHECK-SSE2-NEXT: orps %xmm1, %xmm0524; CHECK-SSE2-NEXT: retq525;526; CHECK-XOP-LABEL: out_constant_42_vary_invmask:527; CHECK-XOP: # %bb.0:528; CHECK-XOP-NEXT: vmovdqa (%rsi), %xmm0529; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1530; CHECK-XOP-NEXT: vpcmov %xmm1, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0531; CHECK-XOP-NEXT: retq532 %x = load <4 x i32>, ptr%px, align 16533 %y = load <4 x i32>, ptr%py, align 16534 %mask = load <4 x i32>, ptr%pmask, align 16535 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>536 %mx = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>537 %my = and <4 x i32> %mask, %y538 %r = or <4 x i32> %mx, %my539 ret <4 x i32> %r540}541 542; This is not a canonical form. Testing for completeness only.543define <4 x i32> @in_constant_42_vary_invmask(ptr%px, ptr%py, ptr%pmask) {544; CHECK-SSE1-LABEL: in_constant_42_vary_invmask:545; CHECK-SSE1: # %bb.0:546; CHECK-SSE1-NEXT: movq %rdi, %rax547; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0548; CHECK-SSE1-NEXT: movaps (%rdx), %xmm1549; CHECK-SSE1-NEXT: andps %xmm0, %xmm1550; CHECK-SSE1-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0551; CHECK-SSE1-NEXT: orps %xmm1, %xmm0552; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)553; CHECK-SSE1-NEXT: retq554;555; CHECK-SSE2-LABEL: in_constant_42_vary_invmask:556; CHECK-SSE2: # %bb.0:557; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0558; CHECK-SSE2-NEXT: movaps (%rsi), %xmm1559; CHECK-SSE2-NEXT: andps %xmm0, %xmm1560; CHECK-SSE2-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0561; CHECK-SSE2-NEXT: orps %xmm1, %xmm0562; CHECK-SSE2-NEXT: retq563;564; CHECK-XOP-LABEL: in_constant_42_vary_invmask:565; CHECK-XOP: # %bb.0:566; CHECK-XOP-NEXT: vmovdqa (%rsi), %xmm0567; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1568; CHECK-XOP-NEXT: vpcmov %xmm1, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0569; CHECK-XOP-NEXT: retq570 %x = load <4 x i32>, ptr%px, align 16571 %y = load <4 x i32>, ptr%py, align 16572 %mask = load <4 x i32>, ptr%pmask, align 16573 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>574 %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x575 %n1 = and <4 x i32> %n0, %notmask576 %r = xor <4 x i32> %n1, %y577 ret <4 x i32> %r578}579