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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-sse,-sse2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-BASELINE3; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,-sse2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE14; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE25; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+xop < %s | FileCheck %s --check-prefixes=CHECK,CHECK-XOP6 7; https://bugs.llvm.org/show_bug.cgi?id=371048 9; All the advanced stuff (negative tests, commutativity) is handled in the10; scalar version of the test only.11 12; ============================================================================ ;13; 8-bit vector width14; ============================================================================ ;15 16define <1 x i8> @out_v1i8(<1 x i8> %x, <1 x i8> %y, <1 x i8> %mask) nounwind {17; CHECK-LABEL: out_v1i8:18; CHECK: # %bb.0:19; CHECK-NEXT: movl %edi, %eax20; CHECK-NEXT: xorl %esi, %eax21; CHECK-NEXT: andl %edx, %eax22; CHECK-NEXT: xorl %esi, %eax23; CHECK-NEXT: # kill: def $al killed $al killed $eax24; CHECK-NEXT: retq25 %mx = and <1 x i8> %x, %mask26 %notmask = xor <1 x i8> %mask, <i8 -1>27 %my = and <1 x i8> %y, %notmask28 %r = or <1 x i8> %mx, %my29 ret <1 x i8> %r30}31 32; ============================================================================ ;33; 16-bit vector width34; ============================================================================ ;35 36define <2 x i8> @out_v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> %mask) nounwind {37; CHECK-BASELINE-LABEL: out_v2i8:38; CHECK-BASELINE: # %bb.0:39; CHECK-BASELINE-NEXT: movl %edi, %eax40; CHECK-BASELINE-NEXT: xorl %edx, %eax41; CHECK-BASELINE-NEXT: andl %r8d, %eax42; CHECK-BASELINE-NEXT: xorl %edx, %eax43; CHECK-BASELINE-NEXT: xorl %ecx, %esi44; CHECK-BASELINE-NEXT: andl %r9d, %esi45; CHECK-BASELINE-NEXT: xorl %ecx, %esi46; CHECK-BASELINE-NEXT: # kill: def $al killed $al killed $eax47; CHECK-BASELINE-NEXT: movl %esi, %edx48; CHECK-BASELINE-NEXT: retq49;50; CHECK-SSE1-LABEL: out_v2i8:51; CHECK-SSE1: # %bb.0:52; CHECK-SSE1-NEXT: movl %edi, %eax53; CHECK-SSE1-NEXT: xorl %edx, %eax54; CHECK-SSE1-NEXT: andl %r8d, %eax55; CHECK-SSE1-NEXT: xorl %edx, %eax56; CHECK-SSE1-NEXT: xorl %ecx, %esi57; CHECK-SSE1-NEXT: andl %r9d, %esi58; CHECK-SSE1-NEXT: xorl %ecx, %esi59; CHECK-SSE1-NEXT: # kill: def $al killed $al killed $eax60; CHECK-SSE1-NEXT: movl %esi, %edx61; CHECK-SSE1-NEXT: retq62;63; CHECK-SSE2-LABEL: out_v2i8:64; CHECK-SSE2: # %bb.0:65; CHECK-SSE2-NEXT: andps %xmm2, %xmm066; CHECK-SSE2-NEXT: andnps %xmm1, %xmm267; CHECK-SSE2-NEXT: orps %xmm2, %xmm068; CHECK-SSE2-NEXT: retq69;70; CHECK-XOP-LABEL: out_v2i8:71; CHECK-XOP: # %bb.0:72; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm073; CHECK-XOP-NEXT: retq74 %mx = and <2 x i8> %x, %mask75 %notmask = xor <2 x i8> %mask, <i8 -1, i8 -1>76 %my = and <2 x i8> %y, %notmask77 %r = or <2 x i8> %mx, %my78 ret <2 x i8> %r79}80 81define <1 x i16> @out_v1i16(<1 x i16> %x, <1 x i16> %y, <1 x i16> %mask) nounwind {82; CHECK-LABEL: out_v1i16:83; CHECK: # %bb.0:84; CHECK-NEXT: movl %edi, %eax85; CHECK-NEXT: xorl %esi, %eax86; CHECK-NEXT: andl %edx, %eax87; CHECK-NEXT: xorl %esi, %eax88; CHECK-NEXT: # kill: def $ax killed $ax killed $eax89; CHECK-NEXT: retq90 %mx = and <1 x i16> %x, %mask91 %notmask = xor <1 x i16> %mask, <i16 -1>92 %my = and <1 x i16> %y, %notmask93 %r = or <1 x i16> %mx, %my94 ret <1 x i16> %r95}96 97; ============================================================================ ;98; 32-bit vector width99; ============================================================================ ;100 101define <4 x i8> @out_v4i8(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind {102; CHECK-BASELINE-LABEL: out_v4i8:103; CHECK-BASELINE: # %bb.0:104; CHECK-BASELINE-NEXT: movq %rdi, %rax105; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edi106; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d107; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d108; CHECK-BASELINE-NEXT: xorl %r9d, %esi109; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil110; CHECK-BASELINE-NEXT: xorb %r9b, %sil111; CHECK-BASELINE-NEXT: xorb %r11b, %dl112; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl113; CHECK-BASELINE-NEXT: xorb %r11b, %dl114; CHECK-BASELINE-NEXT: xorb %r10b, %cl115; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl116; CHECK-BASELINE-NEXT: xorb %r10b, %cl117; CHECK-BASELINE-NEXT: xorb %dil, %r8b118; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b119; CHECK-BASELINE-NEXT: xorb %dil, %r8b120; CHECK-BASELINE-NEXT: movb %r8b, 3(%rax)121; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)122; CHECK-BASELINE-NEXT: movb %dl, 1(%rax)123; CHECK-BASELINE-NEXT: movb %sil, (%rax)124; CHECK-BASELINE-NEXT: retq125;126; CHECK-SSE1-LABEL: out_v4i8:127; CHECK-SSE1: # %bb.0:128; CHECK-SSE1-NEXT: movq %rdi, %rax129; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edi130; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d131; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d132; CHECK-SSE1-NEXT: xorl %r9d, %esi133; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil134; CHECK-SSE1-NEXT: xorb %r9b, %sil135; CHECK-SSE1-NEXT: xorb %r11b, %dl136; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl137; CHECK-SSE1-NEXT: xorb %r11b, %dl138; CHECK-SSE1-NEXT: xorb %r10b, %cl139; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl140; CHECK-SSE1-NEXT: xorb %r10b, %cl141; CHECK-SSE1-NEXT: xorb %dil, %r8b142; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b143; CHECK-SSE1-NEXT: xorb %dil, %r8b144; CHECK-SSE1-NEXT: movb %r8b, 3(%rax)145; CHECK-SSE1-NEXT: movb %cl, 2(%rax)146; CHECK-SSE1-NEXT: movb %dl, 1(%rax)147; CHECK-SSE1-NEXT: movb %sil, (%rax)148; CHECK-SSE1-NEXT: retq149;150; CHECK-SSE2-LABEL: out_v4i8:151; CHECK-SSE2: # %bb.0:152; CHECK-SSE2-NEXT: andps %xmm2, %xmm0153; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2154; CHECK-SSE2-NEXT: orps %xmm2, %xmm0155; CHECK-SSE2-NEXT: retq156;157; CHECK-XOP-LABEL: out_v4i8:158; CHECK-XOP: # %bb.0:159; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0160; CHECK-XOP-NEXT: retq161 %mx = and <4 x i8> %x, %mask162 %notmask = xor <4 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1>163 %my = and <4 x i8> %y, %notmask164 %r = or <4 x i8> %mx, %my165 ret <4 x i8> %r166}167 168define <4 x i8> @out_v4i8_undef(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind {169; CHECK-BASELINE-LABEL: out_v4i8_undef:170; CHECK-BASELINE: # %bb.0:171; CHECK-BASELINE-NEXT: movq %rdi, %rax172; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edi173; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d174; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl175; CHECK-BASELINE-NEXT: xorl %r9d, %esi176; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil177; CHECK-BASELINE-NEXT: xorb %r9b, %sil178; CHECK-BASELINE-NEXT: xorb %r10b, %dl179; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl180; CHECK-BASELINE-NEXT: xorb %r10b, %dl181; CHECK-BASELINE-NEXT: xorb %dil, %r8b182; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b183; CHECK-BASELINE-NEXT: xorb %dil, %r8b184; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)185; CHECK-BASELINE-NEXT: movb %r8b, 3(%rax)186; CHECK-BASELINE-NEXT: movb %dl, 1(%rax)187; CHECK-BASELINE-NEXT: movb %sil, (%rax)188; CHECK-BASELINE-NEXT: retq189;190; CHECK-SSE1-LABEL: out_v4i8_undef:191; CHECK-SSE1: # %bb.0:192; CHECK-SSE1-NEXT: movq %rdi, %rax193; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edi194; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d195; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl196; CHECK-SSE1-NEXT: xorl %r9d, %esi197; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil198; CHECK-SSE1-NEXT: xorb %r9b, %sil199; CHECK-SSE1-NEXT: xorb %r10b, %dl200; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl201; CHECK-SSE1-NEXT: xorb %r10b, %dl202; CHECK-SSE1-NEXT: xorb %dil, %r8b203; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b204; CHECK-SSE1-NEXT: xorb %dil, %r8b205; CHECK-SSE1-NEXT: movb %cl, 2(%rax)206; CHECK-SSE1-NEXT: movb %r8b, 3(%rax)207; CHECK-SSE1-NEXT: movb %dl, 1(%rax)208; CHECK-SSE1-NEXT: movb %sil, (%rax)209; CHECK-SSE1-NEXT: retq210;211; CHECK-SSE2-LABEL: out_v4i8_undef:212; CHECK-SSE2: # %bb.0:213; CHECK-SSE2-NEXT: andps %xmm2, %xmm0214; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2215; CHECK-SSE2-NEXT: orps %xmm2, %xmm0216; CHECK-SSE2-NEXT: retq217;218; CHECK-XOP-LABEL: out_v4i8_undef:219; CHECK-XOP: # %bb.0:220; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0221; CHECK-XOP-NEXT: retq222 %mx = and <4 x i8> %x, %mask223 %notmask = xor <4 x i8> %mask, <i8 -1, i8 -1, i8 undef, i8 -1>224 %my = and <4 x i8> %y, %notmask225 %r = or <4 x i8> %mx, %my226 ret <4 x i8> %r227}228 229define <2 x i16> @out_v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> %mask) nounwind {230; CHECK-BASELINE-LABEL: out_v2i16:231; CHECK-BASELINE: # %bb.0:232; CHECK-BASELINE-NEXT: movl %edi, %eax233; CHECK-BASELINE-NEXT: xorl %edx, %eax234; CHECK-BASELINE-NEXT: andl %r8d, %eax235; CHECK-BASELINE-NEXT: xorl %edx, %eax236; CHECK-BASELINE-NEXT: xorl %ecx, %esi237; CHECK-BASELINE-NEXT: andl %r9d, %esi238; CHECK-BASELINE-NEXT: xorl %ecx, %esi239; CHECK-BASELINE-NEXT: # kill: def $ax killed $ax killed $eax240; CHECK-BASELINE-NEXT: movl %esi, %edx241; CHECK-BASELINE-NEXT: retq242;243; CHECK-SSE1-LABEL: out_v2i16:244; CHECK-SSE1: # %bb.0:245; CHECK-SSE1-NEXT: movl %edi, %eax246; CHECK-SSE1-NEXT: xorl %edx, %eax247; CHECK-SSE1-NEXT: andl %r8d, %eax248; CHECK-SSE1-NEXT: xorl %edx, %eax249; CHECK-SSE1-NEXT: xorl %ecx, %esi250; CHECK-SSE1-NEXT: andl %r9d, %esi251; CHECK-SSE1-NEXT: xorl %ecx, %esi252; CHECK-SSE1-NEXT: # kill: def $ax killed $ax killed $eax253; CHECK-SSE1-NEXT: movl %esi, %edx254; CHECK-SSE1-NEXT: retq255;256; CHECK-SSE2-LABEL: out_v2i16:257; CHECK-SSE2: # %bb.0:258; CHECK-SSE2-NEXT: andps %xmm2, %xmm0259; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2260; CHECK-SSE2-NEXT: orps %xmm2, %xmm0261; CHECK-SSE2-NEXT: retq262;263; CHECK-XOP-LABEL: out_v2i16:264; CHECK-XOP: # %bb.0:265; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0266; CHECK-XOP-NEXT: retq267 %mx = and <2 x i16> %x, %mask268 %notmask = xor <2 x i16> %mask, <i16 -1, i16 -1>269 %my = and <2 x i16> %y, %notmask270 %r = or <2 x i16> %mx, %my271 ret <2 x i16> %r272}273 274define <1 x i32> @out_v1i32(<1 x i32> %x, <1 x i32> %y, <1 x i32> %mask) nounwind {275; CHECK-LABEL: out_v1i32:276; CHECK: # %bb.0:277; CHECK-NEXT: movl %edi, %eax278; CHECK-NEXT: xorl %esi, %eax279; CHECK-NEXT: andl %edx, %eax280; CHECK-NEXT: xorl %esi, %eax281; CHECK-NEXT: retq282 %mx = and <1 x i32> %x, %mask283 %notmask = xor <1 x i32> %mask, <i32 -1>284 %my = and <1 x i32> %y, %notmask285 %r = or <1 x i32> %mx, %my286 ret <1 x i32> %r287}288 289; ============================================================================ ;290; 64-bit vector width291; ============================================================================ ;292 293define <8 x i8> @out_v8i8(<8 x i8> %x, <8 x i8> %y, <8 x i8> %mask) nounwind {294; CHECK-BASELINE-LABEL: out_v8i8:295; CHECK-BASELINE: # %bb.0:296; CHECK-BASELINE-NEXT: pushq %rbp297; CHECK-BASELINE-NEXT: pushq %r15298; CHECK-BASELINE-NEXT: pushq %r14299; CHECK-BASELINE-NEXT: pushq %r12300; CHECK-BASELINE-NEXT: pushq %rbx301; CHECK-BASELINE-NEXT: movq %rdi, %rax302; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edi303; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d304; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d305; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx306; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp307; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d308; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d309; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d310; CHECK-BASELINE-NEXT: xorb %r12b, %sil311; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil312; CHECK-BASELINE-NEXT: xorb %r12b, %sil313; CHECK-BASELINE-NEXT: xorb %r15b, %dl314; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl315; CHECK-BASELINE-NEXT: xorb %r15b, %dl316; CHECK-BASELINE-NEXT: xorb %r14b, %cl317; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl318; CHECK-BASELINE-NEXT: xorb %r14b, %cl319; CHECK-BASELINE-NEXT: xorb %bpl, %r8b320; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b321; CHECK-BASELINE-NEXT: xorb %bpl, %r8b322; CHECK-BASELINE-NEXT: xorb %bl, %r9b323; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r9b324; CHECK-BASELINE-NEXT: xorb %bl, %r9b325; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx326; CHECK-BASELINE-NEXT: xorb %r11b, %bl327; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl328; CHECK-BASELINE-NEXT: xorb %r11b, %bl329; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d330; CHECK-BASELINE-NEXT: xorb %r10b, %r11b331; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b332; CHECK-BASELINE-NEXT: xorb %r10b, %r11b333; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d334; CHECK-BASELINE-NEXT: xorb %dil, %r10b335; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b336; CHECK-BASELINE-NEXT: xorb %dil, %r10b337; CHECK-BASELINE-NEXT: movb %r10b, 7(%rax)338; CHECK-BASELINE-NEXT: movb %r11b, 6(%rax)339; CHECK-BASELINE-NEXT: movb %bl, 5(%rax)340; CHECK-BASELINE-NEXT: movb %r9b, 4(%rax)341; CHECK-BASELINE-NEXT: movb %r8b, 3(%rax)342; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)343; CHECK-BASELINE-NEXT: movb %dl, 1(%rax)344; CHECK-BASELINE-NEXT: movb %sil, (%rax)345; CHECK-BASELINE-NEXT: popq %rbx346; CHECK-BASELINE-NEXT: popq %r12347; CHECK-BASELINE-NEXT: popq %r14348; CHECK-BASELINE-NEXT: popq %r15349; CHECK-BASELINE-NEXT: popq %rbp350; CHECK-BASELINE-NEXT: retq351;352; CHECK-SSE1-LABEL: out_v8i8:353; CHECK-SSE1: # %bb.0:354; CHECK-SSE1-NEXT: pushq %rbp355; CHECK-SSE1-NEXT: pushq %r15356; CHECK-SSE1-NEXT: pushq %r14357; CHECK-SSE1-NEXT: pushq %r12358; CHECK-SSE1-NEXT: pushq %rbx359; CHECK-SSE1-NEXT: movq %rdi, %rax360; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edi361; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d362; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d363; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx364; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp365; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d366; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d367; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d368; CHECK-SSE1-NEXT: xorb %r12b, %sil369; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil370; CHECK-SSE1-NEXT: xorb %r12b, %sil371; CHECK-SSE1-NEXT: xorb %r15b, %dl372; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl373; CHECK-SSE1-NEXT: xorb %r15b, %dl374; CHECK-SSE1-NEXT: xorb %r14b, %cl375; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl376; CHECK-SSE1-NEXT: xorb %r14b, %cl377; CHECK-SSE1-NEXT: xorb %bpl, %r8b378; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b379; CHECK-SSE1-NEXT: xorb %bpl, %r8b380; CHECK-SSE1-NEXT: xorb %bl, %r9b381; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r9b382; CHECK-SSE1-NEXT: xorb %bl, %r9b383; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx384; CHECK-SSE1-NEXT: xorb %r11b, %bl385; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl386; CHECK-SSE1-NEXT: xorb %r11b, %bl387; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d388; CHECK-SSE1-NEXT: xorb %r10b, %r11b389; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b390; CHECK-SSE1-NEXT: xorb %r10b, %r11b391; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d392; CHECK-SSE1-NEXT: xorb %dil, %r10b393; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b394; CHECK-SSE1-NEXT: xorb %dil, %r10b395; CHECK-SSE1-NEXT: movb %r10b, 7(%rax)396; CHECK-SSE1-NEXT: movb %r11b, 6(%rax)397; CHECK-SSE1-NEXT: movb %bl, 5(%rax)398; CHECK-SSE1-NEXT: movb %r9b, 4(%rax)399; CHECK-SSE1-NEXT: movb %r8b, 3(%rax)400; CHECK-SSE1-NEXT: movb %cl, 2(%rax)401; CHECK-SSE1-NEXT: movb %dl, 1(%rax)402; CHECK-SSE1-NEXT: movb %sil, (%rax)403; CHECK-SSE1-NEXT: popq %rbx404; CHECK-SSE1-NEXT: popq %r12405; CHECK-SSE1-NEXT: popq %r14406; CHECK-SSE1-NEXT: popq %r15407; CHECK-SSE1-NEXT: popq %rbp408; CHECK-SSE1-NEXT: retq409;410; CHECK-SSE2-LABEL: out_v8i8:411; CHECK-SSE2: # %bb.0:412; CHECK-SSE2-NEXT: andps %xmm2, %xmm0413; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2414; CHECK-SSE2-NEXT: orps %xmm2, %xmm0415; CHECK-SSE2-NEXT: retq416;417; CHECK-XOP-LABEL: out_v8i8:418; CHECK-XOP: # %bb.0:419; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0420; CHECK-XOP-NEXT: retq421 %mx = and <8 x i8> %x, %mask422 %notmask = xor <8 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>423 %my = and <8 x i8> %y, %notmask424 %r = or <8 x i8> %mx, %my425 ret <8 x i8> %r426}427 428define <4 x i16> @out_v4i16(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwind {429; CHECK-BASELINE-LABEL: out_v4i16:430; CHECK-BASELINE: # %bb.0:431; CHECK-BASELINE-NEXT: movq %rdi, %rax432; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi433; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d434; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d435; CHECK-BASELINE-NEXT: xorl %r9d, %esi436; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si437; CHECK-BASELINE-NEXT: xorl %r9d, %esi438; CHECK-BASELINE-NEXT: xorl %r11d, %edx439; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx440; CHECK-BASELINE-NEXT: xorl %r11d, %edx441; CHECK-BASELINE-NEXT: xorl %r10d, %ecx442; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx443; CHECK-BASELINE-NEXT: xorl %r10d, %ecx444; CHECK-BASELINE-NEXT: xorl %edi, %r8d445; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w446; CHECK-BASELINE-NEXT: xorl %edi, %r8d447; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)448; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)449; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)450; CHECK-BASELINE-NEXT: movw %si, (%rax)451; CHECK-BASELINE-NEXT: retq452;453; CHECK-SSE1-LABEL: out_v4i16:454; CHECK-SSE1: # %bb.0:455; CHECK-SSE1-NEXT: movq %rdi, %rax456; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi457; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d458; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d459; CHECK-SSE1-NEXT: xorl %r9d, %esi460; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si461; CHECK-SSE1-NEXT: xorl %r9d, %esi462; CHECK-SSE1-NEXT: xorl %r11d, %edx463; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx464; CHECK-SSE1-NEXT: xorl %r11d, %edx465; CHECK-SSE1-NEXT: xorl %r10d, %ecx466; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx467; CHECK-SSE1-NEXT: xorl %r10d, %ecx468; CHECK-SSE1-NEXT: xorl %edi, %r8d469; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w470; CHECK-SSE1-NEXT: xorl %edi, %r8d471; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)472; CHECK-SSE1-NEXT: movw %cx, 4(%rax)473; CHECK-SSE1-NEXT: movw %dx, 2(%rax)474; CHECK-SSE1-NEXT: movw %si, (%rax)475; CHECK-SSE1-NEXT: retq476;477; CHECK-SSE2-LABEL: out_v4i16:478; CHECK-SSE2: # %bb.0:479; CHECK-SSE2-NEXT: andps %xmm2, %xmm0480; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2481; CHECK-SSE2-NEXT: orps %xmm2, %xmm0482; CHECK-SSE2-NEXT: retq483;484; CHECK-XOP-LABEL: out_v4i16:485; CHECK-XOP: # %bb.0:486; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0487; CHECK-XOP-NEXT: retq488 %mx = and <4 x i16> %x, %mask489 %notmask = xor <4 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1>490 %my = and <4 x i16> %y, %notmask491 %r = or <4 x i16> %mx, %my492 ret <4 x i16> %r493}494 495define <4 x i16> @out_v4i16_undef(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwind {496; CHECK-BASELINE-LABEL: out_v4i16_undef:497; CHECK-BASELINE: # %bb.0:498; CHECK-BASELINE-NEXT: movq %rdi, %rax499; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi500; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d501; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx502; CHECK-BASELINE-NEXT: xorl %r9d, %esi503; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si504; CHECK-BASELINE-NEXT: xorl %r9d, %esi505; CHECK-BASELINE-NEXT: xorl %r10d, %edx506; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx507; CHECK-BASELINE-NEXT: xorl %r10d, %edx508; CHECK-BASELINE-NEXT: xorl %edi, %r8d509; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w510; CHECK-BASELINE-NEXT: xorl %edi, %r8d511; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)512; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)513; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)514; CHECK-BASELINE-NEXT: movw %si, (%rax)515; CHECK-BASELINE-NEXT: retq516;517; CHECK-SSE1-LABEL: out_v4i16_undef:518; CHECK-SSE1: # %bb.0:519; CHECK-SSE1-NEXT: movq %rdi, %rax520; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi521; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d522; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx523; CHECK-SSE1-NEXT: xorl %r9d, %esi524; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si525; CHECK-SSE1-NEXT: xorl %r9d, %esi526; CHECK-SSE1-NEXT: xorl %r10d, %edx527; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx528; CHECK-SSE1-NEXT: xorl %r10d, %edx529; CHECK-SSE1-NEXT: xorl %edi, %r8d530; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w531; CHECK-SSE1-NEXT: xorl %edi, %r8d532; CHECK-SSE1-NEXT: movw %cx, 4(%rax)533; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)534; CHECK-SSE1-NEXT: movw %dx, 2(%rax)535; CHECK-SSE1-NEXT: movw %si, (%rax)536; CHECK-SSE1-NEXT: retq537;538; CHECK-SSE2-LABEL: out_v4i16_undef:539; CHECK-SSE2: # %bb.0:540; CHECK-SSE2-NEXT: andps %xmm2, %xmm0541; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2542; CHECK-SSE2-NEXT: orps %xmm2, %xmm0543; CHECK-SSE2-NEXT: retq544;545; CHECK-XOP-LABEL: out_v4i16_undef:546; CHECK-XOP: # %bb.0:547; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0548; CHECK-XOP-NEXT: retq549 %mx = and <4 x i16> %x, %mask550 %notmask = xor <4 x i16> %mask, <i16 -1, i16 -1, i16 undef, i16 -1>551 %my = and <4 x i16> %y, %notmask552 %r = or <4 x i16> %mx, %my553 ret <4 x i16> %r554}555 556define <2 x i32> @out_v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> %mask) nounwind {557; CHECK-BASELINE-LABEL: out_v2i32:558; CHECK-BASELINE: # %bb.0:559; CHECK-BASELINE-NEXT: movl %edi, %eax560; CHECK-BASELINE-NEXT: xorl %edx, %eax561; CHECK-BASELINE-NEXT: andl %r8d, %eax562; CHECK-BASELINE-NEXT: xorl %edx, %eax563; CHECK-BASELINE-NEXT: xorl %ecx, %esi564; CHECK-BASELINE-NEXT: andl %r9d, %esi565; CHECK-BASELINE-NEXT: xorl %ecx, %esi566; CHECK-BASELINE-NEXT: movl %esi, %edx567; CHECK-BASELINE-NEXT: retq568;569; CHECK-SSE1-LABEL: out_v2i32:570; CHECK-SSE1: # %bb.0:571; CHECK-SSE1-NEXT: movl %edi, %eax572; CHECK-SSE1-NEXT: xorl %edx, %eax573; CHECK-SSE1-NEXT: andl %r8d, %eax574; CHECK-SSE1-NEXT: xorl %edx, %eax575; CHECK-SSE1-NEXT: xorl %ecx, %esi576; CHECK-SSE1-NEXT: andl %r9d, %esi577; CHECK-SSE1-NEXT: xorl %ecx, %esi578; CHECK-SSE1-NEXT: movl %esi, %edx579; CHECK-SSE1-NEXT: retq580;581; CHECK-SSE2-LABEL: out_v2i32:582; CHECK-SSE2: # %bb.0:583; CHECK-SSE2-NEXT: andps %xmm2, %xmm0584; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2585; CHECK-SSE2-NEXT: orps %xmm2, %xmm0586; CHECK-SSE2-NEXT: retq587;588; CHECK-XOP-LABEL: out_v2i32:589; CHECK-XOP: # %bb.0:590; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0591; CHECK-XOP-NEXT: retq592 %mx = and <2 x i32> %x, %mask593 %notmask = xor <2 x i32> %mask, <i32 -1, i32 -1>594 %my = and <2 x i32> %y, %notmask595 %r = or <2 x i32> %mx, %my596 ret <2 x i32> %r597}598 599define <1 x i64> @out_v1i64(<1 x i64> %x, <1 x i64> %y, <1 x i64> %mask) nounwind {600; CHECK-LABEL: out_v1i64:601; CHECK: # %bb.0:602; CHECK-NEXT: movq %rdi, %rax603; CHECK-NEXT: xorq %rsi, %rax604; CHECK-NEXT: andq %rdx, %rax605; CHECK-NEXT: xorq %rsi, %rax606; CHECK-NEXT: retq607 %mx = and <1 x i64> %x, %mask608 %notmask = xor <1 x i64> %mask, <i64 -1>609 %my = and <1 x i64> %y, %notmask610 %r = or <1 x i64> %mx, %my611 ret <1 x i64> %r612}613 614; ============================================================================ ;615; 128-bit vector width616; ============================================================================ ;617 618define <16 x i8> @out_v16i8(<16 x i8> %x, <16 x i8> %y, <16 x i8> %mask) nounwind {619; CHECK-BASELINE-LABEL: out_v16i8:620; CHECK-BASELINE: # %bb.0:621; CHECK-BASELINE-NEXT: pushq %rbp622; CHECK-BASELINE-NEXT: pushq %r15623; CHECK-BASELINE-NEXT: pushq %r14624; CHECK-BASELINE-NEXT: pushq %r13625; CHECK-BASELINE-NEXT: pushq %r12626; CHECK-BASELINE-NEXT: pushq %rbx627; CHECK-BASELINE-NEXT: movl %edx, %r11d628; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d629; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d630; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp631; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d632; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d633; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx634; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax635; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edx636; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d637; CHECK-BASELINE-NEXT: xorb %r10b, %sil638; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil639; CHECK-BASELINE-NEXT: xorb %r10b, %sil640; CHECK-BASELINE-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill641; CHECK-BASELINE-NEXT: xorb %dl, %r11b642; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b643; CHECK-BASELINE-NEXT: xorb %dl, %r11b644; CHECK-BASELINE-NEXT: xorb %al, %cl645; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl646; CHECK-BASELINE-NEXT: xorb %al, %cl647; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill648; CHECK-BASELINE-NEXT: xorb %bl, %r8b649; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b650; CHECK-BASELINE-NEXT: xorb %bl, %r8b651; CHECK-BASELINE-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill652; CHECK-BASELINE-NEXT: xorb %r14b, %r9b653; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r9b654; CHECK-BASELINE-NEXT: xorb %r14b, %r9b655; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d656; CHECK-BASELINE-NEXT: xorb %r12b, %r14b657; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r14b658; CHECK-BASELINE-NEXT: xorb %r12b, %r14b659; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d660; CHECK-BASELINE-NEXT: xorb %bpl, %r12b661; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r12b662; CHECK-BASELINE-NEXT: xorb %bpl, %r12b663; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %esi664; CHECK-BASELINE-NEXT: xorb %r15b, %sil665; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil666; CHECK-BASELINE-NEXT: xorb %r15b, %sil667; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edx668; CHECK-BASELINE-NEXT: xorb %r13b, %dl669; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl670; CHECK-BASELINE-NEXT: xorb %r13b, %dl671; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx672; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax673; CHECK-BASELINE-NEXT: xorb %al, %cl674; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl675; CHECK-BASELINE-NEXT: xorb %al, %cl676; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d677; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax678; CHECK-BASELINE-NEXT: xorb %al, %r13b679; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r13b680; CHECK-BASELINE-NEXT: xorb %al, %r13b681; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d682; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax683; CHECK-BASELINE-NEXT: xorb %al, %r15b684; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r15b685; CHECK-BASELINE-NEXT: xorb %al, %r15b686; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp687; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax688; CHECK-BASELINE-NEXT: xorb %al, %bpl689; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bpl690; CHECK-BASELINE-NEXT: xorb %al, %bpl691; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx692; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax693; CHECK-BASELINE-NEXT: xorb %al, %bl694; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl695; CHECK-BASELINE-NEXT: xorb %al, %bl696; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax697; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d698; CHECK-BASELINE-NEXT: xorb %r8b, %al699; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %al700; CHECK-BASELINE-NEXT: xorb %r8b, %al701; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d702; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d703; CHECK-BASELINE-NEXT: xorb %r8b, %r10b704; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b705; CHECK-BASELINE-NEXT: xorb %r8b, %r10b706; CHECK-BASELINE-NEXT: movb %r10b, 15(%rdi)707; CHECK-BASELINE-NEXT: movb %al, 14(%rdi)708; CHECK-BASELINE-NEXT: movb %bl, 13(%rdi)709; CHECK-BASELINE-NEXT: movb %bpl, 12(%rdi)710; CHECK-BASELINE-NEXT: movb %r15b, 11(%rdi)711; CHECK-BASELINE-NEXT: movb %r13b, 10(%rdi)712; CHECK-BASELINE-NEXT: movb %cl, 9(%rdi)713; CHECK-BASELINE-NEXT: movb %dl, 8(%rdi)714; CHECK-BASELINE-NEXT: movb %sil, 7(%rdi)715; CHECK-BASELINE-NEXT: movb %r12b, 6(%rdi)716; CHECK-BASELINE-NEXT: movb %r14b, 5(%rdi)717; CHECK-BASELINE-NEXT: movb %r9b, 4(%rdi)718; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload719; CHECK-BASELINE-NEXT: movb %al, 3(%rdi)720; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload721; CHECK-BASELINE-NEXT: movb %al, 2(%rdi)722; CHECK-BASELINE-NEXT: movb %r11b, 1(%rdi)723; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload724; CHECK-BASELINE-NEXT: movb %al, (%rdi)725; CHECK-BASELINE-NEXT: movq %rdi, %rax726; CHECK-BASELINE-NEXT: popq %rbx727; CHECK-BASELINE-NEXT: popq %r12728; CHECK-BASELINE-NEXT: popq %r13729; CHECK-BASELINE-NEXT: popq %r14730; CHECK-BASELINE-NEXT: popq %r15731; CHECK-BASELINE-NEXT: popq %rbp732; CHECK-BASELINE-NEXT: retq733;734; CHECK-SSE1-LABEL: out_v16i8:735; CHECK-SSE1: # %bb.0:736; CHECK-SSE1-NEXT: pushq %rbp737; CHECK-SSE1-NEXT: pushq %r15738; CHECK-SSE1-NEXT: pushq %r14739; CHECK-SSE1-NEXT: pushq %r13740; CHECK-SSE1-NEXT: pushq %r12741; CHECK-SSE1-NEXT: pushq %rbx742; CHECK-SSE1-NEXT: movl %edx, %r11d743; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d744; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d745; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp746; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d747; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d748; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx749; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax750; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edx751; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d752; CHECK-SSE1-NEXT: xorb %r10b, %sil753; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil754; CHECK-SSE1-NEXT: xorb %r10b, %sil755; CHECK-SSE1-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill756; CHECK-SSE1-NEXT: xorb %dl, %r11b757; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b758; CHECK-SSE1-NEXT: xorb %dl, %r11b759; CHECK-SSE1-NEXT: xorb %al, %cl760; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl761; CHECK-SSE1-NEXT: xorb %al, %cl762; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill763; CHECK-SSE1-NEXT: xorb %bl, %r8b764; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b765; CHECK-SSE1-NEXT: xorb %bl, %r8b766; CHECK-SSE1-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill767; CHECK-SSE1-NEXT: xorb %r14b, %r9b768; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r9b769; CHECK-SSE1-NEXT: xorb %r14b, %r9b770; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d771; CHECK-SSE1-NEXT: xorb %r12b, %r14b772; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r14b773; CHECK-SSE1-NEXT: xorb %r12b, %r14b774; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d775; CHECK-SSE1-NEXT: xorb %bpl, %r12b776; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r12b777; CHECK-SSE1-NEXT: xorb %bpl, %r12b778; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %esi779; CHECK-SSE1-NEXT: xorb %r15b, %sil780; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil781; CHECK-SSE1-NEXT: xorb %r15b, %sil782; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edx783; CHECK-SSE1-NEXT: xorb %r13b, %dl784; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl785; CHECK-SSE1-NEXT: xorb %r13b, %dl786; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx787; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax788; CHECK-SSE1-NEXT: xorb %al, %cl789; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl790; CHECK-SSE1-NEXT: xorb %al, %cl791; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d792; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax793; CHECK-SSE1-NEXT: xorb %al, %r13b794; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r13b795; CHECK-SSE1-NEXT: xorb %al, %r13b796; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d797; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax798; CHECK-SSE1-NEXT: xorb %al, %r15b799; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r15b800; CHECK-SSE1-NEXT: xorb %al, %r15b801; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp802; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax803; CHECK-SSE1-NEXT: xorb %al, %bpl804; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bpl805; CHECK-SSE1-NEXT: xorb %al, %bpl806; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx807; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax808; CHECK-SSE1-NEXT: xorb %al, %bl809; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl810; CHECK-SSE1-NEXT: xorb %al, %bl811; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax812; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d813; CHECK-SSE1-NEXT: xorb %r8b, %al814; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %al815; CHECK-SSE1-NEXT: xorb %r8b, %al816; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d817; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d818; CHECK-SSE1-NEXT: xorb %r8b, %r10b819; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b820; CHECK-SSE1-NEXT: xorb %r8b, %r10b821; CHECK-SSE1-NEXT: movb %r10b, 15(%rdi)822; CHECK-SSE1-NEXT: movb %al, 14(%rdi)823; CHECK-SSE1-NEXT: movb %bl, 13(%rdi)824; CHECK-SSE1-NEXT: movb %bpl, 12(%rdi)825; CHECK-SSE1-NEXT: movb %r15b, 11(%rdi)826; CHECK-SSE1-NEXT: movb %r13b, 10(%rdi)827; CHECK-SSE1-NEXT: movb %cl, 9(%rdi)828; CHECK-SSE1-NEXT: movb %dl, 8(%rdi)829; CHECK-SSE1-NEXT: movb %sil, 7(%rdi)830; CHECK-SSE1-NEXT: movb %r12b, 6(%rdi)831; CHECK-SSE1-NEXT: movb %r14b, 5(%rdi)832; CHECK-SSE1-NEXT: movb %r9b, 4(%rdi)833; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload834; CHECK-SSE1-NEXT: movb %al, 3(%rdi)835; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload836; CHECK-SSE1-NEXT: movb %al, 2(%rdi)837; CHECK-SSE1-NEXT: movb %r11b, 1(%rdi)838; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload839; CHECK-SSE1-NEXT: movb %al, (%rdi)840; CHECK-SSE1-NEXT: movq %rdi, %rax841; CHECK-SSE1-NEXT: popq %rbx842; CHECK-SSE1-NEXT: popq %r12843; CHECK-SSE1-NEXT: popq %r13844; CHECK-SSE1-NEXT: popq %r14845; CHECK-SSE1-NEXT: popq %r15846; CHECK-SSE1-NEXT: popq %rbp847; CHECK-SSE1-NEXT: retq848;849; CHECK-SSE2-LABEL: out_v16i8:850; CHECK-SSE2: # %bb.0:851; CHECK-SSE2-NEXT: andps %xmm2, %xmm0852; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2853; CHECK-SSE2-NEXT: orps %xmm2, %xmm0854; CHECK-SSE2-NEXT: retq855;856; CHECK-XOP-LABEL: out_v16i8:857; CHECK-XOP: # %bb.0:858; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0859; CHECK-XOP-NEXT: retq860 %mx = and <16 x i8> %x, %mask861 %notmask = xor <16 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>862 %my = and <16 x i8> %y, %notmask863 %r = or <16 x i8> %mx, %my864 ret <16 x i8> %r865}866 867define <8 x i16> @out_v8i16(<8 x i16> %x, <8 x i16> %y, <8 x i16> %mask) nounwind {868; CHECK-BASELINE-LABEL: out_v8i16:869; CHECK-BASELINE: # %bb.0:870; CHECK-BASELINE-NEXT: pushq %rbp871; CHECK-BASELINE-NEXT: pushq %r15872; CHECK-BASELINE-NEXT: pushq %r14873; CHECK-BASELINE-NEXT: pushq %r12874; CHECK-BASELINE-NEXT: pushq %rbx875; CHECK-BASELINE-NEXT: movq %rdi, %rax876; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi877; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d878; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d879; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx880; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebp881; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r14d882; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r15d883; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r12d884; CHECK-BASELINE-NEXT: xorl %r12d, %esi885; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si886; CHECK-BASELINE-NEXT: xorl %r12d, %esi887; CHECK-BASELINE-NEXT: xorl %r15d, %edx888; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx889; CHECK-BASELINE-NEXT: xorl %r15d, %edx890; CHECK-BASELINE-NEXT: xorl %r14d, %ecx891; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx892; CHECK-BASELINE-NEXT: xorl %r14d, %ecx893; CHECK-BASELINE-NEXT: xorl %ebp, %r8d894; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w895; CHECK-BASELINE-NEXT: xorl %ebp, %r8d896; CHECK-BASELINE-NEXT: xorl %ebx, %r9d897; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r9w898; CHECK-BASELINE-NEXT: xorl %ebx, %r9d899; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx900; CHECK-BASELINE-NEXT: xorw %r11w, %bx901; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %bx902; CHECK-BASELINE-NEXT: xorl %r11d, %ebx903; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %r11d904; CHECK-BASELINE-NEXT: xorw %r10w, %r11w905; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r11w906; CHECK-BASELINE-NEXT: xorl %r10d, %r11d907; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %r10d908; CHECK-BASELINE-NEXT: xorw %di, %r10w909; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r10w910; CHECK-BASELINE-NEXT: xorl %edi, %r10d911; CHECK-BASELINE-NEXT: movw %r10w, 14(%rax)912; CHECK-BASELINE-NEXT: movw %r11w, 12(%rax)913; CHECK-BASELINE-NEXT: movw %bx, 10(%rax)914; CHECK-BASELINE-NEXT: movw %r9w, 8(%rax)915; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)916; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)917; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)918; CHECK-BASELINE-NEXT: movw %si, (%rax)919; CHECK-BASELINE-NEXT: popq %rbx920; CHECK-BASELINE-NEXT: popq %r12921; CHECK-BASELINE-NEXT: popq %r14922; CHECK-BASELINE-NEXT: popq %r15923; CHECK-BASELINE-NEXT: popq %rbp924; CHECK-BASELINE-NEXT: retq925;926; CHECK-SSE1-LABEL: out_v8i16:927; CHECK-SSE1: # %bb.0:928; CHECK-SSE1-NEXT: pushq %rbp929; CHECK-SSE1-NEXT: pushq %r15930; CHECK-SSE1-NEXT: pushq %r14931; CHECK-SSE1-NEXT: pushq %r12932; CHECK-SSE1-NEXT: pushq %rbx933; CHECK-SSE1-NEXT: movq %rdi, %rax934; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi935; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d936; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d937; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx938; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebp939; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r14d940; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r15d941; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r12d942; CHECK-SSE1-NEXT: xorl %r12d, %esi943; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si944; CHECK-SSE1-NEXT: xorl %r12d, %esi945; CHECK-SSE1-NEXT: xorl %r15d, %edx946; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx947; CHECK-SSE1-NEXT: xorl %r15d, %edx948; CHECK-SSE1-NEXT: xorl %r14d, %ecx949; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx950; CHECK-SSE1-NEXT: xorl %r14d, %ecx951; CHECK-SSE1-NEXT: xorl %ebp, %r8d952; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w953; CHECK-SSE1-NEXT: xorl %ebp, %r8d954; CHECK-SSE1-NEXT: xorl %ebx, %r9d955; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r9w956; CHECK-SSE1-NEXT: xorl %ebx, %r9d957; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx958; CHECK-SSE1-NEXT: xorw %r11w, %bx959; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %bx960; CHECK-SSE1-NEXT: xorl %r11d, %ebx961; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %r11d962; CHECK-SSE1-NEXT: xorw %r10w, %r11w963; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r11w964; CHECK-SSE1-NEXT: xorl %r10d, %r11d965; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %r10d966; CHECK-SSE1-NEXT: xorw %di, %r10w967; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r10w968; CHECK-SSE1-NEXT: xorl %edi, %r10d969; CHECK-SSE1-NEXT: movw %r10w, 14(%rax)970; CHECK-SSE1-NEXT: movw %r11w, 12(%rax)971; CHECK-SSE1-NEXT: movw %bx, 10(%rax)972; CHECK-SSE1-NEXT: movw %r9w, 8(%rax)973; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)974; CHECK-SSE1-NEXT: movw %cx, 4(%rax)975; CHECK-SSE1-NEXT: movw %dx, 2(%rax)976; CHECK-SSE1-NEXT: movw %si, (%rax)977; CHECK-SSE1-NEXT: popq %rbx978; CHECK-SSE1-NEXT: popq %r12979; CHECK-SSE1-NEXT: popq %r14980; CHECK-SSE1-NEXT: popq %r15981; CHECK-SSE1-NEXT: popq %rbp982; CHECK-SSE1-NEXT: retq983;984; CHECK-SSE2-LABEL: out_v8i16:985; CHECK-SSE2: # %bb.0:986; CHECK-SSE2-NEXT: andps %xmm2, %xmm0987; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2988; CHECK-SSE2-NEXT: orps %xmm2, %xmm0989; CHECK-SSE2-NEXT: retq990;991; CHECK-XOP-LABEL: out_v8i16:992; CHECK-XOP: # %bb.0:993; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0994; CHECK-XOP-NEXT: retq995 %mx = and <8 x i16> %x, %mask996 %notmask = xor <8 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>997 %my = and <8 x i16> %y, %notmask998 %r = or <8 x i16> %mx, %my999 ret <8 x i16> %r1000}1001 1002define <4 x i32> @out_v4i32(ptr%px, ptr%py, ptr%pmask) nounwind {1003; CHECK-BASELINE-LABEL: out_v4i32:1004; CHECK-BASELINE: # %bb.0:1005; CHECK-BASELINE-NEXT: movq %rdi, %rax1006; CHECK-BASELINE-NEXT: movl 12(%rdx), %edi1007; CHECK-BASELINE-NEXT: movl 8(%rdx), %r8d1008; CHECK-BASELINE-NEXT: movl (%rdx), %r9d1009; CHECK-BASELINE-NEXT: movl 4(%rdx), %r10d1010; CHECK-BASELINE-NEXT: movl (%rsi), %edx1011; CHECK-BASELINE-NEXT: xorl %r9d, %edx1012; CHECK-BASELINE-NEXT: andl (%rcx), %edx1013; CHECK-BASELINE-NEXT: xorl %r9d, %edx1014; CHECK-BASELINE-NEXT: movl 4(%rsi), %r9d1015; CHECK-BASELINE-NEXT: xorl %r10d, %r9d1016; CHECK-BASELINE-NEXT: andl 4(%rcx), %r9d1017; CHECK-BASELINE-NEXT: xorl %r10d, %r9d1018; CHECK-BASELINE-NEXT: movl 8(%rsi), %r10d1019; CHECK-BASELINE-NEXT: xorl %r8d, %r10d1020; CHECK-BASELINE-NEXT: andl 8(%rcx), %r10d1021; CHECK-BASELINE-NEXT: xorl %r8d, %r10d1022; CHECK-BASELINE-NEXT: movl 12(%rsi), %esi1023; CHECK-BASELINE-NEXT: xorl %edi, %esi1024; CHECK-BASELINE-NEXT: andl 12(%rcx), %esi1025; CHECK-BASELINE-NEXT: xorl %edi, %esi1026; CHECK-BASELINE-NEXT: movl %esi, 12(%rax)1027; CHECK-BASELINE-NEXT: movl %r10d, 8(%rax)1028; CHECK-BASELINE-NEXT: movl %r9d, 4(%rax)1029; CHECK-BASELINE-NEXT: movl %edx, (%rax)1030; CHECK-BASELINE-NEXT: retq1031;1032; CHECK-SSE1-LABEL: out_v4i32:1033; CHECK-SSE1: # %bb.0:1034; CHECK-SSE1-NEXT: movq %rdi, %rax1035; CHECK-SSE1-NEXT: movaps (%rcx), %xmm01036; CHECK-SSE1-NEXT: movaps (%rsi), %xmm11037; CHECK-SSE1-NEXT: andps %xmm0, %xmm11038; CHECK-SSE1-NEXT: andnps (%rdx), %xmm01039; CHECK-SSE1-NEXT: orps %xmm1, %xmm01040; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)1041; CHECK-SSE1-NEXT: retq1042;1043; CHECK-SSE2-LABEL: out_v4i32:1044; CHECK-SSE2: # %bb.0:1045; CHECK-SSE2-NEXT: movaps (%rdx), %xmm01046; CHECK-SSE2-NEXT: movaps (%rdi), %xmm11047; CHECK-SSE2-NEXT: andps %xmm0, %xmm11048; CHECK-SSE2-NEXT: andnps (%rsi), %xmm01049; CHECK-SSE2-NEXT: orps %xmm1, %xmm01050; CHECK-SSE2-NEXT: retq1051;1052; CHECK-XOP-LABEL: out_v4i32:1053; CHECK-XOP: # %bb.0:1054; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm01055; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm11056; CHECK-XOP-NEXT: vpcmov %xmm1, (%rsi), %xmm0, %xmm01057; CHECK-XOP-NEXT: retq1058 %x = load <4 x i32>, ptr%px, align 161059 %y = load <4 x i32>, ptr%py, align 161060 %mask = load <4 x i32>, ptr%pmask, align 161061 %mx = and <4 x i32> %x, %mask1062 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>1063 %my = and <4 x i32> %y, %notmask1064 %r = or <4 x i32> %mx, %my1065 ret <4 x i32> %r1066}1067 1068define <4 x i32> @out_v4i32_undef(ptr%px, ptr%py, ptr%pmask) nounwind {1069; CHECK-BASELINE-LABEL: out_v4i32_undef:1070; CHECK-BASELINE: # %bb.0:1071; CHECK-BASELINE-NEXT: movq %rdi, %rax1072; CHECK-BASELINE-NEXT: movl 8(%rsi), %edi1073; CHECK-BASELINE-NEXT: movl 12(%rdx), %r8d1074; CHECK-BASELINE-NEXT: movl (%rdx), %r9d1075; CHECK-BASELINE-NEXT: movl 4(%rdx), %edx1076; CHECK-BASELINE-NEXT: andl 8(%rcx), %edi1077; CHECK-BASELINE-NEXT: movl (%rsi), %r10d1078; CHECK-BASELINE-NEXT: xorl %r9d, %r10d1079; CHECK-BASELINE-NEXT: andl (%rcx), %r10d1080; CHECK-BASELINE-NEXT: xorl %r9d, %r10d1081; CHECK-BASELINE-NEXT: movl 4(%rsi), %r9d1082; CHECK-BASELINE-NEXT: xorl %edx, %r9d1083; CHECK-BASELINE-NEXT: andl 4(%rcx), %r9d1084; CHECK-BASELINE-NEXT: xorl %edx, %r9d1085; CHECK-BASELINE-NEXT: movl 12(%rsi), %edx1086; CHECK-BASELINE-NEXT: xorl %r8d, %edx1087; CHECK-BASELINE-NEXT: andl 12(%rcx), %edx1088; CHECK-BASELINE-NEXT: xorl %r8d, %edx1089; CHECK-BASELINE-NEXT: movl %edi, 8(%rax)1090; CHECK-BASELINE-NEXT: movl %edx, 12(%rax)1091; CHECK-BASELINE-NEXT: movl %r9d, 4(%rax)1092; CHECK-BASELINE-NEXT: movl %r10d, (%rax)1093; CHECK-BASELINE-NEXT: retq1094;1095; CHECK-SSE1-LABEL: out_v4i32_undef:1096; CHECK-SSE1: # %bb.0:1097; CHECK-SSE1-NEXT: movq %rdi, %rax1098; CHECK-SSE1-NEXT: movaps (%rcx), %xmm01099; CHECK-SSE1-NEXT: movaps (%rsi), %xmm11100; CHECK-SSE1-NEXT: andps %xmm0, %xmm11101; CHECK-SSE1-NEXT: andnps (%rdx), %xmm01102; CHECK-SSE1-NEXT: orps %xmm1, %xmm01103; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)1104; CHECK-SSE1-NEXT: retq1105;1106; CHECK-SSE2-LABEL: out_v4i32_undef:1107; CHECK-SSE2: # %bb.0:1108; CHECK-SSE2-NEXT: movaps (%rdx), %xmm01109; CHECK-SSE2-NEXT: movaps (%rdi), %xmm11110; CHECK-SSE2-NEXT: andps %xmm0, %xmm11111; CHECK-SSE2-NEXT: andnps (%rsi), %xmm01112; CHECK-SSE2-NEXT: orps %xmm1, %xmm01113; CHECK-SSE2-NEXT: retq1114;1115; CHECK-XOP-LABEL: out_v4i32_undef:1116; CHECK-XOP: # %bb.0:1117; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm01118; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm11119; CHECK-XOP-NEXT: vpcmov %xmm1, (%rsi), %xmm0, %xmm01120; CHECK-XOP-NEXT: retq1121 %x = load <4 x i32>, ptr%px, align 161122 %y = load <4 x i32>, ptr%py, align 161123 %mask = load <4 x i32>, ptr%pmask, align 161124 %mx = and <4 x i32> %x, %mask1125 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 undef, i32 -1>1126 %my = and <4 x i32> %y, %notmask1127 %r = or <4 x i32> %mx, %my1128 ret <4 x i32> %r1129}1130 1131define <2 x i64> @out_v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %mask) nounwind {1132; CHECK-BASELINE-LABEL: out_v2i64:1133; CHECK-BASELINE: # %bb.0:1134; CHECK-BASELINE-NEXT: movq %rdi, %rax1135; CHECK-BASELINE-NEXT: xorq %rdx, %rax1136; CHECK-BASELINE-NEXT: andq %r8, %rax1137; CHECK-BASELINE-NEXT: xorq %rdx, %rax1138; CHECK-BASELINE-NEXT: xorq %rcx, %rsi1139; CHECK-BASELINE-NEXT: andq %r9, %rsi1140; CHECK-BASELINE-NEXT: xorq %rcx, %rsi1141; CHECK-BASELINE-NEXT: movq %rsi, %rdx1142; CHECK-BASELINE-NEXT: retq1143;1144; CHECK-SSE1-LABEL: out_v2i64:1145; CHECK-SSE1: # %bb.0:1146; CHECK-SSE1-NEXT: movq %rdi, %rax1147; CHECK-SSE1-NEXT: xorq %rdx, %rax1148; CHECK-SSE1-NEXT: andq %r8, %rax1149; CHECK-SSE1-NEXT: xorq %rdx, %rax1150; CHECK-SSE1-NEXT: xorq %rcx, %rsi1151; CHECK-SSE1-NEXT: andq %r9, %rsi1152; CHECK-SSE1-NEXT: xorq %rcx, %rsi1153; CHECK-SSE1-NEXT: movq %rsi, %rdx1154; CHECK-SSE1-NEXT: retq1155;1156; CHECK-SSE2-LABEL: out_v2i64:1157; CHECK-SSE2: # %bb.0:1158; CHECK-SSE2-NEXT: andps %xmm2, %xmm01159; CHECK-SSE2-NEXT: andnps %xmm1, %xmm21160; CHECK-SSE2-NEXT: orps %xmm2, %xmm01161; CHECK-SSE2-NEXT: retq1162;1163; CHECK-XOP-LABEL: out_v2i64:1164; CHECK-XOP: # %bb.0:1165; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm01166; CHECK-XOP-NEXT: retq1167 %mx = and <2 x i64> %x, %mask1168 %notmask = xor <2 x i64> %mask, <i64 -1, i64 -1>1169 %my = and <2 x i64> %y, %notmask1170 %r = or <2 x i64> %mx, %my1171 ret <2 x i64> %r1172}1173 1174; ============================================================================ ;1175; 256-bit vector width1176; ============================================================================ ;1177 1178define <32 x i8> @out_v32i8(ptr%px, ptr%py, ptr%pmask) nounwind {1179; CHECK-BASELINE-LABEL: out_v32i8:1180; CHECK-BASELINE: # %bb.0:1181; CHECK-BASELINE-NEXT: pushq %rbp1182; CHECK-BASELINE-NEXT: pushq %r151183; CHECK-BASELINE-NEXT: pushq %r141184; CHECK-BASELINE-NEXT: pushq %r131185; CHECK-BASELINE-NEXT: pushq %r121186; CHECK-BASELINE-NEXT: pushq %rbx1187; CHECK-BASELINE-NEXT: movq %rcx, %r101188; CHECK-BASELINE-NEXT: movq %rdx, %r81189; CHECK-BASELINE-NEXT: movq %rsi, %r91190; CHECK-BASELINE-NEXT: movq %rdi, %r111191; CHECK-BASELINE-NEXT: movzbl 15(%rdx), %eax1192; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1193; CHECK-BASELINE-NEXT: movzbl 14(%rdx), %eax1194; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1195; CHECK-BASELINE-NEXT: movzbl 13(%rdx), %eax1196; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1197; CHECK-BASELINE-NEXT: movzbl 12(%rdx), %eax1198; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1199; CHECK-BASELINE-NEXT: movzbl 11(%rdx), %eax1200; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1201; CHECK-BASELINE-NEXT: movzbl 10(%rdx), %eax1202; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1203; CHECK-BASELINE-NEXT: movzbl 9(%rdx), %ebp1204; CHECK-BASELINE-NEXT: movzbl 8(%rdx), %r14d1205; CHECK-BASELINE-NEXT: movzbl 7(%rdx), %r15d1206; CHECK-BASELINE-NEXT: movzbl 6(%rdx), %r12d1207; CHECK-BASELINE-NEXT: movzbl 5(%rdx), %r13d1208; CHECK-BASELINE-NEXT: movzbl 4(%rdx), %esi1209; CHECK-BASELINE-NEXT: movzbl 3(%rdx), %edx1210; CHECK-BASELINE-NEXT: movzbl 2(%r8), %edi1211; CHECK-BASELINE-NEXT: movzbl (%r8), %eax1212; CHECK-BASELINE-NEXT: movzbl 1(%r8), %ecx1213; CHECK-BASELINE-NEXT: movzbl (%r9), %ebx1214; CHECK-BASELINE-NEXT: xorb %al, %bl1215; CHECK-BASELINE-NEXT: andb (%r10), %bl1216; CHECK-BASELINE-NEXT: xorb %al, %bl1217; CHECK-BASELINE-NEXT: movb %bl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1218; CHECK-BASELINE-NEXT: movzbl 1(%r9), %eax1219; CHECK-BASELINE-NEXT: xorb %cl, %al1220; CHECK-BASELINE-NEXT: andb 1(%r10), %al1221; CHECK-BASELINE-NEXT: xorb %cl, %al1222; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1223; CHECK-BASELINE-NEXT: movzbl 2(%r9), %eax1224; CHECK-BASELINE-NEXT: xorb %dil, %al1225; CHECK-BASELINE-NEXT: andb 2(%r10), %al1226; CHECK-BASELINE-NEXT: xorb %dil, %al1227; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1228; CHECK-BASELINE-NEXT: movzbl 3(%r9), %eax1229; CHECK-BASELINE-NEXT: xorb %dl, %al1230; CHECK-BASELINE-NEXT: andb 3(%r10), %al1231; CHECK-BASELINE-NEXT: xorb %dl, %al1232; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1233; CHECK-BASELINE-NEXT: movzbl 4(%r9), %eax1234; CHECK-BASELINE-NEXT: xorb %sil, %al1235; CHECK-BASELINE-NEXT: andb 4(%r10), %al1236; CHECK-BASELINE-NEXT: xorb %sil, %al1237; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1238; CHECK-BASELINE-NEXT: movzbl 5(%r9), %eax1239; CHECK-BASELINE-NEXT: xorb %r13b, %al1240; CHECK-BASELINE-NEXT: andb 5(%r10), %al1241; CHECK-BASELINE-NEXT: xorb %r13b, %al1242; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1243; CHECK-BASELINE-NEXT: movzbl 6(%r9), %eax1244; CHECK-BASELINE-NEXT: xorb %r12b, %al1245; CHECK-BASELINE-NEXT: andb 6(%r10), %al1246; CHECK-BASELINE-NEXT: xorb %r12b, %al1247; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1248; CHECK-BASELINE-NEXT: movzbl 7(%r9), %eax1249; CHECK-BASELINE-NEXT: xorb %r15b, %al1250; CHECK-BASELINE-NEXT: andb 7(%r10), %al1251; CHECK-BASELINE-NEXT: xorb %r15b, %al1252; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1253; CHECK-BASELINE-NEXT: movzbl 8(%r9), %eax1254; CHECK-BASELINE-NEXT: xorb %r14b, %al1255; CHECK-BASELINE-NEXT: andb 8(%r10), %al1256; CHECK-BASELINE-NEXT: xorb %r14b, %al1257; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1258; CHECK-BASELINE-NEXT: movzbl 9(%r9), %eax1259; CHECK-BASELINE-NEXT: xorb %bpl, %al1260; CHECK-BASELINE-NEXT: andb 9(%r10), %al1261; CHECK-BASELINE-NEXT: xorb %bpl, %al1262; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1263; CHECK-BASELINE-NEXT: movzbl 10(%r9), %eax1264; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1265; CHECK-BASELINE-NEXT: xorb %cl, %al1266; CHECK-BASELINE-NEXT: andb 10(%r10), %al1267; CHECK-BASELINE-NEXT: xorb %cl, %al1268; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1269; CHECK-BASELINE-NEXT: movzbl 11(%r9), %eax1270; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1271; CHECK-BASELINE-NEXT: xorb %cl, %al1272; CHECK-BASELINE-NEXT: andb 11(%r10), %al1273; CHECK-BASELINE-NEXT: xorb %cl, %al1274; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1275; CHECK-BASELINE-NEXT: movzbl 12(%r9), %eax1276; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1277; CHECK-BASELINE-NEXT: xorb %cl, %al1278; CHECK-BASELINE-NEXT: andb 12(%r10), %al1279; CHECK-BASELINE-NEXT: xorb %cl, %al1280; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1281; CHECK-BASELINE-NEXT: movzbl 13(%r9), %eax1282; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1283; CHECK-BASELINE-NEXT: xorb %cl, %al1284; CHECK-BASELINE-NEXT: andb 13(%r10), %al1285; CHECK-BASELINE-NEXT: xorb %cl, %al1286; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1287; CHECK-BASELINE-NEXT: movzbl 14(%r9), %eax1288; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1289; CHECK-BASELINE-NEXT: xorb %cl, %al1290; CHECK-BASELINE-NEXT: andb 14(%r10), %al1291; CHECK-BASELINE-NEXT: xorb %cl, %al1292; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1293; CHECK-BASELINE-NEXT: movzbl 15(%r9), %eax1294; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1295; CHECK-BASELINE-NEXT: xorb %cl, %al1296; CHECK-BASELINE-NEXT: andb 15(%r10), %al1297; CHECK-BASELINE-NEXT: xorb %cl, %al1298; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1299; CHECK-BASELINE-NEXT: movzbl 16(%r8), %eax1300; CHECK-BASELINE-NEXT: movzbl 16(%r9), %ecx1301; CHECK-BASELINE-NEXT: xorb %al, %cl1302; CHECK-BASELINE-NEXT: andb 16(%r10), %cl1303; CHECK-BASELINE-NEXT: xorb %al, %cl1304; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1305; CHECK-BASELINE-NEXT: movzbl 17(%r8), %eax1306; CHECK-BASELINE-NEXT: movzbl 17(%r9), %ecx1307; CHECK-BASELINE-NEXT: xorb %al, %cl1308; CHECK-BASELINE-NEXT: andb 17(%r10), %cl1309; CHECK-BASELINE-NEXT: xorb %al, %cl1310; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1311; CHECK-BASELINE-NEXT: movzbl 18(%r8), %eax1312; CHECK-BASELINE-NEXT: movzbl 18(%r9), %ecx1313; CHECK-BASELINE-NEXT: xorb %al, %cl1314; CHECK-BASELINE-NEXT: andb 18(%r10), %cl1315; CHECK-BASELINE-NEXT: xorb %al, %cl1316; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1317; CHECK-BASELINE-NEXT: movzbl 19(%r8), %eax1318; CHECK-BASELINE-NEXT: movzbl 19(%r9), %ecx1319; CHECK-BASELINE-NEXT: xorb %al, %cl1320; CHECK-BASELINE-NEXT: andb 19(%r10), %cl1321; CHECK-BASELINE-NEXT: xorb %al, %cl1322; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1323; CHECK-BASELINE-NEXT: movzbl 20(%r8), %eax1324; CHECK-BASELINE-NEXT: movzbl 20(%r9), %ecx1325; CHECK-BASELINE-NEXT: xorb %al, %cl1326; CHECK-BASELINE-NEXT: andb 20(%r10), %cl1327; CHECK-BASELINE-NEXT: xorb %al, %cl1328; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1329; CHECK-BASELINE-NEXT: movzbl 21(%r8), %eax1330; CHECK-BASELINE-NEXT: movzbl 21(%r9), %r13d1331; CHECK-BASELINE-NEXT: xorb %al, %r13b1332; CHECK-BASELINE-NEXT: andb 21(%r10), %r13b1333; CHECK-BASELINE-NEXT: xorb %al, %r13b1334; CHECK-BASELINE-NEXT: movzbl 22(%r8), %eax1335; CHECK-BASELINE-NEXT: movzbl 22(%r9), %r12d1336; CHECK-BASELINE-NEXT: xorb %al, %r12b1337; CHECK-BASELINE-NEXT: andb 22(%r10), %r12b1338; CHECK-BASELINE-NEXT: xorb %al, %r12b1339; CHECK-BASELINE-NEXT: movzbl 23(%r8), %eax1340; CHECK-BASELINE-NEXT: movzbl 23(%r9), %r15d1341; CHECK-BASELINE-NEXT: xorb %al, %r15b1342; CHECK-BASELINE-NEXT: andb 23(%r10), %r15b1343; CHECK-BASELINE-NEXT: xorb %al, %r15b1344; CHECK-BASELINE-NEXT: movzbl 24(%r8), %eax1345; CHECK-BASELINE-NEXT: movzbl 24(%r9), %r14d1346; CHECK-BASELINE-NEXT: xorb %al, %r14b1347; CHECK-BASELINE-NEXT: andb 24(%r10), %r14b1348; CHECK-BASELINE-NEXT: xorb %al, %r14b1349; CHECK-BASELINE-NEXT: movzbl 25(%r8), %eax1350; CHECK-BASELINE-NEXT: movzbl 25(%r9), %ebp1351; CHECK-BASELINE-NEXT: xorb %al, %bpl1352; CHECK-BASELINE-NEXT: andb 25(%r10), %bpl1353; CHECK-BASELINE-NEXT: xorb %al, %bpl1354; CHECK-BASELINE-NEXT: movzbl 26(%r8), %eax1355; CHECK-BASELINE-NEXT: movzbl 26(%r9), %edi1356; CHECK-BASELINE-NEXT: xorb %al, %dil1357; CHECK-BASELINE-NEXT: andb 26(%r10), %dil1358; CHECK-BASELINE-NEXT: xorb %al, %dil1359; CHECK-BASELINE-NEXT: movzbl 27(%r8), %eax1360; CHECK-BASELINE-NEXT: movzbl 27(%r9), %esi1361; CHECK-BASELINE-NEXT: xorb %al, %sil1362; CHECK-BASELINE-NEXT: andb 27(%r10), %sil1363; CHECK-BASELINE-NEXT: xorb %al, %sil1364; CHECK-BASELINE-NEXT: movzbl 28(%r8), %eax1365; CHECK-BASELINE-NEXT: movzbl 28(%r9), %edx1366; CHECK-BASELINE-NEXT: xorb %al, %dl1367; CHECK-BASELINE-NEXT: andb 28(%r10), %dl1368; CHECK-BASELINE-NEXT: xorb %al, %dl1369; CHECK-BASELINE-NEXT: movzbl 29(%r8), %eax1370; CHECK-BASELINE-NEXT: movzbl 29(%r9), %ecx1371; CHECK-BASELINE-NEXT: xorb %al, %cl1372; CHECK-BASELINE-NEXT: andb 29(%r10), %cl1373; CHECK-BASELINE-NEXT: xorb %al, %cl1374; CHECK-BASELINE-NEXT: movzbl 30(%r8), %ebx1375; CHECK-BASELINE-NEXT: movzbl 30(%r9), %eax1376; CHECK-BASELINE-NEXT: xorb %bl, %al1377; CHECK-BASELINE-NEXT: andb 30(%r10), %al1378; CHECK-BASELINE-NEXT: xorb %bl, %al1379; CHECK-BASELINE-NEXT: movzbl 31(%r8), %r8d1380; CHECK-BASELINE-NEXT: movzbl 31(%r9), %r9d1381; CHECK-BASELINE-NEXT: xorb %r8b, %r9b1382; CHECK-BASELINE-NEXT: andb 31(%r10), %r9b1383; CHECK-BASELINE-NEXT: xorb %r8b, %r9b1384; CHECK-BASELINE-NEXT: movb %r9b, 31(%r11)1385; CHECK-BASELINE-NEXT: movb %al, 30(%r11)1386; CHECK-BASELINE-NEXT: movb %cl, 29(%r11)1387; CHECK-BASELINE-NEXT: movb %dl, 28(%r11)1388; CHECK-BASELINE-NEXT: movb %sil, 27(%r11)1389; CHECK-BASELINE-NEXT: movb %dil, 26(%r11)1390; CHECK-BASELINE-NEXT: movb %bpl, 25(%r11)1391; CHECK-BASELINE-NEXT: movb %r14b, 24(%r11)1392; CHECK-BASELINE-NEXT: movb %r15b, 23(%r11)1393; CHECK-BASELINE-NEXT: movb %r12b, 22(%r11)1394; CHECK-BASELINE-NEXT: movb %r13b, 21(%r11)1395; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1396; CHECK-BASELINE-NEXT: movb %al, 20(%r11)1397; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1398; CHECK-BASELINE-NEXT: movb %al, 19(%r11)1399; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1400; CHECK-BASELINE-NEXT: movb %al, 18(%r11)1401; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1402; CHECK-BASELINE-NEXT: movb %al, 17(%r11)1403; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1404; CHECK-BASELINE-NEXT: movb %al, 16(%r11)1405; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1406; CHECK-BASELINE-NEXT: movb %al, 15(%r11)1407; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1408; CHECK-BASELINE-NEXT: movb %al, 14(%r11)1409; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1410; CHECK-BASELINE-NEXT: movb %al, 13(%r11)1411; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1412; CHECK-BASELINE-NEXT: movb %al, 12(%r11)1413; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1414; CHECK-BASELINE-NEXT: movb %al, 11(%r11)1415; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1416; CHECK-BASELINE-NEXT: movb %al, 10(%r11)1417; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1418; CHECK-BASELINE-NEXT: movb %al, 9(%r11)1419; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1420; CHECK-BASELINE-NEXT: movb %al, 8(%r11)1421; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1422; CHECK-BASELINE-NEXT: movb %al, 7(%r11)1423; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1424; CHECK-BASELINE-NEXT: movb %al, 6(%r11)1425; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1426; CHECK-BASELINE-NEXT: movb %al, 5(%r11)1427; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1428; CHECK-BASELINE-NEXT: movb %al, 4(%r11)1429; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1430; CHECK-BASELINE-NEXT: movb %al, 3(%r11)1431; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1432; CHECK-BASELINE-NEXT: movb %al, 2(%r11)1433; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1434; CHECK-BASELINE-NEXT: movb %al, 1(%r11)1435; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1436; CHECK-BASELINE-NEXT: movb %al, (%r11)1437; CHECK-BASELINE-NEXT: movq %r11, %rax1438; CHECK-BASELINE-NEXT: popq %rbx1439; CHECK-BASELINE-NEXT: popq %r121440; CHECK-BASELINE-NEXT: popq %r131441; CHECK-BASELINE-NEXT: popq %r141442; CHECK-BASELINE-NEXT: popq %r151443; CHECK-BASELINE-NEXT: popq %rbp1444; CHECK-BASELINE-NEXT: retq1445;1446; CHECK-SSE1-LABEL: out_v32i8:1447; CHECK-SSE1: # %bb.0:1448; CHECK-SSE1-NEXT: pushq %rbp1449; CHECK-SSE1-NEXT: pushq %r151450; CHECK-SSE1-NEXT: pushq %r141451; CHECK-SSE1-NEXT: pushq %r131452; CHECK-SSE1-NEXT: pushq %r121453; CHECK-SSE1-NEXT: pushq %rbx1454; CHECK-SSE1-NEXT: movq %rcx, %r101455; CHECK-SSE1-NEXT: movq %rdx, %r81456; CHECK-SSE1-NEXT: movq %rsi, %r91457; CHECK-SSE1-NEXT: movq %rdi, %r111458; CHECK-SSE1-NEXT: movzbl 15(%rdx), %eax1459; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1460; CHECK-SSE1-NEXT: movzbl 14(%rdx), %eax1461; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1462; CHECK-SSE1-NEXT: movzbl 13(%rdx), %eax1463; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1464; CHECK-SSE1-NEXT: movzbl 12(%rdx), %eax1465; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1466; CHECK-SSE1-NEXT: movzbl 11(%rdx), %eax1467; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1468; CHECK-SSE1-NEXT: movzbl 10(%rdx), %eax1469; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1470; CHECK-SSE1-NEXT: movzbl 9(%rdx), %ebp1471; CHECK-SSE1-NEXT: movzbl 8(%rdx), %r14d1472; CHECK-SSE1-NEXT: movzbl 7(%rdx), %r15d1473; CHECK-SSE1-NEXT: movzbl 6(%rdx), %r12d1474; CHECK-SSE1-NEXT: movzbl 5(%rdx), %r13d1475; CHECK-SSE1-NEXT: movzbl 4(%rdx), %esi1476; CHECK-SSE1-NEXT: movzbl 3(%rdx), %edx1477; CHECK-SSE1-NEXT: movzbl 2(%r8), %edi1478; CHECK-SSE1-NEXT: movzbl (%r8), %eax1479; CHECK-SSE1-NEXT: movzbl 1(%r8), %ecx1480; CHECK-SSE1-NEXT: movzbl (%r9), %ebx1481; CHECK-SSE1-NEXT: xorb %al, %bl1482; CHECK-SSE1-NEXT: andb (%r10), %bl1483; CHECK-SSE1-NEXT: xorb %al, %bl1484; CHECK-SSE1-NEXT: movb %bl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1485; CHECK-SSE1-NEXT: movzbl 1(%r9), %eax1486; CHECK-SSE1-NEXT: xorb %cl, %al1487; CHECK-SSE1-NEXT: andb 1(%r10), %al1488; CHECK-SSE1-NEXT: xorb %cl, %al1489; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1490; CHECK-SSE1-NEXT: movzbl 2(%r9), %eax1491; CHECK-SSE1-NEXT: xorb %dil, %al1492; CHECK-SSE1-NEXT: andb 2(%r10), %al1493; CHECK-SSE1-NEXT: xorb %dil, %al1494; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1495; CHECK-SSE1-NEXT: movzbl 3(%r9), %eax1496; CHECK-SSE1-NEXT: xorb %dl, %al1497; CHECK-SSE1-NEXT: andb 3(%r10), %al1498; CHECK-SSE1-NEXT: xorb %dl, %al1499; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1500; CHECK-SSE1-NEXT: movzbl 4(%r9), %eax1501; CHECK-SSE1-NEXT: xorb %sil, %al1502; CHECK-SSE1-NEXT: andb 4(%r10), %al1503; CHECK-SSE1-NEXT: xorb %sil, %al1504; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1505; CHECK-SSE1-NEXT: movzbl 5(%r9), %eax1506; CHECK-SSE1-NEXT: xorb %r13b, %al1507; CHECK-SSE1-NEXT: andb 5(%r10), %al1508; CHECK-SSE1-NEXT: xorb %r13b, %al1509; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1510; CHECK-SSE1-NEXT: movzbl 6(%r9), %eax1511; CHECK-SSE1-NEXT: xorb %r12b, %al1512; CHECK-SSE1-NEXT: andb 6(%r10), %al1513; CHECK-SSE1-NEXT: xorb %r12b, %al1514; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1515; CHECK-SSE1-NEXT: movzbl 7(%r9), %eax1516; CHECK-SSE1-NEXT: xorb %r15b, %al1517; CHECK-SSE1-NEXT: andb 7(%r10), %al1518; CHECK-SSE1-NEXT: xorb %r15b, %al1519; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1520; CHECK-SSE1-NEXT: movzbl 8(%r9), %eax1521; CHECK-SSE1-NEXT: xorb %r14b, %al1522; CHECK-SSE1-NEXT: andb 8(%r10), %al1523; CHECK-SSE1-NEXT: xorb %r14b, %al1524; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1525; CHECK-SSE1-NEXT: movzbl 9(%r9), %eax1526; CHECK-SSE1-NEXT: xorb %bpl, %al1527; CHECK-SSE1-NEXT: andb 9(%r10), %al1528; CHECK-SSE1-NEXT: xorb %bpl, %al1529; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1530; CHECK-SSE1-NEXT: movzbl 10(%r9), %eax1531; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1532; CHECK-SSE1-NEXT: xorb %cl, %al1533; CHECK-SSE1-NEXT: andb 10(%r10), %al1534; CHECK-SSE1-NEXT: xorb %cl, %al1535; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1536; CHECK-SSE1-NEXT: movzbl 11(%r9), %eax1537; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1538; CHECK-SSE1-NEXT: xorb %cl, %al1539; CHECK-SSE1-NEXT: andb 11(%r10), %al1540; CHECK-SSE1-NEXT: xorb %cl, %al1541; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1542; CHECK-SSE1-NEXT: movzbl 12(%r9), %eax1543; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1544; CHECK-SSE1-NEXT: xorb %cl, %al1545; CHECK-SSE1-NEXT: andb 12(%r10), %al1546; CHECK-SSE1-NEXT: xorb %cl, %al1547; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1548; CHECK-SSE1-NEXT: movzbl 13(%r9), %eax1549; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1550; CHECK-SSE1-NEXT: xorb %cl, %al1551; CHECK-SSE1-NEXT: andb 13(%r10), %al1552; CHECK-SSE1-NEXT: xorb %cl, %al1553; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1554; CHECK-SSE1-NEXT: movzbl 14(%r9), %eax1555; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1556; CHECK-SSE1-NEXT: xorb %cl, %al1557; CHECK-SSE1-NEXT: andb 14(%r10), %al1558; CHECK-SSE1-NEXT: xorb %cl, %al1559; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1560; CHECK-SSE1-NEXT: movzbl 15(%r9), %eax1561; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload1562; CHECK-SSE1-NEXT: xorb %cl, %al1563; CHECK-SSE1-NEXT: andb 15(%r10), %al1564; CHECK-SSE1-NEXT: xorb %cl, %al1565; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1566; CHECK-SSE1-NEXT: movzbl 16(%r8), %eax1567; CHECK-SSE1-NEXT: movzbl 16(%r9), %ecx1568; CHECK-SSE1-NEXT: xorb %al, %cl1569; CHECK-SSE1-NEXT: andb 16(%r10), %cl1570; CHECK-SSE1-NEXT: xorb %al, %cl1571; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1572; CHECK-SSE1-NEXT: movzbl 17(%r8), %eax1573; CHECK-SSE1-NEXT: movzbl 17(%r9), %ecx1574; CHECK-SSE1-NEXT: xorb %al, %cl1575; CHECK-SSE1-NEXT: andb 17(%r10), %cl1576; CHECK-SSE1-NEXT: xorb %al, %cl1577; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1578; CHECK-SSE1-NEXT: movzbl 18(%r8), %eax1579; CHECK-SSE1-NEXT: movzbl 18(%r9), %ecx1580; CHECK-SSE1-NEXT: xorb %al, %cl1581; CHECK-SSE1-NEXT: andb 18(%r10), %cl1582; CHECK-SSE1-NEXT: xorb %al, %cl1583; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1584; CHECK-SSE1-NEXT: movzbl 19(%r8), %eax1585; CHECK-SSE1-NEXT: movzbl 19(%r9), %ecx1586; CHECK-SSE1-NEXT: xorb %al, %cl1587; CHECK-SSE1-NEXT: andb 19(%r10), %cl1588; CHECK-SSE1-NEXT: xorb %al, %cl1589; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1590; CHECK-SSE1-NEXT: movzbl 20(%r8), %eax1591; CHECK-SSE1-NEXT: movzbl 20(%r9), %ecx1592; CHECK-SSE1-NEXT: xorb %al, %cl1593; CHECK-SSE1-NEXT: andb 20(%r10), %cl1594; CHECK-SSE1-NEXT: xorb %al, %cl1595; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill1596; CHECK-SSE1-NEXT: movzbl 21(%r8), %eax1597; CHECK-SSE1-NEXT: movzbl 21(%r9), %r13d1598; CHECK-SSE1-NEXT: xorb %al, %r13b1599; CHECK-SSE1-NEXT: andb 21(%r10), %r13b1600; CHECK-SSE1-NEXT: xorb %al, %r13b1601; CHECK-SSE1-NEXT: movzbl 22(%r8), %eax1602; CHECK-SSE1-NEXT: movzbl 22(%r9), %r12d1603; CHECK-SSE1-NEXT: xorb %al, %r12b1604; CHECK-SSE1-NEXT: andb 22(%r10), %r12b1605; CHECK-SSE1-NEXT: xorb %al, %r12b1606; CHECK-SSE1-NEXT: movzbl 23(%r8), %eax1607; CHECK-SSE1-NEXT: movzbl 23(%r9), %r15d1608; CHECK-SSE1-NEXT: xorb %al, %r15b1609; CHECK-SSE1-NEXT: andb 23(%r10), %r15b1610; CHECK-SSE1-NEXT: xorb %al, %r15b1611; CHECK-SSE1-NEXT: movzbl 24(%r8), %eax1612; CHECK-SSE1-NEXT: movzbl 24(%r9), %r14d1613; CHECK-SSE1-NEXT: xorb %al, %r14b1614; CHECK-SSE1-NEXT: andb 24(%r10), %r14b1615; CHECK-SSE1-NEXT: xorb %al, %r14b1616; CHECK-SSE1-NEXT: movzbl 25(%r8), %eax1617; CHECK-SSE1-NEXT: movzbl 25(%r9), %ebp1618; CHECK-SSE1-NEXT: xorb %al, %bpl1619; CHECK-SSE1-NEXT: andb 25(%r10), %bpl1620; CHECK-SSE1-NEXT: xorb %al, %bpl1621; CHECK-SSE1-NEXT: movzbl 26(%r8), %eax1622; CHECK-SSE1-NEXT: movzbl 26(%r9), %edi1623; CHECK-SSE1-NEXT: xorb %al, %dil1624; CHECK-SSE1-NEXT: andb 26(%r10), %dil1625; CHECK-SSE1-NEXT: xorb %al, %dil1626; CHECK-SSE1-NEXT: movzbl 27(%r8), %eax1627; CHECK-SSE1-NEXT: movzbl 27(%r9), %esi1628; CHECK-SSE1-NEXT: xorb %al, %sil1629; CHECK-SSE1-NEXT: andb 27(%r10), %sil1630; CHECK-SSE1-NEXT: xorb %al, %sil1631; CHECK-SSE1-NEXT: movzbl 28(%r8), %eax1632; CHECK-SSE1-NEXT: movzbl 28(%r9), %edx1633; CHECK-SSE1-NEXT: xorb %al, %dl1634; CHECK-SSE1-NEXT: andb 28(%r10), %dl1635; CHECK-SSE1-NEXT: xorb %al, %dl1636; CHECK-SSE1-NEXT: movzbl 29(%r8), %eax1637; CHECK-SSE1-NEXT: movzbl 29(%r9), %ecx1638; CHECK-SSE1-NEXT: xorb %al, %cl1639; CHECK-SSE1-NEXT: andb 29(%r10), %cl1640; CHECK-SSE1-NEXT: xorb %al, %cl1641; CHECK-SSE1-NEXT: movzbl 30(%r8), %ebx1642; CHECK-SSE1-NEXT: movzbl 30(%r9), %eax1643; CHECK-SSE1-NEXT: xorb %bl, %al1644; CHECK-SSE1-NEXT: andb 30(%r10), %al1645; CHECK-SSE1-NEXT: xorb %bl, %al1646; CHECK-SSE1-NEXT: movzbl 31(%r8), %r8d1647; CHECK-SSE1-NEXT: movzbl 31(%r9), %r9d1648; CHECK-SSE1-NEXT: xorb %r8b, %r9b1649; CHECK-SSE1-NEXT: andb 31(%r10), %r9b1650; CHECK-SSE1-NEXT: xorb %r8b, %r9b1651; CHECK-SSE1-NEXT: movb %r9b, 31(%r11)1652; CHECK-SSE1-NEXT: movb %al, 30(%r11)1653; CHECK-SSE1-NEXT: movb %cl, 29(%r11)1654; CHECK-SSE1-NEXT: movb %dl, 28(%r11)1655; CHECK-SSE1-NEXT: movb %sil, 27(%r11)1656; CHECK-SSE1-NEXT: movb %dil, 26(%r11)1657; CHECK-SSE1-NEXT: movb %bpl, 25(%r11)1658; CHECK-SSE1-NEXT: movb %r14b, 24(%r11)1659; CHECK-SSE1-NEXT: movb %r15b, 23(%r11)1660; CHECK-SSE1-NEXT: movb %r12b, 22(%r11)1661; CHECK-SSE1-NEXT: movb %r13b, 21(%r11)1662; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1663; CHECK-SSE1-NEXT: movb %al, 20(%r11)1664; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1665; CHECK-SSE1-NEXT: movb %al, 19(%r11)1666; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1667; CHECK-SSE1-NEXT: movb %al, 18(%r11)1668; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1669; CHECK-SSE1-NEXT: movb %al, 17(%r11)1670; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1671; CHECK-SSE1-NEXT: movb %al, 16(%r11)1672; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1673; CHECK-SSE1-NEXT: movb %al, 15(%r11)1674; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1675; CHECK-SSE1-NEXT: movb %al, 14(%r11)1676; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1677; CHECK-SSE1-NEXT: movb %al, 13(%r11)1678; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1679; CHECK-SSE1-NEXT: movb %al, 12(%r11)1680; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1681; CHECK-SSE1-NEXT: movb %al, 11(%r11)1682; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1683; CHECK-SSE1-NEXT: movb %al, 10(%r11)1684; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1685; CHECK-SSE1-NEXT: movb %al, 9(%r11)1686; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1687; CHECK-SSE1-NEXT: movb %al, 8(%r11)1688; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1689; CHECK-SSE1-NEXT: movb %al, 7(%r11)1690; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1691; CHECK-SSE1-NEXT: movb %al, 6(%r11)1692; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1693; CHECK-SSE1-NEXT: movb %al, 5(%r11)1694; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1695; CHECK-SSE1-NEXT: movb %al, 4(%r11)1696; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1697; CHECK-SSE1-NEXT: movb %al, 3(%r11)1698; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1699; CHECK-SSE1-NEXT: movb %al, 2(%r11)1700; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1701; CHECK-SSE1-NEXT: movb %al, 1(%r11)1702; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload1703; CHECK-SSE1-NEXT: movb %al, (%r11)1704; CHECK-SSE1-NEXT: movq %r11, %rax1705; CHECK-SSE1-NEXT: popq %rbx1706; CHECK-SSE1-NEXT: popq %r121707; CHECK-SSE1-NEXT: popq %r131708; CHECK-SSE1-NEXT: popq %r141709; CHECK-SSE1-NEXT: popq %r151710; CHECK-SSE1-NEXT: popq %rbp1711; CHECK-SSE1-NEXT: retq1712;1713; CHECK-SSE2-LABEL: out_v32i8:1714; CHECK-SSE2: # %bb.0:1715; CHECK-SSE2-NEXT: movaps (%rdx), %xmm01716; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm11717; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm21718; CHECK-SSE2-NEXT: andps %xmm1, %xmm21719; CHECK-SSE2-NEXT: movaps (%rdi), %xmm31720; CHECK-SSE2-NEXT: andps %xmm0, %xmm31721; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm11722; CHECK-SSE2-NEXT: orps %xmm2, %xmm11723; CHECK-SSE2-NEXT: andnps (%rsi), %xmm01724; CHECK-SSE2-NEXT: orps %xmm3, %xmm01725; CHECK-SSE2-NEXT: retq1726;1727; CHECK-XOP-LABEL: out_v32i8:1728; CHECK-XOP: # %bb.0:1729; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm01730; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm11731; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm01732; CHECK-XOP-NEXT: retq1733 %x = load <32 x i8>, ptr%px, align 321734 %y = load <32 x i8>, ptr%py, align 321735 %mask = load <32 x i8>, ptr%pmask, align 321736 %mx = and <32 x i8> %x, %mask1737 %notmask = xor <32 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1738 %my = and <32 x i8> %y, %notmask1739 %r = or <32 x i8> %mx, %my1740 ret <32 x i8> %r1741}1742 1743define <16 x i16> @out_v16i16(ptr%px, ptr%py, ptr%pmask) nounwind {1744; CHECK-BASELINE-LABEL: out_v16i16:1745; CHECK-BASELINE: # %bb.0:1746; CHECK-BASELINE-NEXT: pushq %rbp1747; CHECK-BASELINE-NEXT: pushq %r151748; CHECK-BASELINE-NEXT: pushq %r141749; CHECK-BASELINE-NEXT: pushq %r131750; CHECK-BASELINE-NEXT: pushq %r121751; CHECK-BASELINE-NEXT: pushq %rbx1752; CHECK-BASELINE-NEXT: movq %rcx, %r101753; CHECK-BASELINE-NEXT: movq %rdx, %r81754; CHECK-BASELINE-NEXT: movq %rsi, %r91755; CHECK-BASELINE-NEXT: movq %rdi, %r111756; CHECK-BASELINE-NEXT: movzwl 18(%rdx), %ebp1757; CHECK-BASELINE-NEXT: movl 16(%rdx), %r15d1758; CHECK-BASELINE-NEXT: movzwl 14(%rdx), %r13d1759; CHECK-BASELINE-NEXT: movl 12(%rdx), %r12d1760; CHECK-BASELINE-NEXT: movzwl 10(%rdx), %r14d1761; CHECK-BASELINE-NEXT: movl 8(%rdx), %ebx1762; CHECK-BASELINE-NEXT: movzwl 6(%rdx), %eax1763; CHECK-BASELINE-NEXT: movl (%rdx), %ecx1764; CHECK-BASELINE-NEXT: movl 4(%rdx), %edx1765; CHECK-BASELINE-NEXT: movzwl 2(%r8), %esi1766; CHECK-BASELINE-NEXT: movzwl (%r9), %edi1767; CHECK-BASELINE-NEXT: xorw %cx, %di1768; CHECK-BASELINE-NEXT: andw (%r10), %di1769; CHECK-BASELINE-NEXT: xorl %ecx, %edi1770; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1771; CHECK-BASELINE-NEXT: movzwl 2(%r9), %ecx1772; CHECK-BASELINE-NEXT: xorw %si, %cx1773; CHECK-BASELINE-NEXT: andw 2(%r10), %cx1774; CHECK-BASELINE-NEXT: xorl %esi, %ecx1775; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1776; CHECK-BASELINE-NEXT: movzwl 4(%r9), %ecx1777; CHECK-BASELINE-NEXT: xorw %dx, %cx1778; CHECK-BASELINE-NEXT: andw 4(%r10), %cx1779; CHECK-BASELINE-NEXT: xorl %edx, %ecx1780; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1781; CHECK-BASELINE-NEXT: movzwl 6(%r9), %ecx1782; CHECK-BASELINE-NEXT: xorw %ax, %cx1783; CHECK-BASELINE-NEXT: andw 6(%r10), %cx1784; CHECK-BASELINE-NEXT: xorl %eax, %ecx1785; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1786; CHECK-BASELINE-NEXT: movzwl 8(%r9), %eax1787; CHECK-BASELINE-NEXT: xorw %bx, %ax1788; CHECK-BASELINE-NEXT: andw 8(%r10), %ax1789; CHECK-BASELINE-NEXT: xorl %ebx, %eax1790; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1791; CHECK-BASELINE-NEXT: movzwl 10(%r9), %ebx1792; CHECK-BASELINE-NEXT: xorw %r14w, %bx1793; CHECK-BASELINE-NEXT: andw 10(%r10), %bx1794; CHECK-BASELINE-NEXT: xorl %r14d, %ebx1795; CHECK-BASELINE-NEXT: movzwl 12(%r9), %r14d1796; CHECK-BASELINE-NEXT: xorw %r12w, %r14w1797; CHECK-BASELINE-NEXT: andw 12(%r10), %r14w1798; CHECK-BASELINE-NEXT: xorl %r12d, %r14d1799; CHECK-BASELINE-NEXT: movzwl 14(%r9), %r12d1800; CHECK-BASELINE-NEXT: xorw %r13w, %r12w1801; CHECK-BASELINE-NEXT: andw 14(%r10), %r12w1802; CHECK-BASELINE-NEXT: xorl %r13d, %r12d1803; CHECK-BASELINE-NEXT: movzwl 16(%r9), %r13d1804; CHECK-BASELINE-NEXT: xorw %r15w, %r13w1805; CHECK-BASELINE-NEXT: andw 16(%r10), %r13w1806; CHECK-BASELINE-NEXT: xorl %r15d, %r13d1807; CHECK-BASELINE-NEXT: movzwl 18(%r9), %r15d1808; CHECK-BASELINE-NEXT: xorw %bp, %r15w1809; CHECK-BASELINE-NEXT: andw 18(%r10), %r15w1810; CHECK-BASELINE-NEXT: xorl %ebp, %r15d1811; CHECK-BASELINE-NEXT: movl 20(%r8), %eax1812; CHECK-BASELINE-NEXT: movzwl 20(%r9), %ebp1813; CHECK-BASELINE-NEXT: xorw %ax, %bp1814; CHECK-BASELINE-NEXT: andw 20(%r10), %bp1815; CHECK-BASELINE-NEXT: xorl %eax, %ebp1816; CHECK-BASELINE-NEXT: movzwl 22(%r8), %eax1817; CHECK-BASELINE-NEXT: movzwl 22(%r9), %esi1818; CHECK-BASELINE-NEXT: xorw %ax, %si1819; CHECK-BASELINE-NEXT: andw 22(%r10), %si1820; CHECK-BASELINE-NEXT: xorl %eax, %esi1821; CHECK-BASELINE-NEXT: movl 24(%r8), %eax1822; CHECK-BASELINE-NEXT: movzwl 24(%r9), %edx1823; CHECK-BASELINE-NEXT: xorw %ax, %dx1824; CHECK-BASELINE-NEXT: andw 24(%r10), %dx1825; CHECK-BASELINE-NEXT: xorl %eax, %edx1826; CHECK-BASELINE-NEXT: movzwl 26(%r8), %eax1827; CHECK-BASELINE-NEXT: movzwl 26(%r9), %ecx1828; CHECK-BASELINE-NEXT: xorw %ax, %cx1829; CHECK-BASELINE-NEXT: andw 26(%r10), %cx1830; CHECK-BASELINE-NEXT: xorl %eax, %ecx1831; CHECK-BASELINE-NEXT: movl 28(%r8), %edi1832; CHECK-BASELINE-NEXT: movzwl 28(%r9), %eax1833; CHECK-BASELINE-NEXT: xorw %di, %ax1834; CHECK-BASELINE-NEXT: andw 28(%r10), %ax1835; CHECK-BASELINE-NEXT: xorl %edi, %eax1836; CHECK-BASELINE-NEXT: movzwl 30(%r8), %edi1837; CHECK-BASELINE-NEXT: movzwl 30(%r9), %r8d1838; CHECK-BASELINE-NEXT: xorw %di, %r8w1839; CHECK-BASELINE-NEXT: andw 30(%r10), %r8w1840; CHECK-BASELINE-NEXT: xorl %edi, %r8d1841; CHECK-BASELINE-NEXT: movw %r8w, 30(%r11)1842; CHECK-BASELINE-NEXT: movw %ax, 28(%r11)1843; CHECK-BASELINE-NEXT: movw %cx, 26(%r11)1844; CHECK-BASELINE-NEXT: movw %dx, 24(%r11)1845; CHECK-BASELINE-NEXT: movw %si, 22(%r11)1846; CHECK-BASELINE-NEXT: movw %bp, 20(%r11)1847; CHECK-BASELINE-NEXT: movw %r15w, 18(%r11)1848; CHECK-BASELINE-NEXT: movw %r13w, 16(%r11)1849; CHECK-BASELINE-NEXT: movw %r12w, 14(%r11)1850; CHECK-BASELINE-NEXT: movw %r14w, 12(%r11)1851; CHECK-BASELINE-NEXT: movw %bx, 10(%r11)1852; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1853; CHECK-BASELINE-NEXT: movw %ax, 8(%r11)1854; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1855; CHECK-BASELINE-NEXT: movw %ax, 6(%r11)1856; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1857; CHECK-BASELINE-NEXT: movw %ax, 4(%r11)1858; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1859; CHECK-BASELINE-NEXT: movw %ax, 2(%r11)1860; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1861; CHECK-BASELINE-NEXT: movw %ax, (%r11)1862; CHECK-BASELINE-NEXT: movq %r11, %rax1863; CHECK-BASELINE-NEXT: popq %rbx1864; CHECK-BASELINE-NEXT: popq %r121865; CHECK-BASELINE-NEXT: popq %r131866; CHECK-BASELINE-NEXT: popq %r141867; CHECK-BASELINE-NEXT: popq %r151868; CHECK-BASELINE-NEXT: popq %rbp1869; CHECK-BASELINE-NEXT: retq1870;1871; CHECK-SSE1-LABEL: out_v16i16:1872; CHECK-SSE1: # %bb.0:1873; CHECK-SSE1-NEXT: pushq %rbp1874; CHECK-SSE1-NEXT: pushq %r151875; CHECK-SSE1-NEXT: pushq %r141876; CHECK-SSE1-NEXT: pushq %r131877; CHECK-SSE1-NEXT: pushq %r121878; CHECK-SSE1-NEXT: pushq %rbx1879; CHECK-SSE1-NEXT: movq %rcx, %r101880; CHECK-SSE1-NEXT: movq %rdx, %r81881; CHECK-SSE1-NEXT: movq %rsi, %r91882; CHECK-SSE1-NEXT: movq %rdi, %r111883; CHECK-SSE1-NEXT: movzwl 18(%rdx), %ebp1884; CHECK-SSE1-NEXT: movl 16(%rdx), %r15d1885; CHECK-SSE1-NEXT: movzwl 14(%rdx), %r13d1886; CHECK-SSE1-NEXT: movl 12(%rdx), %r12d1887; CHECK-SSE1-NEXT: movzwl 10(%rdx), %r14d1888; CHECK-SSE1-NEXT: movl 8(%rdx), %ebx1889; CHECK-SSE1-NEXT: movzwl 6(%rdx), %eax1890; CHECK-SSE1-NEXT: movl (%rdx), %ecx1891; CHECK-SSE1-NEXT: movl 4(%rdx), %edx1892; CHECK-SSE1-NEXT: movzwl 2(%r8), %esi1893; CHECK-SSE1-NEXT: movzwl (%r9), %edi1894; CHECK-SSE1-NEXT: xorw %cx, %di1895; CHECK-SSE1-NEXT: andw (%r10), %di1896; CHECK-SSE1-NEXT: xorl %ecx, %edi1897; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1898; CHECK-SSE1-NEXT: movzwl 2(%r9), %ecx1899; CHECK-SSE1-NEXT: xorw %si, %cx1900; CHECK-SSE1-NEXT: andw 2(%r10), %cx1901; CHECK-SSE1-NEXT: xorl %esi, %ecx1902; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1903; CHECK-SSE1-NEXT: movzwl 4(%r9), %ecx1904; CHECK-SSE1-NEXT: xorw %dx, %cx1905; CHECK-SSE1-NEXT: andw 4(%r10), %cx1906; CHECK-SSE1-NEXT: xorl %edx, %ecx1907; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1908; CHECK-SSE1-NEXT: movzwl 6(%r9), %ecx1909; CHECK-SSE1-NEXT: xorw %ax, %cx1910; CHECK-SSE1-NEXT: andw 6(%r10), %cx1911; CHECK-SSE1-NEXT: xorl %eax, %ecx1912; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1913; CHECK-SSE1-NEXT: movzwl 8(%r9), %eax1914; CHECK-SSE1-NEXT: xorw %bx, %ax1915; CHECK-SSE1-NEXT: andw 8(%r10), %ax1916; CHECK-SSE1-NEXT: xorl %ebx, %eax1917; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1918; CHECK-SSE1-NEXT: movzwl 10(%r9), %ebx1919; CHECK-SSE1-NEXT: xorw %r14w, %bx1920; CHECK-SSE1-NEXT: andw 10(%r10), %bx1921; CHECK-SSE1-NEXT: xorl %r14d, %ebx1922; CHECK-SSE1-NEXT: movzwl 12(%r9), %r14d1923; CHECK-SSE1-NEXT: xorw %r12w, %r14w1924; CHECK-SSE1-NEXT: andw 12(%r10), %r14w1925; CHECK-SSE1-NEXT: xorl %r12d, %r14d1926; CHECK-SSE1-NEXT: movzwl 14(%r9), %r12d1927; CHECK-SSE1-NEXT: xorw %r13w, %r12w1928; CHECK-SSE1-NEXT: andw 14(%r10), %r12w1929; CHECK-SSE1-NEXT: xorl %r13d, %r12d1930; CHECK-SSE1-NEXT: movzwl 16(%r9), %r13d1931; CHECK-SSE1-NEXT: xorw %r15w, %r13w1932; CHECK-SSE1-NEXT: andw 16(%r10), %r13w1933; CHECK-SSE1-NEXT: xorl %r15d, %r13d1934; CHECK-SSE1-NEXT: movzwl 18(%r9), %r15d1935; CHECK-SSE1-NEXT: xorw %bp, %r15w1936; CHECK-SSE1-NEXT: andw 18(%r10), %r15w1937; CHECK-SSE1-NEXT: xorl %ebp, %r15d1938; CHECK-SSE1-NEXT: movl 20(%r8), %eax1939; CHECK-SSE1-NEXT: movzwl 20(%r9), %ebp1940; CHECK-SSE1-NEXT: xorw %ax, %bp1941; CHECK-SSE1-NEXT: andw 20(%r10), %bp1942; CHECK-SSE1-NEXT: xorl %eax, %ebp1943; CHECK-SSE1-NEXT: movzwl 22(%r8), %eax1944; CHECK-SSE1-NEXT: movzwl 22(%r9), %esi1945; CHECK-SSE1-NEXT: xorw %ax, %si1946; CHECK-SSE1-NEXT: andw 22(%r10), %si1947; CHECK-SSE1-NEXT: xorl %eax, %esi1948; CHECK-SSE1-NEXT: movl 24(%r8), %eax1949; CHECK-SSE1-NEXT: movzwl 24(%r9), %edx1950; CHECK-SSE1-NEXT: xorw %ax, %dx1951; CHECK-SSE1-NEXT: andw 24(%r10), %dx1952; CHECK-SSE1-NEXT: xorl %eax, %edx1953; CHECK-SSE1-NEXT: movzwl 26(%r8), %eax1954; CHECK-SSE1-NEXT: movzwl 26(%r9), %ecx1955; CHECK-SSE1-NEXT: xorw %ax, %cx1956; CHECK-SSE1-NEXT: andw 26(%r10), %cx1957; CHECK-SSE1-NEXT: xorl %eax, %ecx1958; CHECK-SSE1-NEXT: movl 28(%r8), %edi1959; CHECK-SSE1-NEXT: movzwl 28(%r9), %eax1960; CHECK-SSE1-NEXT: xorw %di, %ax1961; CHECK-SSE1-NEXT: andw 28(%r10), %ax1962; CHECK-SSE1-NEXT: xorl %edi, %eax1963; CHECK-SSE1-NEXT: movzwl 30(%r8), %edi1964; CHECK-SSE1-NEXT: movzwl 30(%r9), %r8d1965; CHECK-SSE1-NEXT: xorw %di, %r8w1966; CHECK-SSE1-NEXT: andw 30(%r10), %r8w1967; CHECK-SSE1-NEXT: xorl %edi, %r8d1968; CHECK-SSE1-NEXT: movw %r8w, 30(%r11)1969; CHECK-SSE1-NEXT: movw %ax, 28(%r11)1970; CHECK-SSE1-NEXT: movw %cx, 26(%r11)1971; CHECK-SSE1-NEXT: movw %dx, 24(%r11)1972; CHECK-SSE1-NEXT: movw %si, 22(%r11)1973; CHECK-SSE1-NEXT: movw %bp, 20(%r11)1974; CHECK-SSE1-NEXT: movw %r15w, 18(%r11)1975; CHECK-SSE1-NEXT: movw %r13w, 16(%r11)1976; CHECK-SSE1-NEXT: movw %r12w, 14(%r11)1977; CHECK-SSE1-NEXT: movw %r14w, 12(%r11)1978; CHECK-SSE1-NEXT: movw %bx, 10(%r11)1979; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1980; CHECK-SSE1-NEXT: movw %ax, 8(%r11)1981; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1982; CHECK-SSE1-NEXT: movw %ax, 6(%r11)1983; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1984; CHECK-SSE1-NEXT: movw %ax, 4(%r11)1985; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1986; CHECK-SSE1-NEXT: movw %ax, 2(%r11)1987; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload1988; CHECK-SSE1-NEXT: movw %ax, (%r11)1989; CHECK-SSE1-NEXT: movq %r11, %rax1990; CHECK-SSE1-NEXT: popq %rbx1991; CHECK-SSE1-NEXT: popq %r121992; CHECK-SSE1-NEXT: popq %r131993; CHECK-SSE1-NEXT: popq %r141994; CHECK-SSE1-NEXT: popq %r151995; CHECK-SSE1-NEXT: popq %rbp1996; CHECK-SSE1-NEXT: retq1997;1998; CHECK-SSE2-LABEL: out_v16i16:1999; CHECK-SSE2: # %bb.0:2000; CHECK-SSE2-NEXT: movaps (%rdx), %xmm02001; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm12002; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm22003; CHECK-SSE2-NEXT: andps %xmm1, %xmm22004; CHECK-SSE2-NEXT: movaps (%rdi), %xmm32005; CHECK-SSE2-NEXT: andps %xmm0, %xmm32006; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm12007; CHECK-SSE2-NEXT: orps %xmm2, %xmm12008; CHECK-SSE2-NEXT: andnps (%rsi), %xmm02009; CHECK-SSE2-NEXT: orps %xmm3, %xmm02010; CHECK-SSE2-NEXT: retq2011;2012; CHECK-XOP-LABEL: out_v16i16:2013; CHECK-XOP: # %bb.0:2014; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm02015; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm12016; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm02017; CHECK-XOP-NEXT: retq2018 %x = load <16 x i16>, ptr%px, align 322019 %y = load <16 x i16>, ptr%py, align 322020 %mask = load <16 x i16>, ptr%pmask, align 322021 %mx = and <16 x i16> %x, %mask2022 %notmask = xor <16 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>2023 %my = and <16 x i16> %y, %notmask2024 %r = or <16 x i16> %mx, %my2025 ret <16 x i16> %r2026}2027 2028define <8 x i32> @out_v8i32(ptr%px, ptr%py, ptr%pmask) nounwind {2029; CHECK-BASELINE-LABEL: out_v8i32:2030; CHECK-BASELINE: # %bb.0:2031; CHECK-BASELINE-NEXT: pushq %rbp2032; CHECK-BASELINE-NEXT: pushq %r142033; CHECK-BASELINE-NEXT: pushq %rbx2034; CHECK-BASELINE-NEXT: movq %rdi, %rax2035; CHECK-BASELINE-NEXT: movl 28(%rdx), %edi2036; CHECK-BASELINE-NEXT: movl 24(%rdx), %r8d2037; CHECK-BASELINE-NEXT: movl 20(%rdx), %r10d2038; CHECK-BASELINE-NEXT: movl 16(%rdx), %ebx2039; CHECK-BASELINE-NEXT: movl 12(%rdx), %r14d2040; CHECK-BASELINE-NEXT: movl 8(%rdx), %ebp2041; CHECK-BASELINE-NEXT: movl (%rdx), %r9d2042; CHECK-BASELINE-NEXT: movl 4(%rdx), %r11d2043; CHECK-BASELINE-NEXT: movl (%rsi), %edx2044; CHECK-BASELINE-NEXT: xorl %r9d, %edx2045; CHECK-BASELINE-NEXT: andl (%rcx), %edx2046; CHECK-BASELINE-NEXT: xorl %r9d, %edx2047; CHECK-BASELINE-NEXT: movl 4(%rsi), %r9d2048; CHECK-BASELINE-NEXT: xorl %r11d, %r9d2049; CHECK-BASELINE-NEXT: andl 4(%rcx), %r9d2050; CHECK-BASELINE-NEXT: xorl %r11d, %r9d2051; CHECK-BASELINE-NEXT: movl 8(%rsi), %r11d2052; CHECK-BASELINE-NEXT: xorl %ebp, %r11d2053; CHECK-BASELINE-NEXT: andl 8(%rcx), %r11d2054; CHECK-BASELINE-NEXT: xorl %ebp, %r11d2055; CHECK-BASELINE-NEXT: movl 12(%rsi), %ebp2056; CHECK-BASELINE-NEXT: xorl %r14d, %ebp2057; CHECK-BASELINE-NEXT: andl 12(%rcx), %ebp2058; CHECK-BASELINE-NEXT: xorl %r14d, %ebp2059; CHECK-BASELINE-NEXT: movl 16(%rsi), %r14d2060; CHECK-BASELINE-NEXT: xorl %ebx, %r14d2061; CHECK-BASELINE-NEXT: andl 16(%rcx), %r14d2062; CHECK-BASELINE-NEXT: xorl %ebx, %r14d2063; CHECK-BASELINE-NEXT: movl 20(%rsi), %ebx2064; CHECK-BASELINE-NEXT: xorl %r10d, %ebx2065; CHECK-BASELINE-NEXT: andl 20(%rcx), %ebx2066; CHECK-BASELINE-NEXT: xorl %r10d, %ebx2067; CHECK-BASELINE-NEXT: movl 24(%rsi), %r10d2068; CHECK-BASELINE-NEXT: xorl %r8d, %r10d2069; CHECK-BASELINE-NEXT: andl 24(%rcx), %r10d2070; CHECK-BASELINE-NEXT: xorl %r8d, %r10d2071; CHECK-BASELINE-NEXT: movl 28(%rsi), %esi2072; CHECK-BASELINE-NEXT: xorl %edi, %esi2073; CHECK-BASELINE-NEXT: andl 28(%rcx), %esi2074; CHECK-BASELINE-NEXT: xorl %edi, %esi2075; CHECK-BASELINE-NEXT: movl %esi, 28(%rax)2076; CHECK-BASELINE-NEXT: movl %r10d, 24(%rax)2077; CHECK-BASELINE-NEXT: movl %ebx, 20(%rax)2078; CHECK-BASELINE-NEXT: movl %r14d, 16(%rax)2079; CHECK-BASELINE-NEXT: movl %ebp, 12(%rax)2080; CHECK-BASELINE-NEXT: movl %r11d, 8(%rax)2081; CHECK-BASELINE-NEXT: movl %r9d, 4(%rax)2082; CHECK-BASELINE-NEXT: movl %edx, (%rax)2083; CHECK-BASELINE-NEXT: popq %rbx2084; CHECK-BASELINE-NEXT: popq %r142085; CHECK-BASELINE-NEXT: popq %rbp2086; CHECK-BASELINE-NEXT: retq2087;2088; CHECK-SSE1-LABEL: out_v8i32:2089; CHECK-SSE1: # %bb.0:2090; CHECK-SSE1-NEXT: pushq %rbp2091; CHECK-SSE1-NEXT: pushq %r142092; CHECK-SSE1-NEXT: pushq %rbx2093; CHECK-SSE1-NEXT: movq %rdi, %rax2094; CHECK-SSE1-NEXT: movl 28(%rdx), %edi2095; CHECK-SSE1-NEXT: movl 24(%rdx), %r8d2096; CHECK-SSE1-NEXT: movl 20(%rdx), %r10d2097; CHECK-SSE1-NEXT: movl 16(%rdx), %ebx2098; CHECK-SSE1-NEXT: movl 12(%rdx), %r14d2099; CHECK-SSE1-NEXT: movl 8(%rdx), %ebp2100; CHECK-SSE1-NEXT: movl (%rdx), %r9d2101; CHECK-SSE1-NEXT: movl 4(%rdx), %r11d2102; CHECK-SSE1-NEXT: movl (%rsi), %edx2103; CHECK-SSE1-NEXT: xorl %r9d, %edx2104; CHECK-SSE1-NEXT: andl (%rcx), %edx2105; CHECK-SSE1-NEXT: xorl %r9d, %edx2106; CHECK-SSE1-NEXT: movl 4(%rsi), %r9d2107; CHECK-SSE1-NEXT: xorl %r11d, %r9d2108; CHECK-SSE1-NEXT: andl 4(%rcx), %r9d2109; CHECK-SSE1-NEXT: xorl %r11d, %r9d2110; CHECK-SSE1-NEXT: movl 8(%rsi), %r11d2111; CHECK-SSE1-NEXT: xorl %ebp, %r11d2112; CHECK-SSE1-NEXT: andl 8(%rcx), %r11d2113; CHECK-SSE1-NEXT: xorl %ebp, %r11d2114; CHECK-SSE1-NEXT: movl 12(%rsi), %ebp2115; CHECK-SSE1-NEXT: xorl %r14d, %ebp2116; CHECK-SSE1-NEXT: andl 12(%rcx), %ebp2117; CHECK-SSE1-NEXT: xorl %r14d, %ebp2118; CHECK-SSE1-NEXT: movl 16(%rsi), %r14d2119; CHECK-SSE1-NEXT: xorl %ebx, %r14d2120; CHECK-SSE1-NEXT: andl 16(%rcx), %r14d2121; CHECK-SSE1-NEXT: xorl %ebx, %r14d2122; CHECK-SSE1-NEXT: movl 20(%rsi), %ebx2123; CHECK-SSE1-NEXT: xorl %r10d, %ebx2124; CHECK-SSE1-NEXT: andl 20(%rcx), %ebx2125; CHECK-SSE1-NEXT: xorl %r10d, %ebx2126; CHECK-SSE1-NEXT: movl 24(%rsi), %r10d2127; CHECK-SSE1-NEXT: xorl %r8d, %r10d2128; CHECK-SSE1-NEXT: andl 24(%rcx), %r10d2129; CHECK-SSE1-NEXT: xorl %r8d, %r10d2130; CHECK-SSE1-NEXT: movl 28(%rsi), %esi2131; CHECK-SSE1-NEXT: xorl %edi, %esi2132; CHECK-SSE1-NEXT: andl 28(%rcx), %esi2133; CHECK-SSE1-NEXT: xorl %edi, %esi2134; CHECK-SSE1-NEXT: movl %esi, 28(%rax)2135; CHECK-SSE1-NEXT: movl %r10d, 24(%rax)2136; CHECK-SSE1-NEXT: movl %ebx, 20(%rax)2137; CHECK-SSE1-NEXT: movl %r14d, 16(%rax)2138; CHECK-SSE1-NEXT: movl %ebp, 12(%rax)2139; CHECK-SSE1-NEXT: movl %r11d, 8(%rax)2140; CHECK-SSE1-NEXT: movl %r9d, 4(%rax)2141; CHECK-SSE1-NEXT: movl %edx, (%rax)2142; CHECK-SSE1-NEXT: popq %rbx2143; CHECK-SSE1-NEXT: popq %r142144; CHECK-SSE1-NEXT: popq %rbp2145; CHECK-SSE1-NEXT: retq2146;2147; CHECK-SSE2-LABEL: out_v8i32:2148; CHECK-SSE2: # %bb.0:2149; CHECK-SSE2-NEXT: movaps (%rdx), %xmm02150; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm12151; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm22152; CHECK-SSE2-NEXT: andps %xmm1, %xmm22153; CHECK-SSE2-NEXT: movaps (%rdi), %xmm32154; CHECK-SSE2-NEXT: andps %xmm0, %xmm32155; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm12156; CHECK-SSE2-NEXT: orps %xmm2, %xmm12157; CHECK-SSE2-NEXT: andnps (%rsi), %xmm02158; CHECK-SSE2-NEXT: orps %xmm3, %xmm02159; CHECK-SSE2-NEXT: retq2160;2161; CHECK-XOP-LABEL: out_v8i32:2162; CHECK-XOP: # %bb.0:2163; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm02164; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm12165; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm02166; CHECK-XOP-NEXT: retq2167 %x = load <8 x i32>, ptr%px, align 322168 %y = load <8 x i32>, ptr%py, align 322169 %mask = load <8 x i32>, ptr%pmask, align 322170 %mx = and <8 x i32> %x, %mask2171 %notmask = xor <8 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>2172 %my = and <8 x i32> %y, %notmask2173 %r = or <8 x i32> %mx, %my2174 ret <8 x i32> %r2175}2176 2177define <4 x i64> @out_v4i64(ptr%px, ptr%py, ptr%pmask) nounwind {2178; CHECK-BASELINE-LABEL: out_v4i64:2179; CHECK-BASELINE: # %bb.0:2180; CHECK-BASELINE-NEXT: movq %rdi, %rax2181; CHECK-BASELINE-NEXT: movq 24(%rdx), %rdi2182; CHECK-BASELINE-NEXT: movq 16(%rdx), %r82183; CHECK-BASELINE-NEXT: movq (%rdx), %r92184; CHECK-BASELINE-NEXT: movq 8(%rdx), %r102185; CHECK-BASELINE-NEXT: movq (%rsi), %rdx2186; CHECK-BASELINE-NEXT: xorq %r9, %rdx2187; CHECK-BASELINE-NEXT: andq (%rcx), %rdx2188; CHECK-BASELINE-NEXT: xorq %r9, %rdx2189; CHECK-BASELINE-NEXT: movq 8(%rsi), %r92190; CHECK-BASELINE-NEXT: xorq %r10, %r92191; CHECK-BASELINE-NEXT: andq 8(%rcx), %r92192; CHECK-BASELINE-NEXT: xorq %r10, %r92193; CHECK-BASELINE-NEXT: movq 16(%rsi), %r102194; CHECK-BASELINE-NEXT: xorq %r8, %r102195; CHECK-BASELINE-NEXT: andq 16(%rcx), %r102196; CHECK-BASELINE-NEXT: xorq %r8, %r102197; CHECK-BASELINE-NEXT: movq 24(%rsi), %rsi2198; CHECK-BASELINE-NEXT: xorq %rdi, %rsi2199; CHECK-BASELINE-NEXT: andq 24(%rcx), %rsi2200; CHECK-BASELINE-NEXT: xorq %rdi, %rsi2201; CHECK-BASELINE-NEXT: movq %rsi, 24(%rax)2202; CHECK-BASELINE-NEXT: movq %r10, 16(%rax)2203; CHECK-BASELINE-NEXT: movq %r9, 8(%rax)2204; CHECK-BASELINE-NEXT: movq %rdx, (%rax)2205; CHECK-BASELINE-NEXT: retq2206;2207; CHECK-SSE1-LABEL: out_v4i64:2208; CHECK-SSE1: # %bb.0:2209; CHECK-SSE1-NEXT: movq %rdi, %rax2210; CHECK-SSE1-NEXT: movq 24(%rdx), %rdi2211; CHECK-SSE1-NEXT: movq 16(%rdx), %r82212; CHECK-SSE1-NEXT: movq (%rdx), %r92213; CHECK-SSE1-NEXT: movq 8(%rdx), %r102214; CHECK-SSE1-NEXT: movq (%rsi), %rdx2215; CHECK-SSE1-NEXT: xorq %r9, %rdx2216; CHECK-SSE1-NEXT: andq (%rcx), %rdx2217; CHECK-SSE1-NEXT: xorq %r9, %rdx2218; CHECK-SSE1-NEXT: movq 8(%rsi), %r92219; CHECK-SSE1-NEXT: xorq %r10, %r92220; CHECK-SSE1-NEXT: andq 8(%rcx), %r92221; CHECK-SSE1-NEXT: xorq %r10, %r92222; CHECK-SSE1-NEXT: movq 16(%rsi), %r102223; CHECK-SSE1-NEXT: xorq %r8, %r102224; CHECK-SSE1-NEXT: andq 16(%rcx), %r102225; CHECK-SSE1-NEXT: xorq %r8, %r102226; CHECK-SSE1-NEXT: movq 24(%rsi), %rsi2227; CHECK-SSE1-NEXT: xorq %rdi, %rsi2228; CHECK-SSE1-NEXT: andq 24(%rcx), %rsi2229; CHECK-SSE1-NEXT: xorq %rdi, %rsi2230; CHECK-SSE1-NEXT: movq %rsi, 24(%rax)2231; CHECK-SSE1-NEXT: movq %r10, 16(%rax)2232; CHECK-SSE1-NEXT: movq %r9, 8(%rax)2233; CHECK-SSE1-NEXT: movq %rdx, (%rax)2234; CHECK-SSE1-NEXT: retq2235;2236; CHECK-SSE2-LABEL: out_v4i64:2237; CHECK-SSE2: # %bb.0:2238; CHECK-SSE2-NEXT: movaps (%rdx), %xmm02239; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm12240; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm22241; CHECK-SSE2-NEXT: andps %xmm1, %xmm22242; CHECK-SSE2-NEXT: movaps (%rdi), %xmm32243; CHECK-SSE2-NEXT: andps %xmm0, %xmm32244; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm12245; CHECK-SSE2-NEXT: orps %xmm2, %xmm12246; CHECK-SSE2-NEXT: andnps (%rsi), %xmm02247; CHECK-SSE2-NEXT: orps %xmm3, %xmm02248; CHECK-SSE2-NEXT: retq2249;2250; CHECK-XOP-LABEL: out_v4i64:2251; CHECK-XOP: # %bb.0:2252; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm02253; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm12254; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm02255; CHECK-XOP-NEXT: retq2256 %x = load <4 x i64>, ptr%px, align 322257 %y = load <4 x i64>, ptr%py, align 322258 %mask = load <4 x i64>, ptr%pmask, align 322259 %mx = and <4 x i64> %x, %mask2260 %notmask = xor <4 x i64> %mask, <i64 -1, i64 -1, i64 -1, i64 -1>2261 %my = and <4 x i64> %y, %notmask2262 %r = or <4 x i64> %mx, %my2263 ret <4 x i64> %r2264}2265 2266;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;2267; Should be the same as the previous one.2268;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;2269 2270; ============================================================================ ;2271; 8-bit vector width2272; ============================================================================ ;2273 2274define <1 x i8> @in_v1i8(<1 x i8> %x, <1 x i8> %y, <1 x i8> %mask) nounwind {2275; CHECK-LABEL: in_v1i8:2276; CHECK: # %bb.0:2277; CHECK-NEXT: movl %edi, %eax2278; CHECK-NEXT: xorl %esi, %eax2279; CHECK-NEXT: andl %edx, %eax2280; CHECK-NEXT: xorl %esi, %eax2281; CHECK-NEXT: # kill: def $al killed $al killed $eax2282; CHECK-NEXT: retq2283 %n0 = xor <1 x i8> %x, %y2284 %n1 = and <1 x i8> %n0, %mask2285 %r = xor <1 x i8> %n1, %y2286 ret <1 x i8> %r2287}2288 2289; ============================================================================ ;2290; 16-bit vector width2291; ============================================================================ ;2292 2293define <2 x i8> @in_v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> %mask) nounwind {2294; CHECK-BASELINE-LABEL: in_v2i8:2295; CHECK-BASELINE: # %bb.0:2296; CHECK-BASELINE-NEXT: movl %edi, %eax2297; CHECK-BASELINE-NEXT: xorl %edx, %eax2298; CHECK-BASELINE-NEXT: xorl %ecx, %esi2299; CHECK-BASELINE-NEXT: andl %r9d, %esi2300; CHECK-BASELINE-NEXT: andl %r8d, %eax2301; CHECK-BASELINE-NEXT: xorl %edx, %eax2302; CHECK-BASELINE-NEXT: xorl %ecx, %esi2303; CHECK-BASELINE-NEXT: # kill: def $al killed $al killed $eax2304; CHECK-BASELINE-NEXT: movl %esi, %edx2305; CHECK-BASELINE-NEXT: retq2306;2307; CHECK-SSE1-LABEL: in_v2i8:2308; CHECK-SSE1: # %bb.0:2309; CHECK-SSE1-NEXT: movl %edi, %eax2310; CHECK-SSE1-NEXT: xorl %edx, %eax2311; CHECK-SSE1-NEXT: xorl %ecx, %esi2312; CHECK-SSE1-NEXT: andl %r9d, %esi2313; CHECK-SSE1-NEXT: andl %r8d, %eax2314; CHECK-SSE1-NEXT: xorl %edx, %eax2315; CHECK-SSE1-NEXT: xorl %ecx, %esi2316; CHECK-SSE1-NEXT: # kill: def $al killed $al killed $eax2317; CHECK-SSE1-NEXT: movl %esi, %edx2318; CHECK-SSE1-NEXT: retq2319;2320; CHECK-SSE2-LABEL: in_v2i8:2321; CHECK-SSE2: # %bb.0:2322; CHECK-SSE2-NEXT: andps %xmm2, %xmm02323; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22324; CHECK-SSE2-NEXT: orps %xmm2, %xmm02325; CHECK-SSE2-NEXT: retq2326;2327; CHECK-XOP-LABEL: in_v2i8:2328; CHECK-XOP: # %bb.0:2329; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02330; CHECK-XOP-NEXT: retq2331 %n0 = xor <2 x i8> %x, %y2332 %n1 = and <2 x i8> %n0, %mask2333 %r = xor <2 x i8> %n1, %y2334 ret <2 x i8> %r2335}2336 2337define <1 x i16> @in_v1i16(<1 x i16> %x, <1 x i16> %y, <1 x i16> %mask) nounwind {2338; CHECK-LABEL: in_v1i16:2339; CHECK: # %bb.0:2340; CHECK-NEXT: movl %edi, %eax2341; CHECK-NEXT: xorl %esi, %eax2342; CHECK-NEXT: andl %edx, %eax2343; CHECK-NEXT: xorl %esi, %eax2344; CHECK-NEXT: # kill: def $ax killed $ax killed $eax2345; CHECK-NEXT: retq2346 %n0 = xor <1 x i16> %x, %y2347 %n1 = and <1 x i16> %n0, %mask2348 %r = xor <1 x i16> %n1, %y2349 ret <1 x i16> %r2350}2351 2352; ============================================================================ ;2353; 32-bit vector width2354; ============================================================================ ;2355 2356define <4 x i8> @in_v4i8(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind {2357; CHECK-BASELINE-LABEL: in_v4i8:2358; CHECK-BASELINE: # %bb.0:2359; CHECK-BASELINE-NEXT: movq %rdi, %rax2360; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edi2361; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2362; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2363; CHECK-BASELINE-NEXT: xorl %r9d, %esi2364; CHECK-BASELINE-NEXT: xorb %r11b, %dl2365; CHECK-BASELINE-NEXT: xorb %r10b, %cl2366; CHECK-BASELINE-NEXT: xorb %dil, %r8b2367; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b2368; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl2369; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl2370; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil2371; CHECK-BASELINE-NEXT: xorb %r9b, %sil2372; CHECK-BASELINE-NEXT: xorb %r11b, %dl2373; CHECK-BASELINE-NEXT: xorb %r10b, %cl2374; CHECK-BASELINE-NEXT: xorb %dil, %r8b2375; CHECK-BASELINE-NEXT: movb %r8b, 3(%rax)2376; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)2377; CHECK-BASELINE-NEXT: movb %dl, 1(%rax)2378; CHECK-BASELINE-NEXT: movb %sil, (%rax)2379; CHECK-BASELINE-NEXT: retq2380;2381; CHECK-SSE1-LABEL: in_v4i8:2382; CHECK-SSE1: # %bb.0:2383; CHECK-SSE1-NEXT: movq %rdi, %rax2384; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edi2385; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2386; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2387; CHECK-SSE1-NEXT: xorl %r9d, %esi2388; CHECK-SSE1-NEXT: xorb %r11b, %dl2389; CHECK-SSE1-NEXT: xorb %r10b, %cl2390; CHECK-SSE1-NEXT: xorb %dil, %r8b2391; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b2392; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl2393; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl2394; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil2395; CHECK-SSE1-NEXT: xorb %r9b, %sil2396; CHECK-SSE1-NEXT: xorb %r11b, %dl2397; CHECK-SSE1-NEXT: xorb %r10b, %cl2398; CHECK-SSE1-NEXT: xorb %dil, %r8b2399; CHECK-SSE1-NEXT: movb %r8b, 3(%rax)2400; CHECK-SSE1-NEXT: movb %cl, 2(%rax)2401; CHECK-SSE1-NEXT: movb %dl, 1(%rax)2402; CHECK-SSE1-NEXT: movb %sil, (%rax)2403; CHECK-SSE1-NEXT: retq2404;2405; CHECK-SSE2-LABEL: in_v4i8:2406; CHECK-SSE2: # %bb.0:2407; CHECK-SSE2-NEXT: andps %xmm2, %xmm02408; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22409; CHECK-SSE2-NEXT: orps %xmm2, %xmm02410; CHECK-SSE2-NEXT: retq2411;2412; CHECK-XOP-LABEL: in_v4i8:2413; CHECK-XOP: # %bb.0:2414; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02415; CHECK-XOP-NEXT: retq2416 %n0 = xor <4 x i8> %x, %y2417 %n1 = and <4 x i8> %n0, %mask2418 %r = xor <4 x i8> %n1, %y2419 ret <4 x i8> %r2420}2421 2422define <2 x i16> @in_v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> %mask) nounwind {2423; CHECK-BASELINE-LABEL: in_v2i16:2424; CHECK-BASELINE: # %bb.0:2425; CHECK-BASELINE-NEXT: movl %edi, %eax2426; CHECK-BASELINE-NEXT: xorl %edx, %eax2427; CHECK-BASELINE-NEXT: xorl %ecx, %esi2428; CHECK-BASELINE-NEXT: andl %r9d, %esi2429; CHECK-BASELINE-NEXT: andl %r8d, %eax2430; CHECK-BASELINE-NEXT: xorl %edx, %eax2431; CHECK-BASELINE-NEXT: xorl %ecx, %esi2432; CHECK-BASELINE-NEXT: # kill: def $ax killed $ax killed $eax2433; CHECK-BASELINE-NEXT: movl %esi, %edx2434; CHECK-BASELINE-NEXT: retq2435;2436; CHECK-SSE1-LABEL: in_v2i16:2437; CHECK-SSE1: # %bb.0:2438; CHECK-SSE1-NEXT: movl %edi, %eax2439; CHECK-SSE1-NEXT: xorl %edx, %eax2440; CHECK-SSE1-NEXT: xorl %ecx, %esi2441; CHECK-SSE1-NEXT: andl %r9d, %esi2442; CHECK-SSE1-NEXT: andl %r8d, %eax2443; CHECK-SSE1-NEXT: xorl %edx, %eax2444; CHECK-SSE1-NEXT: xorl %ecx, %esi2445; CHECK-SSE1-NEXT: # kill: def $ax killed $ax killed $eax2446; CHECK-SSE1-NEXT: movl %esi, %edx2447; CHECK-SSE1-NEXT: retq2448;2449; CHECK-SSE2-LABEL: in_v2i16:2450; CHECK-SSE2: # %bb.0:2451; CHECK-SSE2-NEXT: andps %xmm2, %xmm02452; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22453; CHECK-SSE2-NEXT: orps %xmm2, %xmm02454; CHECK-SSE2-NEXT: retq2455;2456; CHECK-XOP-LABEL: in_v2i16:2457; CHECK-XOP: # %bb.0:2458; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02459; CHECK-XOP-NEXT: retq2460 %n0 = xor <2 x i16> %x, %y2461 %n1 = and <2 x i16> %n0, %mask2462 %r = xor <2 x i16> %n1, %y2463 ret <2 x i16> %r2464}2465 2466define <1 x i32> @in_v1i32(<1 x i32> %x, <1 x i32> %y, <1 x i32> %mask) nounwind {2467; CHECK-LABEL: in_v1i32:2468; CHECK: # %bb.0:2469; CHECK-NEXT: movl %edi, %eax2470; CHECK-NEXT: xorl %esi, %eax2471; CHECK-NEXT: andl %edx, %eax2472; CHECK-NEXT: xorl %esi, %eax2473; CHECK-NEXT: retq2474 %n0 = xor <1 x i32> %x, %y2475 %n1 = and <1 x i32> %n0, %mask2476 %r = xor <1 x i32> %n1, %y2477 ret <1 x i32> %r2478}2479 2480; ============================================================================ ;2481; 64-bit vector width2482; ============================================================================ ;2483 2484define <8 x i8> @in_v8i8(<8 x i8> %x, <8 x i8> %y, <8 x i8> %mask) nounwind {2485; CHECK-BASELINE-LABEL: in_v8i8:2486; CHECK-BASELINE: # %bb.0:2487; CHECK-BASELINE-NEXT: pushq %rbp2488; CHECK-BASELINE-NEXT: pushq %r152489; CHECK-BASELINE-NEXT: pushq %r142490; CHECK-BASELINE-NEXT: pushq %r132491; CHECK-BASELINE-NEXT: pushq %r122492; CHECK-BASELINE-NEXT: pushq %rbx2493; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2494; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx2495; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp2496; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d2497; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d2498; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2499; CHECK-BASELINE-NEXT: xorb %r11b, %sil2500; CHECK-BASELINE-NEXT: xorb %r12b, %dl2501; CHECK-BASELINE-NEXT: xorb %r14b, %cl2502; CHECK-BASELINE-NEXT: xorb %bpl, %r8b2503; CHECK-BASELINE-NEXT: xorb %bl, %r9b2504; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d2505; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %r15b2506; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d2507; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %r13b2508; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2509; CHECK-BASELINE-NEXT: xorb %r10b, %al2510; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r9b2511; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b2512; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl2513; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl2514; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil2515; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %al2516; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r13b2517; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r15b2518; CHECK-BASELINE-NEXT: xorb %r11b, %sil2519; CHECK-BASELINE-NEXT: xorb %r12b, %dl2520; CHECK-BASELINE-NEXT: xorb %r14b, %cl2521; CHECK-BASELINE-NEXT: xorb %bpl, %r8b2522; CHECK-BASELINE-NEXT: xorb %bl, %r9b2523; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %r15b2524; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %r13b2525; CHECK-BASELINE-NEXT: xorb %r10b, %al2526; CHECK-BASELINE-NEXT: movb %al, 7(%rdi)2527; CHECK-BASELINE-NEXT: movb %r13b, 6(%rdi)2528; CHECK-BASELINE-NEXT: movb %r15b, 5(%rdi)2529; CHECK-BASELINE-NEXT: movb %r9b, 4(%rdi)2530; CHECK-BASELINE-NEXT: movb %r8b, 3(%rdi)2531; CHECK-BASELINE-NEXT: movb %cl, 2(%rdi)2532; CHECK-BASELINE-NEXT: movb %dl, 1(%rdi)2533; CHECK-BASELINE-NEXT: movb %sil, (%rdi)2534; CHECK-BASELINE-NEXT: movq %rdi, %rax2535; CHECK-BASELINE-NEXT: popq %rbx2536; CHECK-BASELINE-NEXT: popq %r122537; CHECK-BASELINE-NEXT: popq %r132538; CHECK-BASELINE-NEXT: popq %r142539; CHECK-BASELINE-NEXT: popq %r152540; CHECK-BASELINE-NEXT: popq %rbp2541; CHECK-BASELINE-NEXT: retq2542;2543; CHECK-SSE1-LABEL: in_v8i8:2544; CHECK-SSE1: # %bb.0:2545; CHECK-SSE1-NEXT: pushq %rbp2546; CHECK-SSE1-NEXT: pushq %r152547; CHECK-SSE1-NEXT: pushq %r142548; CHECK-SSE1-NEXT: pushq %r132549; CHECK-SSE1-NEXT: pushq %r122550; CHECK-SSE1-NEXT: pushq %rbx2551; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2552; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx2553; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp2554; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d2555; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d2556; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2557; CHECK-SSE1-NEXT: xorb %r11b, %sil2558; CHECK-SSE1-NEXT: xorb %r12b, %dl2559; CHECK-SSE1-NEXT: xorb %r14b, %cl2560; CHECK-SSE1-NEXT: xorb %bpl, %r8b2561; CHECK-SSE1-NEXT: xorb %bl, %r9b2562; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d2563; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %r15b2564; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d2565; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %r13b2566; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2567; CHECK-SSE1-NEXT: xorb %r10b, %al2568; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r9b2569; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b2570; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl2571; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl2572; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil2573; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %al2574; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r13b2575; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r15b2576; CHECK-SSE1-NEXT: xorb %r11b, %sil2577; CHECK-SSE1-NEXT: xorb %r12b, %dl2578; CHECK-SSE1-NEXT: xorb %r14b, %cl2579; CHECK-SSE1-NEXT: xorb %bpl, %r8b2580; CHECK-SSE1-NEXT: xorb %bl, %r9b2581; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %r15b2582; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %r13b2583; CHECK-SSE1-NEXT: xorb %r10b, %al2584; CHECK-SSE1-NEXT: movb %al, 7(%rdi)2585; CHECK-SSE1-NEXT: movb %r13b, 6(%rdi)2586; CHECK-SSE1-NEXT: movb %r15b, 5(%rdi)2587; CHECK-SSE1-NEXT: movb %r9b, 4(%rdi)2588; CHECK-SSE1-NEXT: movb %r8b, 3(%rdi)2589; CHECK-SSE1-NEXT: movb %cl, 2(%rdi)2590; CHECK-SSE1-NEXT: movb %dl, 1(%rdi)2591; CHECK-SSE1-NEXT: movb %sil, (%rdi)2592; CHECK-SSE1-NEXT: movq %rdi, %rax2593; CHECK-SSE1-NEXT: popq %rbx2594; CHECK-SSE1-NEXT: popq %r122595; CHECK-SSE1-NEXT: popq %r132596; CHECK-SSE1-NEXT: popq %r142597; CHECK-SSE1-NEXT: popq %r152598; CHECK-SSE1-NEXT: popq %rbp2599; CHECK-SSE1-NEXT: retq2600;2601; CHECK-SSE2-LABEL: in_v8i8:2602; CHECK-SSE2: # %bb.0:2603; CHECK-SSE2-NEXT: andps %xmm2, %xmm02604; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22605; CHECK-SSE2-NEXT: orps %xmm2, %xmm02606; CHECK-SSE2-NEXT: retq2607;2608; CHECK-XOP-LABEL: in_v8i8:2609; CHECK-XOP: # %bb.0:2610; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02611; CHECK-XOP-NEXT: retq2612 %n0 = xor <8 x i8> %x, %y2613 %n1 = and <8 x i8> %n0, %mask2614 %r = xor <8 x i8> %n1, %y2615 ret <8 x i8> %r2616}2617 2618define <4 x i16> @in_v4i16(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwind {2619; CHECK-BASELINE-LABEL: in_v4i16:2620; CHECK-BASELINE: # %bb.0:2621; CHECK-BASELINE-NEXT: movq %rdi, %rax2622; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi2623; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d2624; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d2625; CHECK-BASELINE-NEXT: xorl %r9d, %esi2626; CHECK-BASELINE-NEXT: xorl %r11d, %edx2627; CHECK-BASELINE-NEXT: xorl %r10d, %ecx2628; CHECK-BASELINE-NEXT: xorl %edi, %r8d2629; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w2630; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx2631; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx2632; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si2633; CHECK-BASELINE-NEXT: xorl %r9d, %esi2634; CHECK-BASELINE-NEXT: xorl %r11d, %edx2635; CHECK-BASELINE-NEXT: xorl %r10d, %ecx2636; CHECK-BASELINE-NEXT: xorl %edi, %r8d2637; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)2638; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)2639; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)2640; CHECK-BASELINE-NEXT: movw %si, (%rax)2641; CHECK-BASELINE-NEXT: retq2642;2643; CHECK-SSE1-LABEL: in_v4i16:2644; CHECK-SSE1: # %bb.0:2645; CHECK-SSE1-NEXT: movq %rdi, %rax2646; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi2647; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d2648; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d2649; CHECK-SSE1-NEXT: xorl %r9d, %esi2650; CHECK-SSE1-NEXT: xorl %r11d, %edx2651; CHECK-SSE1-NEXT: xorl %r10d, %ecx2652; CHECK-SSE1-NEXT: xorl %edi, %r8d2653; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w2654; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx2655; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx2656; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si2657; CHECK-SSE1-NEXT: xorl %r9d, %esi2658; CHECK-SSE1-NEXT: xorl %r11d, %edx2659; CHECK-SSE1-NEXT: xorl %r10d, %ecx2660; CHECK-SSE1-NEXT: xorl %edi, %r8d2661; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)2662; CHECK-SSE1-NEXT: movw %cx, 4(%rax)2663; CHECK-SSE1-NEXT: movw %dx, 2(%rax)2664; CHECK-SSE1-NEXT: movw %si, (%rax)2665; CHECK-SSE1-NEXT: retq2666;2667; CHECK-SSE2-LABEL: in_v4i16:2668; CHECK-SSE2: # %bb.0:2669; CHECK-SSE2-NEXT: andps %xmm2, %xmm02670; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22671; CHECK-SSE2-NEXT: orps %xmm2, %xmm02672; CHECK-SSE2-NEXT: retq2673;2674; CHECK-XOP-LABEL: in_v4i16:2675; CHECK-XOP: # %bb.0:2676; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02677; CHECK-XOP-NEXT: retq2678 %n0 = xor <4 x i16> %x, %y2679 %n1 = and <4 x i16> %n0, %mask2680 %r = xor <4 x i16> %n1, %y2681 ret <4 x i16> %r2682}2683 2684define <2 x i32> @in_v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> %mask) nounwind {2685; CHECK-BASELINE-LABEL: in_v2i32:2686; CHECK-BASELINE: # %bb.0:2687; CHECK-BASELINE-NEXT: movl %edi, %eax2688; CHECK-BASELINE-NEXT: xorl %edx, %eax2689; CHECK-BASELINE-NEXT: xorl %ecx, %esi2690; CHECK-BASELINE-NEXT: andl %r9d, %esi2691; CHECK-BASELINE-NEXT: andl %r8d, %eax2692; CHECK-BASELINE-NEXT: xorl %edx, %eax2693; CHECK-BASELINE-NEXT: xorl %ecx, %esi2694; CHECK-BASELINE-NEXT: movl %esi, %edx2695; CHECK-BASELINE-NEXT: retq2696;2697; CHECK-SSE1-LABEL: in_v2i32:2698; CHECK-SSE1: # %bb.0:2699; CHECK-SSE1-NEXT: movl %edi, %eax2700; CHECK-SSE1-NEXT: xorl %edx, %eax2701; CHECK-SSE1-NEXT: xorl %ecx, %esi2702; CHECK-SSE1-NEXT: andl %r9d, %esi2703; CHECK-SSE1-NEXT: andl %r8d, %eax2704; CHECK-SSE1-NEXT: xorl %edx, %eax2705; CHECK-SSE1-NEXT: xorl %ecx, %esi2706; CHECK-SSE1-NEXT: movl %esi, %edx2707; CHECK-SSE1-NEXT: retq2708;2709; CHECK-SSE2-LABEL: in_v2i32:2710; CHECK-SSE2: # %bb.0:2711; CHECK-SSE2-NEXT: andps %xmm2, %xmm02712; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22713; CHECK-SSE2-NEXT: orps %xmm2, %xmm02714; CHECK-SSE2-NEXT: retq2715;2716; CHECK-XOP-LABEL: in_v2i32:2717; CHECK-XOP: # %bb.0:2718; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02719; CHECK-XOP-NEXT: retq2720 %n0 = xor <2 x i32> %x, %y2721 %n1 = and <2 x i32> %n0, %mask2722 %r = xor <2 x i32> %n1, %y2723 ret <2 x i32> %r2724}2725 2726define <1 x i64> @in_v1i64(<1 x i64> %x, <1 x i64> %y, <1 x i64> %mask) nounwind {2727; CHECK-LABEL: in_v1i64:2728; CHECK: # %bb.0:2729; CHECK-NEXT: movq %rdi, %rax2730; CHECK-NEXT: xorq %rsi, %rax2731; CHECK-NEXT: andq %rdx, %rax2732; CHECK-NEXT: xorq %rsi, %rax2733; CHECK-NEXT: retq2734 %n0 = xor <1 x i64> %x, %y2735 %n1 = and <1 x i64> %n0, %mask2736 %r = xor <1 x i64> %n1, %y2737 ret <1 x i64> %r2738}2739 2740; ============================================================================ ;2741; 128-bit vector width2742; ============================================================================ ;2743 2744define <16 x i8> @in_v16i8(<16 x i8> %x, <16 x i8> %y, <16 x i8> %mask) nounwind {2745; CHECK-BASELINE-LABEL: in_v16i8:2746; CHECK-BASELINE: # %bb.0:2747; CHECK-BASELINE-NEXT: pushq %rbp2748; CHECK-BASELINE-NEXT: pushq %r152749; CHECK-BASELINE-NEXT: pushq %r142750; CHECK-BASELINE-NEXT: pushq %r132751; CHECK-BASELINE-NEXT: pushq %r122752; CHECK-BASELINE-NEXT: pushq %rbx2753; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2754; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2755; CHECK-BASELINE-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2756; CHECK-BASELINE-NEXT: movq %rdi, %rdx2757; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %esi2758; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx2759; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2760; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx2761; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp2762; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d2763; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d2764; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d2765; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d2766; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2767; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2768; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edi2769; CHECK-BASELINE-NEXT: xorb %dil, %r9b2770; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r9b2771; CHECK-BASELINE-NEXT: xorb %dil, %r9b2772; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %edi2773; CHECK-BASELINE-NEXT: xorb %r10b, %dil2774; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dil2775; CHECK-BASELINE-NEXT: xorb %r10b, %dil2776; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2777; CHECK-BASELINE-NEXT: xorb %r11b, %r10b2778; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b2779; CHECK-BASELINE-NEXT: xorb %r11b, %r10b2780; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2781; CHECK-BASELINE-NEXT: xorb %r13b, %r11b2782; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b2783; CHECK-BASELINE-NEXT: xorb %r13b, %r11b2784; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d2785; CHECK-BASELINE-NEXT: xorb %r12b, %r13b2786; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r13b2787; CHECK-BASELINE-NEXT: xorb %r12b, %r13b2788; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d2789; CHECK-BASELINE-NEXT: xorb %r15b, %r12b2790; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r12b2791; CHECK-BASELINE-NEXT: xorb %r15b, %r12b2792; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d2793; CHECK-BASELINE-NEXT: xorb %r14b, %r15b2794; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r15b2795; CHECK-BASELINE-NEXT: xorb %r14b, %r15b2796; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d2797; CHECK-BASELINE-NEXT: xorb %bpl, %r14b2798; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r14b2799; CHECK-BASELINE-NEXT: xorb %bpl, %r14b2800; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp2801; CHECK-BASELINE-NEXT: xorb %bl, %bpl2802; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bpl2803; CHECK-BASELINE-NEXT: xorb %bl, %bpl2804; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx2805; CHECK-BASELINE-NEXT: xorb %al, %bl2806; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl2807; CHECK-BASELINE-NEXT: xorb %al, %bl2808; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2809; CHECK-BASELINE-NEXT: xorb %cl, %al2810; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %al2811; CHECK-BASELINE-NEXT: xorb %cl, %al2812; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx2813; CHECK-BASELINE-NEXT: xorb %sil, %cl2814; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl2815; CHECK-BASELINE-NEXT: xorb %sil, %cl2816; CHECK-BASELINE-NEXT: movb %cl, 15(%rdx)2817; CHECK-BASELINE-NEXT: movb %al, 14(%rdx)2818; CHECK-BASELINE-NEXT: movb %bl, 13(%rdx)2819; CHECK-BASELINE-NEXT: movb %bpl, 12(%rdx)2820; CHECK-BASELINE-NEXT: movb %r14b, 11(%rdx)2821; CHECK-BASELINE-NEXT: movb %r15b, 10(%rdx)2822; CHECK-BASELINE-NEXT: movb %r12b, 9(%rdx)2823; CHECK-BASELINE-NEXT: movb %r13b, 8(%rdx)2824; CHECK-BASELINE-NEXT: movb %r11b, 7(%rdx)2825; CHECK-BASELINE-NEXT: movb %r10b, 6(%rdx)2826; CHECK-BASELINE-NEXT: movb %dil, 5(%rdx)2827; CHECK-BASELINE-NEXT: movb %r9b, 4(%rdx)2828; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2829; CHECK-BASELINE-NEXT: xorb %al, %r8b2830; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b2831; CHECK-BASELINE-NEXT: xorb %al, %r8b2832; CHECK-BASELINE-NEXT: movb %r8b, 3(%rdx)2833; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2834; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload2835; CHECK-BASELINE-NEXT: xorb %al, %cl2836; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl2837; CHECK-BASELINE-NEXT: xorb %al, %cl2838; CHECK-BASELINE-NEXT: movb %cl, 2(%rdx)2839; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2840; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload2841; CHECK-BASELINE-NEXT: xorb %al, %cl2842; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl2843; CHECK-BASELINE-NEXT: xorb %al, %cl2844; CHECK-BASELINE-NEXT: movb %cl, 1(%rdx)2845; CHECK-BASELINE-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2846; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload2847; CHECK-BASELINE-NEXT: xorb %al, %cl2848; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl2849; CHECK-BASELINE-NEXT: xorb %al, %cl2850; CHECK-BASELINE-NEXT: movb %cl, (%rdx)2851; CHECK-BASELINE-NEXT: movq %rdx, %rax2852; CHECK-BASELINE-NEXT: popq %rbx2853; CHECK-BASELINE-NEXT: popq %r122854; CHECK-BASELINE-NEXT: popq %r132855; CHECK-BASELINE-NEXT: popq %r142856; CHECK-BASELINE-NEXT: popq %r152857; CHECK-BASELINE-NEXT: popq %rbp2858; CHECK-BASELINE-NEXT: retq2859;2860; CHECK-SSE1-LABEL: in_v16i8:2861; CHECK-SSE1: # %bb.0:2862; CHECK-SSE1-NEXT: pushq %rbp2863; CHECK-SSE1-NEXT: pushq %r152864; CHECK-SSE1-NEXT: pushq %r142865; CHECK-SSE1-NEXT: pushq %r132866; CHECK-SSE1-NEXT: pushq %r122867; CHECK-SSE1-NEXT: pushq %rbx2868; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2869; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2870; CHECK-SSE1-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill2871; CHECK-SSE1-NEXT: movq %rdi, %rdx2872; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %esi2873; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx2874; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2875; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx2876; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp2877; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d2878; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d2879; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d2880; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d2881; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2882; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2883; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edi2884; CHECK-SSE1-NEXT: xorb %dil, %r9b2885; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r9b2886; CHECK-SSE1-NEXT: xorb %dil, %r9b2887; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %edi2888; CHECK-SSE1-NEXT: xorb %r10b, %dil2889; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dil2890; CHECK-SSE1-NEXT: xorb %r10b, %dil2891; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r10d2892; CHECK-SSE1-NEXT: xorb %r11b, %r10b2893; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b2894; CHECK-SSE1-NEXT: xorb %r11b, %r10b2895; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r11d2896; CHECK-SSE1-NEXT: xorb %r13b, %r11b2897; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b2898; CHECK-SSE1-NEXT: xorb %r13b, %r11b2899; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r13d2900; CHECK-SSE1-NEXT: xorb %r12b, %r13b2901; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r13b2902; CHECK-SSE1-NEXT: xorb %r12b, %r13b2903; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r12d2904; CHECK-SSE1-NEXT: xorb %r15b, %r12b2905; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r12b2906; CHECK-SSE1-NEXT: xorb %r15b, %r12b2907; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r15d2908; CHECK-SSE1-NEXT: xorb %r14b, %r15b2909; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r15b2910; CHECK-SSE1-NEXT: xorb %r14b, %r15b2911; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %r14d2912; CHECK-SSE1-NEXT: xorb %bpl, %r14b2913; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r14b2914; CHECK-SSE1-NEXT: xorb %bpl, %r14b2915; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp2916; CHECK-SSE1-NEXT: xorb %bl, %bpl2917; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bpl2918; CHECK-SSE1-NEXT: xorb %bl, %bpl2919; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ebx2920; CHECK-SSE1-NEXT: xorb %al, %bl2921; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl2922; CHECK-SSE1-NEXT: xorb %al, %bl2923; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2924; CHECK-SSE1-NEXT: xorb %cl, %al2925; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %al2926; CHECK-SSE1-NEXT: xorb %cl, %al2927; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx2928; CHECK-SSE1-NEXT: xorb %sil, %cl2929; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl2930; CHECK-SSE1-NEXT: xorb %sil, %cl2931; CHECK-SSE1-NEXT: movb %cl, 15(%rdx)2932; CHECK-SSE1-NEXT: movb %al, 14(%rdx)2933; CHECK-SSE1-NEXT: movb %bl, 13(%rdx)2934; CHECK-SSE1-NEXT: movb %bpl, 12(%rdx)2935; CHECK-SSE1-NEXT: movb %r14b, 11(%rdx)2936; CHECK-SSE1-NEXT: movb %r15b, 10(%rdx)2937; CHECK-SSE1-NEXT: movb %r12b, 9(%rdx)2938; CHECK-SSE1-NEXT: movb %r13b, 8(%rdx)2939; CHECK-SSE1-NEXT: movb %r11b, 7(%rdx)2940; CHECK-SSE1-NEXT: movb %r10b, 6(%rdx)2941; CHECK-SSE1-NEXT: movb %dil, 5(%rdx)2942; CHECK-SSE1-NEXT: movb %r9b, 4(%rdx)2943; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2944; CHECK-SSE1-NEXT: xorb %al, %r8b2945; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b2946; CHECK-SSE1-NEXT: xorb %al, %r8b2947; CHECK-SSE1-NEXT: movb %r8b, 3(%rdx)2948; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2949; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload2950; CHECK-SSE1-NEXT: xorb %al, %cl2951; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl2952; CHECK-SSE1-NEXT: xorb %al, %cl2953; CHECK-SSE1-NEXT: movb %cl, 2(%rdx)2954; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2955; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload2956; CHECK-SSE1-NEXT: xorb %al, %cl2957; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl2958; CHECK-SSE1-NEXT: xorb %al, %cl2959; CHECK-SSE1-NEXT: movb %cl, 1(%rdx)2960; CHECK-SSE1-NEXT: movzbl {{[0-9]+}}(%rsp), %eax2961; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload2962; CHECK-SSE1-NEXT: xorb %al, %cl2963; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl2964; CHECK-SSE1-NEXT: xorb %al, %cl2965; CHECK-SSE1-NEXT: movb %cl, (%rdx)2966; CHECK-SSE1-NEXT: movq %rdx, %rax2967; CHECK-SSE1-NEXT: popq %rbx2968; CHECK-SSE1-NEXT: popq %r122969; CHECK-SSE1-NEXT: popq %r132970; CHECK-SSE1-NEXT: popq %r142971; CHECK-SSE1-NEXT: popq %r152972; CHECK-SSE1-NEXT: popq %rbp2973; CHECK-SSE1-NEXT: retq2974;2975; CHECK-SSE2-LABEL: in_v16i8:2976; CHECK-SSE2: # %bb.0:2977; CHECK-SSE2-NEXT: andps %xmm2, %xmm02978; CHECK-SSE2-NEXT: andnps %xmm1, %xmm22979; CHECK-SSE2-NEXT: orps %xmm2, %xmm02980; CHECK-SSE2-NEXT: retq2981;2982; CHECK-XOP-LABEL: in_v16i8:2983; CHECK-XOP: # %bb.0:2984; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm02985; CHECK-XOP-NEXT: retq2986 %n0 = xor <16 x i8> %x, %y2987 %n1 = and <16 x i8> %n0, %mask2988 %r = xor <16 x i8> %n1, %y2989 ret <16 x i8> %r2990}2991 2992define <8 x i16> @in_v8i16(<8 x i16> %x, <8 x i16> %y, <8 x i16> %mask) nounwind {2993; CHECK-BASELINE-LABEL: in_v8i16:2994; CHECK-BASELINE: # %bb.0:2995; CHECK-BASELINE-NEXT: pushq %rbx2996; CHECK-BASELINE-NEXT: movq %rdi, %rax2997; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi2998; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d2999; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d3000; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx3001; CHECK-BASELINE-NEXT: xorl %ebx, %esi3002; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si3003; CHECK-BASELINE-NEXT: xorl %ebx, %esi3004; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx3005; CHECK-BASELINE-NEXT: xorl %ebx, %edx3006; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx3007; CHECK-BASELINE-NEXT: xorl %ebx, %edx3008; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx3009; CHECK-BASELINE-NEXT: xorl %ebx, %ecx3010; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx3011; CHECK-BASELINE-NEXT: xorl %ebx, %ecx3012; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx3013; CHECK-BASELINE-NEXT: xorl %ebx, %r8d3014; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w3015; CHECK-BASELINE-NEXT: xorl %ebx, %r8d3016; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx3017; CHECK-BASELINE-NEXT: xorl %ebx, %r9d3018; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r9w3019; CHECK-BASELINE-NEXT: xorl %ebx, %r9d3020; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx3021; CHECK-BASELINE-NEXT: xorw %r11w, %bx3022; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %bx3023; CHECK-BASELINE-NEXT: xorl %r11d, %ebx3024; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %r11d3025; CHECK-BASELINE-NEXT: xorw %r10w, %r11w3026; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r11w3027; CHECK-BASELINE-NEXT: xorl %r10d, %r11d3028; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %r10d3029; CHECK-BASELINE-NEXT: xorw %di, %r10w3030; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r10w3031; CHECK-BASELINE-NEXT: xorl %edi, %r10d3032; CHECK-BASELINE-NEXT: movw %r10w, 14(%rax)3033; CHECK-BASELINE-NEXT: movw %r11w, 12(%rax)3034; CHECK-BASELINE-NEXT: movw %bx, 10(%rax)3035; CHECK-BASELINE-NEXT: movw %r9w, 8(%rax)3036; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)3037; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)3038; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)3039; CHECK-BASELINE-NEXT: movw %si, (%rax)3040; CHECK-BASELINE-NEXT: popq %rbx3041; CHECK-BASELINE-NEXT: retq3042;3043; CHECK-SSE1-LABEL: in_v8i16:3044; CHECK-SSE1: # %bb.0:3045; CHECK-SSE1-NEXT: pushq %rbx3046; CHECK-SSE1-NEXT: movq %rdi, %rax3047; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi3048; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d3049; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d3050; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx3051; CHECK-SSE1-NEXT: xorl %ebx, %esi3052; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si3053; CHECK-SSE1-NEXT: xorl %ebx, %esi3054; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx3055; CHECK-SSE1-NEXT: xorl %ebx, %edx3056; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx3057; CHECK-SSE1-NEXT: xorl %ebx, %edx3058; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx3059; CHECK-SSE1-NEXT: xorl %ebx, %ecx3060; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx3061; CHECK-SSE1-NEXT: xorl %ebx, %ecx3062; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx3063; CHECK-SSE1-NEXT: xorl %ebx, %r8d3064; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w3065; CHECK-SSE1-NEXT: xorl %ebx, %r8d3066; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx3067; CHECK-SSE1-NEXT: xorl %ebx, %r9d3068; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r9w3069; CHECK-SSE1-NEXT: xorl %ebx, %r9d3070; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx3071; CHECK-SSE1-NEXT: xorw %r11w, %bx3072; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %bx3073; CHECK-SSE1-NEXT: xorl %r11d, %ebx3074; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %r11d3075; CHECK-SSE1-NEXT: xorw %r10w, %r11w3076; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r11w3077; CHECK-SSE1-NEXT: xorl %r10d, %r11d3078; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %r10d3079; CHECK-SSE1-NEXT: xorw %di, %r10w3080; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r10w3081; CHECK-SSE1-NEXT: xorl %edi, %r10d3082; CHECK-SSE1-NEXT: movw %r10w, 14(%rax)3083; CHECK-SSE1-NEXT: movw %r11w, 12(%rax)3084; CHECK-SSE1-NEXT: movw %bx, 10(%rax)3085; CHECK-SSE1-NEXT: movw %r9w, 8(%rax)3086; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)3087; CHECK-SSE1-NEXT: movw %cx, 4(%rax)3088; CHECK-SSE1-NEXT: movw %dx, 2(%rax)3089; CHECK-SSE1-NEXT: movw %si, (%rax)3090; CHECK-SSE1-NEXT: popq %rbx3091; CHECK-SSE1-NEXT: retq3092;3093; CHECK-SSE2-LABEL: in_v8i16:3094; CHECK-SSE2: # %bb.0:3095; CHECK-SSE2-NEXT: andps %xmm2, %xmm03096; CHECK-SSE2-NEXT: andnps %xmm1, %xmm23097; CHECK-SSE2-NEXT: orps %xmm2, %xmm03098; CHECK-SSE2-NEXT: retq3099;3100; CHECK-XOP-LABEL: in_v8i16:3101; CHECK-XOP: # %bb.0:3102; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm03103; CHECK-XOP-NEXT: retq3104 %n0 = xor <8 x i16> %x, %y3105 %n1 = and <8 x i16> %n0, %mask3106 %r = xor <8 x i16> %n1, %y3107 ret <8 x i16> %r3108}3109 3110define <4 x i32> @in_v4i32(ptr%px, ptr%py, ptr%pmask) nounwind {3111; CHECK-BASELINE-LABEL: in_v4i32:3112; CHECK-BASELINE: # %bb.0:3113; CHECK-BASELINE-NEXT: pushq %rbx3114; CHECK-BASELINE-NEXT: movq %rdi, %rax3115; CHECK-BASELINE-NEXT: movl 12(%rdx), %edi3116; CHECK-BASELINE-NEXT: movl 8(%rdx), %r8d3117; CHECK-BASELINE-NEXT: movl (%rdx), %r9d3118; CHECK-BASELINE-NEXT: movl 4(%rdx), %r10d3119; CHECK-BASELINE-NEXT: movl (%rsi), %edx3120; CHECK-BASELINE-NEXT: xorl %r9d, %edx3121; CHECK-BASELINE-NEXT: movl 4(%rsi), %r11d3122; CHECK-BASELINE-NEXT: xorl %r10d, %r11d3123; CHECK-BASELINE-NEXT: movl 8(%rsi), %ebx3124; CHECK-BASELINE-NEXT: xorl %r8d, %ebx3125; CHECK-BASELINE-NEXT: movl 12(%rsi), %esi3126; CHECK-BASELINE-NEXT: xorl %edi, %esi3127; CHECK-BASELINE-NEXT: andl 12(%rcx), %esi3128; CHECK-BASELINE-NEXT: andl 8(%rcx), %ebx3129; CHECK-BASELINE-NEXT: andl 4(%rcx), %r11d3130; CHECK-BASELINE-NEXT: andl (%rcx), %edx3131; CHECK-BASELINE-NEXT: xorl %r9d, %edx3132; CHECK-BASELINE-NEXT: xorl %r10d, %r11d3133; CHECK-BASELINE-NEXT: xorl %r8d, %ebx3134; CHECK-BASELINE-NEXT: xorl %edi, %esi3135; CHECK-BASELINE-NEXT: movl %esi, 12(%rax)3136; CHECK-BASELINE-NEXT: movl %ebx, 8(%rax)3137; CHECK-BASELINE-NEXT: movl %r11d, 4(%rax)3138; CHECK-BASELINE-NEXT: movl %edx, (%rax)3139; CHECK-BASELINE-NEXT: popq %rbx3140; CHECK-BASELINE-NEXT: retq3141;3142; CHECK-SSE1-LABEL: in_v4i32:3143; CHECK-SSE1: # %bb.0:3144; CHECK-SSE1-NEXT: movq %rdi, %rax3145; CHECK-SSE1-NEXT: movaps (%rcx), %xmm03146; CHECK-SSE1-NEXT: movaps %xmm0, %xmm13147; CHECK-SSE1-NEXT: andnps (%rdx), %xmm13148; CHECK-SSE1-NEXT: andps (%rsi), %xmm03149; CHECK-SSE1-NEXT: orps %xmm1, %xmm03150; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)3151; CHECK-SSE1-NEXT: retq3152;3153; CHECK-SSE2-LABEL: in_v4i32:3154; CHECK-SSE2: # %bb.0:3155; CHECK-SSE2-NEXT: movaps (%rdx), %xmm03156; CHECK-SSE2-NEXT: movaps %xmm0, %xmm13157; CHECK-SSE2-NEXT: andnps (%rsi), %xmm13158; CHECK-SSE2-NEXT: andps (%rdi), %xmm03159; CHECK-SSE2-NEXT: orps %xmm1, %xmm03160; CHECK-SSE2-NEXT: retq3161;3162; CHECK-XOP-LABEL: in_v4i32:3163; CHECK-XOP: # %bb.0:3164; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm03165; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm13166; CHECK-XOP-NEXT: vpcmov %xmm1, (%rsi), %xmm0, %xmm03167; CHECK-XOP-NEXT: retq3168 %x = load <4 x i32>, ptr%px, align 163169 %y = load <4 x i32>, ptr%py, align 163170 %mask = load <4 x i32>, ptr%pmask, align 163171 %n0 = xor <4 x i32> %x, %y3172 %n1 = and <4 x i32> %n0, %mask3173 %r = xor <4 x i32> %n1, %y3174 ret <4 x i32> %r3175}3176 3177define <2 x i64> @in_v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %mask) nounwind {3178; CHECK-BASELINE-LABEL: in_v2i64:3179; CHECK-BASELINE: # %bb.0:3180; CHECK-BASELINE-NEXT: movq %rdi, %rax3181; CHECK-BASELINE-NEXT: xorq %rdx, %rax3182; CHECK-BASELINE-NEXT: xorq %rcx, %rsi3183; CHECK-BASELINE-NEXT: andq %r9, %rsi3184; CHECK-BASELINE-NEXT: andq %r8, %rax3185; CHECK-BASELINE-NEXT: xorq %rdx, %rax3186; CHECK-BASELINE-NEXT: xorq %rcx, %rsi3187; CHECK-BASELINE-NEXT: movq %rsi, %rdx3188; CHECK-BASELINE-NEXT: retq3189;3190; CHECK-SSE1-LABEL: in_v2i64:3191; CHECK-SSE1: # %bb.0:3192; CHECK-SSE1-NEXT: movq %rdi, %rax3193; CHECK-SSE1-NEXT: xorq %rdx, %rax3194; CHECK-SSE1-NEXT: xorq %rcx, %rsi3195; CHECK-SSE1-NEXT: andq %r9, %rsi3196; CHECK-SSE1-NEXT: andq %r8, %rax3197; CHECK-SSE1-NEXT: xorq %rdx, %rax3198; CHECK-SSE1-NEXT: xorq %rcx, %rsi3199; CHECK-SSE1-NEXT: movq %rsi, %rdx3200; CHECK-SSE1-NEXT: retq3201;3202; CHECK-SSE2-LABEL: in_v2i64:3203; CHECK-SSE2: # %bb.0:3204; CHECK-SSE2-NEXT: andps %xmm2, %xmm03205; CHECK-SSE2-NEXT: andnps %xmm1, %xmm23206; CHECK-SSE2-NEXT: orps %xmm2, %xmm03207; CHECK-SSE2-NEXT: retq3208;3209; CHECK-XOP-LABEL: in_v2i64:3210; CHECK-XOP: # %bb.0:3211; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm03212; CHECK-XOP-NEXT: retq3213 %n0 = xor <2 x i64> %x, %y3214 %n1 = and <2 x i64> %n0, %mask3215 %r = xor <2 x i64> %n1, %y3216 ret <2 x i64> %r3217}3218 3219; ============================================================================ ;3220; 256-bit vector width3221; ============================================================================ ;3222 3223define <32 x i8> @in_v32i8(ptr%px, ptr%py, ptr%pmask) nounwind {3224; CHECK-BASELINE-LABEL: in_v32i8:3225; CHECK-BASELINE: # %bb.0:3226; CHECK-BASELINE-NEXT: pushq %rbp3227; CHECK-BASELINE-NEXT: pushq %r153228; CHECK-BASELINE-NEXT: pushq %r143229; CHECK-BASELINE-NEXT: pushq %r133230; CHECK-BASELINE-NEXT: pushq %r123231; CHECK-BASELINE-NEXT: pushq %rbx3232; CHECK-BASELINE-NEXT: movq %rcx, %r123233; CHECK-BASELINE-NEXT: movq %rdx, %r153234; CHECK-BASELINE-NEXT: movq %rsi, %r143235; CHECK-BASELINE-NEXT: movq %rdi, %r133236; CHECK-BASELINE-NEXT: movzbl 15(%rdx), %eax3237; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3238; CHECK-BASELINE-NEXT: movzbl 14(%rdx), %eax3239; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3240; CHECK-BASELINE-NEXT: movzbl 13(%rdx), %eax3241; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3242; CHECK-BASELINE-NEXT: movzbl 12(%rdx), %eax3243; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3244; CHECK-BASELINE-NEXT: movzbl 11(%rdx), %eax3245; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3246; CHECK-BASELINE-NEXT: movzbl 10(%rdx), %eax3247; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3248; CHECK-BASELINE-NEXT: movzbl 9(%rdx), %r8d3249; CHECK-BASELINE-NEXT: movzbl 8(%rdx), %r9d3250; CHECK-BASELINE-NEXT: movzbl 7(%rdx), %r10d3251; CHECK-BASELINE-NEXT: movzbl 6(%rdx), %ebp3252; CHECK-BASELINE-NEXT: movzbl 5(%rdx), %edi3253; CHECK-BASELINE-NEXT: movzbl 4(%rdx), %esi3254; CHECK-BASELINE-NEXT: movzbl 3(%rdx), %eax3255; CHECK-BASELINE-NEXT: movzbl 2(%rdx), %ecx3256; CHECK-BASELINE-NEXT: movzbl (%rdx), %r11d3257; CHECK-BASELINE-NEXT: movzbl 1(%rdx), %edx3258; CHECK-BASELINE-NEXT: movzbl (%r14), %ebx3259; CHECK-BASELINE-NEXT: xorb %r11b, %bl3260; CHECK-BASELINE-NEXT: andb (%r12), %bl3261; CHECK-BASELINE-NEXT: xorb %r11b, %bl3262; CHECK-BASELINE-NEXT: movb %bl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3263; CHECK-BASELINE-NEXT: movzbl 1(%r14), %r11d3264; CHECK-BASELINE-NEXT: xorb %dl, %r11b3265; CHECK-BASELINE-NEXT: andb 1(%r12), %r11b3266; CHECK-BASELINE-NEXT: xorb %dl, %r11b3267; CHECK-BASELINE-NEXT: movb %r11b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3268; CHECK-BASELINE-NEXT: movzbl 2(%r14), %edx3269; CHECK-BASELINE-NEXT: xorb %cl, %dl3270; CHECK-BASELINE-NEXT: andb 2(%r12), %dl3271; CHECK-BASELINE-NEXT: xorb %cl, %dl3272; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3273; CHECK-BASELINE-NEXT: movzbl 3(%r14), %ecx3274; CHECK-BASELINE-NEXT: xorb %al, %cl3275; CHECK-BASELINE-NEXT: andb 3(%r12), %cl3276; CHECK-BASELINE-NEXT: xorb %al, %cl3277; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3278; CHECK-BASELINE-NEXT: movzbl 4(%r14), %eax3279; CHECK-BASELINE-NEXT: xorb %sil, %al3280; CHECK-BASELINE-NEXT: andb 4(%r12), %al3281; CHECK-BASELINE-NEXT: xorb %sil, %al3282; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3283; CHECK-BASELINE-NEXT: movzbl 5(%r14), %eax3284; CHECK-BASELINE-NEXT: xorb %dil, %al3285; CHECK-BASELINE-NEXT: andb 5(%r12), %al3286; CHECK-BASELINE-NEXT: xorb %dil, %al3287; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3288; CHECK-BASELINE-NEXT: movzbl 6(%r14), %eax3289; CHECK-BASELINE-NEXT: xorb %bpl, %al3290; CHECK-BASELINE-NEXT: andb 6(%r12), %al3291; CHECK-BASELINE-NEXT: xorb %bpl, %al3292; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3293; CHECK-BASELINE-NEXT: movzbl 7(%r14), %eax3294; CHECK-BASELINE-NEXT: xorb %r10b, %al3295; CHECK-BASELINE-NEXT: andb 7(%r12), %al3296; CHECK-BASELINE-NEXT: xorb %r10b, %al3297; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3298; CHECK-BASELINE-NEXT: movzbl 8(%r14), %eax3299; CHECK-BASELINE-NEXT: xorb %r9b, %al3300; CHECK-BASELINE-NEXT: andb 8(%r12), %al3301; CHECK-BASELINE-NEXT: xorb %r9b, %al3302; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3303; CHECK-BASELINE-NEXT: movzbl 9(%r14), %eax3304; CHECK-BASELINE-NEXT: xorb %r8b, %al3305; CHECK-BASELINE-NEXT: andb 9(%r12), %al3306; CHECK-BASELINE-NEXT: xorb %r8b, %al3307; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3308; CHECK-BASELINE-NEXT: movzbl 10(%r14), %ecx3309; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3310; CHECK-BASELINE-NEXT: xorb %al, %cl3311; CHECK-BASELINE-NEXT: andb 10(%r12), %cl3312; CHECK-BASELINE-NEXT: xorb %al, %cl3313; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3314; CHECK-BASELINE-NEXT: movzbl 11(%r14), %ecx3315; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3316; CHECK-BASELINE-NEXT: xorb %al, %cl3317; CHECK-BASELINE-NEXT: andb 11(%r12), %cl3318; CHECK-BASELINE-NEXT: xorb %al, %cl3319; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3320; CHECK-BASELINE-NEXT: movzbl 12(%r14), %ecx3321; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3322; CHECK-BASELINE-NEXT: xorb %al, %cl3323; CHECK-BASELINE-NEXT: andb 12(%r12), %cl3324; CHECK-BASELINE-NEXT: xorb %al, %cl3325; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3326; CHECK-BASELINE-NEXT: movzbl 13(%r14), %ecx3327; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3328; CHECK-BASELINE-NEXT: xorb %al, %cl3329; CHECK-BASELINE-NEXT: andb 13(%r12), %cl3330; CHECK-BASELINE-NEXT: xorb %al, %cl3331; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3332; CHECK-BASELINE-NEXT: movzbl 14(%r14), %ecx3333; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3334; CHECK-BASELINE-NEXT: xorb %al, %cl3335; CHECK-BASELINE-NEXT: andb 14(%r12), %cl3336; CHECK-BASELINE-NEXT: xorb %al, %cl3337; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3338; CHECK-BASELINE-NEXT: movzbl 15(%r14), %ecx3339; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3340; CHECK-BASELINE-NEXT: xorb %al, %cl3341; CHECK-BASELINE-NEXT: andb 15(%r12), %cl3342; CHECK-BASELINE-NEXT: xorb %al, %cl3343; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3344; CHECK-BASELINE-NEXT: movzbl 16(%r15), %eax3345; CHECK-BASELINE-NEXT: movzbl 16(%r14), %ecx3346; CHECK-BASELINE-NEXT: xorb %al, %cl3347; CHECK-BASELINE-NEXT: andb 16(%r12), %cl3348; CHECK-BASELINE-NEXT: xorb %al, %cl3349; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3350; CHECK-BASELINE-NEXT: movzbl 17(%r15), %eax3351; CHECK-BASELINE-NEXT: movzbl 17(%r14), %ecx3352; CHECK-BASELINE-NEXT: xorb %al, %cl3353; CHECK-BASELINE-NEXT: andb 17(%r12), %cl3354; CHECK-BASELINE-NEXT: xorb %al, %cl3355; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3356; CHECK-BASELINE-NEXT: movzbl 18(%r15), %eax3357; CHECK-BASELINE-NEXT: movzbl 18(%r14), %ecx3358; CHECK-BASELINE-NEXT: xorb %al, %cl3359; CHECK-BASELINE-NEXT: andb 18(%r12), %cl3360; CHECK-BASELINE-NEXT: xorb %al, %cl3361; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3362; CHECK-BASELINE-NEXT: movzbl 19(%r15), %eax3363; CHECK-BASELINE-NEXT: movzbl 19(%r14), %ecx3364; CHECK-BASELINE-NEXT: xorb %al, %cl3365; CHECK-BASELINE-NEXT: andb 19(%r12), %cl3366; CHECK-BASELINE-NEXT: xorb %al, %cl3367; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3368; CHECK-BASELINE-NEXT: movzbl 20(%r15), %eax3369; CHECK-BASELINE-NEXT: movzbl 20(%r14), %ecx3370; CHECK-BASELINE-NEXT: xorb %al, %cl3371; CHECK-BASELINE-NEXT: andb 20(%r12), %cl3372; CHECK-BASELINE-NEXT: xorb %al, %cl3373; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3374; CHECK-BASELINE-NEXT: movzbl 21(%r15), %eax3375; CHECK-BASELINE-NEXT: movzbl 21(%r14), %ebp3376; CHECK-BASELINE-NEXT: xorb %al, %bpl3377; CHECK-BASELINE-NEXT: andb 21(%r12), %bpl3378; CHECK-BASELINE-NEXT: xorb %al, %bpl3379; CHECK-BASELINE-NEXT: movzbl 22(%r15), %eax3380; CHECK-BASELINE-NEXT: movzbl 22(%r14), %ebx3381; CHECK-BASELINE-NEXT: xorb %al, %bl3382; CHECK-BASELINE-NEXT: andb 22(%r12), %bl3383; CHECK-BASELINE-NEXT: xorb %al, %bl3384; CHECK-BASELINE-NEXT: movzbl 23(%r15), %eax3385; CHECK-BASELINE-NEXT: movzbl 23(%r14), %r11d3386; CHECK-BASELINE-NEXT: xorb %al, %r11b3387; CHECK-BASELINE-NEXT: andb 23(%r12), %r11b3388; CHECK-BASELINE-NEXT: xorb %al, %r11b3389; CHECK-BASELINE-NEXT: movzbl 24(%r15), %eax3390; CHECK-BASELINE-NEXT: movzbl 24(%r14), %r9d3391; CHECK-BASELINE-NEXT: xorb %al, %r9b3392; CHECK-BASELINE-NEXT: andb 24(%r12), %r9b3393; CHECK-BASELINE-NEXT: xorb %al, %r9b3394; CHECK-BASELINE-NEXT: movzbl 25(%r15), %eax3395; CHECK-BASELINE-NEXT: movzbl 25(%r14), %r8d3396; CHECK-BASELINE-NEXT: xorb %al, %r8b3397; CHECK-BASELINE-NEXT: andb 25(%r12), %r8b3398; CHECK-BASELINE-NEXT: xorb %al, %r8b3399; CHECK-BASELINE-NEXT: movzbl 26(%r15), %eax3400; CHECK-BASELINE-NEXT: movzbl 26(%r14), %edi3401; CHECK-BASELINE-NEXT: xorb %al, %dil3402; CHECK-BASELINE-NEXT: andb 26(%r12), %dil3403; CHECK-BASELINE-NEXT: xorb %al, %dil3404; CHECK-BASELINE-NEXT: movzbl 27(%r15), %eax3405; CHECK-BASELINE-NEXT: movzbl 27(%r14), %esi3406; CHECK-BASELINE-NEXT: xorb %al, %sil3407; CHECK-BASELINE-NEXT: andb 27(%r12), %sil3408; CHECK-BASELINE-NEXT: xorb %al, %sil3409; CHECK-BASELINE-NEXT: movzbl 28(%r15), %eax3410; CHECK-BASELINE-NEXT: movzbl 28(%r14), %edx3411; CHECK-BASELINE-NEXT: xorb %al, %dl3412; CHECK-BASELINE-NEXT: andb 28(%r12), %dl3413; CHECK-BASELINE-NEXT: xorb %al, %dl3414; CHECK-BASELINE-NEXT: movzbl 29(%r15), %eax3415; CHECK-BASELINE-NEXT: movzbl 29(%r14), %ecx3416; CHECK-BASELINE-NEXT: xorb %al, %cl3417; CHECK-BASELINE-NEXT: andb 29(%r12), %cl3418; CHECK-BASELINE-NEXT: xorb %al, %cl3419; CHECK-BASELINE-NEXT: movzbl 30(%r15), %r10d3420; CHECK-BASELINE-NEXT: movzbl 30(%r14), %eax3421; CHECK-BASELINE-NEXT: xorb %r10b, %al3422; CHECK-BASELINE-NEXT: andb 30(%r12), %al3423; CHECK-BASELINE-NEXT: xorb %r10b, %al3424; CHECK-BASELINE-NEXT: movzbl 31(%r15), %r10d3425; CHECK-BASELINE-NEXT: movzbl 31(%r14), %r14d3426; CHECK-BASELINE-NEXT: xorb %r10b, %r14b3427; CHECK-BASELINE-NEXT: andb 31(%r12), %r14b3428; CHECK-BASELINE-NEXT: xorb %r10b, %r14b3429; CHECK-BASELINE-NEXT: movb %r14b, 31(%r13)3430; CHECK-BASELINE-NEXT: movb %al, 30(%r13)3431; CHECK-BASELINE-NEXT: movb %cl, 29(%r13)3432; CHECK-BASELINE-NEXT: movb %dl, 28(%r13)3433; CHECK-BASELINE-NEXT: movb %sil, 27(%r13)3434; CHECK-BASELINE-NEXT: movb %dil, 26(%r13)3435; CHECK-BASELINE-NEXT: movb %r8b, 25(%r13)3436; CHECK-BASELINE-NEXT: movb %r9b, 24(%r13)3437; CHECK-BASELINE-NEXT: movb %r11b, 23(%r13)3438; CHECK-BASELINE-NEXT: movb %bl, 22(%r13)3439; CHECK-BASELINE-NEXT: movb %bpl, 21(%r13)3440; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3441; CHECK-BASELINE-NEXT: movb %al, 20(%r13)3442; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3443; CHECK-BASELINE-NEXT: movb %al, 19(%r13)3444; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3445; CHECK-BASELINE-NEXT: movb %al, 18(%r13)3446; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3447; CHECK-BASELINE-NEXT: movb %al, 17(%r13)3448; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3449; CHECK-BASELINE-NEXT: movb %al, 16(%r13)3450; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3451; CHECK-BASELINE-NEXT: movb %al, 15(%r13)3452; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3453; CHECK-BASELINE-NEXT: movb %al, 14(%r13)3454; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3455; CHECK-BASELINE-NEXT: movb %al, 13(%r13)3456; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3457; CHECK-BASELINE-NEXT: movb %al, 12(%r13)3458; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3459; CHECK-BASELINE-NEXT: movb %al, 11(%r13)3460; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3461; CHECK-BASELINE-NEXT: movb %al, 10(%r13)3462; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3463; CHECK-BASELINE-NEXT: movb %al, 9(%r13)3464; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3465; CHECK-BASELINE-NEXT: movb %al, 8(%r13)3466; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3467; CHECK-BASELINE-NEXT: movb %al, 7(%r13)3468; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3469; CHECK-BASELINE-NEXT: movb %al, 6(%r13)3470; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3471; CHECK-BASELINE-NEXT: movb %al, 5(%r13)3472; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3473; CHECK-BASELINE-NEXT: movb %al, 4(%r13)3474; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3475; CHECK-BASELINE-NEXT: movb %al, 3(%r13)3476; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3477; CHECK-BASELINE-NEXT: movb %al, 2(%r13)3478; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3479; CHECK-BASELINE-NEXT: movb %al, 1(%r13)3480; CHECK-BASELINE-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3481; CHECK-BASELINE-NEXT: movb %al, (%r13)3482; CHECK-BASELINE-NEXT: movq %r13, %rax3483; CHECK-BASELINE-NEXT: popq %rbx3484; CHECK-BASELINE-NEXT: popq %r123485; CHECK-BASELINE-NEXT: popq %r133486; CHECK-BASELINE-NEXT: popq %r143487; CHECK-BASELINE-NEXT: popq %r153488; CHECK-BASELINE-NEXT: popq %rbp3489; CHECK-BASELINE-NEXT: retq3490;3491; CHECK-SSE1-LABEL: in_v32i8:3492; CHECK-SSE1: # %bb.0:3493; CHECK-SSE1-NEXT: pushq %rbp3494; CHECK-SSE1-NEXT: pushq %r153495; CHECK-SSE1-NEXT: pushq %r143496; CHECK-SSE1-NEXT: pushq %r133497; CHECK-SSE1-NEXT: pushq %r123498; CHECK-SSE1-NEXT: pushq %rbx3499; CHECK-SSE1-NEXT: movq %rcx, %r123500; CHECK-SSE1-NEXT: movq %rdx, %r153501; CHECK-SSE1-NEXT: movq %rsi, %r143502; CHECK-SSE1-NEXT: movq %rdi, %r133503; CHECK-SSE1-NEXT: movzbl 15(%rdx), %eax3504; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3505; CHECK-SSE1-NEXT: movzbl 14(%rdx), %eax3506; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3507; CHECK-SSE1-NEXT: movzbl 13(%rdx), %eax3508; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3509; CHECK-SSE1-NEXT: movzbl 12(%rdx), %eax3510; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3511; CHECK-SSE1-NEXT: movzbl 11(%rdx), %eax3512; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3513; CHECK-SSE1-NEXT: movzbl 10(%rdx), %eax3514; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3515; CHECK-SSE1-NEXT: movzbl 9(%rdx), %r8d3516; CHECK-SSE1-NEXT: movzbl 8(%rdx), %r9d3517; CHECK-SSE1-NEXT: movzbl 7(%rdx), %r10d3518; CHECK-SSE1-NEXT: movzbl 6(%rdx), %ebp3519; CHECK-SSE1-NEXT: movzbl 5(%rdx), %edi3520; CHECK-SSE1-NEXT: movzbl 4(%rdx), %esi3521; CHECK-SSE1-NEXT: movzbl 3(%rdx), %eax3522; CHECK-SSE1-NEXT: movzbl 2(%rdx), %ecx3523; CHECK-SSE1-NEXT: movzbl (%rdx), %r11d3524; CHECK-SSE1-NEXT: movzbl 1(%rdx), %edx3525; CHECK-SSE1-NEXT: movzbl (%r14), %ebx3526; CHECK-SSE1-NEXT: xorb %r11b, %bl3527; CHECK-SSE1-NEXT: andb (%r12), %bl3528; CHECK-SSE1-NEXT: xorb %r11b, %bl3529; CHECK-SSE1-NEXT: movb %bl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3530; CHECK-SSE1-NEXT: movzbl 1(%r14), %r11d3531; CHECK-SSE1-NEXT: xorb %dl, %r11b3532; CHECK-SSE1-NEXT: andb 1(%r12), %r11b3533; CHECK-SSE1-NEXT: xorb %dl, %r11b3534; CHECK-SSE1-NEXT: movb %r11b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3535; CHECK-SSE1-NEXT: movzbl 2(%r14), %edx3536; CHECK-SSE1-NEXT: xorb %cl, %dl3537; CHECK-SSE1-NEXT: andb 2(%r12), %dl3538; CHECK-SSE1-NEXT: xorb %cl, %dl3539; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3540; CHECK-SSE1-NEXT: movzbl 3(%r14), %ecx3541; CHECK-SSE1-NEXT: xorb %al, %cl3542; CHECK-SSE1-NEXT: andb 3(%r12), %cl3543; CHECK-SSE1-NEXT: xorb %al, %cl3544; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3545; CHECK-SSE1-NEXT: movzbl 4(%r14), %eax3546; CHECK-SSE1-NEXT: xorb %sil, %al3547; CHECK-SSE1-NEXT: andb 4(%r12), %al3548; CHECK-SSE1-NEXT: xorb %sil, %al3549; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3550; CHECK-SSE1-NEXT: movzbl 5(%r14), %eax3551; CHECK-SSE1-NEXT: xorb %dil, %al3552; CHECK-SSE1-NEXT: andb 5(%r12), %al3553; CHECK-SSE1-NEXT: xorb %dil, %al3554; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3555; CHECK-SSE1-NEXT: movzbl 6(%r14), %eax3556; CHECK-SSE1-NEXT: xorb %bpl, %al3557; CHECK-SSE1-NEXT: andb 6(%r12), %al3558; CHECK-SSE1-NEXT: xorb %bpl, %al3559; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3560; CHECK-SSE1-NEXT: movzbl 7(%r14), %eax3561; CHECK-SSE1-NEXT: xorb %r10b, %al3562; CHECK-SSE1-NEXT: andb 7(%r12), %al3563; CHECK-SSE1-NEXT: xorb %r10b, %al3564; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3565; CHECK-SSE1-NEXT: movzbl 8(%r14), %eax3566; CHECK-SSE1-NEXT: xorb %r9b, %al3567; CHECK-SSE1-NEXT: andb 8(%r12), %al3568; CHECK-SSE1-NEXT: xorb %r9b, %al3569; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3570; CHECK-SSE1-NEXT: movzbl 9(%r14), %eax3571; CHECK-SSE1-NEXT: xorb %r8b, %al3572; CHECK-SSE1-NEXT: andb 9(%r12), %al3573; CHECK-SSE1-NEXT: xorb %r8b, %al3574; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3575; CHECK-SSE1-NEXT: movzbl 10(%r14), %ecx3576; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3577; CHECK-SSE1-NEXT: xorb %al, %cl3578; CHECK-SSE1-NEXT: andb 10(%r12), %cl3579; CHECK-SSE1-NEXT: xorb %al, %cl3580; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3581; CHECK-SSE1-NEXT: movzbl 11(%r14), %ecx3582; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3583; CHECK-SSE1-NEXT: xorb %al, %cl3584; CHECK-SSE1-NEXT: andb 11(%r12), %cl3585; CHECK-SSE1-NEXT: xorb %al, %cl3586; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3587; CHECK-SSE1-NEXT: movzbl 12(%r14), %ecx3588; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3589; CHECK-SSE1-NEXT: xorb %al, %cl3590; CHECK-SSE1-NEXT: andb 12(%r12), %cl3591; CHECK-SSE1-NEXT: xorb %al, %cl3592; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3593; CHECK-SSE1-NEXT: movzbl 13(%r14), %ecx3594; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3595; CHECK-SSE1-NEXT: xorb %al, %cl3596; CHECK-SSE1-NEXT: andb 13(%r12), %cl3597; CHECK-SSE1-NEXT: xorb %al, %cl3598; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3599; CHECK-SSE1-NEXT: movzbl 14(%r14), %ecx3600; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3601; CHECK-SSE1-NEXT: xorb %al, %cl3602; CHECK-SSE1-NEXT: andb 14(%r12), %cl3603; CHECK-SSE1-NEXT: xorb %al, %cl3604; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3605; CHECK-SSE1-NEXT: movzbl 15(%r14), %ecx3606; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3607; CHECK-SSE1-NEXT: xorb %al, %cl3608; CHECK-SSE1-NEXT: andb 15(%r12), %cl3609; CHECK-SSE1-NEXT: xorb %al, %cl3610; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3611; CHECK-SSE1-NEXT: movzbl 16(%r15), %eax3612; CHECK-SSE1-NEXT: movzbl 16(%r14), %ecx3613; CHECK-SSE1-NEXT: xorb %al, %cl3614; CHECK-SSE1-NEXT: andb 16(%r12), %cl3615; CHECK-SSE1-NEXT: xorb %al, %cl3616; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3617; CHECK-SSE1-NEXT: movzbl 17(%r15), %eax3618; CHECK-SSE1-NEXT: movzbl 17(%r14), %ecx3619; CHECK-SSE1-NEXT: xorb %al, %cl3620; CHECK-SSE1-NEXT: andb 17(%r12), %cl3621; CHECK-SSE1-NEXT: xorb %al, %cl3622; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3623; CHECK-SSE1-NEXT: movzbl 18(%r15), %eax3624; CHECK-SSE1-NEXT: movzbl 18(%r14), %ecx3625; CHECK-SSE1-NEXT: xorb %al, %cl3626; CHECK-SSE1-NEXT: andb 18(%r12), %cl3627; CHECK-SSE1-NEXT: xorb %al, %cl3628; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3629; CHECK-SSE1-NEXT: movzbl 19(%r15), %eax3630; CHECK-SSE1-NEXT: movzbl 19(%r14), %ecx3631; CHECK-SSE1-NEXT: xorb %al, %cl3632; CHECK-SSE1-NEXT: andb 19(%r12), %cl3633; CHECK-SSE1-NEXT: xorb %al, %cl3634; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3635; CHECK-SSE1-NEXT: movzbl 20(%r15), %eax3636; CHECK-SSE1-NEXT: movzbl 20(%r14), %ecx3637; CHECK-SSE1-NEXT: xorb %al, %cl3638; CHECK-SSE1-NEXT: andb 20(%r12), %cl3639; CHECK-SSE1-NEXT: xorb %al, %cl3640; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill3641; CHECK-SSE1-NEXT: movzbl 21(%r15), %eax3642; CHECK-SSE1-NEXT: movzbl 21(%r14), %ebp3643; CHECK-SSE1-NEXT: xorb %al, %bpl3644; CHECK-SSE1-NEXT: andb 21(%r12), %bpl3645; CHECK-SSE1-NEXT: xorb %al, %bpl3646; CHECK-SSE1-NEXT: movzbl 22(%r15), %eax3647; CHECK-SSE1-NEXT: movzbl 22(%r14), %ebx3648; CHECK-SSE1-NEXT: xorb %al, %bl3649; CHECK-SSE1-NEXT: andb 22(%r12), %bl3650; CHECK-SSE1-NEXT: xorb %al, %bl3651; CHECK-SSE1-NEXT: movzbl 23(%r15), %eax3652; CHECK-SSE1-NEXT: movzbl 23(%r14), %r11d3653; CHECK-SSE1-NEXT: xorb %al, %r11b3654; CHECK-SSE1-NEXT: andb 23(%r12), %r11b3655; CHECK-SSE1-NEXT: xorb %al, %r11b3656; CHECK-SSE1-NEXT: movzbl 24(%r15), %eax3657; CHECK-SSE1-NEXT: movzbl 24(%r14), %r9d3658; CHECK-SSE1-NEXT: xorb %al, %r9b3659; CHECK-SSE1-NEXT: andb 24(%r12), %r9b3660; CHECK-SSE1-NEXT: xorb %al, %r9b3661; CHECK-SSE1-NEXT: movzbl 25(%r15), %eax3662; CHECK-SSE1-NEXT: movzbl 25(%r14), %r8d3663; CHECK-SSE1-NEXT: xorb %al, %r8b3664; CHECK-SSE1-NEXT: andb 25(%r12), %r8b3665; CHECK-SSE1-NEXT: xorb %al, %r8b3666; CHECK-SSE1-NEXT: movzbl 26(%r15), %eax3667; CHECK-SSE1-NEXT: movzbl 26(%r14), %edi3668; CHECK-SSE1-NEXT: xorb %al, %dil3669; CHECK-SSE1-NEXT: andb 26(%r12), %dil3670; CHECK-SSE1-NEXT: xorb %al, %dil3671; CHECK-SSE1-NEXT: movzbl 27(%r15), %eax3672; CHECK-SSE1-NEXT: movzbl 27(%r14), %esi3673; CHECK-SSE1-NEXT: xorb %al, %sil3674; CHECK-SSE1-NEXT: andb 27(%r12), %sil3675; CHECK-SSE1-NEXT: xorb %al, %sil3676; CHECK-SSE1-NEXT: movzbl 28(%r15), %eax3677; CHECK-SSE1-NEXT: movzbl 28(%r14), %edx3678; CHECK-SSE1-NEXT: xorb %al, %dl3679; CHECK-SSE1-NEXT: andb 28(%r12), %dl3680; CHECK-SSE1-NEXT: xorb %al, %dl3681; CHECK-SSE1-NEXT: movzbl 29(%r15), %eax3682; CHECK-SSE1-NEXT: movzbl 29(%r14), %ecx3683; CHECK-SSE1-NEXT: xorb %al, %cl3684; CHECK-SSE1-NEXT: andb 29(%r12), %cl3685; CHECK-SSE1-NEXT: xorb %al, %cl3686; CHECK-SSE1-NEXT: movzbl 30(%r15), %r10d3687; CHECK-SSE1-NEXT: movzbl 30(%r14), %eax3688; CHECK-SSE1-NEXT: xorb %r10b, %al3689; CHECK-SSE1-NEXT: andb 30(%r12), %al3690; CHECK-SSE1-NEXT: xorb %r10b, %al3691; CHECK-SSE1-NEXT: movzbl 31(%r15), %r10d3692; CHECK-SSE1-NEXT: movzbl 31(%r14), %r14d3693; CHECK-SSE1-NEXT: xorb %r10b, %r14b3694; CHECK-SSE1-NEXT: andb 31(%r12), %r14b3695; CHECK-SSE1-NEXT: xorb %r10b, %r14b3696; CHECK-SSE1-NEXT: movb %r14b, 31(%r13)3697; CHECK-SSE1-NEXT: movb %al, 30(%r13)3698; CHECK-SSE1-NEXT: movb %cl, 29(%r13)3699; CHECK-SSE1-NEXT: movb %dl, 28(%r13)3700; CHECK-SSE1-NEXT: movb %sil, 27(%r13)3701; CHECK-SSE1-NEXT: movb %dil, 26(%r13)3702; CHECK-SSE1-NEXT: movb %r8b, 25(%r13)3703; CHECK-SSE1-NEXT: movb %r9b, 24(%r13)3704; CHECK-SSE1-NEXT: movb %r11b, 23(%r13)3705; CHECK-SSE1-NEXT: movb %bl, 22(%r13)3706; CHECK-SSE1-NEXT: movb %bpl, 21(%r13)3707; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3708; CHECK-SSE1-NEXT: movb %al, 20(%r13)3709; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3710; CHECK-SSE1-NEXT: movb %al, 19(%r13)3711; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3712; CHECK-SSE1-NEXT: movb %al, 18(%r13)3713; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3714; CHECK-SSE1-NEXT: movb %al, 17(%r13)3715; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3716; CHECK-SSE1-NEXT: movb %al, 16(%r13)3717; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3718; CHECK-SSE1-NEXT: movb %al, 15(%r13)3719; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3720; CHECK-SSE1-NEXT: movb %al, 14(%r13)3721; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3722; CHECK-SSE1-NEXT: movb %al, 13(%r13)3723; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3724; CHECK-SSE1-NEXT: movb %al, 12(%r13)3725; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3726; CHECK-SSE1-NEXT: movb %al, 11(%r13)3727; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3728; CHECK-SSE1-NEXT: movb %al, 10(%r13)3729; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3730; CHECK-SSE1-NEXT: movb %al, 9(%r13)3731; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3732; CHECK-SSE1-NEXT: movb %al, 8(%r13)3733; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3734; CHECK-SSE1-NEXT: movb %al, 7(%r13)3735; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3736; CHECK-SSE1-NEXT: movb %al, 6(%r13)3737; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3738; CHECK-SSE1-NEXT: movb %al, 5(%r13)3739; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3740; CHECK-SSE1-NEXT: movb %al, 4(%r13)3741; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3742; CHECK-SSE1-NEXT: movb %al, 3(%r13)3743; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3744; CHECK-SSE1-NEXT: movb %al, 2(%r13)3745; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3746; CHECK-SSE1-NEXT: movb %al, 1(%r13)3747; CHECK-SSE1-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload3748; CHECK-SSE1-NEXT: movb %al, (%r13)3749; CHECK-SSE1-NEXT: movq %r13, %rax3750; CHECK-SSE1-NEXT: popq %rbx3751; CHECK-SSE1-NEXT: popq %r123752; CHECK-SSE1-NEXT: popq %r133753; CHECK-SSE1-NEXT: popq %r143754; CHECK-SSE1-NEXT: popq %r153755; CHECK-SSE1-NEXT: popq %rbp3756; CHECK-SSE1-NEXT: retq3757;3758; CHECK-SSE2-LABEL: in_v32i8:3759; CHECK-SSE2: # %bb.0:3760; CHECK-SSE2-NEXT: movaps (%rdx), %xmm03761; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm13762; CHECK-SSE2-NEXT: movaps %xmm0, %xmm23763; CHECK-SSE2-NEXT: andnps (%rsi), %xmm23764; CHECK-SSE2-NEXT: andps (%rdi), %xmm03765; CHECK-SSE2-NEXT: orps %xmm2, %xmm03766; CHECK-SSE2-NEXT: movaps %xmm1, %xmm23767; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm23768; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm13769; CHECK-SSE2-NEXT: orps %xmm2, %xmm13770; CHECK-SSE2-NEXT: retq3771;3772; CHECK-XOP-LABEL: in_v32i8:3773; CHECK-XOP: # %bb.0:3774; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm03775; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm13776; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm03777; CHECK-XOP-NEXT: retq3778 %x = load <32 x i8>, ptr%px, align 323779 %y = load <32 x i8>, ptr%py, align 323780 %mask = load <32 x i8>, ptr%pmask, align 323781 %n0 = xor <32 x i8> %x, %y3782 %n1 = and <32 x i8> %n0, %mask3783 %r = xor <32 x i8> %n1, %y3784 ret <32 x i8> %r3785}3786 3787define <16 x i16> @in_v16i16(ptr%px, ptr%py, ptr%pmask) nounwind {3788; CHECK-BASELINE-LABEL: in_v16i16:3789; CHECK-BASELINE: # %bb.0:3790; CHECK-BASELINE-NEXT: pushq %rbp3791; CHECK-BASELINE-NEXT: pushq %r153792; CHECK-BASELINE-NEXT: pushq %r143793; CHECK-BASELINE-NEXT: pushq %r133794; CHECK-BASELINE-NEXT: pushq %r123795; CHECK-BASELINE-NEXT: pushq %rbx3796; CHECK-BASELINE-NEXT: movq %rcx, %r93797; CHECK-BASELINE-NEXT: movq %rdi, %r103798; CHECK-BASELINE-NEXT: movzwl 30(%rdx), %edi3799; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3800; CHECK-BASELINE-NEXT: movl 28(%rdx), %edi3801; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3802; CHECK-BASELINE-NEXT: movzwl 26(%rdx), %edi3803; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3804; CHECK-BASELINE-NEXT: movl 24(%rdx), %eax3805; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3806; CHECK-BASELINE-NEXT: movzwl 22(%rdx), %eax3807; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3808; CHECK-BASELINE-NEXT: movl 20(%rdx), %r8d3809; CHECK-BASELINE-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3810; CHECK-BASELINE-NEXT: movzwl 18(%rdx), %r11d3811; CHECK-BASELINE-NEXT: movl %r11d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3812; CHECK-BASELINE-NEXT: movl 16(%rdx), %ebx3813; CHECK-BASELINE-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3814; CHECK-BASELINE-NEXT: movzwl 14(%rdx), %ebp3815; CHECK-BASELINE-NEXT: movl %ebp, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3816; CHECK-BASELINE-NEXT: movl 12(%rdx), %r14d3817; CHECK-BASELINE-NEXT: movl %r14d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3818; CHECK-BASELINE-NEXT: movzwl 10(%rdx), %r15d3819; CHECK-BASELINE-NEXT: movl %r15d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3820; CHECK-BASELINE-NEXT: movl 8(%rdx), %r12d3821; CHECK-BASELINE-NEXT: movl %r12d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3822; CHECK-BASELINE-NEXT: movzwl 6(%rdx), %r13d3823; CHECK-BASELINE-NEXT: movl %r13d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3824; CHECK-BASELINE-NEXT: movl (%rdx), %ecx3825; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3826; CHECK-BASELINE-NEXT: movl 4(%rdx), %edi3827; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3828; CHECK-BASELINE-NEXT: movzwl 2(%rdx), %eax3829; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3830; CHECK-BASELINE-NEXT: movzwl (%rsi), %edx3831; CHECK-BASELINE-NEXT: xorw %cx, %dx3832; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3833; CHECK-BASELINE-NEXT: movzwl 2(%rsi), %ecx3834; CHECK-BASELINE-NEXT: xorw %ax, %cx3835; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3836; CHECK-BASELINE-NEXT: movzwl 4(%rsi), %eax3837; CHECK-BASELINE-NEXT: xorw %di, %ax3838; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3839; CHECK-BASELINE-NEXT: movzwl 6(%rsi), %ecx3840; CHECK-BASELINE-NEXT: xorw %r13w, %cx3841; CHECK-BASELINE-NEXT: movzwl 8(%rsi), %eax3842; CHECK-BASELINE-NEXT: xorw %r12w, %ax3843; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3844; CHECK-BASELINE-NEXT: movzwl 10(%rsi), %eax3845; CHECK-BASELINE-NEXT: xorw %r15w, %ax3846; CHECK-BASELINE-NEXT: movzwl 12(%rsi), %edx3847; CHECK-BASELINE-NEXT: xorw %r14w, %dx3848; CHECK-BASELINE-NEXT: movzwl 14(%rsi), %r13d3849; CHECK-BASELINE-NEXT: xorw %bp, %r13w3850; CHECK-BASELINE-NEXT: movzwl 16(%rsi), %r12d3851; CHECK-BASELINE-NEXT: xorw %bx, %r12w3852; CHECK-BASELINE-NEXT: movzwl 18(%rsi), %r15d3853; CHECK-BASELINE-NEXT: xorw %r11w, %r15w3854; CHECK-BASELINE-NEXT: movzwl 20(%rsi), %r14d3855; CHECK-BASELINE-NEXT: xorw %r8w, %r14w3856; CHECK-BASELINE-NEXT: movzwl 22(%rsi), %ebp3857; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bp # 2-byte Folded Reload3858; CHECK-BASELINE-NEXT: movzwl 24(%rsi), %ebx3859; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bx # 2-byte Folded Reload3860; CHECK-BASELINE-NEXT: movzwl 26(%rsi), %r11d3861; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %r11w # 2-byte Folded Reload3862; CHECK-BASELINE-NEXT: movzwl 28(%rsi), %edi3863; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %di # 2-byte Folded Reload3864; CHECK-BASELINE-NEXT: movzwl 30(%rsi), %esi3865; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %si # 2-byte Folded Reload3866; CHECK-BASELINE-NEXT: andw 30(%r9), %si3867; CHECK-BASELINE-NEXT: andw 28(%r9), %di3868; CHECK-BASELINE-NEXT: andw 26(%r9), %r11w3869; CHECK-BASELINE-NEXT: andw 24(%r9), %bx3870; CHECK-BASELINE-NEXT: andw 22(%r9), %bp3871; CHECK-BASELINE-NEXT: andw 20(%r9), %r14w3872; CHECK-BASELINE-NEXT: andw 18(%r9), %r15w3873; CHECK-BASELINE-NEXT: andw 16(%r9), %r12w3874; CHECK-BASELINE-NEXT: andw 14(%r9), %r13w3875; CHECK-BASELINE-NEXT: andw 12(%r9), %dx3876; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3877; CHECK-BASELINE-NEXT: andw 10(%r9), %ax3878; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3879; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Reload3880; CHECK-BASELINE-NEXT: andw 8(%r9), %dx3881; CHECK-BASELINE-NEXT: andw 6(%r9), %cx3882; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3883; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Reload3884; CHECK-BASELINE-NEXT: andw 4(%r9), %r8w3885; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload3886; CHECK-BASELINE-NEXT: andw 2(%r9), %ax3887; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload3888; CHECK-BASELINE-NEXT: andw (%r9), %cx3889; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Folded Reload3890; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3891; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload3892; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3893; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Folded Reload3894; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Reload3895; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Folded Reload3896; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload3897; CHECK-BASELINE-NEXT: movl %edx, %ecx3898; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Reload3899; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload3900; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload3901; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload3902; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r13d # 4-byte Folded Reload3903; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r12d # 4-byte Folded Reload3904; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r15d # 4-byte Folded Reload3905; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r14d # 4-byte Folded Reload3906; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebp # 4-byte Folded Reload3907; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebx # 4-byte Folded Reload3908; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r11d # 4-byte Folded Reload3909; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edi # 4-byte Folded Reload3910; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Folded Reload3911; CHECK-BASELINE-NEXT: movw %si, 30(%r10)3912; CHECK-BASELINE-NEXT: movw %di, 28(%r10)3913; CHECK-BASELINE-NEXT: movw %r11w, 26(%r10)3914; CHECK-BASELINE-NEXT: movw %bx, 24(%r10)3915; CHECK-BASELINE-NEXT: movw %bp, 22(%r10)3916; CHECK-BASELINE-NEXT: movw %r14w, 20(%r10)3917; CHECK-BASELINE-NEXT: movw %r15w, 18(%r10)3918; CHECK-BASELINE-NEXT: movw %r12w, 16(%r10)3919; CHECK-BASELINE-NEXT: movw %r13w, 14(%r10)3920; CHECK-BASELINE-NEXT: movw %ax, 12(%r10)3921; CHECK-BASELINE-NEXT: movw %dx, 10(%r10)3922; CHECK-BASELINE-NEXT: movw %cx, 8(%r10)3923; CHECK-BASELINE-NEXT: movw %r9w, 6(%r10)3924; CHECK-BASELINE-NEXT: movw %r8w, 4(%r10)3925; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload3926; CHECK-BASELINE-NEXT: movw %ax, 2(%r10)3927; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload3928; CHECK-BASELINE-NEXT: movw %ax, (%r10)3929; CHECK-BASELINE-NEXT: movq %r10, %rax3930; CHECK-BASELINE-NEXT: popq %rbx3931; CHECK-BASELINE-NEXT: popq %r123932; CHECK-BASELINE-NEXT: popq %r133933; CHECK-BASELINE-NEXT: popq %r143934; CHECK-BASELINE-NEXT: popq %r153935; CHECK-BASELINE-NEXT: popq %rbp3936; CHECK-BASELINE-NEXT: retq3937;3938; CHECK-SSE1-LABEL: in_v16i16:3939; CHECK-SSE1: # %bb.0:3940; CHECK-SSE1-NEXT: pushq %rbp3941; CHECK-SSE1-NEXT: pushq %r153942; CHECK-SSE1-NEXT: pushq %r143943; CHECK-SSE1-NEXT: pushq %r133944; CHECK-SSE1-NEXT: pushq %r123945; CHECK-SSE1-NEXT: pushq %rbx3946; CHECK-SSE1-NEXT: movq %rcx, %r93947; CHECK-SSE1-NEXT: movq %rdi, %r103948; CHECK-SSE1-NEXT: movzwl 30(%rdx), %edi3949; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3950; CHECK-SSE1-NEXT: movl 28(%rdx), %edi3951; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3952; CHECK-SSE1-NEXT: movzwl 26(%rdx), %edi3953; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3954; CHECK-SSE1-NEXT: movl 24(%rdx), %eax3955; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3956; CHECK-SSE1-NEXT: movzwl 22(%rdx), %eax3957; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3958; CHECK-SSE1-NEXT: movl 20(%rdx), %r8d3959; CHECK-SSE1-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3960; CHECK-SSE1-NEXT: movzwl 18(%rdx), %r11d3961; CHECK-SSE1-NEXT: movl %r11d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3962; CHECK-SSE1-NEXT: movl 16(%rdx), %ebx3963; CHECK-SSE1-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3964; CHECK-SSE1-NEXT: movzwl 14(%rdx), %ebp3965; CHECK-SSE1-NEXT: movl %ebp, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3966; CHECK-SSE1-NEXT: movl 12(%rdx), %r14d3967; CHECK-SSE1-NEXT: movl %r14d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3968; CHECK-SSE1-NEXT: movzwl 10(%rdx), %r15d3969; CHECK-SSE1-NEXT: movl %r15d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3970; CHECK-SSE1-NEXT: movl 8(%rdx), %r12d3971; CHECK-SSE1-NEXT: movl %r12d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3972; CHECK-SSE1-NEXT: movzwl 6(%rdx), %r13d3973; CHECK-SSE1-NEXT: movl %r13d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3974; CHECK-SSE1-NEXT: movl (%rdx), %ecx3975; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3976; CHECK-SSE1-NEXT: movl 4(%rdx), %edi3977; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3978; CHECK-SSE1-NEXT: movzwl 2(%rdx), %eax3979; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3980; CHECK-SSE1-NEXT: movzwl (%rsi), %edx3981; CHECK-SSE1-NEXT: xorw %cx, %dx3982; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3983; CHECK-SSE1-NEXT: movzwl 2(%rsi), %ecx3984; CHECK-SSE1-NEXT: xorw %ax, %cx3985; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3986; CHECK-SSE1-NEXT: movzwl 4(%rsi), %eax3987; CHECK-SSE1-NEXT: xorw %di, %ax3988; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3989; CHECK-SSE1-NEXT: movzwl 6(%rsi), %ecx3990; CHECK-SSE1-NEXT: xorw %r13w, %cx3991; CHECK-SSE1-NEXT: movzwl 8(%rsi), %eax3992; CHECK-SSE1-NEXT: xorw %r12w, %ax3993; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill3994; CHECK-SSE1-NEXT: movzwl 10(%rsi), %eax3995; CHECK-SSE1-NEXT: xorw %r15w, %ax3996; CHECK-SSE1-NEXT: movzwl 12(%rsi), %edx3997; CHECK-SSE1-NEXT: xorw %r14w, %dx3998; CHECK-SSE1-NEXT: movzwl 14(%rsi), %r13d3999; CHECK-SSE1-NEXT: xorw %bp, %r13w4000; CHECK-SSE1-NEXT: movzwl 16(%rsi), %r12d4001; CHECK-SSE1-NEXT: xorw %bx, %r12w4002; CHECK-SSE1-NEXT: movzwl 18(%rsi), %r15d4003; CHECK-SSE1-NEXT: xorw %r11w, %r15w4004; CHECK-SSE1-NEXT: movzwl 20(%rsi), %r14d4005; CHECK-SSE1-NEXT: xorw %r8w, %r14w4006; CHECK-SSE1-NEXT: movzwl 22(%rsi), %ebp4007; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bp # 2-byte Folded Reload4008; CHECK-SSE1-NEXT: movzwl 24(%rsi), %ebx4009; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bx # 2-byte Folded Reload4010; CHECK-SSE1-NEXT: movzwl 26(%rsi), %r11d4011; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %r11w # 2-byte Folded Reload4012; CHECK-SSE1-NEXT: movzwl 28(%rsi), %edi4013; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %di # 2-byte Folded Reload4014; CHECK-SSE1-NEXT: movzwl 30(%rsi), %esi4015; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %si # 2-byte Folded Reload4016; CHECK-SSE1-NEXT: andw 30(%r9), %si4017; CHECK-SSE1-NEXT: andw 28(%r9), %di4018; CHECK-SSE1-NEXT: andw 26(%r9), %r11w4019; CHECK-SSE1-NEXT: andw 24(%r9), %bx4020; CHECK-SSE1-NEXT: andw 22(%r9), %bp4021; CHECK-SSE1-NEXT: andw 20(%r9), %r14w4022; CHECK-SSE1-NEXT: andw 18(%r9), %r15w4023; CHECK-SSE1-NEXT: andw 16(%r9), %r12w4024; CHECK-SSE1-NEXT: andw 14(%r9), %r13w4025; CHECK-SSE1-NEXT: andw 12(%r9), %dx4026; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4027; CHECK-SSE1-NEXT: andw 10(%r9), %ax4028; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4029; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Reload4030; CHECK-SSE1-NEXT: andw 8(%r9), %dx4031; CHECK-SSE1-NEXT: andw 6(%r9), %cx4032; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4033; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Reload4034; CHECK-SSE1-NEXT: andw 4(%r9), %r8w4035; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload4036; CHECK-SSE1-NEXT: andw 2(%r9), %ax4037; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload4038; CHECK-SSE1-NEXT: andw (%r9), %cx4039; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Folded Reload4040; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4041; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload4042; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4043; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Folded Reload4044; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Reload4045; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Folded Reload4046; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload4047; CHECK-SSE1-NEXT: movl %edx, %ecx4048; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Reload4049; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload4050; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload4051; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload4052; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r13d # 4-byte Folded Reload4053; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r12d # 4-byte Folded Reload4054; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r15d # 4-byte Folded Reload4055; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r14d # 4-byte Folded Reload4056; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebp # 4-byte Folded Reload4057; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebx # 4-byte Folded Reload4058; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r11d # 4-byte Folded Reload4059; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edi # 4-byte Folded Reload4060; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Folded Reload4061; CHECK-SSE1-NEXT: movw %si, 30(%r10)4062; CHECK-SSE1-NEXT: movw %di, 28(%r10)4063; CHECK-SSE1-NEXT: movw %r11w, 26(%r10)4064; CHECK-SSE1-NEXT: movw %bx, 24(%r10)4065; CHECK-SSE1-NEXT: movw %bp, 22(%r10)4066; CHECK-SSE1-NEXT: movw %r14w, 20(%r10)4067; CHECK-SSE1-NEXT: movw %r15w, 18(%r10)4068; CHECK-SSE1-NEXT: movw %r12w, 16(%r10)4069; CHECK-SSE1-NEXT: movw %r13w, 14(%r10)4070; CHECK-SSE1-NEXT: movw %ax, 12(%r10)4071; CHECK-SSE1-NEXT: movw %dx, 10(%r10)4072; CHECK-SSE1-NEXT: movw %cx, 8(%r10)4073; CHECK-SSE1-NEXT: movw %r9w, 6(%r10)4074; CHECK-SSE1-NEXT: movw %r8w, 4(%r10)4075; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload4076; CHECK-SSE1-NEXT: movw %ax, 2(%r10)4077; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload4078; CHECK-SSE1-NEXT: movw %ax, (%r10)4079; CHECK-SSE1-NEXT: movq %r10, %rax4080; CHECK-SSE1-NEXT: popq %rbx4081; CHECK-SSE1-NEXT: popq %r124082; CHECK-SSE1-NEXT: popq %r134083; CHECK-SSE1-NEXT: popq %r144084; CHECK-SSE1-NEXT: popq %r154085; CHECK-SSE1-NEXT: popq %rbp4086; CHECK-SSE1-NEXT: retq4087;4088; CHECK-SSE2-LABEL: in_v16i16:4089; CHECK-SSE2: # %bb.0:4090; CHECK-SSE2-NEXT: movaps (%rdx), %xmm04091; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm14092; CHECK-SSE2-NEXT: movaps %xmm0, %xmm24093; CHECK-SSE2-NEXT: andnps (%rsi), %xmm24094; CHECK-SSE2-NEXT: andps (%rdi), %xmm04095; CHECK-SSE2-NEXT: orps %xmm2, %xmm04096; CHECK-SSE2-NEXT: movaps %xmm1, %xmm24097; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm24098; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm14099; CHECK-SSE2-NEXT: orps %xmm2, %xmm14100; CHECK-SSE2-NEXT: retq4101;4102; CHECK-XOP-LABEL: in_v16i16:4103; CHECK-XOP: # %bb.0:4104; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm04105; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm14106; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm04107; CHECK-XOP-NEXT: retq4108 %x = load <16 x i16>, ptr%px, align 324109 %y = load <16 x i16>, ptr%py, align 324110 %mask = load <16 x i16>, ptr%pmask, align 324111 %n0 = xor <16 x i16> %x, %y4112 %n1 = and <16 x i16> %n0, %mask4113 %r = xor <16 x i16> %n1, %y4114 ret <16 x i16> %r4115}4116 4117define <8 x i32> @in_v8i32(ptr%px, ptr%py, ptr%pmask) nounwind {4118; CHECK-BASELINE-LABEL: in_v8i32:4119; CHECK-BASELINE: # %bb.0:4120; CHECK-BASELINE-NEXT: pushq %rbp4121; CHECK-BASELINE-NEXT: pushq %r154122; CHECK-BASELINE-NEXT: pushq %r144123; CHECK-BASELINE-NEXT: pushq %r134124; CHECK-BASELINE-NEXT: pushq %r124125; CHECK-BASELINE-NEXT: pushq %rbx4126; CHECK-BASELINE-NEXT: movl 28(%rdx), %ebp4127; CHECK-BASELINE-NEXT: movl 24(%rdx), %ebx4128; CHECK-BASELINE-NEXT: movl 20(%rdx), %r10d4129; CHECK-BASELINE-NEXT: movl 16(%rdx), %eax4130; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4131; CHECK-BASELINE-NEXT: movl 12(%rdx), %r12d4132; CHECK-BASELINE-NEXT: movl %r12d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4133; CHECK-BASELINE-NEXT: movl 8(%rdx), %r14d4134; CHECK-BASELINE-NEXT: movl %r14d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4135; CHECK-BASELINE-NEXT: movl (%rdx), %r15d4136; CHECK-BASELINE-NEXT: movl 4(%rdx), %r13d4137; CHECK-BASELINE-NEXT: movl (%rsi), %r8d4138; CHECK-BASELINE-NEXT: xorl %r15d, %r8d4139; CHECK-BASELINE-NEXT: movl 4(%rsi), %r9d4140; CHECK-BASELINE-NEXT: xorl %r13d, %r9d4141; CHECK-BASELINE-NEXT: movl 8(%rsi), %r11d4142; CHECK-BASELINE-NEXT: xorl %r14d, %r11d4143; CHECK-BASELINE-NEXT: movl 12(%rsi), %r14d4144; CHECK-BASELINE-NEXT: xorl %r12d, %r14d4145; CHECK-BASELINE-NEXT: movl 16(%rsi), %r12d4146; CHECK-BASELINE-NEXT: xorl %eax, %r12d4147; CHECK-BASELINE-NEXT: movl 20(%rsi), %edx4148; CHECK-BASELINE-NEXT: xorl %r10d, %edx4149; CHECK-BASELINE-NEXT: movl 24(%rsi), %eax4150; CHECK-BASELINE-NEXT: xorl %ebx, %eax4151; CHECK-BASELINE-NEXT: movl 28(%rsi), %esi4152; CHECK-BASELINE-NEXT: xorl %ebp, %esi4153; CHECK-BASELINE-NEXT: andl 28(%rcx), %esi4154; CHECK-BASELINE-NEXT: andl 24(%rcx), %eax4155; CHECK-BASELINE-NEXT: andl 20(%rcx), %edx4156; CHECK-BASELINE-NEXT: andl 16(%rcx), %r12d4157; CHECK-BASELINE-NEXT: andl 12(%rcx), %r14d4158; CHECK-BASELINE-NEXT: andl 8(%rcx), %r11d4159; CHECK-BASELINE-NEXT: andl 4(%rcx), %r9d4160; CHECK-BASELINE-NEXT: andl (%rcx), %r8d4161; CHECK-BASELINE-NEXT: xorl %r15d, %r8d4162; CHECK-BASELINE-NEXT: xorl %r13d, %r9d4163; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r11d # 4-byte Folded Reload4164; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r14d # 4-byte Folded Reload4165; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r12d # 4-byte Folded Reload4166; CHECK-BASELINE-NEXT: xorl %r10d, %edx4167; CHECK-BASELINE-NEXT: xorl %ebx, %eax4168; CHECK-BASELINE-NEXT: xorl %ebp, %esi4169; CHECK-BASELINE-NEXT: movl %esi, 28(%rdi)4170; CHECK-BASELINE-NEXT: movl %eax, 24(%rdi)4171; CHECK-BASELINE-NEXT: movl %edx, 20(%rdi)4172; CHECK-BASELINE-NEXT: movl %r12d, 16(%rdi)4173; CHECK-BASELINE-NEXT: movl %r14d, 12(%rdi)4174; CHECK-BASELINE-NEXT: movl %r11d, 8(%rdi)4175; CHECK-BASELINE-NEXT: movl %r9d, 4(%rdi)4176; CHECK-BASELINE-NEXT: movl %r8d, (%rdi)4177; CHECK-BASELINE-NEXT: movq %rdi, %rax4178; CHECK-BASELINE-NEXT: popq %rbx4179; CHECK-BASELINE-NEXT: popq %r124180; CHECK-BASELINE-NEXT: popq %r134181; CHECK-BASELINE-NEXT: popq %r144182; CHECK-BASELINE-NEXT: popq %r154183; CHECK-BASELINE-NEXT: popq %rbp4184; CHECK-BASELINE-NEXT: retq4185;4186; CHECK-SSE1-LABEL: in_v8i32:4187; CHECK-SSE1: # %bb.0:4188; CHECK-SSE1-NEXT: pushq %rbp4189; CHECK-SSE1-NEXT: pushq %r154190; CHECK-SSE1-NEXT: pushq %r144191; CHECK-SSE1-NEXT: pushq %r134192; CHECK-SSE1-NEXT: pushq %r124193; CHECK-SSE1-NEXT: pushq %rbx4194; CHECK-SSE1-NEXT: movl 28(%rdx), %ebp4195; CHECK-SSE1-NEXT: movl 24(%rdx), %ebx4196; CHECK-SSE1-NEXT: movl 20(%rdx), %r10d4197; CHECK-SSE1-NEXT: movl 16(%rdx), %eax4198; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4199; CHECK-SSE1-NEXT: movl 12(%rdx), %r12d4200; CHECK-SSE1-NEXT: movl %r12d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4201; CHECK-SSE1-NEXT: movl 8(%rdx), %r14d4202; CHECK-SSE1-NEXT: movl %r14d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill4203; CHECK-SSE1-NEXT: movl (%rdx), %r15d4204; CHECK-SSE1-NEXT: movl 4(%rdx), %r13d4205; CHECK-SSE1-NEXT: movl (%rsi), %r8d4206; CHECK-SSE1-NEXT: xorl %r15d, %r8d4207; CHECK-SSE1-NEXT: movl 4(%rsi), %r9d4208; CHECK-SSE1-NEXT: xorl %r13d, %r9d4209; CHECK-SSE1-NEXT: movl 8(%rsi), %r11d4210; CHECK-SSE1-NEXT: xorl %r14d, %r11d4211; CHECK-SSE1-NEXT: movl 12(%rsi), %r14d4212; CHECK-SSE1-NEXT: xorl %r12d, %r14d4213; CHECK-SSE1-NEXT: movl 16(%rsi), %r12d4214; CHECK-SSE1-NEXT: xorl %eax, %r12d4215; CHECK-SSE1-NEXT: movl 20(%rsi), %edx4216; CHECK-SSE1-NEXT: xorl %r10d, %edx4217; CHECK-SSE1-NEXT: movl 24(%rsi), %eax4218; CHECK-SSE1-NEXT: xorl %ebx, %eax4219; CHECK-SSE1-NEXT: movl 28(%rsi), %esi4220; CHECK-SSE1-NEXT: xorl %ebp, %esi4221; CHECK-SSE1-NEXT: andl 28(%rcx), %esi4222; CHECK-SSE1-NEXT: andl 24(%rcx), %eax4223; CHECK-SSE1-NEXT: andl 20(%rcx), %edx4224; CHECK-SSE1-NEXT: andl 16(%rcx), %r12d4225; CHECK-SSE1-NEXT: andl 12(%rcx), %r14d4226; CHECK-SSE1-NEXT: andl 8(%rcx), %r11d4227; CHECK-SSE1-NEXT: andl 4(%rcx), %r9d4228; CHECK-SSE1-NEXT: andl (%rcx), %r8d4229; CHECK-SSE1-NEXT: xorl %r15d, %r8d4230; CHECK-SSE1-NEXT: xorl %r13d, %r9d4231; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r11d # 4-byte Folded Reload4232; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r14d # 4-byte Folded Reload4233; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r12d # 4-byte Folded Reload4234; CHECK-SSE1-NEXT: xorl %r10d, %edx4235; CHECK-SSE1-NEXT: xorl %ebx, %eax4236; CHECK-SSE1-NEXT: xorl %ebp, %esi4237; CHECK-SSE1-NEXT: movl %esi, 28(%rdi)4238; CHECK-SSE1-NEXT: movl %eax, 24(%rdi)4239; CHECK-SSE1-NEXT: movl %edx, 20(%rdi)4240; CHECK-SSE1-NEXT: movl %r12d, 16(%rdi)4241; CHECK-SSE1-NEXT: movl %r14d, 12(%rdi)4242; CHECK-SSE1-NEXT: movl %r11d, 8(%rdi)4243; CHECK-SSE1-NEXT: movl %r9d, 4(%rdi)4244; CHECK-SSE1-NEXT: movl %r8d, (%rdi)4245; CHECK-SSE1-NEXT: movq %rdi, %rax4246; CHECK-SSE1-NEXT: popq %rbx4247; CHECK-SSE1-NEXT: popq %r124248; CHECK-SSE1-NEXT: popq %r134249; CHECK-SSE1-NEXT: popq %r144250; CHECK-SSE1-NEXT: popq %r154251; CHECK-SSE1-NEXT: popq %rbp4252; CHECK-SSE1-NEXT: retq4253;4254; CHECK-SSE2-LABEL: in_v8i32:4255; CHECK-SSE2: # %bb.0:4256; CHECK-SSE2-NEXT: movaps (%rdx), %xmm04257; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm14258; CHECK-SSE2-NEXT: movaps %xmm0, %xmm24259; CHECK-SSE2-NEXT: andnps (%rsi), %xmm24260; CHECK-SSE2-NEXT: andps (%rdi), %xmm04261; CHECK-SSE2-NEXT: orps %xmm2, %xmm04262; CHECK-SSE2-NEXT: movaps %xmm1, %xmm24263; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm24264; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm14265; CHECK-SSE2-NEXT: orps %xmm2, %xmm14266; CHECK-SSE2-NEXT: retq4267;4268; CHECK-XOP-LABEL: in_v8i32:4269; CHECK-XOP: # %bb.0:4270; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm04271; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm14272; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm04273; CHECK-XOP-NEXT: retq4274 %x = load <8 x i32>, ptr%px, align 324275 %y = load <8 x i32>, ptr%py, align 324276 %mask = load <8 x i32>, ptr%pmask, align 324277 %n0 = xor <8 x i32> %x, %y4278 %n1 = and <8 x i32> %n0, %mask4279 %r = xor <8 x i32> %n1, %y4280 ret <8 x i32> %r4281}4282 4283define <4 x i64> @in_v4i64(ptr%px, ptr%py, ptr%pmask) nounwind {4284; CHECK-BASELINE-LABEL: in_v4i64:4285; CHECK-BASELINE: # %bb.0:4286; CHECK-BASELINE-NEXT: pushq %rbx4287; CHECK-BASELINE-NEXT: movq %rdi, %rax4288; CHECK-BASELINE-NEXT: movq 24(%rdx), %rdi4289; CHECK-BASELINE-NEXT: movq 16(%rdx), %r84290; CHECK-BASELINE-NEXT: movq (%rdx), %r94291; CHECK-BASELINE-NEXT: movq 8(%rdx), %r104292; CHECK-BASELINE-NEXT: movq (%rsi), %rdx4293; CHECK-BASELINE-NEXT: xorq %r9, %rdx4294; CHECK-BASELINE-NEXT: movq 8(%rsi), %r114295; CHECK-BASELINE-NEXT: xorq %r10, %r114296; CHECK-BASELINE-NEXT: movq 16(%rsi), %rbx4297; CHECK-BASELINE-NEXT: xorq %r8, %rbx4298; CHECK-BASELINE-NEXT: movq 24(%rsi), %rsi4299; CHECK-BASELINE-NEXT: xorq %rdi, %rsi4300; CHECK-BASELINE-NEXT: andq 24(%rcx), %rsi4301; CHECK-BASELINE-NEXT: andq 16(%rcx), %rbx4302; CHECK-BASELINE-NEXT: andq 8(%rcx), %r114303; CHECK-BASELINE-NEXT: andq (%rcx), %rdx4304; CHECK-BASELINE-NEXT: xorq %r9, %rdx4305; CHECK-BASELINE-NEXT: xorq %r10, %r114306; CHECK-BASELINE-NEXT: xorq %r8, %rbx4307; CHECK-BASELINE-NEXT: xorq %rdi, %rsi4308; CHECK-BASELINE-NEXT: movq %rsi, 24(%rax)4309; CHECK-BASELINE-NEXT: movq %rbx, 16(%rax)4310; CHECK-BASELINE-NEXT: movq %r11, 8(%rax)4311; CHECK-BASELINE-NEXT: movq %rdx, (%rax)4312; CHECK-BASELINE-NEXT: popq %rbx4313; CHECK-BASELINE-NEXT: retq4314;4315; CHECK-SSE1-LABEL: in_v4i64:4316; CHECK-SSE1: # %bb.0:4317; CHECK-SSE1-NEXT: pushq %rbx4318; CHECK-SSE1-NEXT: movq %rdi, %rax4319; CHECK-SSE1-NEXT: movq 24(%rdx), %rdi4320; CHECK-SSE1-NEXT: movq 16(%rdx), %r84321; CHECK-SSE1-NEXT: movq (%rdx), %r94322; CHECK-SSE1-NEXT: movq 8(%rdx), %r104323; CHECK-SSE1-NEXT: movq (%rsi), %rdx4324; CHECK-SSE1-NEXT: xorq %r9, %rdx4325; CHECK-SSE1-NEXT: movq 8(%rsi), %r114326; CHECK-SSE1-NEXT: xorq %r10, %r114327; CHECK-SSE1-NEXT: movq 16(%rsi), %rbx4328; CHECK-SSE1-NEXT: xorq %r8, %rbx4329; CHECK-SSE1-NEXT: movq 24(%rsi), %rsi4330; CHECK-SSE1-NEXT: xorq %rdi, %rsi4331; CHECK-SSE1-NEXT: andq 24(%rcx), %rsi4332; CHECK-SSE1-NEXT: andq 16(%rcx), %rbx4333; CHECK-SSE1-NEXT: andq 8(%rcx), %r114334; CHECK-SSE1-NEXT: andq (%rcx), %rdx4335; CHECK-SSE1-NEXT: xorq %r9, %rdx4336; CHECK-SSE1-NEXT: xorq %r10, %r114337; CHECK-SSE1-NEXT: xorq %r8, %rbx4338; CHECK-SSE1-NEXT: xorq %rdi, %rsi4339; CHECK-SSE1-NEXT: movq %rsi, 24(%rax)4340; CHECK-SSE1-NEXT: movq %rbx, 16(%rax)4341; CHECK-SSE1-NEXT: movq %r11, 8(%rax)4342; CHECK-SSE1-NEXT: movq %rdx, (%rax)4343; CHECK-SSE1-NEXT: popq %rbx4344; CHECK-SSE1-NEXT: retq4345;4346; CHECK-SSE2-LABEL: in_v4i64:4347; CHECK-SSE2: # %bb.0:4348; CHECK-SSE2-NEXT: movaps (%rdx), %xmm04349; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm14350; CHECK-SSE2-NEXT: movaps %xmm0, %xmm24351; CHECK-SSE2-NEXT: andnps (%rsi), %xmm24352; CHECK-SSE2-NEXT: andps (%rdi), %xmm04353; CHECK-SSE2-NEXT: orps %xmm2, %xmm04354; CHECK-SSE2-NEXT: movaps %xmm1, %xmm24355; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm24356; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm14357; CHECK-SSE2-NEXT: orps %xmm2, %xmm14358; CHECK-SSE2-NEXT: retq4359;4360; CHECK-XOP-LABEL: in_v4i64:4361; CHECK-XOP: # %bb.0:4362; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm04363; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm14364; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm04365; CHECK-XOP-NEXT: retq4366 %x = load <4 x i64>, ptr%px, align 324367 %y = load <4 x i64>, ptr%py, align 324368 %mask = load <4 x i64>, ptr%pmask, align 324369 %n0 = xor <4 x i64> %x, %y4370 %n1 = and <4 x i64> %n0, %mask4371 %r = xor <4 x i64> %n1, %y4372 ret <4 x i64> %r4373}4374