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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X644 5; The easy case: a constant power-of-2 divisor.6 7define i64 @const_pow_2(i64 %x) {8; X86-LABEL: const_pow_2:9; X86: # %bb.0:10; X86-NEXT: movl {{[0-9]+}}(%esp), %eax11; X86-NEXT: andl $31, %eax12; X86-NEXT: xorl %edx, %edx13; X86-NEXT: retl14;15; X64-LABEL: const_pow_2:16; X64: # %bb.0:17; X64-NEXT: movq %rdi, %rax18; X64-NEXT: andl $31, %eax19; X64-NEXT: retq20 %urem = urem i64 %x, 3221 ret i64 %urem22}23 24; A left-shifted power-of-2 divisor. Use a weird type for wider coverage.25 26define i25 @shift_left_pow_2(i25 %x, i25 %y) {27; X86-LABEL: shift_left_pow_2:28; X86: # %bb.0:29; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx30; X86-NEXT: movl $1, %eax31; X86-NEXT: shll %cl, %eax32; X86-NEXT: addl $33554431, %eax # imm = 0x1FFFFFF33; X86-NEXT: andl {{[0-9]+}}(%esp), %eax34; X86-NEXT: retl35;36; X64-LABEL: shift_left_pow_2:37; X64: # %bb.0:38; X64-NEXT: movl %esi, %ecx39; X64-NEXT: movl $1, %eax40; X64-NEXT: # kill: def $cl killed $cl killed $ecx41; X64-NEXT: shll %cl, %eax42; X64-NEXT: addl $33554431, %eax # imm = 0x1FFFFFF43; X64-NEXT: andl %edi, %eax44; X64-NEXT: retq45 %shl = shl i25 1, %y46 %urem = urem i25 %x, %shl47 ret i25 %urem48}49 50; A logically right-shifted sign bit is a power-of-2 or UB.51 52define i16 @shift_right_pow_2(i16 %x, i16 %y) {53; X86-LABEL: shift_right_pow_2:54; X86: # %bb.0:55; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx56; X86-NEXT: movl $32768, %eax # imm = 0x800057; X86-NEXT: shrl %cl, %eax58; X86-NEXT: decl %eax59; X86-NEXT: andw {{[0-9]+}}(%esp), %ax60; X86-NEXT: # kill: def $ax killed $ax killed $eax61; X86-NEXT: retl62;63; X64-LABEL: shift_right_pow_2:64; X64: # %bb.0:65; X64-NEXT: movl %esi, %ecx66; X64-NEXT: movl $32768, %eax # imm = 0x800067; X64-NEXT: # kill: def $cl killed $cl killed $ecx68; X64-NEXT: shrl %cl, %eax69; X64-NEXT: decl %eax70; X64-NEXT: andl %edi, %eax71; X64-NEXT: # kill: def $ax killed $ax killed $eax72; X64-NEXT: retq73 %shr = lshr i16 -32768, %y74 %urem = urem i16 %x, %shr75 ret i16 %urem76}77 78; FIXME: A zero divisor would be UB, so this could be reduced to an 'and' with 3.79 80define i8 @and_pow_2(i8 %x, i8 %y) {81; X86-LABEL: and_pow_2:82; X86: # %bb.0:83; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx84; X86-NEXT: andb $4, %cl85; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax86; X86-NEXT: divb %cl87; X86-NEXT: movzbl %ah, %eax88; X86-NEXT: # kill: def $al killed $al killed $eax89; X86-NEXT: retl90;91; X64-LABEL: and_pow_2:92; X64: # %bb.0:93; X64-NEXT: andb $4, %sil94; X64-NEXT: movzbl %dil, %eax95; X64-NEXT: divb %sil96; X64-NEXT: movzbl %ah, %eax97; X64-NEXT: # kill: def $al killed $al killed $eax98; X64-NEXT: retq99 %and = and i8 %y, 4100 %urem = urem i8 %x, %and101 ret i8 %urem102}103 104; A vector constant divisor should get the same treatment as a scalar.105 106define <4 x i32> @vec_const_uniform_pow_2(<4 x i32> %x) {107; X86-LABEL: vec_const_uniform_pow_2:108; X86: # %bb.0:109; X86-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0110; X86-NEXT: retl111;112; X64-LABEL: vec_const_uniform_pow_2:113; X64: # %bb.0:114; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0115; X64-NEXT: retq116 %urem = urem <4 x i32> %x, <i32 16, i32 16, i32 16, i32 16>117 ret <4 x i32> %urem118}119 120define <4 x i32> @vec_const_nonuniform_pow_2(<4 x i32> %x) {121; X86-LABEL: vec_const_nonuniform_pow_2:122; X86: # %bb.0:123; X86-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0124; X86-NEXT: retl125;126; X64-LABEL: vec_const_nonuniform_pow_2:127; X64: # %bb.0:128; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0129; X64-NEXT: retq130 %urem = urem <4 x i32> %x, <i32 2, i32 4, i32 8, i32 16>131 ret <4 x i32> %urem132}133