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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK-SSE23; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=CHECK-SSE414; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX15; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX26; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512VL7 8; Odd+Even divisors9define <4 x i32> @test_urem_odd_even(<4 x i32> %X) nounwind {10; CHECK-SSE2-LABEL: test_urem_odd_even:11; CHECK-SSE2: # %bb.0:12; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]13; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,3264175145,3264175145]14; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]15; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,u,3264175145,u]16; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]17; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]18; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]19; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm120; CHECK-SSE2-NEXT: por %xmm0, %xmm121; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm122; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm123; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm124; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm025; CHECK-SSE2-NEXT: retq26;27; CHECK-SSE41-LABEL: test_urem_odd_even:28; CHECK-SSE41: # %bb.0:29; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,3264175145,3264175145]30; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]31; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]32; CHECK-SSE41-NEXT: pxor %xmm2, %xmm233; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]34; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]35; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]36; CHECK-SSE41-NEXT: por %xmm2, %xmm037; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,306783378,171798691,42949672]38; CHECK-SSE41-NEXT: pminud %xmm0, %xmm139; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm040; CHECK-SSE41-NEXT: psrld $31, %xmm041; CHECK-SSE41-NEXT: retq42;43; CHECK-AVX1-LABEL: test_urem_odd_even:44; CHECK-AVX1: # %bb.0:45; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,3264175145,3264175145]46; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]47; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,1073741824,1073741824]48; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm249; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]50; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]51; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]52; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm053; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm154; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm055; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm056; CHECK-AVX1-NEXT: retq57;58; CHECK-AVX2-LABEL: test_urem_odd_even:59; CHECK-AVX2: # %bb.0:60; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,3264175145,3264175145]61; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm162; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm063; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm064; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm165; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm066; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm067; CHECK-AVX2-NEXT: retq68;69; CHECK-AVX512VL-LABEL: test_urem_odd_even:70; CHECK-AVX512VL: # %bb.0:71; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,3264175145,3264175145]72; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm073; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm174; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm075; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm076; CHECK-AVX512VL-NEXT: retq77 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 25, i32 100>78 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>79 %ret = zext <4 x i1> %cmp to <4 x i32>80 ret <4 x i32> %ret81}82 83;==============================================================================;84 85; One all-ones divisor in odd divisor86define <4 x i32> @test_urem_odd_allones_eq(<4 x i32> %X) nounwind {87; CHECK-SSE2-LABEL: test_urem_odd_allones_eq:88; CHECK-SSE2: # %bb.0:89; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]90; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,4294967295,3435973837]91; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]92; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3435973837,3435973837,3435973837,3435973837]93; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]94; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]95; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm096; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm097; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm098; CHECK-SSE2-NEXT: retq99;100; CHECK-SSE41-LABEL: test_urem_odd_allones_eq:101; CHECK-SSE41: # %bb.0:102; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,4294967295,3435973837]103; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,858993459,1,858993459]104; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1105; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0106; CHECK-SSE41-NEXT: psrld $31, %xmm0107; CHECK-SSE41-NEXT: retq108;109; CHECK-AVX-LABEL: test_urem_odd_allones_eq:110; CHECK-AVX: # %bb.0:111; CHECK-AVX-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,4294967295,3435973837]112; CHECK-AVX-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1113; CHECK-AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0114; CHECK-AVX-NEXT: vpsrld $31, %xmm0, %xmm0115; CHECK-AVX-NEXT: retq116 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 4294967295, i32 5>117 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>118 %ret = zext <4 x i1> %cmp to <4 x i32>119 ret <4 x i32> %ret120}121define <4 x i32> @test_urem_odd_allones_ne(<4 x i32> %X) nounwind {122; CHECK-SSE2-LABEL: test_urem_odd_allones_ne:123; CHECK-SSE2: # %bb.0:124; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]125; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,4294967295,3435973837]126; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]127; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3435973837,3435973837,3435973837,3435973837]128; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]129; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]130; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0131; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0132; CHECK-SSE2-NEXT: psrld $31, %xmm0133; CHECK-SSE2-NEXT: retq134;135; CHECK-SSE41-LABEL: test_urem_odd_allones_ne:136; CHECK-SSE41: # %bb.0:137; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,4294967295,3435973837]138; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993460,858993460,2,858993460]139; CHECK-SSE41-NEXT: pmaxud %xmm0, %xmm1140; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0141; CHECK-SSE41-NEXT: psrld $31, %xmm0142; CHECK-SSE41-NEXT: retq143;144; CHECK-AVX-LABEL: test_urem_odd_allones_ne:145; CHECK-AVX: # %bb.0:146; CHECK-AVX-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,4294967295,3435973837]147; CHECK-AVX-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1148; CHECK-AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0149; CHECK-AVX-NEXT: vpsrld $31, %xmm0, %xmm0150; CHECK-AVX-NEXT: retq151 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 4294967295, i32 5>152 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>153 %ret = zext <4 x i1> %cmp to <4 x i32>154 ret <4 x i32> %ret155}156 157; One all-ones divisor in even divisor158define <4 x i32> @test_urem_even_allones_eq(<4 x i32> %X) nounwind {159; CHECK-SSE2-LABEL: test_urem_even_allones_eq:160; CHECK-SSE2: # %bb.0:161; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]162; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,3067833783,3067833783,3067833783]163; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]164; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1165; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]166; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,4294967295,3067833783]167; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,1,2147483648]168; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]169; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]170; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]171; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]172; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]173; CHECK-SSE2-NEXT: por %xmm4, %xmm0174; CHECK-SSE2-NEXT: pxor %xmm2, %xmm0175; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0176; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0177; CHECK-SSE2-NEXT: retq178;179; CHECK-SSE41-LABEL: test_urem_even_allones_eq:180; CHECK-SSE41: # %bb.0:181; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,4294967295,3067833783]182; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]183; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,2147483648,2147483648]184; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,1,2147483648]185; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]186; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]187; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]188; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]189; CHECK-SSE41-NEXT: por %xmm2, %xmm0190; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,1,306783378]191; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1192; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0193; CHECK-SSE41-NEXT: psrld $31, %xmm0194; CHECK-SSE41-NEXT: retq195;196; CHECK-AVX1-LABEL: test_urem_even_allones_eq:197; CHECK-AVX1: # %bb.0:198; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,4294967295,3067833783]199; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]200; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,2147483648,2147483648]201; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,2147483648,1,2147483648]202; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]203; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]204; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]205; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]206; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0207; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1208; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0209; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0210; CHECK-AVX1-NEXT: retq211;212; CHECK-AVX2-LABEL: test_urem_even_allones_eq:213; CHECK-AVX2: # %bb.0:214; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,4294967295,3067833783]215; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1216; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0217; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0218; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1219; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0220; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0221; CHECK-AVX2-NEXT: retq222;223; CHECK-AVX512VL-LABEL: test_urem_even_allones_eq:224; CHECK-AVX512VL: # %bb.0:225; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,4294967295,3067833783]226; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0227; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1228; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0229; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0230; CHECK-AVX512VL-NEXT: retq231 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 4294967295, i32 14>232 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>233 %ret = zext <4 x i1> %cmp to <4 x i32>234 ret <4 x i32> %ret235}236define <4 x i32> @test_urem_even_allones_ne(<4 x i32> %X) nounwind {237; CHECK-SSE2-LABEL: test_urem_even_allones_ne:238; CHECK-SSE2: # %bb.0:239; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]240; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,3067833783,3067833783,3067833783]241; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]242; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1243; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]244; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,4294967295,3067833783]245; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,1,2147483648]246; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]247; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]248; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]249; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]250; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]251; CHECK-SSE2-NEXT: por %xmm4, %xmm0252; CHECK-SSE2-NEXT: pxor %xmm2, %xmm0253; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0254; CHECK-SSE2-NEXT: psrld $31, %xmm0255; CHECK-SSE2-NEXT: retq256;257; CHECK-SSE41-LABEL: test_urem_even_allones_ne:258; CHECK-SSE41: # %bb.0:259; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,4294967295,3067833783]260; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]261; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,2147483648,2147483648]262; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,1,2147483648]263; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]264; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]265; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]266; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]267; CHECK-SSE41-NEXT: por %xmm2, %xmm0268; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783379,306783379,2,306783379]269; CHECK-SSE41-NEXT: pmaxud %xmm0, %xmm1270; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0271; CHECK-SSE41-NEXT: psrld $31, %xmm0272; CHECK-SSE41-NEXT: retq273;274; CHECK-AVX1-LABEL: test_urem_even_allones_ne:275; CHECK-AVX1: # %bb.0:276; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,4294967295,3067833783]277; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]278; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,2147483648,2147483648]279; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,2147483648,1,2147483648]280; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]281; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]282; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]283; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]284; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0285; CHECK-AVX1-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1286; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0287; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0288; CHECK-AVX1-NEXT: retq289;290; CHECK-AVX2-LABEL: test_urem_even_allones_ne:291; CHECK-AVX2: # %bb.0:292; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,4294967295,3067833783]293; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1294; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0295; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0296; CHECK-AVX2-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1297; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0298; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0299; CHECK-AVX2-NEXT: retq300;301; CHECK-AVX512VL-LABEL: test_urem_even_allones_ne:302; CHECK-AVX512VL: # %bb.0:303; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,4294967295,3067833783]304; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0305; CHECK-AVX512VL-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1306; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0307; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0308; CHECK-AVX512VL-NEXT: retq309 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 4294967295, i32 14>310 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>311 %ret = zext <4 x i1> %cmp to <4 x i32>312 ret <4 x i32> %ret313}314 315; One all-ones divisor in odd+even divisor316define <4 x i32> @test_urem_odd_even_allones_eq(<4 x i32> %X) nounwind {317; CHECK-SSE2-LABEL: test_urem_odd_even_allones_eq:318; CHECK-SSE2: # %bb.0:319; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]320; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,4294967295,3264175145]321; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]322; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,u,3264175145,u]323; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]324; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]325; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]326; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1327; CHECK-SSE2-NEXT: por %xmm0, %xmm1328; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1329; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1330; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1331; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0332; CHECK-SSE2-NEXT: retq333;334; CHECK-SSE41-LABEL: test_urem_odd_even_allones_eq:335; CHECK-SSE41: # %bb.0:336; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,4294967295,3264175145]337; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]338; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]339; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2340; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]341; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]342; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]343; CHECK-SSE41-NEXT: por %xmm2, %xmm0344; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,306783378,1,42949672]345; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1346; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0347; CHECK-SSE41-NEXT: psrld $31, %xmm0348; CHECK-SSE41-NEXT: retq349;350; CHECK-AVX1-LABEL: test_urem_odd_even_allones_eq:351; CHECK-AVX1: # %bb.0:352; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,4294967295,3264175145]353; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]354; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,1073741824,1073741824]355; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2356; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]357; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]358; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]359; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0360; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1361; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0362; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0363; CHECK-AVX1-NEXT: retq364;365; CHECK-AVX2-LABEL: test_urem_odd_even_allones_eq:366; CHECK-AVX2: # %bb.0:367; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,4294967295,3264175145]368; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1369; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0370; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0371; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1372; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0373; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0374; CHECK-AVX2-NEXT: retq375;376; CHECK-AVX512VL-LABEL: test_urem_odd_even_allones_eq:377; CHECK-AVX512VL: # %bb.0:378; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,4294967295,3264175145]379; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0380; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1381; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0382; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0383; CHECK-AVX512VL-NEXT: retq384 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 4294967295, i32 100>385 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>386 %ret = zext <4 x i1> %cmp to <4 x i32>387 ret <4 x i32> %ret388}389define <4 x i32> @test_urem_odd_even_allones_ne(<4 x i32> %X) nounwind {390; CHECK-SSE2-LABEL: test_urem_odd_even_allones_ne:391; CHECK-SSE2: # %bb.0:392; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]393; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,4294967295,3264175145]394; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]395; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,u,3264175145,u]396; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]397; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]398; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]399; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1400; CHECK-SSE2-NEXT: por %xmm0, %xmm1401; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1402; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1403; CHECK-SSE2-NEXT: psrld $31, %xmm1404; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0405; CHECK-SSE2-NEXT: retq406;407; CHECK-SSE41-LABEL: test_urem_odd_even_allones_ne:408; CHECK-SSE41: # %bb.0:409; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,4294967295,3264175145]410; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]411; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]412; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2413; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]414; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]415; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]416; CHECK-SSE41-NEXT: por %xmm2, %xmm0417; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993460,306783379,2,42949673]418; CHECK-SSE41-NEXT: pmaxud %xmm0, %xmm1419; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0420; CHECK-SSE41-NEXT: psrld $31, %xmm0421; CHECK-SSE41-NEXT: retq422;423; CHECK-AVX1-LABEL: test_urem_odd_even_allones_ne:424; CHECK-AVX1: # %bb.0:425; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,4294967295,3264175145]426; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]427; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,1073741824,1073741824]428; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2429; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]430; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]431; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]432; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0433; CHECK-AVX1-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1434; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0435; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0436; CHECK-AVX1-NEXT: retq437;438; CHECK-AVX2-LABEL: test_urem_odd_even_allones_ne:439; CHECK-AVX2: # %bb.0:440; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,4294967295,3264175145]441; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1442; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0443; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0444; CHECK-AVX2-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1445; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0446; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0447; CHECK-AVX2-NEXT: retq448;449; CHECK-AVX512VL-LABEL: test_urem_odd_even_allones_ne:450; CHECK-AVX512VL: # %bb.0:451; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,4294967295,3264175145]452; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0453; CHECK-AVX512VL-NEXT: vpmaxud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1454; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0455; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0456; CHECK-AVX512VL-NEXT: retq457 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 4294967295, i32 100>458 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>459 %ret = zext <4 x i1> %cmp to <4 x i32>460 ret <4 x i32> %ret461}462 463;------------------------------------------------------------------------------;464 465; One power-of-two divisor in odd divisor466define <4 x i32> @test_urem_odd_poweroftwo(<4 x i32> %X) nounwind {467; CHECK-SSE2-LABEL: test_urem_odd_poweroftwo:468; CHECK-SSE2: # %bb.0:469; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]470; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3435973837,3435973837,3435973837,3435973837]471; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]472; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,1,3435973837]473; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,u,268435456,u]474; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]475; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]476; CHECK-SSE2-NEXT: psrlq $32, %xmm0477; CHECK-SSE2-NEXT: por %xmm2, %xmm0478; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0479; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0480; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0481; CHECK-SSE2-NEXT: retq482;483; CHECK-SSE41-LABEL: test_urem_odd_poweroftwo:484; CHECK-SSE41: # %bb.0:485; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,1,3435973837]486; CHECK-SSE41-NEXT: pmovsxdq {{.*#+}} xmm1 = [1,268435456]487; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm1488; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]489; CHECK-SSE41-NEXT: psrlq $32, %xmm1490; CHECK-SSE41-NEXT: por %xmm1, %xmm0491; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,858993459,268435455,858993459]492; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1493; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0494; CHECK-SSE41-NEXT: psrld $31, %xmm0495; CHECK-SSE41-NEXT: retq496;497; CHECK-AVX1-LABEL: test_urem_odd_poweroftwo:498; CHECK-AVX1: # %bb.0:499; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,1,3435973837]500; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [1,u,268435456,u]501; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]502; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1503; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0504; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1505; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0506; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0507; CHECK-AVX1-NEXT: retq508;509; CHECK-AVX2-LABEL: test_urem_odd_poweroftwo:510; CHECK-AVX2: # %bb.0:511; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,1,3435973837]512; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1513; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0514; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0515; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1516; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0517; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0518; CHECK-AVX2-NEXT: retq519;520; CHECK-AVX512VL-LABEL: test_urem_odd_poweroftwo:521; CHECK-AVX512VL: # %bb.0:522; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,1,3435973837]523; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0524; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1525; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0526; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0527; CHECK-AVX512VL-NEXT: retq528 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 16, i32 5>529 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>530 %ret = zext <4 x i1> %cmp to <4 x i32>531 ret <4 x i32> %ret532}533 534; One power-of-two divisor in even divisor535define <4 x i32> @test_urem_even_poweroftwo(<4 x i32> %X) nounwind {536; CHECK-SSE2-LABEL: test_urem_even_poweroftwo:537; CHECK-SSE2: # %bb.0:538; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]539; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,3067833783,3067833783,3067833783]540; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]541; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1542; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]543; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,1,3067833783]544; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,268435456,2147483648]545; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]546; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]547; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]548; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]549; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]550; CHECK-SSE2-NEXT: por %xmm4, %xmm0551; CHECK-SSE2-NEXT: pxor %xmm2, %xmm0552; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0553; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0554; CHECK-SSE2-NEXT: retq555;556; CHECK-SSE41-LABEL: test_urem_even_poweroftwo:557; CHECK-SSE41: # %bb.0:558; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,1,3067833783]559; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]560; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,2147483648,2147483648]561; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,268435456,2147483648]562; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]563; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]564; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]565; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]566; CHECK-SSE41-NEXT: por %xmm2, %xmm0567; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,268435455,306783378]568; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1569; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0570; CHECK-SSE41-NEXT: psrld $31, %xmm0571; CHECK-SSE41-NEXT: retq572;573; CHECK-AVX1-LABEL: test_urem_even_poweroftwo:574; CHECK-AVX1: # %bb.0:575; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,1,3067833783]576; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]577; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,2147483648,2147483648]578; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,2147483648,268435456,2147483648]579; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]580; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]581; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]582; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]583; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0584; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1585; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0586; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0587; CHECK-AVX1-NEXT: retq588;589; CHECK-AVX2-LABEL: test_urem_even_poweroftwo:590; CHECK-AVX2: # %bb.0:591; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,1,3067833783]592; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1593; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0594; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0595; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1596; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0597; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0598; CHECK-AVX2-NEXT: retq599;600; CHECK-AVX512VL-LABEL: test_urem_even_poweroftwo:601; CHECK-AVX512VL: # %bb.0:602; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,1,3067833783]603; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0604; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1605; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0606; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0607; CHECK-AVX512VL-NEXT: retq608 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 16, i32 14>609 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>610 %ret = zext <4 x i1> %cmp to <4 x i32>611 ret <4 x i32> %ret612}613 614; One power-of-two divisor in odd+even divisor615define <4 x i32> @test_urem_odd_even_poweroftwo(<4 x i32> %X) nounwind {616; CHECK-SSE2-LABEL: test_urem_odd_even_poweroftwo:617; CHECK-SSE2: # %bb.0:618; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]619; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,1,3264175145]620; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2147483648,268435456,1073741824]621; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]622; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,u,3264175145,u]623; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,u,1073741824,u]624; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]625; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]626; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]627; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]628; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]629; CHECK-SSE2-NEXT: por %xmm2, %xmm0630; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0631; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0632; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0633; CHECK-SSE2-NEXT: retq634;635; CHECK-SSE41-LABEL: test_urem_odd_even_poweroftwo:636; CHECK-SSE41: # %bb.0:637; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,1,3264175145]638; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]639; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,u,1073741824,u]640; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2147483648,268435456,1073741824]641; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]642; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]643; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]644; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]645; CHECK-SSE41-NEXT: por %xmm2, %xmm0646; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,306783378,268435455,42949672]647; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1648; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0649; CHECK-SSE41-NEXT: psrld $31, %xmm0650; CHECK-SSE41-NEXT: retq651;652; CHECK-AVX1-LABEL: test_urem_odd_even_poweroftwo:653; CHECK-AVX1: # %bb.0:654; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,1,3264175145]655; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]656; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,u,1073741824,u]657; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,2147483648,268435456,1073741824]658; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]659; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]660; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]661; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]662; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0663; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1664; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0665; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0666; CHECK-AVX1-NEXT: retq667;668; CHECK-AVX2-LABEL: test_urem_odd_even_poweroftwo:669; CHECK-AVX2: # %bb.0:670; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,1,3264175145]671; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1672; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0673; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0674; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1675; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0676; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0677; CHECK-AVX2-NEXT: retq678;679; CHECK-AVX512VL-LABEL: test_urem_odd_even_poweroftwo:680; CHECK-AVX512VL: # %bb.0:681; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,1,3264175145]682; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0683; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1684; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0685; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0686; CHECK-AVX512VL-NEXT: retq687 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 16, i32 100>688 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>689 %ret = zext <4 x i1> %cmp to <4 x i32>690 ret <4 x i32> %ret691}692 693;------------------------------------------------------------------------------;694 695; One one divisor in odd divisor696define <4 x i32> @test_urem_odd_one(<4 x i32> %X) nounwind {697; CHECK-SSE2-LABEL: test_urem_odd_one:698; CHECK-SSE2: # %bb.0:699; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]700; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]701; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0702; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]703; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2704; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]705; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]706; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0707; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0708; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0709; CHECK-SSE2-NEXT: retq710;711; CHECK-SSE41-LABEL: test_urem_odd_one:712; CHECK-SSE41: # %bb.0:713; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,3435973837,3435973837]714; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,858993459,4294967295,858993459]715; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1716; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0717; CHECK-SSE41-NEXT: psrld $31, %xmm0718; CHECK-SSE41-NEXT: retq719;720; CHECK-AVX1-LABEL: test_urem_odd_one:721; CHECK-AVX1: # %bb.0:722; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,3435973837,3435973837]723; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1724; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0725; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0726; CHECK-AVX1-NEXT: retq727;728; CHECK-AVX2-LABEL: test_urem_odd_one:729; CHECK-AVX2: # %bb.0:730; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]731; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0732; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1733; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0734; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0735; CHECK-AVX2-NEXT: retq736;737; CHECK-AVX512VL-LABEL: test_urem_odd_one:738; CHECK-AVX512VL: # %bb.0:739; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0740; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1741; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0742; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0743; CHECK-AVX512VL-NEXT: retq744 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 1, i32 5>745 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>746 %ret = zext <4 x i1> %cmp to <4 x i32>747 ret <4 x i32> %ret748}749 750; One one divisor in even divisor751define <4 x i32> @test_urem_even_one(<4 x i32> %X) nounwind {752; CHECK-SSE2-LABEL: test_urem_even_one:753; CHECK-SSE2: # %bb.0:754; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]755; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]756; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0757; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]758; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2759; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]760; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]761; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1762; CHECK-SSE2-NEXT: psrld $1, %xmm1763; CHECK-SSE2-NEXT: pslld $31, %xmm0764; CHECK-SSE2-NEXT: por %xmm1, %xmm0765; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0766; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0767; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0768; CHECK-SSE2-NEXT: retq769;770; CHECK-SSE41-LABEL: test_urem_even_one:771; CHECK-SSE41: # %bb.0:772; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,3067833783,3067833783]773; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1774; CHECK-SSE41-NEXT: psrld $1, %xmm1775; CHECK-SSE41-NEXT: pslld $31, %xmm0776; CHECK-SSE41-NEXT: por %xmm1, %xmm0777; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,4294967295,306783378]778; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1779; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0780; CHECK-SSE41-NEXT: psrld $31, %xmm0781; CHECK-SSE41-NEXT: retq782;783; CHECK-AVX1-LABEL: test_urem_even_one:784; CHECK-AVX1: # %bb.0:785; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,3067833783,3067833783]786; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1787; CHECK-AVX1-NEXT: vpslld $31, %xmm0, %xmm0788; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0789; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1790; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0791; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0792; CHECK-AVX1-NEXT: retq793;794; CHECK-AVX2-LABEL: test_urem_even_one:795; CHECK-AVX2: # %bb.0:796; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]797; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0798; CHECK-AVX2-NEXT: vpsrld $1, %xmm0, %xmm1799; CHECK-AVX2-NEXT: vpslld $31, %xmm0, %xmm0800; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0801; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1802; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0803; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0804; CHECK-AVX2-NEXT: retq805;806; CHECK-AVX512VL-LABEL: test_urem_even_one:807; CHECK-AVX512VL: # %bb.0:808; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0809; CHECK-AVX512VL-NEXT: vprord $1, %xmm0, %xmm0810; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1811; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0812; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0813; CHECK-AVX512VL-NEXT: retq814 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 1, i32 14>815 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>816 %ret = zext <4 x i1> %cmp to <4 x i32>817 ret <4 x i32> %ret818}819 820; One one divisor in odd+even divisor821define <4 x i32> @test_urem_odd_even_one(<4 x i32> %X) nounwind {822; CHECK-SSE2-LABEL: test_urem_odd_even_one:823; CHECK-SSE2: # %bb.0:824; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]825; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,0,3264175145]826; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]827; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,u,3264175145,u]828; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]829; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]830; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]831; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1832; CHECK-SSE2-NEXT: por %xmm0, %xmm1833; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1834; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1835; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1836; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0837; CHECK-SSE2-NEXT: retq838;839; CHECK-SSE41-LABEL: test_urem_odd_even_one:840; CHECK-SSE41: # %bb.0:841; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,0,3264175145]842; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]843; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,1073741824,1073741824]844; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2845; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]846; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]847; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]848; CHECK-SSE41-NEXT: por %xmm2, %xmm0849; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,306783378,4294967295,42949672]850; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1851; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0852; CHECK-SSE41-NEXT: psrld $31, %xmm0853; CHECK-SSE41-NEXT: retq854;855; CHECK-AVX1-LABEL: test_urem_odd_even_one:856; CHECK-AVX1: # %bb.0:857; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,0,3264175145]858; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]859; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,1073741824,1073741824]860; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2861; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]862; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]863; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]864; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0865; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1866; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0867; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0868; CHECK-AVX1-NEXT: retq869;870; CHECK-AVX2-LABEL: test_urem_odd_even_one:871; CHECK-AVX2: # %bb.0:872; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,0,3264175145]873; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1874; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0875; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0876; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1877; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0878; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0879; CHECK-AVX2-NEXT: retq880;881; CHECK-AVX512VL-LABEL: test_urem_odd_even_one:882; CHECK-AVX512VL: # %bb.0:883; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,0,3264175145]884; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0885; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1886; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0887; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0888; CHECK-AVX512VL-NEXT: retq889 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 1, i32 100>890 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>891 %ret = zext <4 x i1> %cmp to <4 x i32>892 ret <4 x i32> %ret893}894 895;------------------------------------------------------------------------------;896 897; One INT_MIN divisor in odd divisor898define <4 x i32> @test_urem_odd_INT_MIN(<4 x i32> %X) nounwind {899; CHECK-SSE2-LABEL: test_urem_odd_INT_MIN:900; CHECK-SSE2: # %bb.0:901; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]902; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3435973837,3435973837,3435973837,3435973837]903; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]904; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,1,3435973837]905; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,u,2,u]906; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]907; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]908; CHECK-SSE2-NEXT: psrlq $32, %xmm0909; CHECK-SSE2-NEXT: por %xmm2, %xmm0910; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0911; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0912; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0913; CHECK-SSE2-NEXT: retq914;915; CHECK-SSE41-LABEL: test_urem_odd_INT_MIN:916; CHECK-SSE41: # %bb.0:917; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3435973837,1,3435973837]918; CHECK-SSE41-NEXT: pmovsxbq {{.*#+}} xmm1 = [1,2]919; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm1920; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]921; CHECK-SSE41-NEXT: psrlq $32, %xmm1922; CHECK-SSE41-NEXT: por %xmm1, %xmm0923; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,858993459,1,858993459]924; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1925; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0926; CHECK-SSE41-NEXT: psrld $31, %xmm0927; CHECK-SSE41-NEXT: retq928;929; CHECK-AVX1-LABEL: test_urem_odd_INT_MIN:930; CHECK-AVX1: # %bb.0:931; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,1,3435973837]932; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [1,u,2,u]933; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]934; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1935; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0936; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1937; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0938; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0939; CHECK-AVX1-NEXT: retq940;941; CHECK-AVX2-LABEL: test_urem_odd_INT_MIN:942; CHECK-AVX2: # %bb.0:943; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,1,3435973837]944; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1945; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0946; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0947; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1948; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0949; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0950; CHECK-AVX2-NEXT: retq951;952; CHECK-AVX512VL-LABEL: test_urem_odd_INT_MIN:953; CHECK-AVX512VL: # %bb.0:954; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3435973837,1,3435973837]955; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0956; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1957; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0958; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0959; CHECK-AVX512VL-NEXT: retq960 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 2147483648, i32 5>961 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>962 %ret = zext <4 x i1> %cmp to <4 x i32>963 ret <4 x i32> %ret964}965 966; One INT_MIN divisor in even divisor967define <4 x i32> @test_urem_even_INT_MIN(<4 x i32> %X) nounwind {968; CHECK-SSE2-LABEL: test_urem_even_INT_MIN:969; CHECK-SSE2: # %bb.0:970; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]971; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,3067833783,3067833783,3067833783]972; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]973; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1974; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]975; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,1,3067833783]976; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,2,2147483648]977; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]978; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]979; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]980; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]981; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]982; CHECK-SSE2-NEXT: por %xmm4, %xmm0983; CHECK-SSE2-NEXT: pxor %xmm2, %xmm0984; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0985; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0986; CHECK-SSE2-NEXT: retq987;988; CHECK-SSE41-LABEL: test_urem_even_INT_MIN:989; CHECK-SSE41: # %bb.0:990; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,3067833783,1,3067833783]991; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]992; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,2147483648,2147483648,2147483648]993; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,2,2147483648]994; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]995; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]996; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]997; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]998; CHECK-SSE41-NEXT: por %xmm2, %xmm0999; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,1,306783378]1000; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11001; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01002; CHECK-SSE41-NEXT: psrld $31, %xmm01003; CHECK-SSE41-NEXT: retq1004;1005; CHECK-AVX1-LABEL: test_urem_even_INT_MIN:1006; CHECK-AVX1: # %bb.0:1007; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,1,3067833783]1008; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1009; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,2147483648,2147483648,2147483648]1010; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,2147483648,2,2147483648]1011; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1012; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1013; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1014; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1015; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01016; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11017; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01018; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01019; CHECK-AVX1-NEXT: retq1020;1021; CHECK-AVX2-LABEL: test_urem_even_INT_MIN:1022; CHECK-AVX2: # %bb.0:1023; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,1,3067833783]1024; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11025; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01026; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01027; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11028; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01029; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01030; CHECK-AVX2-NEXT: retq1031;1032; CHECK-AVX512VL-LABEL: test_urem_even_INT_MIN:1033; CHECK-AVX512VL: # %bb.0:1034; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,3067833783,1,3067833783]1035; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01036; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11037; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01038; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01039; CHECK-AVX512VL-NEXT: retq1040 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 2147483648, i32 14>1041 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1042 %ret = zext <4 x i1> %cmp to <4 x i32>1043 ret <4 x i32> %ret1044}1045 1046; One INT_MIN divisor in odd+even divisor1047define <4 x i32> @test_urem_odd_even_INT_MIN(<4 x i32> %X) nounwind {1048; CHECK-SSE2-LABEL: test_urem_odd_even_INT_MIN:1049; CHECK-SSE2: # %bb.0:1050; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1051; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,1,3264175145]1052; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2147483648,2,1073741824]1053; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]1054; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3067833783,u,3264175145,u]1055; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,u,1073741824,u]1056; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]1057; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]1058; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1059; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1060; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1061; CHECK-SSE2-NEXT: por %xmm2, %xmm01062; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01063; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01064; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01065; CHECK-SSE2-NEXT: retq1066;1067; CHECK-SSE41-LABEL: test_urem_odd_even_INT_MIN:1068; CHECK-SSE41: # %bb.0:1069; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,3067833783,1,3264175145]1070; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1071; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2147483648,u,1073741824,u]1072; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2147483648,2,1073741824]1073; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1074; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1075; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1076; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1077; CHECK-SSE41-NEXT: por %xmm2, %xmm01078; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,306783378,1,42949672]1079; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11080; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01081; CHECK-SSE41-NEXT: psrld $31, %xmm01082; CHECK-SSE41-NEXT: retq1083;1084; CHECK-AVX1-LABEL: test_urem_odd_even_INT_MIN:1085; CHECK-AVX1: # %bb.0:1086; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,1,3264175145]1087; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1088; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2147483648,u,1073741824,u]1089; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,2147483648,2,1073741824]1090; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1091; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1092; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1093; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1094; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01095; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11096; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01097; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01098; CHECK-AVX1-NEXT: retq1099;1100; CHECK-AVX2-LABEL: test_urem_odd_even_INT_MIN:1101; CHECK-AVX2: # %bb.0:1102; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,1,3264175145]1103; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11104; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01105; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01106; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11107; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01108; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01109; CHECK-AVX2-NEXT: retq1110;1111; CHECK-AVX512VL-LABEL: test_urem_odd_even_INT_MIN:1112; CHECK-AVX512VL: # %bb.0:1113; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,3067833783,1,3264175145]1114; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01115; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11116; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01117; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01118; CHECK-AVX512VL-NEXT: retq1119 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 2147483648, i32 100>1120 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1121 %ret = zext <4 x i1> %cmp to <4 x i32>1122 ret <4 x i32> %ret1123}1124 1125;==============================================================================;1126 1127; One all-ones divisor and power-of-two divisor divisor in odd divisor1128define <4 x i32> @test_urem_odd_allones_and_poweroftwo(<4 x i32> %X) nounwind {1129; CHECK-SSE2-LABEL: test_urem_odd_allones_and_poweroftwo:1130; CHECK-SSE2: # %bb.0:1131; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1132; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,u,3435973837,u]1133; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1134; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,1,3435973837]1135; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,u,268435456,u]1136; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]1137; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]1138; CHECK-SSE2-NEXT: psrlq $32, %xmm01139; CHECK-SSE2-NEXT: por %xmm2, %xmm01140; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01141; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01142; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01143; CHECK-SSE2-NEXT: retq1144;1145; CHECK-SSE41-LABEL: test_urem_odd_allones_and_poweroftwo:1146; CHECK-SSE41: # %bb.0:1147; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,1,3435973837]1148; CHECK-SSE41-NEXT: pmovsxdq {{.*#+}} xmm1 = [1,268435456]1149; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm11150; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]1151; CHECK-SSE41-NEXT: psrlq $32, %xmm11152; CHECK-SSE41-NEXT: por %xmm1, %xmm01153; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,1,268435455,858993459]1154; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11155; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01156; CHECK-SSE41-NEXT: psrld $31, %xmm01157; CHECK-SSE41-NEXT: retq1158;1159; CHECK-AVX1-LABEL: test_urem_odd_allones_and_poweroftwo:1160; CHECK-AVX1: # %bb.0:1161; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,3435973837]1162; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [1,u,268435456,u]1163; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]1164; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm11165; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm01166; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11167; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01168; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01169; CHECK-AVX1-NEXT: retq1170;1171; CHECK-AVX2-LABEL: test_urem_odd_allones_and_poweroftwo:1172; CHECK-AVX2: # %bb.0:1173; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,3435973837]1174; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11175; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01176; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01177; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11178; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01179; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01180; CHECK-AVX2-NEXT: retq1181;1182; CHECK-AVX512VL-LABEL: test_urem_odd_allones_and_poweroftwo:1183; CHECK-AVX512VL: # %bb.0:1184; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,3435973837]1185; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01186; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11187; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01188; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01189; CHECK-AVX512VL-NEXT: retq1190 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 5>1191 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1192 %ret = zext <4 x i1> %cmp to <4 x i32>1193 ret <4 x i32> %ret1194}1195 1196; One all-ones divisor and power-of-two divisor divisor in even divisor1197define <4 x i32> @test_urem_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {1198; CHECK-SSE2-LABEL: test_urem_even_allones_and_poweroftwo:1199; CHECK-SSE2: # %bb.0:1200; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1201; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,4294967295,1,3067833783]1202; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,1,268435456,2147483648]1203; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]1204; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,u,3067833783,u]1205; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,2147483648,u]1206; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]1207; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]1208; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1209; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1210; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1211; CHECK-SSE2-NEXT: por %xmm2, %xmm01212; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01213; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01214; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01215; CHECK-SSE2-NEXT: retq1216;1217; CHECK-SSE41-LABEL: test_urem_even_allones_and_poweroftwo:1218; CHECK-SSE41: # %bb.0:1219; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,4294967295,1,3067833783]1220; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1221; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,2147483648,u]1222; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,1,268435456,2147483648]1223; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1224; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1225; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1226; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1227; CHECK-SSE41-NEXT: por %xmm2, %xmm01228; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,1,268435455,306783378]1229; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11230; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01231; CHECK-SSE41-NEXT: psrld $31, %xmm01232; CHECK-SSE41-NEXT: retq1233;1234; CHECK-AVX1-LABEL: test_urem_even_allones_and_poweroftwo:1235; CHECK-AVX1: # %bb.0:1236; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,1,3067833783]1237; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1238; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [1,u,2147483648,u]1239; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,1,268435456,2147483648]1240; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1241; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1242; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1243; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1244; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01245; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11246; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01247; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01248; CHECK-AVX1-NEXT: retq1249;1250; CHECK-AVX2-LABEL: test_urem_even_allones_and_poweroftwo:1251; CHECK-AVX2: # %bb.0:1252; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,1,3067833783]1253; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11254; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01255; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01256; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11257; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01258; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01259; CHECK-AVX2-NEXT: retq1260;1261; CHECK-AVX512VL-LABEL: test_urem_even_allones_and_poweroftwo:1262; CHECK-AVX512VL: # %bb.0:1263; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,1,3067833783]1264; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01265; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11266; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01267; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01268; CHECK-AVX512VL-NEXT: retq1269 %urem = urem <4 x i32> %X, <i32 14, i32 4294967295, i32 16, i32 14>1270 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1271 %ret = zext <4 x i1> %cmp to <4 x i32>1272 ret <4 x i32> %ret1273}1274 1275; One all-ones divisor and power-of-two divisor divisor in odd+even divisor1276define <4 x i32> @test_urem_odd_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {1277; CHECK-SSE2-LABEL: test_urem_odd_even_allones_and_poweroftwo:1278; CHECK-SSE2: # %bb.0:1279; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1280; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,1,3264175145]1281; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,1,268435456,1073741824]1282; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]1283; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,u,3264175145,u]1284; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,1073741824,u]1285; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]1286; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]1287; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1288; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1289; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1290; CHECK-SSE2-NEXT: por %xmm2, %xmm01291; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01292; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01293; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01294; CHECK-SSE2-NEXT: retq1295;1296; CHECK-SSE41-LABEL: test_urem_odd_even_allones_and_poweroftwo:1297; CHECK-SSE41: # %bb.0:1298; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,1,3264175145]1299; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1300; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,1073741824,u]1301; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,1,268435456,1073741824]1302; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1303; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1304; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1305; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1306; CHECK-SSE41-NEXT: por %xmm2, %xmm01307; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,1,268435455,42949672]1308; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11309; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01310; CHECK-SSE41-NEXT: psrld $31, %xmm01311; CHECK-SSE41-NEXT: retq1312;1313; CHECK-AVX1-LABEL: test_urem_odd_even_allones_and_poweroftwo:1314; CHECK-AVX1: # %bb.0:1315; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,3264175145]1316; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1317; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [1,u,1073741824,u]1318; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,1,268435456,1073741824]1319; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1320; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1321; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1322; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1323; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01324; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11325; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01326; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01327; CHECK-AVX1-NEXT: retq1328;1329; CHECK-AVX2-LABEL: test_urem_odd_even_allones_and_poweroftwo:1330; CHECK-AVX2: # %bb.0:1331; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,3264175145]1332; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11333; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01334; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01335; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11336; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01337; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01338; CHECK-AVX2-NEXT: retq1339;1340; CHECK-AVX512VL-LABEL: test_urem_odd_even_allones_and_poweroftwo:1341; CHECK-AVX512VL: # %bb.0:1342; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,3264175145]1343; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01344; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11345; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01346; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01347; CHECK-AVX512VL-NEXT: retq1348 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 100>1349 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1350 %ret = zext <4 x i1> %cmp to <4 x i32>1351 ret <4 x i32> %ret1352}1353 1354;------------------------------------------------------------------------------;1355 1356; One all-ones divisor and one one divisor in odd divisor1357define <4 x i32> @test_urem_odd_allones_and_one(<4 x i32> %X) nounwind {1358; CHECK-SSE2-LABEL: test_urem_odd_allones_and_one:1359; CHECK-SSE2: # %bb.0:1360; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1361; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,0,3435973837]1362; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1363; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,u,3435973837,u]1364; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1365; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1366; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01367; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01368; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01369; CHECK-SSE2-NEXT: retq1370;1371; CHECK-SSE41-LABEL: test_urem_odd_allones_and_one:1372; CHECK-SSE41: # %bb.0:1373; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,0,3435973837]1374; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,1,4294967295,858993459]1375; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11376; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01377; CHECK-SSE41-NEXT: psrld $31, %xmm01378; CHECK-SSE41-NEXT: retq1379;1380; CHECK-AVX-LABEL: test_urem_odd_allones_and_one:1381; CHECK-AVX: # %bb.0:1382; CHECK-AVX-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,0,3435973837]1383; CHECK-AVX-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11384; CHECK-AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01385; CHECK-AVX-NEXT: vpsrld $31, %xmm0, %xmm01386; CHECK-AVX-NEXT: retq1387 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 1, i32 5>1388 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1389 %ret = zext <4 x i1> %cmp to <4 x i32>1390 ret <4 x i32> %ret1391}1392 1393; One all-ones divisor and one one divisor in even divisor1394define <4 x i32> @test_urem_even_allones_and_one(<4 x i32> %X) nounwind {1395; CHECK-SSE2-LABEL: test_urem_even_allones_and_one:1396; CHECK-SSE2: # %bb.0:1397; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1398; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,4294967295,0,3067833783]1399; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,1,1,2147483648]1400; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]1401; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,u,3067833783,u]1402; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,2147483648,u]1403; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]1404; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]1405; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1406; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1407; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1408; CHECK-SSE2-NEXT: por %xmm2, %xmm01409; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01410; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01411; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01412; CHECK-SSE2-NEXT: retq1413;1414; CHECK-SSE41-LABEL: test_urem_even_allones_and_one:1415; CHECK-SSE41: # %bb.0:1416; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,4294967295,0,3067833783]1417; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1418; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,2147483648,u]1419; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,1,1,2147483648]1420; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1421; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1422; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1423; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1424; CHECK-SSE41-NEXT: por %xmm2, %xmm01425; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,1,4294967295,306783378]1426; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11427; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01428; CHECK-SSE41-NEXT: psrld $31, %xmm01429; CHECK-SSE41-NEXT: retq1430;1431; CHECK-AVX1-LABEL: test_urem_even_allones_and_one:1432; CHECK-AVX1: # %bb.0:1433; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,0,3067833783]1434; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1435; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [1,u,2147483648,u]1436; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,1,1,2147483648]1437; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1438; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1439; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1440; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1441; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01442; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11443; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01444; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01445; CHECK-AVX1-NEXT: retq1446;1447; CHECK-AVX2-LABEL: test_urem_even_allones_and_one:1448; CHECK-AVX2: # %bb.0:1449; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,0,3067833783]1450; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11451; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01452; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01453; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11454; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01455; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01456; CHECK-AVX2-NEXT: retq1457;1458; CHECK-AVX512VL-LABEL: test_urem_even_allones_and_one:1459; CHECK-AVX512VL: # %bb.0:1460; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,0,3067833783]1461; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01462; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11463; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01464; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01465; CHECK-AVX512VL-NEXT: retq1466 %urem = urem <4 x i32> %X, <i32 14, i32 4294967295, i32 1, i32 14>1467 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1468 %ret = zext <4 x i1> %cmp to <4 x i32>1469 ret <4 x i32> %ret1470}1471 1472; One all-ones divisor and one one divisor in odd+even divisor1473define <4 x i32> @test_urem_odd_even_allones_and_one(<4 x i32> %X) nounwind {1474; CHECK-SSE2-LABEL: test_urem_odd_even_allones_and_one:1475; CHECK-SSE2: # %bb.0:1476; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1477; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,0,3264175145]1478; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1479; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,u,3264175145,u]1480; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,1,1073741824,1073741824]1481; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]1482; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]1483; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11484; CHECK-SSE2-NEXT: por %xmm0, %xmm11485; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11486; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11487; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11488; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm01489; CHECK-SSE2-NEXT: retq1490;1491; CHECK-SSE41-LABEL: test_urem_odd_even_allones_and_one:1492; CHECK-SSE41: # %bb.0:1493; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,0,3264175145]1494; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1495; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,1,1073741824,1073741824]1496; CHECK-SSE41-NEXT: pxor %xmm2, %xmm21497; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1498; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1499; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1500; CHECK-SSE41-NEXT: por %xmm2, %xmm01501; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,1,4294967295,42949672]1502; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11503; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01504; CHECK-SSE41-NEXT: psrld $31, %xmm01505; CHECK-SSE41-NEXT: retq1506;1507; CHECK-AVX1-LABEL: test_urem_odd_even_allones_and_one:1508; CHECK-AVX1: # %bb.0:1509; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,0,3264175145]1510; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1511; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [1,1,1073741824,1073741824]1512; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm21513; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1514; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1515; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1516; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01517; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11518; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01519; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01520; CHECK-AVX1-NEXT: retq1521;1522; CHECK-AVX2-LABEL: test_urem_odd_even_allones_and_one:1523; CHECK-AVX2: # %bb.0:1524; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,0,3264175145]1525; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11526; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01527; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01528; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11529; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01530; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01531; CHECK-AVX2-NEXT: retq1532;1533; CHECK-AVX512VL-LABEL: test_urem_odd_even_allones_and_one:1534; CHECK-AVX512VL: # %bb.0:1535; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,0,3264175145]1536; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01537; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11538; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01539; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01540; CHECK-AVX512VL-NEXT: retq1541 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 1, i32 100>1542 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1543 %ret = zext <4 x i1> %cmp to <4 x i32>1544 ret <4 x i32> %ret1545}1546 1547;------------------------------------------------------------------------------;1548 1549; One power-of-two divisor divisor and one divisor in odd divisor1550define <4 x i32> @test_urem_odd_poweroftwo_and_one(<4 x i32> %X) nounwind {1551; CHECK-SSE2-LABEL: test_urem_odd_poweroftwo_and_one:1552; CHECK-SSE2: # %bb.0:1553; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1554; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,1,0,3435973837]1555; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1556; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,3435973837,u]1557; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [268435456,268435456,1,1]1558; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]1559; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]1560; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11561; CHECK-SSE2-NEXT: por %xmm0, %xmm11562; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11563; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11564; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11565; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm01566; CHECK-SSE2-NEXT: retq1567;1568; CHECK-SSE41-LABEL: test_urem_odd_poweroftwo_and_one:1569; CHECK-SSE41: # %bb.0:1570; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,1,0,3435973837]1571; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1572; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [268435456,268435456,1,1]1573; CHECK-SSE41-NEXT: pxor %xmm2, %xmm21574; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1575; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1576; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1577; CHECK-SSE41-NEXT: por %xmm2, %xmm01578; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,268435455,4294967295,858993459]1579; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11580; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01581; CHECK-SSE41-NEXT: psrld $31, %xmm01582; CHECK-SSE41-NEXT: retq1583;1584; CHECK-AVX1-LABEL: test_urem_odd_poweroftwo_and_one:1585; CHECK-AVX1: # %bb.0:1586; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,1,0,3435973837]1587; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1588; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [268435456,268435456,1,1]1589; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm21590; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1591; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1592; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1593; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01594; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11595; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01596; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01597; CHECK-AVX1-NEXT: retq1598;1599; CHECK-AVX2-LABEL: test_urem_odd_poweroftwo_and_one:1600; CHECK-AVX2: # %bb.0:1601; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,1,0,3435973837]1602; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11603; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01604; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01605; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11606; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01607; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01608; CHECK-AVX2-NEXT: retq1609;1610; CHECK-AVX512VL-LABEL: test_urem_odd_poweroftwo_and_one:1611; CHECK-AVX512VL: # %bb.0:1612; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,1,0,3435973837]1613; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01614; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11615; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01616; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01617; CHECK-AVX512VL-NEXT: retq1618 %urem = urem <4 x i32> %X, <i32 5, i32 16, i32 1, i32 5>1619 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1620 %ret = zext <4 x i1> %cmp to <4 x i32>1621 ret <4 x i32> %ret1622}1623 1624; One power-of-two divisor divisor and one divisor in even divisor1625define <4 x i32> @test_urem_even_poweroftwo_and_one(<4 x i32> %X) nounwind {1626; CHECK-SSE2-LABEL: test_urem_even_poweroftwo_and_one:1627; CHECK-SSE2: # %bb.0:1628; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1629; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,1,0,3067833783]1630; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,268435456,1,2147483648]1631; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]1632; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,3067833783,u]1633; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [268435456,u,2147483648,u]1634; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]1635; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]1636; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1637; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1638; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1639; CHECK-SSE2-NEXT: por %xmm2, %xmm01640; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01641; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01642; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01643; CHECK-SSE2-NEXT: retq1644;1645; CHECK-SSE41-LABEL: test_urem_even_poweroftwo_and_one:1646; CHECK-SSE41: # %bb.0:1647; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,1,0,3067833783]1648; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1649; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [268435456,u,2147483648,u]1650; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,268435456,1,2147483648]1651; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1652; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1653; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1654; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1655; CHECK-SSE41-NEXT: por %xmm2, %xmm01656; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,268435455,4294967295,306783378]1657; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11658; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01659; CHECK-SSE41-NEXT: psrld $31, %xmm01660; CHECK-SSE41-NEXT: retq1661;1662; CHECK-AVX1-LABEL: test_urem_even_poweroftwo_and_one:1663; CHECK-AVX1: # %bb.0:1664; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,1,0,3067833783]1665; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1666; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [268435456,u,2147483648,u]1667; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2147483648,268435456,1,2147483648]1668; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]1669; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1670; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1671; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1672; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01673; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11674; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01675; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01676; CHECK-AVX1-NEXT: retq1677;1678; CHECK-AVX2-LABEL: test_urem_even_poweroftwo_and_one:1679; CHECK-AVX2: # %bb.0:1680; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,1,0,3067833783]1681; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11682; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01683; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01684; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11685; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01686; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01687; CHECK-AVX2-NEXT: retq1688;1689; CHECK-AVX512VL-LABEL: test_urem_even_poweroftwo_and_one:1690; CHECK-AVX512VL: # %bb.0:1691; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,1,0,3067833783]1692; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01693; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11694; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01695; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01696; CHECK-AVX512VL-NEXT: retq1697 %urem = urem <4 x i32> %X, <i32 14, i32 16, i32 1, i32 14>1698 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1699 %ret = zext <4 x i1> %cmp to <4 x i32>1700 ret <4 x i32> %ret1701}1702 1703; One power-of-two divisor divisor and one divisor in odd+even divisor1704define <4 x i32> @test_urem_odd_even_poweroftwo_and_one(<4 x i32> %X) nounwind {1705; CHECK-SSE2-LABEL: test_urem_odd_even_poweroftwo_and_one:1706; CHECK-SSE2: # %bb.0:1707; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1708; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,1,0,3264175145]1709; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1710; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [1,u,3264175145,u]1711; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [268435456,268435456,1073741824,1073741824]1712; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]1713; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]1714; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11715; CHECK-SSE2-NEXT: por %xmm0, %xmm11716; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11717; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11718; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11719; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm01720; CHECK-SSE2-NEXT: retq1721;1722; CHECK-SSE41-LABEL: test_urem_odd_even_poweroftwo_and_one:1723; CHECK-SSE41: # %bb.0:1724; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,1,0,3264175145]1725; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1726; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [268435456,268435456,1073741824,1073741824]1727; CHECK-SSE41-NEXT: pxor %xmm2, %xmm21728; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1729; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1730; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1731; CHECK-SSE41-NEXT: por %xmm2, %xmm01732; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,268435455,4294967295,42949672]1733; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11734; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01735; CHECK-SSE41-NEXT: psrld $31, %xmm01736; CHECK-SSE41-NEXT: retq1737;1738; CHECK-AVX1-LABEL: test_urem_odd_even_poweroftwo_and_one:1739; CHECK-AVX1: # %bb.0:1740; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,1,0,3264175145]1741; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1742; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [268435456,268435456,1073741824,1073741824]1743; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm21744; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]1745; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]1746; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]1747; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm01748; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11749; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01750; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01751; CHECK-AVX1-NEXT: retq1752;1753; CHECK-AVX2-LABEL: test_urem_odd_even_poweroftwo_and_one:1754; CHECK-AVX2: # %bb.0:1755; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,1,0,3264175145]1756; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11757; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01758; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01759; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11760; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01761; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01762; CHECK-AVX2-NEXT: retq1763;1764; CHECK-AVX512VL-LABEL: test_urem_odd_even_poweroftwo_and_one:1765; CHECK-AVX512VL: # %bb.0:1766; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,1,0,3264175145]1767; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01768; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11769; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01770; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01771; CHECK-AVX512VL-NEXT: retq1772 %urem = urem <4 x i32> %X, <i32 5, i32 16, i32 1, i32 100>1773 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1774 %ret = zext <4 x i1> %cmp to <4 x i32>1775 ret <4 x i32> %ret1776}1777 1778;------------------------------------------------------------------------------;1779 1780define <4 x i32> @test_urem_odd_allones_and_poweroftwo_and_one(<4 x i32> %X) nounwind {1781; CHECK-SSE2-LABEL: test_urem_odd_allones_and_poweroftwo_and_one:1782; CHECK-SSE2: # %bb.0:1783; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1784; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,0,0,0]1785; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1786; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,1,0]1787; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,u,268435456,u]1788; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]1789; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]1790; CHECK-SSE2-NEXT: psrlq $32, %xmm01791; CHECK-SSE2-NEXT: por %xmm2, %xmm01792; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01793; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01794; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01795; CHECK-SSE2-NEXT: retq1796;1797; CHECK-SSE41-LABEL: test_urem_odd_allones_and_poweroftwo_and_one:1798; CHECK-SSE41: # %bb.0:1799; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3435973837,4294967295,1,0]1800; CHECK-SSE41-NEXT: pmovsxdq {{.*#+}} xmm1 = [1,268435456]1801; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm11802; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]1803; CHECK-SSE41-NEXT: psrlq $32, %xmm11804; CHECK-SSE41-NEXT: por %xmm1, %xmm01805; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993459,1,268435455,4294967295]1806; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11807; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01808; CHECK-SSE41-NEXT: psrld $31, %xmm01809; CHECK-SSE41-NEXT: retq1810;1811; CHECK-AVX1-LABEL: test_urem_odd_allones_and_poweroftwo_and_one:1812; CHECK-AVX1: # %bb.0:1813; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,0]1814; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [1,u,268435456,u]1815; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]1816; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm11817; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm01818; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11819; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01820; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01821; CHECK-AVX1-NEXT: retq1822;1823; CHECK-AVX2-LABEL: test_urem_odd_allones_and_poweroftwo_and_one:1824; CHECK-AVX2: # %bb.0:1825; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,0]1826; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11827; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01828; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01829; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11830; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01831; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01832; CHECK-AVX2-NEXT: retq1833;1834; CHECK-AVX512VL-LABEL: test_urem_odd_allones_and_poweroftwo_and_one:1835; CHECK-AVX512VL: # %bb.0:1836; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3435973837,4294967295,1,0]1837; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01838; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11839; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01840; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01841; CHECK-AVX512VL-NEXT: retq1842 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 1>1843 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1844 %ret = zext <4 x i1> %cmp to <4 x i32>1845 ret <4 x i32> %ret1846}1847 1848define <4 x i32> @test_urem_even_allones_and_poweroftwo_and_one(<4 x i32> %X) nounwind {1849; CHECK-SSE2-LABEL: test_urem_even_allones_and_poweroftwo_and_one:1850; CHECK-SSE2: # %bb.0:1851; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1852; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294967295,0,0,0]1853; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1854; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,4294967295,1,0]1855; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,u,268435456,u]1856; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]1857; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]1858; CHECK-SSE2-NEXT: psrlq $32, %xmm01859; CHECK-SSE2-NEXT: por %xmm2, %xmm01860; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01861; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01862; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01863; CHECK-SSE2-NEXT: retq1864;1865; CHECK-SSE41-LABEL: test_urem_even_allones_and_poweroftwo_and_one:1866; CHECK-SSE41: # %bb.0:1867; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [3067833783,4294967295,1,0]1868; CHECK-SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = [2147483648,268435456]1869; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm11870; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]1871; CHECK-SSE41-NEXT: psrlq $32, %xmm11872; CHECK-SSE41-NEXT: por %xmm1, %xmm01873; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,1,268435455,4294967295]1874; CHECK-SSE41-NEXT: pminud %xmm0, %xmm11875; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm01876; CHECK-SSE41-NEXT: psrld $31, %xmm01877; CHECK-SSE41-NEXT: retq1878;1879; CHECK-AVX1-LABEL: test_urem_even_allones_and_poweroftwo_and_one:1880; CHECK-AVX1: # %bb.0:1881; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,1,0]1882; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [2147483648,u,268435456,u]1883; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]1884; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm11885; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm01886; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11887; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01888; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm01889; CHECK-AVX1-NEXT: retq1890;1891; CHECK-AVX2-LABEL: test_urem_even_allones_and_poweroftwo_and_one:1892; CHECK-AVX2: # %bb.0:1893; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,1,0]1894; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11895; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01896; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm01897; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11898; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01899; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm01900; CHECK-AVX2-NEXT: retq1901;1902; CHECK-AVX512VL-LABEL: test_urem_even_allones_and_poweroftwo_and_one:1903; CHECK-AVX512VL: # %bb.0:1904; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [3067833783,4294967295,1,0]1905; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01906; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11907; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm01908; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm01909; CHECK-AVX512VL-NEXT: retq1910 %urem = urem <4 x i32> %X, <i32 14, i32 4294967295, i32 16, i32 1>1911 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>1912 %ret = zext <4 x i1> %cmp to <4 x i32>1913 ret <4 x i32> %ret1914}1915