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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE34; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE415; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX16; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX27; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW11 12declare <1 x i8> @llvm.usub.sat.v1i8(<1 x i8>, <1 x i8>)13declare <2 x i8> @llvm.usub.sat.v2i8(<2 x i8>, <2 x i8>)14declare <4 x i8> @llvm.usub.sat.v4i8(<4 x i8>, <4 x i8>)15declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>)16declare <12 x i8> @llvm.usub.sat.v12i8(<12 x i8>, <12 x i8>)17declare <16 x i8> @llvm.usub.sat.v16i8(<16 x i8>, <16 x i8>)18declare <32 x i8> @llvm.usub.sat.v32i8(<32 x i8>, <32 x i8>)19declare <64 x i8> @llvm.usub.sat.v64i8(<64 x i8>, <64 x i8>)20 21declare <1 x i16> @llvm.usub.sat.v1i16(<1 x i16>, <1 x i16>)22declare <2 x i16> @llvm.usub.sat.v2i16(<2 x i16>, <2 x i16>)23declare <4 x i16> @llvm.usub.sat.v4i16(<4 x i16>, <4 x i16>)24declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)25declare <12 x i16> @llvm.usub.sat.v12i16(<12 x i16>, <12 x i16>)26declare <16 x i16> @llvm.usub.sat.v16i16(<16 x i16>, <16 x i16>)27declare <32 x i16> @llvm.usub.sat.v32i16(<32 x i16>, <32 x i16>)28 29declare <16 x i1> @llvm.usub.sat.v16i1(<16 x i1>, <16 x i1>)30declare <16 x i4> @llvm.usub.sat.v16i4(<16 x i4>, <16 x i4>)31 32declare <2 x i32> @llvm.usub.sat.v2i32(<2 x i32>, <2 x i32>)33declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)34declare <8 x i32> @llvm.usub.sat.v8i32(<8 x i32>, <8 x i32>)35declare <16 x i32> @llvm.usub.sat.v16i32(<16 x i32>, <16 x i32>)36declare <2 x i64> @llvm.usub.sat.v2i64(<2 x i64>, <2 x i64>)37declare <4 x i64> @llvm.usub.sat.v4i64(<4 x i64>, <4 x i64>)38declare <8 x i64> @llvm.usub.sat.v8i64(<8 x i64>, <8 x i64>)39 40declare <4 x i24> @llvm.usub.sat.v4i24(<4 x i24>, <4 x i24>)41declare <2 x i128> @llvm.usub.sat.v2i128(<2 x i128>, <2 x i128>)42 43; Legal types, depending on architecture.44 45define <16 x i8> @v16i8(<16 x i8> %x, <16 x i8> %y) nounwind {46; SSE-LABEL: v16i8:47; SSE: # %bb.0:48; SSE-NEXT: psubusb %xmm1, %xmm049; SSE-NEXT: retq50;51; AVX-LABEL: v16i8:52; AVX: # %bb.0:53; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm054; AVX-NEXT: retq55 %z = call <16 x i8> @llvm.usub.sat.v16i8(<16 x i8> %x, <16 x i8> %y)56 ret <16 x i8> %z57}58 59define <32 x i8> @v32i8(<32 x i8> %x, <32 x i8> %y) nounwind {60; SSE-LABEL: v32i8:61; SSE: # %bb.0:62; SSE-NEXT: psubusb %xmm2, %xmm063; SSE-NEXT: psubusb %xmm3, %xmm164; SSE-NEXT: retq65;66; AVX1-LABEL: v32i8:67; AVX1: # %bb.0:68; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm269; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm370; AVX1-NEXT: vpsubusb %xmm2, %xmm3, %xmm271; AVX1-NEXT: vpsubusb %xmm1, %xmm0, %xmm072; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm073; AVX1-NEXT: retq74;75; AVX2-LABEL: v32i8:76; AVX2: # %bb.0:77; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm078; AVX2-NEXT: retq79;80; AVX512-LABEL: v32i8:81; AVX512: # %bb.0:82; AVX512-NEXT: vpsubusb %ymm1, %ymm0, %ymm083; AVX512-NEXT: retq84 %z = call <32 x i8> @llvm.usub.sat.v32i8(<32 x i8> %x, <32 x i8> %y)85 ret <32 x i8> %z86}87 88define <64 x i8> @v64i8(<64 x i8> %x, <64 x i8> %y) nounwind {89; SSE-LABEL: v64i8:90; SSE: # %bb.0:91; SSE-NEXT: psubusb %xmm4, %xmm092; SSE-NEXT: psubusb %xmm5, %xmm193; SSE-NEXT: psubusb %xmm6, %xmm294; SSE-NEXT: psubusb %xmm7, %xmm395; SSE-NEXT: retq96;97; AVX1-LABEL: v64i8:98; AVX1: # %bb.0:99; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4100; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5101; AVX1-NEXT: vpsubusb %xmm4, %xmm5, %xmm4102; AVX1-NEXT: vpsubusb %xmm2, %xmm0, %xmm0103; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0104; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm2105; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4106; AVX1-NEXT: vpsubusb %xmm2, %xmm4, %xmm2107; AVX1-NEXT: vpsubusb %xmm3, %xmm1, %xmm1108; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1109; AVX1-NEXT: retq110;111; AVX2-LABEL: v64i8:112; AVX2: # %bb.0:113; AVX2-NEXT: vpsubusb %ymm2, %ymm0, %ymm0114; AVX2-NEXT: vpsubusb %ymm3, %ymm1, %ymm1115; AVX2-NEXT: retq116;117; AVX512F-LABEL: v64i8:118; AVX512F: # %bb.0:119; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2120; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3121; AVX512F-NEXT: vpsubusb %ymm2, %ymm3, %ymm2122; AVX512F-NEXT: vpsubusb %ymm1, %ymm0, %ymm0123; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0124; AVX512F-NEXT: retq125;126; AVX512BW-LABEL: v64i8:127; AVX512BW: # %bb.0:128; AVX512BW-NEXT: vpsubusb %zmm1, %zmm0, %zmm0129; AVX512BW-NEXT: retq130 %z = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> %x, <64 x i8> %y)131 ret <64 x i8> %z132}133 134define <8 x i16> @v8i16(<8 x i16> %x, <8 x i16> %y) nounwind {135; SSE-LABEL: v8i16:136; SSE: # %bb.0:137; SSE-NEXT: psubusw %xmm1, %xmm0138; SSE-NEXT: retq139;140; AVX-LABEL: v8i16:141; AVX: # %bb.0:142; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0143; AVX-NEXT: retq144 %z = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %x, <8 x i16> %y)145 ret <8 x i16> %z146}147 148define <16 x i16> @v16i16(<16 x i16> %x, <16 x i16> %y) nounwind {149; SSE-LABEL: v16i16:150; SSE: # %bb.0:151; SSE-NEXT: psubusw %xmm2, %xmm0152; SSE-NEXT: psubusw %xmm3, %xmm1153; SSE-NEXT: retq154;155; AVX1-LABEL: v16i16:156; AVX1: # %bb.0:157; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2158; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3159; AVX1-NEXT: vpsubusw %xmm2, %xmm3, %xmm2160; AVX1-NEXT: vpsubusw %xmm1, %xmm0, %xmm0161; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0162; AVX1-NEXT: retq163;164; AVX2-LABEL: v16i16:165; AVX2: # %bb.0:166; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0167; AVX2-NEXT: retq168;169; AVX512-LABEL: v16i16:170; AVX512: # %bb.0:171; AVX512-NEXT: vpsubusw %ymm1, %ymm0, %ymm0172; AVX512-NEXT: retq173 %z = call <16 x i16> @llvm.usub.sat.v16i16(<16 x i16> %x, <16 x i16> %y)174 ret <16 x i16> %z175}176 177define <32 x i16> @v32i16(<32 x i16> %x, <32 x i16> %y) nounwind {178; SSE-LABEL: v32i16:179; SSE: # %bb.0:180; SSE-NEXT: psubusw %xmm4, %xmm0181; SSE-NEXT: psubusw %xmm5, %xmm1182; SSE-NEXT: psubusw %xmm6, %xmm2183; SSE-NEXT: psubusw %xmm7, %xmm3184; SSE-NEXT: retq185;186; AVX1-LABEL: v32i16:187; AVX1: # %bb.0:188; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4189; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5190; AVX1-NEXT: vpsubusw %xmm4, %xmm5, %xmm4191; AVX1-NEXT: vpsubusw %xmm2, %xmm0, %xmm0192; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0193; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm2194; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4195; AVX1-NEXT: vpsubusw %xmm2, %xmm4, %xmm2196; AVX1-NEXT: vpsubusw %xmm3, %xmm1, %xmm1197; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1198; AVX1-NEXT: retq199;200; AVX2-LABEL: v32i16:201; AVX2: # %bb.0:202; AVX2-NEXT: vpsubusw %ymm2, %ymm0, %ymm0203; AVX2-NEXT: vpsubusw %ymm3, %ymm1, %ymm1204; AVX2-NEXT: retq205;206; AVX512F-LABEL: v32i16:207; AVX512F: # %bb.0:208; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2209; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3210; AVX512F-NEXT: vpsubusw %ymm2, %ymm3, %ymm2211; AVX512F-NEXT: vpsubusw %ymm1, %ymm0, %ymm0212; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0213; AVX512F-NEXT: retq214;215; AVX512BW-LABEL: v32i16:216; AVX512BW: # %bb.0:217; AVX512BW-NEXT: vpsubusw %zmm1, %zmm0, %zmm0218; AVX512BW-NEXT: retq219 %z = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> %x, <32 x i16> %y)220 ret <32 x i16> %z221}222 223; Too narrow vectors, legalized by widening.224 225define void @v8i8(ptr %px, ptr %py, ptr %pz) nounwind {226; SSE-LABEL: v8i8:227; SSE: # %bb.0:228; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero229; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero230; SSE-NEXT: psubusb %xmm1, %xmm0231; SSE-NEXT: movq %xmm0, (%rdx)232; SSE-NEXT: retq233;234; AVX-LABEL: v8i8:235; AVX: # %bb.0:236; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero237; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero238; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0239; AVX-NEXT: vmovq %xmm0, (%rdx)240; AVX-NEXT: retq241 %x = load <8 x i8>, ptr %px242 %y = load <8 x i8>, ptr %py243 %z = call <8 x i8> @llvm.usub.sat.v8i8(<8 x i8> %x, <8 x i8> %y)244 store <8 x i8> %z, ptr %pz245 ret void246}247 248define void @v4i8(ptr %px, ptr %py, ptr %pz) nounwind {249; SSE-LABEL: v4i8:250; SSE: # %bb.0:251; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero252; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero253; SSE-NEXT: psubusb %xmm1, %xmm0254; SSE-NEXT: movd %xmm0, (%rdx)255; SSE-NEXT: retq256;257; AVX-LABEL: v4i8:258; AVX: # %bb.0:259; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero260; AVX-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero261; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0262; AVX-NEXT: vmovd %xmm0, (%rdx)263; AVX-NEXT: retq264 %x = load <4 x i8>, ptr %px265 %y = load <4 x i8>, ptr %py266 %z = call <4 x i8> @llvm.usub.sat.v4i8(<4 x i8> %x, <4 x i8> %y)267 store <4 x i8> %z, ptr %pz268 ret void269}270 271define void @v2i8(ptr %px, ptr %py, ptr %pz) nounwind {272; SSE2-LABEL: v2i8:273; SSE2: # %bb.0:274; SSE2-NEXT: movzwl (%rdi), %eax275; SSE2-NEXT: movd %eax, %xmm0276; SSE2-NEXT: movzwl (%rsi), %eax277; SSE2-NEXT: movd %eax, %xmm1278; SSE2-NEXT: psubusb %xmm1, %xmm0279; SSE2-NEXT: movd %xmm0, %eax280; SSE2-NEXT: movw %ax, (%rdx)281; SSE2-NEXT: retq282;283; SSSE3-LABEL: v2i8:284; SSSE3: # %bb.0:285; SSSE3-NEXT: movzwl (%rdi), %eax286; SSSE3-NEXT: movd %eax, %xmm0287; SSSE3-NEXT: movzwl (%rsi), %eax288; SSSE3-NEXT: movd %eax, %xmm1289; SSSE3-NEXT: psubusb %xmm1, %xmm0290; SSSE3-NEXT: movd %xmm0, %eax291; SSSE3-NEXT: movw %ax, (%rdx)292; SSSE3-NEXT: retq293;294; SSE41-LABEL: v2i8:295; SSE41: # %bb.0:296; SSE41-NEXT: movzwl (%rdi), %eax297; SSE41-NEXT: movd %eax, %xmm0298; SSE41-NEXT: movzwl (%rsi), %eax299; SSE41-NEXT: movd %eax, %xmm1300; SSE41-NEXT: psubusb %xmm1, %xmm0301; SSE41-NEXT: pextrw $0, %xmm0, (%rdx)302; SSE41-NEXT: retq303;304; AVX-LABEL: v2i8:305; AVX: # %bb.0:306; AVX-NEXT: movzwl (%rdi), %eax307; AVX-NEXT: vmovd %eax, %xmm0308; AVX-NEXT: movzwl (%rsi), %eax309; AVX-NEXT: vmovd %eax, %xmm1310; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0311; AVX-NEXT: vpextrw $0, %xmm0, (%rdx)312; AVX-NEXT: retq313 %x = load <2 x i8>, ptr %px314 %y = load <2 x i8>, ptr %py315 %z = call <2 x i8> @llvm.usub.sat.v2i8(<2 x i8> %x, <2 x i8> %y)316 store <2 x i8> %z, ptr %pz317 ret void318}319 320define void @v4i16(ptr %px, ptr %py, ptr %pz) nounwind {321; SSE-LABEL: v4i16:322; SSE: # %bb.0:323; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero324; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero325; SSE-NEXT: psubusw %xmm1, %xmm0326; SSE-NEXT: movq %xmm0, (%rdx)327; SSE-NEXT: retq328;329; AVX-LABEL: v4i16:330; AVX: # %bb.0:331; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero332; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero333; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0334; AVX-NEXT: vmovq %xmm0, (%rdx)335; AVX-NEXT: retq336 %x = load <4 x i16>, ptr %px337 %y = load <4 x i16>, ptr %py338 %z = call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %x, <4 x i16> %y)339 store <4 x i16> %z, ptr %pz340 ret void341}342 343define void @v2i16(ptr %px, ptr %py, ptr %pz) nounwind {344; SSE-LABEL: v2i16:345; SSE: # %bb.0:346; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero347; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero348; SSE-NEXT: psubusw %xmm1, %xmm0349; SSE-NEXT: movd %xmm0, (%rdx)350; SSE-NEXT: retq351;352; AVX-LABEL: v2i16:353; AVX: # %bb.0:354; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero355; AVX-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero356; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0357; AVX-NEXT: vmovd %xmm0, (%rdx)358; AVX-NEXT: retq359 %x = load <2 x i16>, ptr %px360 %y = load <2 x i16>, ptr %py361 %z = call <2 x i16> @llvm.usub.sat.v2i16(<2 x i16> %x, <2 x i16> %y)362 store <2 x i16> %z, ptr %pz363 ret void364}365 366define <12 x i8> @v12i8(<12 x i8> %x, <12 x i8> %y) nounwind {367; SSE-LABEL: v12i8:368; SSE: # %bb.0:369; SSE-NEXT: psubusb %xmm1, %xmm0370; SSE-NEXT: retq371;372; AVX-LABEL: v12i8:373; AVX: # %bb.0:374; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0375; AVX-NEXT: retq376 %z = call <12 x i8> @llvm.usub.sat.v12i8(<12 x i8> %x, <12 x i8> %y)377 ret <12 x i8> %z378}379 380define void @v12i16(ptr %px, ptr %py, ptr %pz) nounwind {381; SSE-LABEL: v12i16:382; SSE: # %bb.0:383; SSE-NEXT: movdqa (%rdi), %xmm0384; SSE-NEXT: movdqa 16(%rdi), %xmm1385; SSE-NEXT: psubusw 16(%rsi), %xmm1386; SSE-NEXT: psubusw (%rsi), %xmm0387; SSE-NEXT: movdqa %xmm0, (%rdx)388; SSE-NEXT: movq %xmm1, 16(%rdx)389; SSE-NEXT: retq390;391; AVX1-LABEL: v12i16:392; AVX1: # %bb.0:393; AVX1-NEXT: vmovdqa (%rdi), %xmm0394; AVX1-NEXT: vmovdqa 16(%rdi), %xmm1395; AVX1-NEXT: vpsubusw 16(%rsi), %xmm1, %xmm1396; AVX1-NEXT: vpsubusw (%rsi), %xmm0, %xmm0397; AVX1-NEXT: vmovdqa %xmm0, (%rdx)398; AVX1-NEXT: vmovq %xmm1, 16(%rdx)399; AVX1-NEXT: retq400;401; AVX2-LABEL: v12i16:402; AVX2: # %bb.0:403; AVX2-NEXT: vmovdqa (%rdi), %ymm0404; AVX2-NEXT: vpsubusw (%rsi), %ymm0, %ymm0405; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1406; AVX2-NEXT: vmovq %xmm1, 16(%rdx)407; AVX2-NEXT: vmovdqa %xmm0, (%rdx)408; AVX2-NEXT: vzeroupper409; AVX2-NEXT: retq410;411; AVX512-LABEL: v12i16:412; AVX512: # %bb.0:413; AVX512-NEXT: vmovdqa (%rdi), %ymm0414; AVX512-NEXT: vpsubusw (%rsi), %ymm0, %ymm0415; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1416; AVX512-NEXT: vmovq %xmm1, 16(%rdx)417; AVX512-NEXT: vmovdqa %xmm0, (%rdx)418; AVX512-NEXT: vzeroupper419; AVX512-NEXT: retq420 %x = load <12 x i16>, ptr %px421 %y = load <12 x i16>, ptr %py422 %z = call <12 x i16> @llvm.usub.sat.v12i16(<12 x i16> %x, <12 x i16> %y)423 store <12 x i16> %z, ptr %pz424 ret void425}426 427; Scalarization428 429define void @v1i8(ptr %px, ptr %py, ptr %pz) nounwind {430; SSE-LABEL: v1i8:431; SSE: # %bb.0:432; SSE-NEXT: movzbl (%rdi), %eax433; SSE-NEXT: xorl %ecx, %ecx434; SSE-NEXT: subb (%rsi), %al435; SSE-NEXT: movzbl %al, %eax436; SSE-NEXT: cmovbl %ecx, %eax437; SSE-NEXT: movb %al, (%rdx)438; SSE-NEXT: retq439;440; AVX-LABEL: v1i8:441; AVX: # %bb.0:442; AVX-NEXT: movzbl (%rdi), %eax443; AVX-NEXT: xorl %ecx, %ecx444; AVX-NEXT: subb (%rsi), %al445; AVX-NEXT: movzbl %al, %eax446; AVX-NEXT: cmovbl %ecx, %eax447; AVX-NEXT: movb %al, (%rdx)448; AVX-NEXT: retq449 %x = load <1 x i8>, ptr %px450 %y = load <1 x i8>, ptr %py451 %z = call <1 x i8> @llvm.usub.sat.v1i8(<1 x i8> %x, <1 x i8> %y)452 store <1 x i8> %z, ptr %pz453 ret void454}455 456define void @v1i16(ptr %px, ptr %py, ptr %pz) nounwind {457; SSE-LABEL: v1i16:458; SSE: # %bb.0:459; SSE-NEXT: movzwl (%rdi), %eax460; SSE-NEXT: xorl %ecx, %ecx461; SSE-NEXT: subw (%rsi), %ax462; SSE-NEXT: cmovbl %ecx, %eax463; SSE-NEXT: movw %ax, (%rdx)464; SSE-NEXT: retq465;466; AVX-LABEL: v1i16:467; AVX: # %bb.0:468; AVX-NEXT: movzwl (%rdi), %eax469; AVX-NEXT: xorl %ecx, %ecx470; AVX-NEXT: subw (%rsi), %ax471; AVX-NEXT: cmovbl %ecx, %eax472; AVX-NEXT: movw %ax, (%rdx)473; AVX-NEXT: retq474 %x = load <1 x i16>, ptr %px475 %y = load <1 x i16>, ptr %py476 %z = call <1 x i16> @llvm.usub.sat.v1i16(<1 x i16> %x, <1 x i16> %y)477 store <1 x i16> %z, ptr %pz478 ret void479}480 481; Promotion482 483define <16 x i4> @v16i4(<16 x i4> %x, <16 x i4> %y) nounwind {484; SSE-LABEL: v16i4:485; SSE: # %bb.0:486; SSE-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]487; SSE-NEXT: pand %xmm2, %xmm1488; SSE-NEXT: pand %xmm2, %xmm0489; SSE-NEXT: psubusb %xmm1, %xmm0490; SSE-NEXT: retq491;492; AVX1-LABEL: v16i4:493; AVX1: # %bb.0:494; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]495; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1496; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0497; AVX1-NEXT: vpsubusb %xmm1, %xmm0, %xmm0498; AVX1-NEXT: retq499;500; AVX2-LABEL: v16i4:501; AVX2: # %bb.0:502; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]503; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1504; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0505; AVX2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0506; AVX2-NEXT: retq507;508; AVX512-LABEL: v16i4:509; AVX512: # %bb.0:510; AVX512-NEXT: vpbroadcastb {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]511; AVX512-NEXT: vpand %xmm2, %xmm1, %xmm1512; AVX512-NEXT: vpand %xmm2, %xmm0, %xmm0513; AVX512-NEXT: vpsubusb %xmm1, %xmm0, %xmm0514; AVX512-NEXT: retq515 %z = call <16 x i4> @llvm.usub.sat.v16i4(<16 x i4> %x, <16 x i4> %y)516 ret <16 x i4> %z517}518 519define <16 x i1> @v16i1(<16 x i1> %x, <16 x i1> %y) nounwind {520; SSE-LABEL: v16i1:521; SSE: # %bb.0:522; SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1523; SSE-NEXT: andps %xmm1, %xmm0524; SSE-NEXT: retq525;526; AVX1-LABEL: v16i1:527; AVX1: # %bb.0:528; AVX1-NEXT: vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1529; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0530; AVX1-NEXT: retq531;532; AVX2-LABEL: v16i1:533; AVX2: # %bb.0:534; AVX2-NEXT: vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1535; AVX2-NEXT: vandps %xmm1, %xmm0, %xmm0536; AVX2-NEXT: retq537;538; AVX512F-LABEL: v16i1:539; AVX512F: # %bb.0:540; AVX512F-NEXT: vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1541; AVX512F-NEXT: vandps %xmm1, %xmm0, %xmm0542; AVX512F-NEXT: retq543;544; AVX512BW-LABEL: v16i1:545; AVX512BW: # %bb.0:546; AVX512BW-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm1 ^ m32bcst)547; AVX512BW-NEXT: retq548 %z = call <16 x i1> @llvm.usub.sat.v16i1(<16 x i1> %x, <16 x i1> %y)549 ret <16 x i1> %z550}551 552; Expanded553 554define <2 x i32> @v2i32(<2 x i32> %x, <2 x i32> %y) nounwind {555; SSE2-LABEL: v2i32:556; SSE2: # %bb.0:557; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]558; SSE2-NEXT: movdqa %xmm1, %xmm3559; SSE2-NEXT: pxor %xmm2, %xmm3560; SSE2-NEXT: pxor %xmm0, %xmm2561; SSE2-NEXT: pcmpgtd %xmm3, %xmm2562; SSE2-NEXT: psubd %xmm1, %xmm0563; SSE2-NEXT: pand %xmm2, %xmm0564; SSE2-NEXT: retq565;566; SSSE3-LABEL: v2i32:567; SSSE3: # %bb.0:568; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]569; SSSE3-NEXT: movdqa %xmm1, %xmm3570; SSSE3-NEXT: pxor %xmm2, %xmm3571; SSSE3-NEXT: pxor %xmm0, %xmm2572; SSSE3-NEXT: pcmpgtd %xmm3, %xmm2573; SSSE3-NEXT: psubd %xmm1, %xmm0574; SSSE3-NEXT: pand %xmm2, %xmm0575; SSSE3-NEXT: retq576;577; SSE41-LABEL: v2i32:578; SSE41: # %bb.0:579; SSE41-NEXT: pmaxud %xmm1, %xmm0580; SSE41-NEXT: psubd %xmm1, %xmm0581; SSE41-NEXT: retq582;583; AVX-LABEL: v2i32:584; AVX: # %bb.0:585; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0586; AVX-NEXT: vpsubd %xmm1, %xmm0, %xmm0587; AVX-NEXT: retq588 %z = call <2 x i32> @llvm.usub.sat.v2i32(<2 x i32> %x, <2 x i32> %y)589 ret <2 x i32> %z590}591 592define <4 x i32> @v4i32(<4 x i32> %x, <4 x i32> %y) nounwind {593; SSE2-LABEL: v4i32:594; SSE2: # %bb.0:595; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]596; SSE2-NEXT: movdqa %xmm1, %xmm3597; SSE2-NEXT: pxor %xmm2, %xmm3598; SSE2-NEXT: pxor %xmm0, %xmm2599; SSE2-NEXT: pcmpgtd %xmm3, %xmm2600; SSE2-NEXT: psubd %xmm1, %xmm0601; SSE2-NEXT: pand %xmm2, %xmm0602; SSE2-NEXT: retq603;604; SSSE3-LABEL: v4i32:605; SSSE3: # %bb.0:606; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]607; SSSE3-NEXT: movdqa %xmm1, %xmm3608; SSSE3-NEXT: pxor %xmm2, %xmm3609; SSSE3-NEXT: pxor %xmm0, %xmm2610; SSSE3-NEXT: pcmpgtd %xmm3, %xmm2611; SSSE3-NEXT: psubd %xmm1, %xmm0612; SSSE3-NEXT: pand %xmm2, %xmm0613; SSSE3-NEXT: retq614;615; SSE41-LABEL: v4i32:616; SSE41: # %bb.0:617; SSE41-NEXT: pmaxud %xmm1, %xmm0618; SSE41-NEXT: psubd %xmm1, %xmm0619; SSE41-NEXT: retq620;621; AVX-LABEL: v4i32:622; AVX: # %bb.0:623; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0624; AVX-NEXT: vpsubd %xmm1, %xmm0, %xmm0625; AVX-NEXT: retq626 %z = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %x, <4 x i32> %y)627 ret <4 x i32> %z628}629 630define <8 x i32> @v8i32(<8 x i32> %x, <8 x i32> %y) nounwind {631; SSE2-LABEL: v8i32:632; SSE2: # %bb.0:633; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]634; SSE2-NEXT: movdqa %xmm0, %xmm5635; SSE2-NEXT: psubd %xmm2, %xmm0636; SSE2-NEXT: pxor %xmm4, %xmm2637; SSE2-NEXT: pxor %xmm4, %xmm5638; SSE2-NEXT: pcmpgtd %xmm2, %xmm5639; SSE2-NEXT: pand %xmm5, %xmm0640; SSE2-NEXT: movdqa %xmm3, %xmm2641; SSE2-NEXT: pxor %xmm4, %xmm2642; SSE2-NEXT: pxor %xmm1, %xmm4643; SSE2-NEXT: pcmpgtd %xmm2, %xmm4644; SSE2-NEXT: psubd %xmm3, %xmm1645; SSE2-NEXT: pand %xmm4, %xmm1646; SSE2-NEXT: retq647;648; SSSE3-LABEL: v8i32:649; SSSE3: # %bb.0:650; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]651; SSSE3-NEXT: movdqa %xmm0, %xmm5652; SSSE3-NEXT: psubd %xmm2, %xmm0653; SSSE3-NEXT: pxor %xmm4, %xmm2654; SSSE3-NEXT: pxor %xmm4, %xmm5655; SSSE3-NEXT: pcmpgtd %xmm2, %xmm5656; SSSE3-NEXT: pand %xmm5, %xmm0657; SSSE3-NEXT: movdqa %xmm3, %xmm2658; SSSE3-NEXT: pxor %xmm4, %xmm2659; SSSE3-NEXT: pxor %xmm1, %xmm4660; SSSE3-NEXT: pcmpgtd %xmm2, %xmm4661; SSSE3-NEXT: psubd %xmm3, %xmm1662; SSSE3-NEXT: pand %xmm4, %xmm1663; SSSE3-NEXT: retq664;665; SSE41-LABEL: v8i32:666; SSE41: # %bb.0:667; SSE41-NEXT: pmaxud %xmm2, %xmm0668; SSE41-NEXT: psubd %xmm2, %xmm0669; SSE41-NEXT: pmaxud %xmm3, %xmm1670; SSE41-NEXT: psubd %xmm3, %xmm1671; SSE41-NEXT: retq672;673; AVX1-LABEL: v8i32:674; AVX1: # %bb.0:675; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2676; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3677; AVX1-NEXT: vpmaxud %xmm2, %xmm3, %xmm3678; AVX1-NEXT: vpsubd %xmm2, %xmm3, %xmm2679; AVX1-NEXT: vpmaxud %xmm1, %xmm0, %xmm0680; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm0681; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0682; AVX1-NEXT: retq683;684; AVX2-LABEL: v8i32:685; AVX2: # %bb.0:686; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0687; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0688; AVX2-NEXT: retq689;690; AVX512-LABEL: v8i32:691; AVX512: # %bb.0:692; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0693; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0694; AVX512-NEXT: retq695 %z = call <8 x i32> @llvm.usub.sat.v8i32(<8 x i32> %x, <8 x i32> %y)696 ret <8 x i32> %z697}698 699define <16 x i32> @v16i32(<16 x i32> %x, <16 x i32> %y) nounwind {700; SSE2-LABEL: v16i32:701; SSE2: # %bb.0:702; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [2147483648,2147483648,2147483648,2147483648]703; SSE2-NEXT: movdqa %xmm0, %xmm9704; SSE2-NEXT: psubd %xmm4, %xmm0705; SSE2-NEXT: pxor %xmm8, %xmm4706; SSE2-NEXT: pxor %xmm8, %xmm9707; SSE2-NEXT: pcmpgtd %xmm4, %xmm9708; SSE2-NEXT: pand %xmm9, %xmm0709; SSE2-NEXT: movdqa %xmm1, %xmm4710; SSE2-NEXT: psubd %xmm5, %xmm1711; SSE2-NEXT: pxor %xmm8, %xmm5712; SSE2-NEXT: pxor %xmm8, %xmm4713; SSE2-NEXT: pcmpgtd %xmm5, %xmm4714; SSE2-NEXT: pand %xmm4, %xmm1715; SSE2-NEXT: movdqa %xmm2, %xmm4716; SSE2-NEXT: psubd %xmm6, %xmm2717; SSE2-NEXT: pxor %xmm8, %xmm6718; SSE2-NEXT: pxor %xmm8, %xmm4719; SSE2-NEXT: pcmpgtd %xmm6, %xmm4720; SSE2-NEXT: pand %xmm4, %xmm2721; SSE2-NEXT: movdqa %xmm7, %xmm4722; SSE2-NEXT: pxor %xmm8, %xmm4723; SSE2-NEXT: pxor %xmm3, %xmm8724; SSE2-NEXT: pcmpgtd %xmm4, %xmm8725; SSE2-NEXT: psubd %xmm7, %xmm3726; SSE2-NEXT: pand %xmm8, %xmm3727; SSE2-NEXT: retq728;729; SSSE3-LABEL: v16i32:730; SSSE3: # %bb.0:731; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [2147483648,2147483648,2147483648,2147483648]732; SSSE3-NEXT: movdqa %xmm0, %xmm9733; SSSE3-NEXT: psubd %xmm4, %xmm0734; SSSE3-NEXT: pxor %xmm8, %xmm4735; SSSE3-NEXT: pxor %xmm8, %xmm9736; SSSE3-NEXT: pcmpgtd %xmm4, %xmm9737; SSSE3-NEXT: pand %xmm9, %xmm0738; SSSE3-NEXT: movdqa %xmm1, %xmm4739; SSSE3-NEXT: psubd %xmm5, %xmm1740; SSSE3-NEXT: pxor %xmm8, %xmm5741; SSSE3-NEXT: pxor %xmm8, %xmm4742; SSSE3-NEXT: pcmpgtd %xmm5, %xmm4743; SSSE3-NEXT: pand %xmm4, %xmm1744; SSSE3-NEXT: movdqa %xmm2, %xmm4745; SSSE3-NEXT: psubd %xmm6, %xmm2746; SSSE3-NEXT: pxor %xmm8, %xmm6747; SSSE3-NEXT: pxor %xmm8, %xmm4748; SSSE3-NEXT: pcmpgtd %xmm6, %xmm4749; SSSE3-NEXT: pand %xmm4, %xmm2750; SSSE3-NEXT: movdqa %xmm7, %xmm4751; SSSE3-NEXT: pxor %xmm8, %xmm4752; SSSE3-NEXT: pxor %xmm3, %xmm8753; SSSE3-NEXT: pcmpgtd %xmm4, %xmm8754; SSSE3-NEXT: psubd %xmm7, %xmm3755; SSSE3-NEXT: pand %xmm8, %xmm3756; SSSE3-NEXT: retq757;758; SSE41-LABEL: v16i32:759; SSE41: # %bb.0:760; SSE41-NEXT: pmaxud %xmm4, %xmm0761; SSE41-NEXT: psubd %xmm4, %xmm0762; SSE41-NEXT: pmaxud %xmm5, %xmm1763; SSE41-NEXT: psubd %xmm5, %xmm1764; SSE41-NEXT: pmaxud %xmm6, %xmm2765; SSE41-NEXT: psubd %xmm6, %xmm2766; SSE41-NEXT: pmaxud %xmm7, %xmm3767; SSE41-NEXT: psubd %xmm7, %xmm3768; SSE41-NEXT: retq769;770; AVX1-LABEL: v16i32:771; AVX1: # %bb.0:772; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4773; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5774; AVX1-NEXT: vpmaxud %xmm4, %xmm5, %xmm5775; AVX1-NEXT: vpsubd %xmm4, %xmm5, %xmm4776; AVX1-NEXT: vpmaxud %xmm2, %xmm0, %xmm0777; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm0778; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0779; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm2780; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4781; AVX1-NEXT: vpmaxud %xmm2, %xmm4, %xmm4782; AVX1-NEXT: vpsubd %xmm2, %xmm4, %xmm2783; AVX1-NEXT: vpmaxud %xmm3, %xmm1, %xmm1784; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm1785; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1786; AVX1-NEXT: retq787;788; AVX2-LABEL: v16i32:789; AVX2: # %bb.0:790; AVX2-NEXT: vpmaxud %ymm2, %ymm0, %ymm0791; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0792; AVX2-NEXT: vpmaxud %ymm3, %ymm1, %ymm1793; AVX2-NEXT: vpsubd %ymm3, %ymm1, %ymm1794; AVX2-NEXT: retq795;796; AVX512-LABEL: v16i32:797; AVX512: # %bb.0:798; AVX512-NEXT: vpmaxud %zmm1, %zmm0, %zmm0799; AVX512-NEXT: vpsubd %zmm1, %zmm0, %zmm0800; AVX512-NEXT: retq801 %z = call <16 x i32> @llvm.usub.sat.v16i32(<16 x i32> %x, <16 x i32> %y)802 ret <16 x i32> %z803}804 805define <2 x i64> @v2i64(<2 x i64> %x, <2 x i64> %y) nounwind {806; SSE-LABEL: v2i64:807; SSE: # %bb.0:808; SSE-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]809; SSE-NEXT: movdqa %xmm1, %xmm3810; SSE-NEXT: pxor %xmm2, %xmm3811; SSE-NEXT: pxor %xmm0, %xmm2812; SSE-NEXT: movdqa %xmm2, %xmm4813; SSE-NEXT: pcmpgtd %xmm3, %xmm4814; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]815; SSE-NEXT: pcmpeqd %xmm3, %xmm2816; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]817; SSE-NEXT: pand %xmm5, %xmm2818; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]819; SSE-NEXT: por %xmm2, %xmm3820; SSE-NEXT: psubq %xmm1, %xmm0821; SSE-NEXT: pand %xmm3, %xmm0822; SSE-NEXT: retq823;824; AVX1-LABEL: v2i64:825; AVX1: # %bb.0:826; AVX1-NEXT: vmovddup {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]827; AVX1-NEXT: # xmm2 = mem[0,0]828; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm3829; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm2830; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2831; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0832; AVX1-NEXT: vpand %xmm0, %xmm2, %xmm0833; AVX1-NEXT: retq834;835; AVX2-LABEL: v2i64:836; AVX2: # %bb.0:837; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]838; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm3839; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm2840; AVX2-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2841; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0842; AVX2-NEXT: vpand %xmm0, %xmm2, %xmm0843; AVX2-NEXT: retq844;845; AVX512F-LABEL: v2i64:846; AVX512F: # %bb.0:847; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1848; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0849; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0850; AVX512F-NEXT: vpsubq %xmm1, %xmm0, %xmm0851; AVX512F-NEXT: vzeroupper852; AVX512F-NEXT: retq853;854; AVX512BW-LABEL: v2i64:855; AVX512BW: # %bb.0:856; AVX512BW-NEXT: vpmaxuq %xmm1, %xmm0, %xmm0857; AVX512BW-NEXT: vpsubq %xmm1, %xmm0, %xmm0858; AVX512BW-NEXT: retq859 %z = call <2 x i64> @llvm.usub.sat.v2i64(<2 x i64> %x, <2 x i64> %y)860 ret <2 x i64> %z861}862 863define <4 x i64> @v4i64(<4 x i64> %x, <4 x i64> %y) nounwind {864; SSE-LABEL: v4i64:865; SSE: # %bb.0:866; SSE-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456]867; SSE-NEXT: movdqa %xmm0, %xmm5868; SSE-NEXT: psubq %xmm2, %xmm0869; SSE-NEXT: pxor %xmm4, %xmm2870; SSE-NEXT: pxor %xmm4, %xmm5871; SSE-NEXT: movdqa %xmm5, %xmm6872; SSE-NEXT: pcmpgtd %xmm2, %xmm6873; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]874; SSE-NEXT: pcmpeqd %xmm2, %xmm5875; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3]876; SSE-NEXT: pand %xmm7, %xmm2877; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]878; SSE-NEXT: por %xmm2, %xmm5879; SSE-NEXT: pand %xmm5, %xmm0880; SSE-NEXT: movdqa %xmm3, %xmm2881; SSE-NEXT: pxor %xmm4, %xmm2882; SSE-NEXT: pxor %xmm1, %xmm4883; SSE-NEXT: movdqa %xmm4, %xmm5884; SSE-NEXT: pcmpgtd %xmm2, %xmm5885; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]886; SSE-NEXT: pcmpeqd %xmm2, %xmm4887; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]888; SSE-NEXT: pand %xmm6, %xmm2889; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]890; SSE-NEXT: por %xmm2, %xmm4891; SSE-NEXT: psubq %xmm3, %xmm1892; SSE-NEXT: pand %xmm4, %xmm1893; SSE-NEXT: retq894;895; AVX1-LABEL: v4i64:896; AVX1: # %bb.0:897; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2898; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]899; AVX1-NEXT: # xmm3 = mem[0,0]900; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm4901; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5902; AVX1-NEXT: vpxor %xmm3, %xmm5, %xmm6903; AVX1-NEXT: vpcmpgtq %xmm4, %xmm6, %xmm4904; AVX1-NEXT: vpsubq %xmm2, %xmm5, %xmm2905; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2906; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4907; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3908; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm3909; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0910; AVX1-NEXT: vpand %xmm0, %xmm3, %xmm0911; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0912; AVX1-NEXT: retq913;914; AVX2-LABEL: v4i64:915; AVX2: # %bb.0:916; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]917; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3918; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm2919; AVX2-NEXT: vpcmpgtq %ymm3, %ymm2, %ymm2920; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0921; AVX2-NEXT: vpand %ymm0, %ymm2, %ymm0922; AVX2-NEXT: retq923;924; AVX512F-LABEL: v4i64:925; AVX512F: # %bb.0:926; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1927; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0928; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0929; AVX512F-NEXT: vpsubq %ymm1, %ymm0, %ymm0930; AVX512F-NEXT: retq931;932; AVX512BW-LABEL: v4i64:933; AVX512BW: # %bb.0:934; AVX512BW-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0935; AVX512BW-NEXT: vpsubq %ymm1, %ymm0, %ymm0936; AVX512BW-NEXT: retq937 %z = call <4 x i64> @llvm.usub.sat.v4i64(<4 x i64> %x, <4 x i64> %y)938 ret <4 x i64> %z939}940 941define <8 x i64> @v8i64(<8 x i64> %x, <8 x i64> %y) nounwind {942; SSE-LABEL: v8i64:943; SSE: # %bb.0:944; SSE-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002259456,9223372039002259456]945; SSE-NEXT: movdqa %xmm0, %xmm9946; SSE-NEXT: psubq %xmm4, %xmm0947; SSE-NEXT: pxor %xmm8, %xmm4948; SSE-NEXT: pxor %xmm8, %xmm9949; SSE-NEXT: movdqa %xmm9, %xmm10950; SSE-NEXT: pcmpgtd %xmm4, %xmm10951; SSE-NEXT: pshufd {{.*#+}} xmm11 = xmm10[0,0,2,2]952; SSE-NEXT: pcmpeqd %xmm4, %xmm9953; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm9[1,1,3,3]954; SSE-NEXT: pand %xmm11, %xmm4955; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm10[1,1,3,3]956; SSE-NEXT: por %xmm4, %xmm9957; SSE-NEXT: pand %xmm9, %xmm0958; SSE-NEXT: movdqa %xmm1, %xmm4959; SSE-NEXT: psubq %xmm5, %xmm1960; SSE-NEXT: pxor %xmm8, %xmm5961; SSE-NEXT: pxor %xmm8, %xmm4962; SSE-NEXT: movdqa %xmm4, %xmm9963; SSE-NEXT: pcmpgtd %xmm5, %xmm9964; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm9[0,0,2,2]965; SSE-NEXT: pcmpeqd %xmm5, %xmm4966; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]967; SSE-NEXT: pand %xmm10, %xmm4968; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm9[1,1,3,3]969; SSE-NEXT: por %xmm4, %xmm5970; SSE-NEXT: pand %xmm5, %xmm1971; SSE-NEXT: movdqa %xmm2, %xmm4972; SSE-NEXT: psubq %xmm6, %xmm2973; SSE-NEXT: pxor %xmm8, %xmm6974; SSE-NEXT: pxor %xmm8, %xmm4975; SSE-NEXT: movdqa %xmm4, %xmm5976; SSE-NEXT: pcmpgtd %xmm6, %xmm5977; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm5[0,0,2,2]978; SSE-NEXT: pcmpeqd %xmm6, %xmm4979; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]980; SSE-NEXT: pand %xmm9, %xmm4981; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]982; SSE-NEXT: por %xmm4, %xmm5983; SSE-NEXT: pand %xmm5, %xmm2984; SSE-NEXT: movdqa %xmm7, %xmm4985; SSE-NEXT: pxor %xmm8, %xmm4986; SSE-NEXT: pxor %xmm3, %xmm8987; SSE-NEXT: movdqa %xmm8, %xmm5988; SSE-NEXT: pcmpgtd %xmm4, %xmm5989; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]990; SSE-NEXT: pcmpeqd %xmm4, %xmm8991; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm8[1,1,3,3]992; SSE-NEXT: pand %xmm6, %xmm4993; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]994; SSE-NEXT: por %xmm4, %xmm5995; SSE-NEXT: psubq %xmm7, %xmm3996; SSE-NEXT: pand %xmm5, %xmm3997; SSE-NEXT: retq998;999; AVX1-LABEL: v8i64:1000; AVX1: # %bb.0:1001; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm41002; AVX1-NEXT: vmovddup {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808]1003; AVX1-NEXT: # xmm5 = mem[0,0]1004; AVX1-NEXT: vpxor %xmm5, %xmm4, %xmm61005; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm71006; AVX1-NEXT: vpxor %xmm5, %xmm7, %xmm81007; AVX1-NEXT: vpcmpgtq %xmm6, %xmm8, %xmm61008; AVX1-NEXT: vpsubq %xmm4, %xmm7, %xmm41009; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm41010; AVX1-NEXT: vpxor %xmm5, %xmm2, %xmm61011; AVX1-NEXT: vpxor %xmm5, %xmm0, %xmm71012; AVX1-NEXT: vpcmpgtq %xmm6, %xmm7, %xmm61013; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm01014; AVX1-NEXT: vpand %xmm0, %xmm6, %xmm01015; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm01016; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm21017; AVX1-NEXT: vpxor %xmm5, %xmm2, %xmm41018; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm61019; AVX1-NEXT: vpxor %xmm5, %xmm6, %xmm71020; AVX1-NEXT: vpcmpgtq %xmm4, %xmm7, %xmm41021; AVX1-NEXT: vpsubq %xmm2, %xmm6, %xmm21022; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm21023; AVX1-NEXT: vpxor %xmm5, %xmm3, %xmm41024; AVX1-NEXT: vpxor %xmm5, %xmm1, %xmm51025; AVX1-NEXT: vpcmpgtq %xmm4, %xmm5, %xmm41026; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm11027; AVX1-NEXT: vpand %xmm1, %xmm4, %xmm11028; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm11029; AVX1-NEXT: retq1030;1031; AVX2-LABEL: v8i64:1032; AVX2: # %bb.0:1033; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]1034; AVX2-NEXT: vpxor %ymm4, %ymm2, %ymm51035; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm61036; AVX2-NEXT: vpcmpgtq %ymm5, %ymm6, %ymm51037; AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm01038; AVX2-NEXT: vpand %ymm0, %ymm5, %ymm01039; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm21040; AVX2-NEXT: vpxor %ymm4, %ymm1, %ymm41041; AVX2-NEXT: vpcmpgtq %ymm2, %ymm4, %ymm21042; AVX2-NEXT: vpsubq %ymm3, %ymm1, %ymm11043; AVX2-NEXT: vpand %ymm1, %ymm2, %ymm11044; AVX2-NEXT: retq1045;1046; AVX512-LABEL: v8i64:1047; AVX512: # %bb.0:1048; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm01049; AVX512-NEXT: vpsubq %zmm1, %zmm0, %zmm01050; AVX512-NEXT: retq1051 %z = call <8 x i64> @llvm.usub.sat.v8i64(<8 x i64> %x, <8 x i64> %y)1052 ret <8 x i64> %z1053}1054 1055define <2 x i128> @v2i128(<2 x i128> %x, <2 x i128> %y) nounwind {1056; SSE-LABEL: v2i128:1057; SSE: # %bb.0:1058; SSE-NEXT: movq %rdi, %rax1059; SSE-NEXT: xorl %edi, %edi1060; SSE-NEXT: subq %r9, %rsi1061; SSE-NEXT: sbbq {{[0-9]+}}(%rsp), %rdx1062; SSE-NEXT: cmovbq %rdi, %rsi1063; SSE-NEXT: cmovbq %rdi, %rdx1064; SSE-NEXT: subq {{[0-9]+}}(%rsp), %rcx1065; SSE-NEXT: sbbq {{[0-9]+}}(%rsp), %r81066; SSE-NEXT: cmovbq %rdi, %r81067; SSE-NEXT: cmovbq %rdi, %rcx1068; SSE-NEXT: movq %r8, 24(%rax)1069; SSE-NEXT: movq %rcx, 16(%rax)1070; SSE-NEXT: movq %rdx, 8(%rax)1071; SSE-NEXT: movq %rsi, (%rax)1072; SSE-NEXT: retq1073;1074; AVX-LABEL: v2i128:1075; AVX: # %bb.0:1076; AVX-NEXT: movq %rdi, %rax1077; AVX-NEXT: xorl %edi, %edi1078; AVX-NEXT: subq %r9, %rsi1079; AVX-NEXT: sbbq {{[0-9]+}}(%rsp), %rdx1080; AVX-NEXT: cmovbq %rdi, %rsi1081; AVX-NEXT: cmovbq %rdi, %rdx1082; AVX-NEXT: subq {{[0-9]+}}(%rsp), %rcx1083; AVX-NEXT: sbbq {{[0-9]+}}(%rsp), %r81084; AVX-NEXT: cmovbq %rdi, %r81085; AVX-NEXT: cmovbq %rdi, %rcx1086; AVX-NEXT: movq %r8, 24(%rax)1087; AVX-NEXT: movq %rcx, 16(%rax)1088; AVX-NEXT: movq %rdx, 8(%rax)1089; AVX-NEXT: movq %rsi, (%rax)1090; AVX-NEXT: retq1091 %z = call <2 x i128> @llvm.usub.sat.v2i128(<2 x i128> %x, <2 x i128> %y)1092 ret <2 x i128> %z1093}1094 1095define void @PR48223(ptr %p0) {1096; SSE2-LABEL: PR48223:1097; SSE2: # %bb.0:1098; SSE2-NEXT: movdqa (%rdi), %xmm01099; SSE2-NEXT: movdqa 16(%rdi), %xmm11100; SSE2-NEXT: movdqa 32(%rdi), %xmm21101; SSE2-NEXT: movdqa 48(%rdi), %xmm31102; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64]1103; SSE2-NEXT: psubusw %xmm4, %xmm11104; SSE2-NEXT: psubusw %xmm4, %xmm01105; SSE2-NEXT: psubusw %xmm4, %xmm31106; SSE2-NEXT: psubusw %xmm4, %xmm21107; SSE2-NEXT: movdqa %xmm2, 32(%rdi)1108; SSE2-NEXT: movdqa %xmm3, 48(%rdi)1109; SSE2-NEXT: movdqa %xmm0, (%rdi)1110; SSE2-NEXT: movdqa %xmm1, 16(%rdi)1111; SSE2-NEXT: retq1112;1113; SSSE3-LABEL: PR48223:1114; SSSE3: # %bb.0:1115; SSSE3-NEXT: movdqa (%rdi), %xmm01116; SSSE3-NEXT: movdqa 16(%rdi), %xmm11117; SSSE3-NEXT: movdqa 32(%rdi), %xmm21118; SSSE3-NEXT: movdqa 48(%rdi), %xmm31119; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64]1120; SSSE3-NEXT: psubusw %xmm4, %xmm11121; SSSE3-NEXT: psubusw %xmm4, %xmm01122; SSSE3-NEXT: psubusw %xmm4, %xmm31123; SSSE3-NEXT: psubusw %xmm4, %xmm21124; SSSE3-NEXT: movdqa %xmm2, 32(%rdi)1125; SSSE3-NEXT: movdqa %xmm3, 48(%rdi)1126; SSSE3-NEXT: movdqa %xmm0, (%rdi)1127; SSSE3-NEXT: movdqa %xmm1, 16(%rdi)1128; SSSE3-NEXT: retq1129;1130; SSE41-LABEL: PR48223:1131; SSE41: # %bb.0:1132; SSE41-NEXT: movdqa (%rdi), %xmm01133; SSE41-NEXT: movdqa 16(%rdi), %xmm11134; SSE41-NEXT: movdqa 32(%rdi), %xmm21135; SSE41-NEXT: movdqa 48(%rdi), %xmm31136; SSE41-NEXT: pmovsxbw {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64]1137; SSE41-NEXT: psubusw %xmm4, %xmm11138; SSE41-NEXT: psubusw %xmm4, %xmm01139; SSE41-NEXT: psubusw %xmm4, %xmm31140; SSE41-NEXT: psubusw %xmm4, %xmm21141; SSE41-NEXT: movdqa %xmm2, 32(%rdi)1142; SSE41-NEXT: movdqa %xmm3, 48(%rdi)1143; SSE41-NEXT: movdqa %xmm0, (%rdi)1144; SSE41-NEXT: movdqa %xmm1, 16(%rdi)1145; SSE41-NEXT: retq1146;1147; AVX1-LABEL: PR48223:1148; AVX1: # %bb.0:1149; AVX1-NEXT: vmovdqa (%rdi), %xmm01150; AVX1-NEXT: vmovdqa 16(%rdi), %xmm11151; AVX1-NEXT: vmovdqa 32(%rdi), %xmm21152; AVX1-NEXT: vmovdqa 48(%rdi), %xmm31153; AVX1-NEXT: vbroadcastss {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64]1154; AVX1-NEXT: vpsubusw %xmm4, %xmm3, %xmm31155; AVX1-NEXT: vpsubusw %xmm4, %xmm2, %xmm21156; AVX1-NEXT: vpsubusw %xmm4, %xmm1, %xmm11157; AVX1-NEXT: vpsubusw %xmm4, %xmm0, %xmm01158; AVX1-NEXT: vmovdqa %xmm0, (%rdi)1159; AVX1-NEXT: vmovdqa %xmm1, 16(%rdi)1160; AVX1-NEXT: vmovdqa %xmm2, 32(%rdi)1161; AVX1-NEXT: vmovdqa %xmm3, 48(%rdi)1162; AVX1-NEXT: retq1163;1164; AVX2-LABEL: PR48223:1165; AVX2: # %bb.0:1166; AVX2-NEXT: vmovdqa (%rdi), %ymm01167; AVX2-NEXT: vmovdqa 32(%rdi), %ymm11168; AVX2-NEXT: vpbroadcastw {{.*#+}} ymm2 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]1169; AVX2-NEXT: vpsubusw %ymm2, %ymm1, %ymm11170; AVX2-NEXT: vpsubusw %ymm2, %ymm0, %ymm01171; AVX2-NEXT: vmovdqa %ymm0, (%rdi)1172; AVX2-NEXT: vmovdqa %ymm1, 32(%rdi)1173; AVX2-NEXT: vzeroupper1174; AVX2-NEXT: retq1175;1176; AVX512F-LABEL: PR48223:1177; AVX512F: # %bb.0:1178; AVX512F-NEXT: vmovdqa (%rdi), %ymm01179; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm11180; AVX512F-NEXT: vpbroadcastw {{.*#+}} ymm2 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]1181; AVX512F-NEXT: vpsubusw %ymm2, %ymm1, %ymm11182; AVX512F-NEXT: vpsubusw %ymm2, %ymm0, %ymm01183; AVX512F-NEXT: vmovdqa %ymm0, (%rdi)1184; AVX512F-NEXT: vmovdqa %ymm1, 32(%rdi)1185; AVX512F-NEXT: vzeroupper1186; AVX512F-NEXT: retq1187;1188; AVX512BW-LABEL: PR48223:1189; AVX512BW: # %bb.0:1190; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm01191; AVX512BW-NEXT: vpsubusw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm01192; AVX512BW-NEXT: vmovdqa64 %zmm0, (%rdi)1193; AVX512BW-NEXT: vzeroupper1194; AVX512BW-NEXT: retq1195 %1 = load <32 x i16>, ptr %p0, align 641196 %2 = icmp ugt <32 x i16> %1, <i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63, i16 63>1197 %3 = add <32 x i16> %1, <i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64, i16 -64>1198 %4 = select <32 x i1> %2, <32 x i16> %3, <32 x i16> zeroinitializer1199 store <32 x i16> %4, ptr %p0, align 641200 ret void1201}1202