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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-X644; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX6; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX8 9declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)10declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)11declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)12declare <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float>, <4 x float>, metadata, metadata)13declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)14declare <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float>, <4 x float>, metadata, metadata)15declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)16declare <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float>, <4 x float>, metadata, metadata)17declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)18declare <4 x float> @llvm.experimental.constrained.sqrt.v4f32(<4 x float>, metadata, metadata)19declare float @llvm.experimental.constrained.fptrunc.f32.f64(double, metadata, metadata)20declare <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(<2 x double>, metadata, metadata)21declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata)22declare <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(<2 x float>, metadata)23declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)24declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)25 26define <2 x double> @f1(<2 x double> %a, <2 x double> %b) #0 {27; SSE-LABEL: f1:28; SSE: # %bb.0:29; SSE-NEXT: addpd %xmm1, %xmm030; SSE-NEXT: ret{{[l|q]}}31;32; AVX-LABEL: f1:33; AVX: # %bb.0:34; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm035; AVX-NEXT: ret{{[l|q]}}36 %ret = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double> %a, <2 x double> %b,37 metadata !"round.dynamic",38 metadata !"fpexcept.strict") #039 ret <2 x double> %ret40}41 42define <4 x float> @f2(<4 x float> %a, <4 x float> %b) #0 {43; SSE-LABEL: f2:44; SSE: # %bb.0:45; SSE-NEXT: addps %xmm1, %xmm046; SSE-NEXT: ret{{[l|q]}}47;48; AVX-LABEL: f2:49; AVX: # %bb.0:50; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm051; AVX-NEXT: ret{{[l|q]}}52 %ret = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %a, <4 x float> %b,53 metadata !"round.dynamic",54 metadata !"fpexcept.strict") #055 ret <4 x float> %ret56}57 58define <2 x double> @f3(<2 x double> %a, <2 x double> %b) #0 {59; SSE-LABEL: f3:60; SSE: # %bb.0:61; SSE-NEXT: subpd %xmm1, %xmm062; SSE-NEXT: ret{{[l|q]}}63;64; AVX-LABEL: f3:65; AVX: # %bb.0:66; AVX-NEXT: vsubpd %xmm1, %xmm0, %xmm067; AVX-NEXT: ret{{[l|q]}}68 %ret = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %a, <2 x double> %b,69 metadata !"round.dynamic",70 metadata !"fpexcept.strict") #071 ret <2 x double> %ret72}73 74define <4 x float> @f4(<4 x float> %a, <4 x float> %b) #0 {75; SSE-LABEL: f4:76; SSE: # %bb.0:77; SSE-NEXT: subps %xmm1, %xmm078; SSE-NEXT: ret{{[l|q]}}79;80; AVX-LABEL: f4:81; AVX: # %bb.0:82; AVX-NEXT: vsubps %xmm1, %xmm0, %xmm083; AVX-NEXT: ret{{[l|q]}}84 %ret = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %a, <4 x float> %b,85 metadata !"round.dynamic",86 metadata !"fpexcept.strict") #087 ret <4 x float> %ret88}89 90define <2 x double> @f5(<2 x double> %a, <2 x double> %b) #0 {91; SSE-LABEL: f5:92; SSE: # %bb.0:93; SSE-NEXT: mulpd %xmm1, %xmm094; SSE-NEXT: ret{{[l|q]}}95;96; AVX-LABEL: f5:97; AVX: # %bb.0:98; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm099; AVX-NEXT: ret{{[l|q]}}100 %ret = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %a, <2 x double> %b,101 metadata !"round.dynamic",102 metadata !"fpexcept.strict") #0103 ret <2 x double> %ret104}105 106define <4 x float> @f6(<4 x float> %a, <4 x float> %b) #0 {107; SSE-LABEL: f6:108; SSE: # %bb.0:109; SSE-NEXT: mulps %xmm1, %xmm0110; SSE-NEXT: ret{{[l|q]}}111;112; AVX-LABEL: f6:113; AVX: # %bb.0:114; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0115; AVX-NEXT: ret{{[l|q]}}116 %ret = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %a, <4 x float> %b,117 metadata !"round.dynamic",118 metadata !"fpexcept.strict") #0119 ret <4 x float> %ret120}121 122define <2 x double> @f7(<2 x double> %a, <2 x double> %b) #0 {123; SSE-LABEL: f7:124; SSE: # %bb.0:125; SSE-NEXT: divpd %xmm1, %xmm0126; SSE-NEXT: ret{{[l|q]}}127;128; AVX-LABEL: f7:129; AVX: # %bb.0:130; AVX-NEXT: vdivpd %xmm1, %xmm0, %xmm0131; AVX-NEXT: ret{{[l|q]}}132 %ret = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double> %a, <2 x double> %b,133 metadata !"round.dynamic",134 metadata !"fpexcept.strict") #0135 ret <2 x double> %ret136}137 138define <4 x float> @f8(<4 x float> %a, <4 x float> %b) #0 {139; SSE-LABEL: f8:140; SSE: # %bb.0:141; SSE-NEXT: divps %xmm1, %xmm0142; SSE-NEXT: ret{{[l|q]}}143;144; AVX-LABEL: f8:145; AVX: # %bb.0:146; AVX-NEXT: vdivps %xmm1, %xmm0, %xmm0147; AVX-NEXT: ret{{[l|q]}}148 %ret = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float> %a, <4 x float> %b,149 metadata !"round.dynamic",150 metadata !"fpexcept.strict") #0151 ret <4 x float> %ret152}153 154define <2 x double> @f9(<2 x double> %a) #0 {155; SSE-LABEL: f9:156; SSE: # %bb.0:157; SSE-NEXT: sqrtpd %xmm0, %xmm0158; SSE-NEXT: ret{{[l|q]}}159;160; AVX-LABEL: f9:161; AVX: # %bb.0:162; AVX-NEXT: vsqrtpd %xmm0, %xmm0163; AVX-NEXT: ret{{[l|q]}}164 %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(165 <2 x double> %a,166 metadata !"round.dynamic",167 metadata !"fpexcept.strict") #0168 ret <2 x double> %sqrt169}170 171define <4 x float> @f10(<4 x float> %a) #0 {172; SSE-LABEL: f10:173; SSE: # %bb.0:174; SSE-NEXT: sqrtps %xmm0, %xmm0175; SSE-NEXT: ret{{[l|q]}}176;177; AVX-LABEL: f10:178; AVX: # %bb.0:179; AVX-NEXT: vsqrtps %xmm0, %xmm0180; AVX-NEXT: ret{{[l|q]}}181 %sqrt = call <4 x float> @llvm.experimental.constrained.sqrt.v4f32(182 <4 x float> %a,183 metadata !"round.dynamic",184 metadata !"fpexcept.strict") #0185 ret <4 x float > %sqrt186}187 188define <4 x float> @f11(<2 x double> %a0, <4 x float> %a1) #0 {189; SSE-LABEL: f11:190; SSE: # %bb.0:191; SSE-NEXT: cvtsd2ss %xmm0, %xmm1192; SSE-NEXT: movaps %xmm1, %xmm0193; SSE-NEXT: ret{{[l|q]}}194;195; AVX-LABEL: f11:196; AVX: # %bb.0:197; AVX-NEXT: vcvtsd2ss %xmm0, %xmm1, %xmm0198; AVX-NEXT: ret{{[l|q]}}199 %ext = extractelement <2 x double> %a0, i32 0200 %cvt = call float @llvm.experimental.constrained.fptrunc.f32.f64(double %ext,201 metadata !"round.dynamic",202 metadata !"fpexcept.strict") #0203 %res = insertelement <4 x float> %a1, float %cvt, i32 0204 ret <4 x float> %res205}206 207define <2 x double> @f12(<2 x double> %a0, <4 x float> %a1) #0 {208; SSE-LABEL: f12:209; SSE: # %bb.0:210; SSE-NEXT: cvtss2sd %xmm1, %xmm0211; SSE-NEXT: ret{{[l|q]}}212;213; AVX-LABEL: f12:214; AVX: # %bb.0:215; AVX-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0216; AVX-NEXT: ret{{[l|q]}}217 %ext = extractelement <4 x float> %a1, i32 0218 %cvt = call double @llvm.experimental.constrained.fpext.f64.f32(float %ext,219 metadata !"fpexcept.strict") #0220 %res = insertelement <2 x double> %a0, double %cvt, i32 0221 ret <2 x double> %res222}223 224define <4 x float> @f13(<4 x float> %a, <4 x float> %b, <4 x float> %c) #0 {225; SSE-X86-LABEL: f13:226; SSE-X86: # %bb.0:227; SSE-X86-NEXT: subl $100, %esp228; SSE-X86-NEXT: .cfi_def_cfa_offset 104229; SSE-X86-NEXT: movups %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill230; SSE-X86-NEXT: movups %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill231; SSE-X86-NEXT: movups %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill232; SSE-X86-NEXT: movss %xmm2, {{[0-9]+}}(%esp)233; SSE-X86-NEXT: movss %xmm1, {{[0-9]+}}(%esp)234; SSE-X86-NEXT: movss %xmm0, (%esp)235; SSE-X86-NEXT: calll fmaf236; SSE-X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill237; SSE-X86-NEXT: wait238; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload239; SSE-X86-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]240; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp)241; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload242; SSE-X86-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]243; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp)244; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload245; SSE-X86-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]246; SSE-X86-NEXT: movss %xmm0, (%esp)247; SSE-X86-NEXT: calll fmaf248; SSE-X86-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Spill249; SSE-X86-NEXT: wait250; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload251; SSE-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]252; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp)253; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload254; SSE-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]255; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp)256; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload257; SSE-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]258; SSE-X86-NEXT: movss %xmm0, (%esp)259; SSE-X86-NEXT: calll fmaf260; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload261; SSE-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]262; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp)263; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload264; SSE-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]265; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp)266; SSE-X86-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload267; SSE-X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]268; SSE-X86-NEXT: movss %xmm0, (%esp)269; SSE-X86-NEXT: fstps {{[0-9]+}}(%esp)270; SSE-X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload271; SSE-X86-NEXT: fstps {{[0-9]+}}(%esp)272; SSE-X86-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) # 10-byte Folded Reload273; SSE-X86-NEXT: fstps {{[0-9]+}}(%esp)274; SSE-X86-NEXT: wait275; SSE-X86-NEXT: calll fmaf276; SSE-X86-NEXT: fstps {{[0-9]+}}(%esp)277; SSE-X86-NEXT: wait278; SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero279; SSE-X86-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero280; SSE-X86-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]281; SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero282; SSE-X86-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero283; SSE-X86-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]284; SSE-X86-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]285; SSE-X86-NEXT: addl $100, %esp286; SSE-X86-NEXT: .cfi_def_cfa_offset 4287; SSE-X86-NEXT: retl288;289; SSE-X64-LABEL: f13:290; SSE-X64: # %bb.0:291; SSE-X64-NEXT: subq $88, %rsp292; SSE-X64-NEXT: .cfi_def_cfa_offset 96293; SSE-X64-NEXT: movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill294; SSE-X64-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill295; SSE-X64-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill296; SSE-X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]297; SSE-X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]298; SSE-X64-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]299; SSE-X64-NEXT: callq fmaf@PLT300; SSE-X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill301; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload302; SSE-X64-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]303; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload304; SSE-X64-NEXT: movhlps {{.*#+}} xmm1 = xmm1[1,1]305; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload306; SSE-X64-NEXT: movhlps {{.*#+}} xmm2 = xmm2[1,1]307; SSE-X64-NEXT: callq fmaf@PLT308; SSE-X64-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload309; SSE-X64-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]310; SSE-X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill311; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload312; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload313; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload314; SSE-X64-NEXT: callq fmaf@PLT315; SSE-X64-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill316; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload317; SSE-X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]318; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload319; SSE-X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]320; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload321; SSE-X64-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,1,1]322; SSE-X64-NEXT: callq fmaf@PLT323; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload324; SSE-X64-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]325; SSE-X64-NEXT: unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload326; SSE-X64-NEXT: # xmm1 = xmm1[0],mem[0]327; SSE-X64-NEXT: movaps %xmm1, %xmm0328; SSE-X64-NEXT: addq $88, %rsp329; SSE-X64-NEXT: .cfi_def_cfa_offset 8330; SSE-X64-NEXT: retq331;332; AVX-LABEL: f13:333; AVX: # %bb.0:334; AVX-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm2335; AVX-NEXT: ret{{[l|q]}}336 %res = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c,337 metadata !"round.dynamic",338 metadata !"fpexcept.strict") #0339 ret <4 x float> %res340}341 342define <2 x double> @f14(<2 x double> %a, <2 x double> %b, <2 x double> %c) #0 {343; SSE-X86-LABEL: f14:344; SSE-X86: # %bb.0:345; SSE-X86-NEXT: pushl %ebp346; SSE-X86-NEXT: .cfi_def_cfa_offset 8347; SSE-X86-NEXT: .cfi_offset %ebp, -8348; SSE-X86-NEXT: movl %esp, %ebp349; SSE-X86-NEXT: .cfi_def_cfa_register %ebp350; SSE-X86-NEXT: andl $-16, %esp351; SSE-X86-NEXT: subl $112, %esp352; SSE-X86-NEXT: movaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill353; SSE-X86-NEXT: movaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill354; SSE-X86-NEXT: movaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill355; SSE-X86-NEXT: movlps %xmm2, {{[0-9]+}}(%esp)356; SSE-X86-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)357; SSE-X86-NEXT: movlps %xmm0, (%esp)358; SSE-X86-NEXT: calll fma359; SSE-X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload360; SSE-X86-NEXT: movhps %xmm0, {{[0-9]+}}(%esp)361; SSE-X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload362; SSE-X86-NEXT: movhps %xmm0, {{[0-9]+}}(%esp)363; SSE-X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload364; SSE-X86-NEXT: movhps %xmm0, (%esp)365; SSE-X86-NEXT: fstpl {{[0-9]+}}(%esp)366; SSE-X86-NEXT: wait367; SSE-X86-NEXT: calll fma368; SSE-X86-NEXT: fstpl {{[0-9]+}}(%esp)369; SSE-X86-NEXT: wait370; SSE-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero371; SSE-X86-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]372; SSE-X86-NEXT: movl %ebp, %esp373; SSE-X86-NEXT: popl %ebp374; SSE-X86-NEXT: .cfi_def_cfa %esp, 4375; SSE-X86-NEXT: retl376;377; SSE-X64-LABEL: f14:378; SSE-X64: # %bb.0:379; SSE-X64-NEXT: subq $72, %rsp380; SSE-X64-NEXT: .cfi_def_cfa_offset 80381; SSE-X64-NEXT: movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill382; SSE-X64-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill383; SSE-X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill384; SSE-X64-NEXT: callq fma@PLT385; SSE-X64-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill386; SSE-X64-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload387; SSE-X64-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]388; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload389; SSE-X64-NEXT: movhlps {{.*#+}} xmm1 = xmm1[1,1]390; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload391; SSE-X64-NEXT: movhlps {{.*#+}} xmm2 = xmm2[1,1]392; SSE-X64-NEXT: callq fma@PLT393; SSE-X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload394; SSE-X64-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]395; SSE-X64-NEXT: movaps %xmm1, %xmm0396; SSE-X64-NEXT: addq $72, %rsp397; SSE-X64-NEXT: .cfi_def_cfa_offset 8398; SSE-X64-NEXT: retq399;400; AVX-LABEL: f14:401; AVX: # %bb.0:402; AVX-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm2403; AVX-NEXT: ret{{[l|q]}}404 %res = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> %a, <2 x double> %b, <2 x double> %c,405 metadata !"round.dynamic",406 metadata !"fpexcept.strict") #0407 ret <2 x double> %res408}409 410define <2 x double> @f15(<2 x float> %a) #0 {411; SSE-LABEL: f15:412; SSE: # %bb.0:413; SSE-NEXT: cvtps2pd %xmm0, %xmm0414; SSE-NEXT: ret{{[l|q]}}415;416; AVX-LABEL: f15:417; AVX: # %bb.0:418; AVX-NEXT: vcvtps2pd %xmm0, %xmm0419; AVX-NEXT: ret{{[l|q]}}420 %ret = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(421 <2 x float> %a,422 metadata !"fpexcept.strict") #0423 ret <2 x double> %ret424}425 426define <2 x float> @f16(<2 x double> %a) #0 {427; SSE-LABEL: f16:428; SSE: # %bb.0:429; SSE-NEXT: cvtpd2ps %xmm0, %xmm0430; SSE-NEXT: ret{{[l|q]}}431;432; AVX-LABEL: f16:433; AVX: # %bb.0:434; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0435; AVX-NEXT: ret{{[l|q]}}436 %ret = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(437 <2 x double> %a,438 metadata !"round.dynamic",439 metadata !"fpexcept.strict") #0440 ret <2 x float> %ret441}442 443 444attributes #0 = { strictfp }445