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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-323; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-644; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX512F-325; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX512F-646; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-327; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-648; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ10; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQVL11; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQVL12 13 14declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(<4 x double>, metadata)15declare <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(<4 x double>, metadata)16declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(<4 x float>, metadata)17declare <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(<4 x float>, metadata)18declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(<4 x double>, metadata)19declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(<4 x double>, metadata)20declare <4 x i16> @llvm.experimental.constrained.fptosi.v4i16.v4f64(<4 x double>, metadata)21declare <4 x i16> @llvm.experimental.constrained.fptoui.v4i16.v4f64(<4 x double>, metadata)22declare <4 x i8> @llvm.experimental.constrained.fptosi.v4i8.v4f64(<4 x double>, metadata)23declare <4 x i8> @llvm.experimental.constrained.fptoui.v4i8.v4f64(<4 x double>, metadata)24declare <4 x i8> @llvm.experimental.constrained.fptosi.v4i8.v4f32(<4 x float>, metadata)25declare <4 x i8> @llvm.experimental.constrained.fptoui.v4i8.v4f32(<4 x float>, metadata)26declare <4 x i1> @llvm.experimental.constrained.fptosi.v4i1.v4f64(<4 x double>, metadata)27declare <4 x i1> @llvm.experimental.constrained.fptoui.v4i1.v4f64(<4 x double>, metadata)28declare <8 x i32> @llvm.experimental.constrained.fptosi.v8i32.v8f32(<8 x float>, metadata)29declare <8 x i32> @llvm.experimental.constrained.fptoui.v8i32.v8f32(<8 x float>, metadata)30declare <8 x i16> @llvm.experimental.constrained.fptosi.v8i16.v8f32(<8 x float>, metadata)31declare <8 x i16> @llvm.experimental.constrained.fptoui.v8i16.v8f32(<8 x float>, metadata)32declare <8 x i8> @llvm.experimental.constrained.fptosi.v8i8.v8f32(<8 x float>, metadata)33declare <8 x i8> @llvm.experimental.constrained.fptoui.v8i8.v8f32(<8 x float>, metadata)34declare <8 x i1> @llvm.experimental.constrained.fptosi.v8i1.v8f32(<8 x float>, metadata)35declare <8 x i1> @llvm.experimental.constrained.fptoui.v8i1.v8f32(<8 x float>, metadata)36 37define <4 x i64> @strict_vector_fptosi_v4f64_to_v4i64(<4 x double> %a) #0 {38; AVX-32-LABEL: strict_vector_fptosi_v4f64_to_v4i64:39; AVX-32: # %bb.0:40; AVX-32-NEXT: pushl %ebp41; AVX-32-NEXT: .cfi_def_cfa_offset 842; AVX-32-NEXT: .cfi_offset %ebp, -843; AVX-32-NEXT: movl %esp, %ebp44; AVX-32-NEXT: .cfi_def_cfa_register %ebp45; AVX-32-NEXT: andl $-8, %esp46; AVX-32-NEXT: subl $32, %esp47; AVX-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)48; AVX-32-NEXT: vmovhps %xmm0, {{[0-9]+}}(%esp)49; AVX-32-NEXT: vextractf128 $1, %ymm0, %xmm050; AVX-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)51; AVX-32-NEXT: vmovhps %xmm0, (%esp)52; AVX-32-NEXT: fldl {{[0-9]+}}(%esp)53; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)54; AVX-32-NEXT: fldl {{[0-9]+}}(%esp)55; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)56; AVX-32-NEXT: fldl {{[0-9]+}}(%esp)57; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)58; AVX-32-NEXT: fldl (%esp)59; AVX-32-NEXT: fisttpll (%esp)60; AVX-32-NEXT: wait61; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero62; AVX-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm063; AVX-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm064; AVX-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm065; AVX-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero66; AVX-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm167; AVX-32-NEXT: vpinsrd $2, (%esp), %xmm1, %xmm168; AVX-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm169; AVX-32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm070; AVX-32-NEXT: movl %ebp, %esp71; AVX-32-NEXT: popl %ebp72; AVX-32-NEXT: .cfi_def_cfa %esp, 473; AVX-32-NEXT: retl74;75; AVX-64-LABEL: strict_vector_fptosi_v4f64_to_v4i64:76; AVX-64: # %bb.0:77; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm178; AVX-64-NEXT: vcvttsd2si %xmm1, %rax79; AVX-64-NEXT: vmovq %rax, %xmm280; AVX-64-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]81; AVX-64-NEXT: vcvttsd2si %xmm1, %rax82; AVX-64-NEXT: vmovq %rax, %xmm183; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]84; AVX-64-NEXT: vcvttsd2si %xmm0, %rax85; AVX-64-NEXT: vmovq %rax, %xmm286; AVX-64-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]87; AVX-64-NEXT: vcvttsd2si %xmm0, %rax88; AVX-64-NEXT: vmovq %rax, %xmm089; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]90; AVX-64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm091; AVX-64-NEXT: retq92;93; AVX512F-32-LABEL: strict_vector_fptosi_v4f64_to_v4i64:94; AVX512F-32: # %bb.0:95; AVX512F-32-NEXT: pushl %ebp96; AVX512F-32-NEXT: .cfi_def_cfa_offset 897; AVX512F-32-NEXT: .cfi_offset %ebp, -898; AVX512F-32-NEXT: movl %esp, %ebp99; AVX512F-32-NEXT: .cfi_def_cfa_register %ebp100; AVX512F-32-NEXT: andl $-8, %esp101; AVX512F-32-NEXT: subl $32, %esp102; AVX512F-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)103; AVX512F-32-NEXT: vmovhps %xmm0, {{[0-9]+}}(%esp)104; AVX512F-32-NEXT: vextractf128 $1, %ymm0, %xmm0105; AVX512F-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)106; AVX512F-32-NEXT: vmovhps %xmm0, (%esp)107; AVX512F-32-NEXT: fldl {{[0-9]+}}(%esp)108; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)109; AVX512F-32-NEXT: fldl {{[0-9]+}}(%esp)110; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)111; AVX512F-32-NEXT: fldl {{[0-9]+}}(%esp)112; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)113; AVX512F-32-NEXT: fldl (%esp)114; AVX512F-32-NEXT: fisttpll (%esp)115; AVX512F-32-NEXT: wait116; AVX512F-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero117; AVX512F-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0118; AVX512F-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0119; AVX512F-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0120; AVX512F-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero121; AVX512F-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1122; AVX512F-32-NEXT: vpinsrd $2, (%esp), %xmm1, %xmm1123; AVX512F-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1124; AVX512F-32-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0125; AVX512F-32-NEXT: movl %ebp, %esp126; AVX512F-32-NEXT: popl %ebp127; AVX512F-32-NEXT: .cfi_def_cfa %esp, 4128; AVX512F-32-NEXT: retl129;130; AVX512F-64-LABEL: strict_vector_fptosi_v4f64_to_v4i64:131; AVX512F-64: # %bb.0:132; AVX512F-64-NEXT: vextractf128 $1, %ymm0, %xmm1133; AVX512F-64-NEXT: vcvttsd2si %xmm1, %rax134; AVX512F-64-NEXT: vmovq %rax, %xmm2135; AVX512F-64-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]136; AVX512F-64-NEXT: vcvttsd2si %xmm1, %rax137; AVX512F-64-NEXT: vmovq %rax, %xmm1138; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]139; AVX512F-64-NEXT: vcvttsd2si %xmm0, %rax140; AVX512F-64-NEXT: vmovq %rax, %xmm2141; AVX512F-64-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]142; AVX512F-64-NEXT: vcvttsd2si %xmm0, %rax143; AVX512F-64-NEXT: vmovq %rax, %xmm0144; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]145; AVX512F-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0146; AVX512F-64-NEXT: retq147;148; AVX512VL-32-LABEL: strict_vector_fptosi_v4f64_to_v4i64:149; AVX512VL-32: # %bb.0:150; AVX512VL-32-NEXT: pushl %ebp151; AVX512VL-32-NEXT: .cfi_def_cfa_offset 8152; AVX512VL-32-NEXT: .cfi_offset %ebp, -8153; AVX512VL-32-NEXT: movl %esp, %ebp154; AVX512VL-32-NEXT: .cfi_def_cfa_register %ebp155; AVX512VL-32-NEXT: andl $-8, %esp156; AVX512VL-32-NEXT: subl $32, %esp157; AVX512VL-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)158; AVX512VL-32-NEXT: vmovhps %xmm0, {{[0-9]+}}(%esp)159; AVX512VL-32-NEXT: vextractf128 $1, %ymm0, %xmm0160; AVX512VL-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)161; AVX512VL-32-NEXT: vmovhps %xmm0, (%esp)162; AVX512VL-32-NEXT: fldl {{[0-9]+}}(%esp)163; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)164; AVX512VL-32-NEXT: fldl {{[0-9]+}}(%esp)165; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)166; AVX512VL-32-NEXT: fldl {{[0-9]+}}(%esp)167; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)168; AVX512VL-32-NEXT: fldl (%esp)169; AVX512VL-32-NEXT: fisttpll (%esp)170; AVX512VL-32-NEXT: wait171; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero172; AVX512VL-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0173; AVX512VL-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0174; AVX512VL-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0175; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero176; AVX512VL-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1177; AVX512VL-32-NEXT: vpinsrd $2, (%esp), %xmm1, %xmm1178; AVX512VL-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1179; AVX512VL-32-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0180; AVX512VL-32-NEXT: movl %ebp, %esp181; AVX512VL-32-NEXT: popl %ebp182; AVX512VL-32-NEXT: .cfi_def_cfa %esp, 4183; AVX512VL-32-NEXT: retl184;185; AVX512VL-64-LABEL: strict_vector_fptosi_v4f64_to_v4i64:186; AVX512VL-64: # %bb.0:187; AVX512VL-64-NEXT: vextractf128 $1, %ymm0, %xmm1188; AVX512VL-64-NEXT: vcvttsd2si %xmm1, %rax189; AVX512VL-64-NEXT: vmovq %rax, %xmm2190; AVX512VL-64-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]191; AVX512VL-64-NEXT: vcvttsd2si %xmm1, %rax192; AVX512VL-64-NEXT: vmovq %rax, %xmm1193; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]194; AVX512VL-64-NEXT: vcvttsd2si %xmm0, %rax195; AVX512VL-64-NEXT: vmovq %rax, %xmm2196; AVX512VL-64-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]197; AVX512VL-64-NEXT: vcvttsd2si %xmm0, %rax198; AVX512VL-64-NEXT: vmovq %rax, %xmm0199; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]200; AVX512VL-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0201; AVX512VL-64-NEXT: retq202;203; AVX512DQ-LABEL: strict_vector_fptosi_v4f64_to_v4i64:204; AVX512DQ: # %bb.0:205; AVX512DQ-NEXT: vmovaps %ymm0, %ymm0206; AVX512DQ-NEXT: vcvttpd2qq %zmm0, %zmm0207; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0208; AVX512DQ-NEXT: ret{{[l|q]}}209;210; AVX512DQVL-LABEL: strict_vector_fptosi_v4f64_to_v4i64:211; AVX512DQVL: # %bb.0:212; AVX512DQVL-NEXT: vcvttpd2qq %ymm0, %ymm0213; AVX512DQVL-NEXT: ret{{[l|q]}}214 %ret = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(<4 x double> %a,215 metadata !"fpexcept.strict") #0216 ret <4 x i64> %ret217}218 219define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {220; AVX-32-LABEL: strict_vector_fptoui_v4f64_to_v4i64:221; AVX-32: # %bb.0:222; AVX-32-NEXT: pushl %ebp223; AVX-32-NEXT: .cfi_def_cfa_offset 8224; AVX-32-NEXT: .cfi_offset %ebp, -8225; AVX-32-NEXT: movl %esp, %ebp226; AVX-32-NEXT: .cfi_def_cfa_register %ebp227; AVX-32-NEXT: andl $-8, %esp228; AVX-32-NEXT: subl $32, %esp229; AVX-32-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]230; AVX-32-NEXT: vmovsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]231; AVX-32-NEXT: vcomisd %xmm1, %xmm2232; AVX-32-NEXT: vmovapd %xmm1, %xmm3233; AVX-32-NEXT: jae .LBB1_2234; AVX-32-NEXT: # %bb.1:235; AVX-32-NEXT: vxorpd %xmm3, %xmm3, %xmm3236; AVX-32-NEXT: .LBB1_2:237; AVX-32-NEXT: vsubsd %xmm3, %xmm2, %xmm2238; AVX-32-NEXT: vmovsd %xmm2, {{[0-9]+}}(%esp)239; AVX-32-NEXT: fldl {{[0-9]+}}(%esp)240; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)241; AVX-32-NEXT: wait242; AVX-32-NEXT: setae %al243; AVX-32-NEXT: movzbl %al, %eax244; AVX-32-NEXT: shll $31, %eax245; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %eax246; AVX-32-NEXT: vextractf128 $1, %ymm0, %xmm2247; AVX-32-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]248; AVX-32-NEXT: vcomisd %xmm1, %xmm3249; AVX-32-NEXT: vmovapd %xmm1, %xmm4250; AVX-32-NEXT: jae .LBB1_4251; AVX-32-NEXT: # %bb.3:252; AVX-32-NEXT: vxorpd %xmm4, %xmm4, %xmm4253; AVX-32-NEXT: .LBB1_4:254; AVX-32-NEXT: vsubsd %xmm4, %xmm3, %xmm3255; AVX-32-NEXT: vmovsd %xmm3, (%esp)256; AVX-32-NEXT: fldl (%esp)257; AVX-32-NEXT: fisttpll (%esp)258; AVX-32-NEXT: wait259; AVX-32-NEXT: setae %cl260; AVX-32-NEXT: movzbl %cl, %ecx261; AVX-32-NEXT: shll $31, %ecx262; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx263; AVX-32-NEXT: vcomisd %xmm1, %xmm2264; AVX-32-NEXT: vmovapd %xmm1, %xmm3265; AVX-32-NEXT: jae .LBB1_6266; AVX-32-NEXT: # %bb.5:267; AVX-32-NEXT: vxorpd %xmm3, %xmm3, %xmm3268; AVX-32-NEXT: .LBB1_6:269; AVX-32-NEXT: vsubsd %xmm3, %xmm2, %xmm2270; AVX-32-NEXT: vmovsd %xmm2, {{[0-9]+}}(%esp)271; AVX-32-NEXT: fldl {{[0-9]+}}(%esp)272; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)273; AVX-32-NEXT: wait274; AVX-32-NEXT: setae %dl275; AVX-32-NEXT: movzbl %dl, %edx276; AVX-32-NEXT: shll $31, %edx277; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %edx278; AVX-32-NEXT: vcomisd %xmm1, %xmm0279; AVX-32-NEXT: jae .LBB1_8280; AVX-32-NEXT: # %bb.7:281; AVX-32-NEXT: vxorpd %xmm1, %xmm1, %xmm1282; AVX-32-NEXT: .LBB1_8:283; AVX-32-NEXT: vsubsd %xmm1, %xmm0, %xmm0284; AVX-32-NEXT: vmovsd %xmm0, {{[0-9]+}}(%esp)285; AVX-32-NEXT: fldl {{[0-9]+}}(%esp)286; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)287; AVX-32-NEXT: wait288; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero289; AVX-32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0290; AVX-32-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm0291; AVX-32-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0292; AVX-32-NEXT: setae %cl293; AVX-32-NEXT: movzbl %cl, %ecx294; AVX-32-NEXT: shll $31, %ecx295; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx296; AVX-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero297; AVX-32-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1298; AVX-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1299; AVX-32-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1300; AVX-32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0301; AVX-32-NEXT: movl %ebp, %esp302; AVX-32-NEXT: popl %ebp303; AVX-32-NEXT: .cfi_def_cfa %esp, 4304; AVX-32-NEXT: retl305;306; AVX-64-LABEL: strict_vector_fptoui_v4f64_to_v4i64:307; AVX-64: # %bb.0:308; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm3309; AVX-64-NEXT: vmovsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]310; AVX-64-NEXT: vcomisd %xmm1, %xmm3311; AVX-64-NEXT: vxorpd %xmm2, %xmm2, %xmm2312; AVX-64-NEXT: vxorpd %xmm4, %xmm4, %xmm4313; AVX-64-NEXT: jb .LBB1_2314; AVX-64-NEXT: # %bb.1:315; AVX-64-NEXT: vmovapd %xmm1, %xmm4316; AVX-64-NEXT: .LBB1_2:317; AVX-64-NEXT: vsubsd %xmm4, %xmm3, %xmm4318; AVX-64-NEXT: vcvttsd2si %xmm4, %rcx319; AVX-64-NEXT: setae %al320; AVX-64-NEXT: movzbl %al, %eax321; AVX-64-NEXT: shlq $63, %rax322; AVX-64-NEXT: xorq %rcx, %rax323; AVX-64-NEXT: vshufpd {{.*#+}} xmm4 = xmm3[1,0]324; AVX-64-NEXT: vcomisd %xmm1, %xmm4325; AVX-64-NEXT: vxorpd %xmm5, %xmm5, %xmm5326; AVX-64-NEXT: jb .LBB1_4327; AVX-64-NEXT: # %bb.3:328; AVX-64-NEXT: vmovapd %xmm1, %xmm5329; AVX-64-NEXT: .LBB1_4:330; AVX-64-NEXT: vmovq %rax, %xmm3331; AVX-64-NEXT: vsubsd %xmm5, %xmm4, %xmm4332; AVX-64-NEXT: vcvttsd2si %xmm4, %rax333; AVX-64-NEXT: setae %cl334; AVX-64-NEXT: movzbl %cl, %ecx335; AVX-64-NEXT: shlq $63, %rcx336; AVX-64-NEXT: xorq %rax, %rcx337; AVX-64-NEXT: vmovq %rcx, %xmm4338; AVX-64-NEXT: vcomisd %xmm1, %xmm0339; AVX-64-NEXT: vxorpd %xmm5, %xmm5, %xmm5340; AVX-64-NEXT: jb .LBB1_6341; AVX-64-NEXT: # %bb.5:342; AVX-64-NEXT: vmovapd %xmm1, %xmm5343; AVX-64-NEXT: .LBB1_6:344; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]345; AVX-64-NEXT: vsubsd %xmm5, %xmm0, %xmm4346; AVX-64-NEXT: vcvttsd2si %xmm4, %rax347; AVX-64-NEXT: setae %cl348; AVX-64-NEXT: movzbl %cl, %ecx349; AVX-64-NEXT: shlq $63, %rcx350; AVX-64-NEXT: xorq %rax, %rcx351; AVX-64-NEXT: vmovq %rcx, %xmm4352; AVX-64-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]353; AVX-64-NEXT: vcomisd %xmm1, %xmm0354; AVX-64-NEXT: jb .LBB1_8355; AVX-64-NEXT: # %bb.7:356; AVX-64-NEXT: vmovapd %xmm1, %xmm2357; AVX-64-NEXT: .LBB1_8:358; AVX-64-NEXT: vsubsd %xmm2, %xmm0, %xmm0359; AVX-64-NEXT: vcvttsd2si %xmm0, %rax360; AVX-64-NEXT: setae %cl361; AVX-64-NEXT: movzbl %cl, %ecx362; AVX-64-NEXT: shlq $63, %rcx363; AVX-64-NEXT: xorq %rax, %rcx364; AVX-64-NEXT: vmovq %rcx, %xmm0365; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm4[0],xmm0[0]366; AVX-64-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0367; AVX-64-NEXT: retq368;369; AVX512F-32-LABEL: strict_vector_fptoui_v4f64_to_v4i64:370; AVX512F-32: # %bb.0:371; AVX512F-32-NEXT: pushl %ebp372; AVX512F-32-NEXT: .cfi_def_cfa_offset 8373; AVX512F-32-NEXT: .cfi_offset %ebp, -8374; AVX512F-32-NEXT: movl %esp, %ebp375; AVX512F-32-NEXT: .cfi_def_cfa_register %ebp376; AVX512F-32-NEXT: pushl %ebx377; AVX512F-32-NEXT: andl $-8, %esp378; AVX512F-32-NEXT: subl $40, %esp379; AVX512F-32-NEXT: .cfi_offset %ebx, -12380; AVX512F-32-NEXT: vextractf128 $1, %ymm0, %xmm2381; AVX512F-32-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]382; AVX512F-32-NEXT: vmovsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]383; AVX512F-32-NEXT: xorl %eax, %eax384; AVX512F-32-NEXT: vcomisd %xmm1, %xmm3385; AVX512F-32-NEXT: setae %al386; AVX512F-32-NEXT: kmovw %eax, %k1387; AVX512F-32-NEXT: vmovsd %xmm1, %xmm1, %xmm4 {%k1} {z}388; AVX512F-32-NEXT: vsubsd %xmm4, %xmm3, %xmm3389; AVX512F-32-NEXT: vmovsd %xmm3, (%esp)390; AVX512F-32-NEXT: xorl %edx, %edx391; AVX512F-32-NEXT: vcomisd %xmm1, %xmm2392; AVX512F-32-NEXT: setae %dl393; AVX512F-32-NEXT: kmovw %edx, %k1394; AVX512F-32-NEXT: vmovsd %xmm1, %xmm1, %xmm3 {%k1} {z}395; AVX512F-32-NEXT: vsubsd %xmm3, %xmm2, %xmm2396; AVX512F-32-NEXT: vmovsd %xmm2, {{[0-9]+}}(%esp)397; AVX512F-32-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]398; AVX512F-32-NEXT: xorl %ecx, %ecx399; AVX512F-32-NEXT: vcomisd %xmm1, %xmm2400; AVX512F-32-NEXT: setae %cl401; AVX512F-32-NEXT: kmovw %ecx, %k1402; AVX512F-32-NEXT: vmovsd %xmm1, %xmm1, %xmm3 {%k1} {z}403; AVX512F-32-NEXT: vsubsd %xmm3, %xmm2, %xmm2404; AVX512F-32-NEXT: vmovsd %xmm2, {{[0-9]+}}(%esp)405; AVX512F-32-NEXT: xorl %ebx, %ebx406; AVX512F-32-NEXT: vcomisd %xmm1, %xmm0407; AVX512F-32-NEXT: setae %bl408; AVX512F-32-NEXT: kmovw %ebx, %k1409; AVX512F-32-NEXT: vmovsd %xmm1, %xmm1, %xmm1 {%k1} {z}410; AVX512F-32-NEXT: vsubsd %xmm1, %xmm0, %xmm0411; AVX512F-32-NEXT: vmovsd %xmm0, {{[0-9]+}}(%esp)412; AVX512F-32-NEXT: fldl (%esp)413; AVX512F-32-NEXT: fisttpll (%esp)414; AVX512F-32-NEXT: fldl {{[0-9]+}}(%esp)415; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)416; AVX512F-32-NEXT: fldl {{[0-9]+}}(%esp)417; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)418; AVX512F-32-NEXT: fldl {{[0-9]+}}(%esp)419; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)420; AVX512F-32-NEXT: wait421; AVX512F-32-NEXT: shll $31, %eax422; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %eax423; AVX512F-32-NEXT: shll $31, %edx424; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %edx425; AVX512F-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero426; AVX512F-32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0427; AVX512F-32-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm0428; AVX512F-32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0429; AVX512F-32-NEXT: shll $31, %ecx430; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx431; AVX512F-32-NEXT: shll $31, %ebx432; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %ebx433; AVX512F-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero434; AVX512F-32-NEXT: vpinsrd $1, %ebx, %xmm1, %xmm1435; AVX512F-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1436; AVX512F-32-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm1437; AVX512F-32-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0438; AVX512F-32-NEXT: leal -4(%ebp), %esp439; AVX512F-32-NEXT: popl %ebx440; AVX512F-32-NEXT: popl %ebp441; AVX512F-32-NEXT: .cfi_def_cfa %esp, 4442; AVX512F-32-NEXT: retl443;444; AVX512F-64-LABEL: strict_vector_fptoui_v4f64_to_v4i64:445; AVX512F-64: # %bb.0:446; AVX512F-64-NEXT: vextractf128 $1, %ymm0, %xmm1447; AVX512F-64-NEXT: vcvttsd2usi %xmm1, %rax448; AVX512F-64-NEXT: vmovq %rax, %xmm2449; AVX512F-64-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]450; AVX512F-64-NEXT: vcvttsd2usi %xmm1, %rax451; AVX512F-64-NEXT: vmovq %rax, %xmm1452; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]453; AVX512F-64-NEXT: vcvttsd2usi %xmm0, %rax454; AVX512F-64-NEXT: vmovq %rax, %xmm2455; AVX512F-64-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]456; AVX512F-64-NEXT: vcvttsd2usi %xmm0, %rax457; AVX512F-64-NEXT: vmovq %rax, %xmm0458; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]459; AVX512F-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0460; AVX512F-64-NEXT: retq461;462; AVX512VL-32-LABEL: strict_vector_fptoui_v4f64_to_v4i64:463; AVX512VL-32: # %bb.0:464; AVX512VL-32-NEXT: pushl %ebp465; AVX512VL-32-NEXT: .cfi_def_cfa_offset 8466; AVX512VL-32-NEXT: .cfi_offset %ebp, -8467; AVX512VL-32-NEXT: movl %esp, %ebp468; AVX512VL-32-NEXT: .cfi_def_cfa_register %ebp469; AVX512VL-32-NEXT: pushl %ebx470; AVX512VL-32-NEXT: andl $-8, %esp471; AVX512VL-32-NEXT: subl $40, %esp472; AVX512VL-32-NEXT: .cfi_offset %ebx, -12473; AVX512VL-32-NEXT: vextractf128 $1, %ymm0, %xmm2474; AVX512VL-32-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]475; AVX512VL-32-NEXT: vmovsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]476; AVX512VL-32-NEXT: xorl %eax, %eax477; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm3478; AVX512VL-32-NEXT: setae %al479; AVX512VL-32-NEXT: kmovw %eax, %k1480; AVX512VL-32-NEXT: vmovsd %xmm1, %xmm1, %xmm4 {%k1} {z}481; AVX512VL-32-NEXT: vsubsd %xmm4, %xmm3, %xmm3482; AVX512VL-32-NEXT: vmovsd %xmm3, (%esp)483; AVX512VL-32-NEXT: xorl %edx, %edx484; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm2485; AVX512VL-32-NEXT: setae %dl486; AVX512VL-32-NEXT: kmovw %edx, %k1487; AVX512VL-32-NEXT: vmovsd %xmm1, %xmm1, %xmm3 {%k1} {z}488; AVX512VL-32-NEXT: vsubsd %xmm3, %xmm2, %xmm2489; AVX512VL-32-NEXT: vmovsd %xmm2, {{[0-9]+}}(%esp)490; AVX512VL-32-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]491; AVX512VL-32-NEXT: xorl %ecx, %ecx492; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm2493; AVX512VL-32-NEXT: setae %cl494; AVX512VL-32-NEXT: kmovw %ecx, %k1495; AVX512VL-32-NEXT: vmovsd %xmm1, %xmm1, %xmm3 {%k1} {z}496; AVX512VL-32-NEXT: vsubsd %xmm3, %xmm2, %xmm2497; AVX512VL-32-NEXT: vmovsd %xmm2, {{[0-9]+}}(%esp)498; AVX512VL-32-NEXT: xorl %ebx, %ebx499; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm0500; AVX512VL-32-NEXT: setae %bl501; AVX512VL-32-NEXT: kmovw %ebx, %k1502; AVX512VL-32-NEXT: vmovsd %xmm1, %xmm1, %xmm1 {%k1} {z}503; AVX512VL-32-NEXT: vsubsd %xmm1, %xmm0, %xmm0504; AVX512VL-32-NEXT: vmovsd %xmm0, {{[0-9]+}}(%esp)505; AVX512VL-32-NEXT: fldl (%esp)506; AVX512VL-32-NEXT: fisttpll (%esp)507; AVX512VL-32-NEXT: fldl {{[0-9]+}}(%esp)508; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)509; AVX512VL-32-NEXT: fldl {{[0-9]+}}(%esp)510; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)511; AVX512VL-32-NEXT: fldl {{[0-9]+}}(%esp)512; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)513; AVX512VL-32-NEXT: wait514; AVX512VL-32-NEXT: shll $31, %eax515; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %eax516; AVX512VL-32-NEXT: shll $31, %edx517; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %edx518; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero519; AVX512VL-32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0520; AVX512VL-32-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm0521; AVX512VL-32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0522; AVX512VL-32-NEXT: shll $31, %ecx523; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx524; AVX512VL-32-NEXT: shll $31, %ebx525; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %ebx526; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero527; AVX512VL-32-NEXT: vpinsrd $1, %ebx, %xmm1, %xmm1528; AVX512VL-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1529; AVX512VL-32-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm1530; AVX512VL-32-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0531; AVX512VL-32-NEXT: leal -4(%ebp), %esp532; AVX512VL-32-NEXT: popl %ebx533; AVX512VL-32-NEXT: popl %ebp534; AVX512VL-32-NEXT: .cfi_def_cfa %esp, 4535; AVX512VL-32-NEXT: retl536;537; AVX512VL-64-LABEL: strict_vector_fptoui_v4f64_to_v4i64:538; AVX512VL-64: # %bb.0:539; AVX512VL-64-NEXT: vextractf128 $1, %ymm0, %xmm1540; AVX512VL-64-NEXT: vcvttsd2usi %xmm1, %rax541; AVX512VL-64-NEXT: vmovq %rax, %xmm2542; AVX512VL-64-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]543; AVX512VL-64-NEXT: vcvttsd2usi %xmm1, %rax544; AVX512VL-64-NEXT: vmovq %rax, %xmm1545; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]546; AVX512VL-64-NEXT: vcvttsd2usi %xmm0, %rax547; AVX512VL-64-NEXT: vmovq %rax, %xmm2548; AVX512VL-64-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]549; AVX512VL-64-NEXT: vcvttsd2usi %xmm0, %rax550; AVX512VL-64-NEXT: vmovq %rax, %xmm0551; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]552; AVX512VL-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0553; AVX512VL-64-NEXT: retq554;555; AVX512DQ-LABEL: strict_vector_fptoui_v4f64_to_v4i64:556; AVX512DQ: # %bb.0:557; AVX512DQ-NEXT: vmovaps %ymm0, %ymm0558; AVX512DQ-NEXT: vcvttpd2uqq %zmm0, %zmm0559; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0560; AVX512DQ-NEXT: ret{{[l|q]}}561;562; AVX512DQVL-LABEL: strict_vector_fptoui_v4f64_to_v4i64:563; AVX512DQVL: # %bb.0:564; AVX512DQVL-NEXT: vcvttpd2uqq %ymm0, %ymm0565; AVX512DQVL-NEXT: ret{{[l|q]}}566 %ret = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(<4 x double> %a,567 metadata !"fpexcept.strict") #0568 ret <4 x i64> %ret569}570 571define <4 x i64> @strict_vector_fptosi_v4f32_to_v4i64(<4 x float> %a) #0 {572; AVX-32-LABEL: strict_vector_fptosi_v4f32_to_v4i64:573; AVX-32: # %bb.0:574; AVX-32-NEXT: pushl %ebp575; AVX-32-NEXT: .cfi_def_cfa_offset 8576; AVX-32-NEXT: .cfi_offset %ebp, -8577; AVX-32-NEXT: movl %esp, %ebp578; AVX-32-NEXT: .cfi_def_cfa_register %ebp579; AVX-32-NEXT: andl $-8, %esp580; AVX-32-NEXT: subl $32, %esp581; AVX-32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp)582; AVX-32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp)583; AVX-32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp)584; AVX-32-NEXT: vextractps $3, %xmm0, (%esp)585; AVX-32-NEXT: flds {{[0-9]+}}(%esp)586; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)587; AVX-32-NEXT: flds {{[0-9]+}}(%esp)588; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)589; AVX-32-NEXT: flds {{[0-9]+}}(%esp)590; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)591; AVX-32-NEXT: flds (%esp)592; AVX-32-NEXT: fisttpll (%esp)593; AVX-32-NEXT: wait594; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero595; AVX-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0596; AVX-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0597; AVX-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0598; AVX-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero599; AVX-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1600; AVX-32-NEXT: vpinsrd $2, (%esp), %xmm1, %xmm1601; AVX-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1602; AVX-32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0603; AVX-32-NEXT: movl %ebp, %esp604; AVX-32-NEXT: popl %ebp605; AVX-32-NEXT: .cfi_def_cfa %esp, 4606; AVX-32-NEXT: retl607;608; AVX-64-LABEL: strict_vector_fptosi_v4f32_to_v4i64:609; AVX-64: # %bb.0:610; AVX-64-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]611; AVX-64-NEXT: vcvttss2si %xmm1, %rax612; AVX-64-NEXT: vmovq %rax, %xmm1613; AVX-64-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]614; AVX-64-NEXT: vcvttss2si %xmm2, %rax615; AVX-64-NEXT: vmovq %rax, %xmm2616; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]617; AVX-64-NEXT: vcvttss2si %xmm0, %rax618; AVX-64-NEXT: vmovq %rax, %xmm2619; AVX-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]620; AVX-64-NEXT: vcvttss2si %xmm0, %rax621; AVX-64-NEXT: vmovq %rax, %xmm0622; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]623; AVX-64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0624; AVX-64-NEXT: retq625;626; AVX512F-32-LABEL: strict_vector_fptosi_v4f32_to_v4i64:627; AVX512F-32: # %bb.0:628; AVX512F-32-NEXT: pushl %ebp629; AVX512F-32-NEXT: .cfi_def_cfa_offset 8630; AVX512F-32-NEXT: .cfi_offset %ebp, -8631; AVX512F-32-NEXT: movl %esp, %ebp632; AVX512F-32-NEXT: .cfi_def_cfa_register %ebp633; AVX512F-32-NEXT: andl $-8, %esp634; AVX512F-32-NEXT: subl $32, %esp635; AVX512F-32-NEXT: vmovd %xmm0, {{[0-9]+}}(%esp)636; AVX512F-32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp)637; AVX512F-32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp)638; AVX512F-32-NEXT: vextractps $3, %xmm0, (%esp)639; AVX512F-32-NEXT: flds {{[0-9]+}}(%esp)640; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)641; AVX512F-32-NEXT: flds {{[0-9]+}}(%esp)642; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)643; AVX512F-32-NEXT: flds {{[0-9]+}}(%esp)644; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)645; AVX512F-32-NEXT: flds (%esp)646; AVX512F-32-NEXT: fisttpll (%esp)647; AVX512F-32-NEXT: wait648; AVX512F-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero649; AVX512F-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0650; AVX512F-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0651; AVX512F-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0652; AVX512F-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero653; AVX512F-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1654; AVX512F-32-NEXT: vpinsrd $2, (%esp), %xmm1, %xmm1655; AVX512F-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1656; AVX512F-32-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0657; AVX512F-32-NEXT: movl %ebp, %esp658; AVX512F-32-NEXT: popl %ebp659; AVX512F-32-NEXT: .cfi_def_cfa %esp, 4660; AVX512F-32-NEXT: retl661;662; AVX512F-64-LABEL: strict_vector_fptosi_v4f32_to_v4i64:663; AVX512F-64: # %bb.0:664; AVX512F-64-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]665; AVX512F-64-NEXT: vcvttss2si %xmm1, %rax666; AVX512F-64-NEXT: vmovq %rax, %xmm1667; AVX512F-64-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]668; AVX512F-64-NEXT: vcvttss2si %xmm2, %rax669; AVX512F-64-NEXT: vmovq %rax, %xmm2670; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]671; AVX512F-64-NEXT: vcvttss2si %xmm0, %rax672; AVX512F-64-NEXT: vmovq %rax, %xmm2673; AVX512F-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]674; AVX512F-64-NEXT: vcvttss2si %xmm0, %rax675; AVX512F-64-NEXT: vmovq %rax, %xmm0676; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]677; AVX512F-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0678; AVX512F-64-NEXT: retq679;680; AVX512VL-32-LABEL: strict_vector_fptosi_v4f32_to_v4i64:681; AVX512VL-32: # %bb.0:682; AVX512VL-32-NEXT: pushl %ebp683; AVX512VL-32-NEXT: .cfi_def_cfa_offset 8684; AVX512VL-32-NEXT: .cfi_offset %ebp, -8685; AVX512VL-32-NEXT: movl %esp, %ebp686; AVX512VL-32-NEXT: .cfi_def_cfa_register %ebp687; AVX512VL-32-NEXT: andl $-8, %esp688; AVX512VL-32-NEXT: subl $32, %esp689; AVX512VL-32-NEXT: vmovd %xmm0, {{[0-9]+}}(%esp)690; AVX512VL-32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp)691; AVX512VL-32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp)692; AVX512VL-32-NEXT: vextractps $3, %xmm0, (%esp)693; AVX512VL-32-NEXT: flds {{[0-9]+}}(%esp)694; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)695; AVX512VL-32-NEXT: flds {{[0-9]+}}(%esp)696; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)697; AVX512VL-32-NEXT: flds {{[0-9]+}}(%esp)698; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)699; AVX512VL-32-NEXT: flds (%esp)700; AVX512VL-32-NEXT: fisttpll (%esp)701; AVX512VL-32-NEXT: wait702; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero703; AVX512VL-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0704; AVX512VL-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0705; AVX512VL-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0706; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero707; AVX512VL-32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1708; AVX512VL-32-NEXT: vpinsrd $2, (%esp), %xmm1, %xmm1709; AVX512VL-32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1710; AVX512VL-32-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0711; AVX512VL-32-NEXT: movl %ebp, %esp712; AVX512VL-32-NEXT: popl %ebp713; AVX512VL-32-NEXT: .cfi_def_cfa %esp, 4714; AVX512VL-32-NEXT: retl715;716; AVX512VL-64-LABEL: strict_vector_fptosi_v4f32_to_v4i64:717; AVX512VL-64: # %bb.0:718; AVX512VL-64-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]719; AVX512VL-64-NEXT: vcvttss2si %xmm1, %rax720; AVX512VL-64-NEXT: vmovq %rax, %xmm1721; AVX512VL-64-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]722; AVX512VL-64-NEXT: vcvttss2si %xmm2, %rax723; AVX512VL-64-NEXT: vmovq %rax, %xmm2724; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]725; AVX512VL-64-NEXT: vcvttss2si %xmm0, %rax726; AVX512VL-64-NEXT: vmovq %rax, %xmm2727; AVX512VL-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]728; AVX512VL-64-NEXT: vcvttss2si %xmm0, %rax729; AVX512VL-64-NEXT: vmovq %rax, %xmm0730; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]731; AVX512VL-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0732; AVX512VL-64-NEXT: retq733;734; AVX512DQ-LABEL: strict_vector_fptosi_v4f32_to_v4i64:735; AVX512DQ: # %bb.0:736; AVX512DQ-NEXT: vmovaps %xmm0, %xmm0737; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0738; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0739; AVX512DQ-NEXT: ret{{[l|q]}}740;741; AVX512DQVL-LABEL: strict_vector_fptosi_v4f32_to_v4i64:742; AVX512DQVL: # %bb.0:743; AVX512DQVL-NEXT: vcvttps2qq %xmm0, %ymm0744; AVX512DQVL-NEXT: ret{{[l|q]}}745 %ret = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(<4 x float> %a,746 metadata !"fpexcept.strict") #0747 ret <4 x i64> %ret748}749 750define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {751; AVX-32-LABEL: strict_vector_fptoui_v4f32_to_v4i64:752; AVX-32: # %bb.0:753; AVX-32-NEXT: pushl %ebp754; AVX-32-NEXT: .cfi_def_cfa_offset 8755; AVX-32-NEXT: .cfi_offset %ebp, -8756; AVX-32-NEXT: movl %esp, %ebp757; AVX-32-NEXT: .cfi_def_cfa_register %ebp758; AVX-32-NEXT: andl $-8, %esp759; AVX-32-NEXT: subl $32, %esp760; AVX-32-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]761; AVX-32-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]762; AVX-32-NEXT: vcomiss %xmm1, %xmm2763; AVX-32-NEXT: vmovaps %xmm1, %xmm3764; AVX-32-NEXT: jae .LBB3_2765; AVX-32-NEXT: # %bb.1:766; AVX-32-NEXT: vxorps %xmm3, %xmm3, %xmm3767; AVX-32-NEXT: .LBB3_2:768; AVX-32-NEXT: vsubss %xmm3, %xmm2, %xmm2769; AVX-32-NEXT: vmovss %xmm2, {{[0-9]+}}(%esp)770; AVX-32-NEXT: flds {{[0-9]+}}(%esp)771; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)772; AVX-32-NEXT: wait773; AVX-32-NEXT: setae %al774; AVX-32-NEXT: movzbl %al, %eax775; AVX-32-NEXT: shll $31, %eax776; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %eax777; AVX-32-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]778; AVX-32-NEXT: vcomiss %xmm1, %xmm2779; AVX-32-NEXT: vmovaps %xmm1, %xmm3780; AVX-32-NEXT: jae .LBB3_4781; AVX-32-NEXT: # %bb.3:782; AVX-32-NEXT: vxorps %xmm3, %xmm3, %xmm3783; AVX-32-NEXT: .LBB3_4:784; AVX-32-NEXT: vsubss %xmm3, %xmm2, %xmm2785; AVX-32-NEXT: vmovss %xmm2, (%esp)786; AVX-32-NEXT: flds (%esp)787; AVX-32-NEXT: fisttpll (%esp)788; AVX-32-NEXT: wait789; AVX-32-NEXT: setae %cl790; AVX-32-NEXT: movzbl %cl, %ecx791; AVX-32-NEXT: shll $31, %ecx792; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx793; AVX-32-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]794; AVX-32-NEXT: vcomiss %xmm1, %xmm2795; AVX-32-NEXT: vmovaps %xmm1, %xmm3796; AVX-32-NEXT: jae .LBB3_6797; AVX-32-NEXT: # %bb.5:798; AVX-32-NEXT: vxorps %xmm3, %xmm3, %xmm3799; AVX-32-NEXT: .LBB3_6:800; AVX-32-NEXT: vsubss %xmm3, %xmm2, %xmm2801; AVX-32-NEXT: vmovss %xmm2, {{[0-9]+}}(%esp)802; AVX-32-NEXT: flds {{[0-9]+}}(%esp)803; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)804; AVX-32-NEXT: wait805; AVX-32-NEXT: setae %dl806; AVX-32-NEXT: movzbl %dl, %edx807; AVX-32-NEXT: shll $31, %edx808; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %edx809; AVX-32-NEXT: vcomiss %xmm1, %xmm0810; AVX-32-NEXT: jae .LBB3_8811; AVX-32-NEXT: # %bb.7:812; AVX-32-NEXT: vxorps %xmm1, %xmm1, %xmm1813; AVX-32-NEXT: .LBB3_8:814; AVX-32-NEXT: vsubss %xmm1, %xmm0, %xmm0815; AVX-32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp)816; AVX-32-NEXT: flds {{[0-9]+}}(%esp)817; AVX-32-NEXT: fisttpll {{[0-9]+}}(%esp)818; AVX-32-NEXT: wait819; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero820; AVX-32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0821; AVX-32-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm0822; AVX-32-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0823; AVX-32-NEXT: setae %cl824; AVX-32-NEXT: movzbl %cl, %ecx825; AVX-32-NEXT: shll $31, %ecx826; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx827; AVX-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero828; AVX-32-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1829; AVX-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1830; AVX-32-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1831; AVX-32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0832; AVX-32-NEXT: movl %ebp, %esp833; AVX-32-NEXT: popl %ebp834; AVX-32-NEXT: .cfi_def_cfa %esp, 4835; AVX-32-NEXT: retl836;837; AVX-64-LABEL: strict_vector_fptoui_v4f32_to_v4i64:838; AVX-64: # %bb.0:839; AVX-64-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]840; AVX-64-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]841; AVX-64-NEXT: vcomiss %xmm1, %xmm3842; AVX-64-NEXT: vxorps %xmm2, %xmm2, %xmm2843; AVX-64-NEXT: vxorps %xmm4, %xmm4, %xmm4844; AVX-64-NEXT: jb .LBB3_2845; AVX-64-NEXT: # %bb.1:846; AVX-64-NEXT: vmovaps %xmm1, %xmm4847; AVX-64-NEXT: .LBB3_2:848; AVX-64-NEXT: vsubss %xmm4, %xmm3, %xmm3849; AVX-64-NEXT: vcvttss2si %xmm3, %rcx850; AVX-64-NEXT: setae %al851; AVX-64-NEXT: movzbl %al, %eax852; AVX-64-NEXT: shlq $63, %rax853; AVX-64-NEXT: xorq %rcx, %rax854; AVX-64-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]855; AVX-64-NEXT: vcomiss %xmm1, %xmm4856; AVX-64-NEXT: vxorps %xmm5, %xmm5, %xmm5857; AVX-64-NEXT: jb .LBB3_4858; AVX-64-NEXT: # %bb.3:859; AVX-64-NEXT: vmovaps %xmm1, %xmm5860; AVX-64-NEXT: .LBB3_4:861; AVX-64-NEXT: vmovq %rax, %xmm3862; AVX-64-NEXT: vsubss %xmm5, %xmm4, %xmm4863; AVX-64-NEXT: vcvttss2si %xmm4, %rax864; AVX-64-NEXT: setae %cl865; AVX-64-NEXT: movzbl %cl, %ecx866; AVX-64-NEXT: shlq $63, %rcx867; AVX-64-NEXT: xorq %rax, %rcx868; AVX-64-NEXT: vmovq %rcx, %xmm4869; AVX-64-NEXT: vcomiss %xmm1, %xmm0870; AVX-64-NEXT: vxorps %xmm5, %xmm5, %xmm5871; AVX-64-NEXT: jb .LBB3_6872; AVX-64-NEXT: # %bb.5:873; AVX-64-NEXT: vmovaps %xmm1, %xmm5874; AVX-64-NEXT: .LBB3_6:875; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]876; AVX-64-NEXT: vsubss %xmm5, %xmm0, %xmm4877; AVX-64-NEXT: vcvttss2si %xmm4, %rax878; AVX-64-NEXT: setae %cl879; AVX-64-NEXT: movzbl %cl, %ecx880; AVX-64-NEXT: shlq $63, %rcx881; AVX-64-NEXT: xorq %rax, %rcx882; AVX-64-NEXT: vmovq %rcx, %xmm4883; AVX-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]884; AVX-64-NEXT: vcomiss %xmm1, %xmm0885; AVX-64-NEXT: jb .LBB3_8886; AVX-64-NEXT: # %bb.7:887; AVX-64-NEXT: vmovaps %xmm1, %xmm2888; AVX-64-NEXT: .LBB3_8:889; AVX-64-NEXT: vsubss %xmm2, %xmm0, %xmm0890; AVX-64-NEXT: vcvttss2si %xmm0, %rax891; AVX-64-NEXT: setae %cl892; AVX-64-NEXT: movzbl %cl, %ecx893; AVX-64-NEXT: shlq $63, %rcx894; AVX-64-NEXT: xorq %rax, %rcx895; AVX-64-NEXT: vmovq %rcx, %xmm0896; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm4[0],xmm0[0]897; AVX-64-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0898; AVX-64-NEXT: retq899;900; AVX512F-32-LABEL: strict_vector_fptoui_v4f32_to_v4i64:901; AVX512F-32: # %bb.0:902; AVX512F-32-NEXT: pushl %ebp903; AVX512F-32-NEXT: .cfi_def_cfa_offset 8904; AVX512F-32-NEXT: .cfi_offset %ebp, -8905; AVX512F-32-NEXT: movl %esp, %ebp906; AVX512F-32-NEXT: .cfi_def_cfa_register %ebp907; AVX512F-32-NEXT: pushl %ebx908; AVX512F-32-NEXT: andl $-8, %esp909; AVX512F-32-NEXT: subl $40, %esp910; AVX512F-32-NEXT: .cfi_offset %ebx, -12911; AVX512F-32-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]912; AVX512F-32-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]913; AVX512F-32-NEXT: xorl %eax, %eax914; AVX512F-32-NEXT: vcomiss %xmm1, %xmm2915; AVX512F-32-NEXT: setae %al916; AVX512F-32-NEXT: kmovw %eax, %k1917; AVX512F-32-NEXT: vmovss %xmm1, %xmm1, %xmm3 {%k1} {z}918; AVX512F-32-NEXT: vsubss %xmm3, %xmm2, %xmm2919; AVX512F-32-NEXT: vmovss %xmm2, (%esp)920; AVX512F-32-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]921; AVX512F-32-NEXT: xorl %edx, %edx922; AVX512F-32-NEXT: vcomiss %xmm1, %xmm2923; AVX512F-32-NEXT: setae %dl924; AVX512F-32-NEXT: kmovw %edx, %k1925; AVX512F-32-NEXT: vmovss %xmm1, %xmm1, %xmm3 {%k1} {z}926; AVX512F-32-NEXT: vsubss %xmm3, %xmm2, %xmm2927; AVX512F-32-NEXT: vmovss %xmm2, {{[0-9]+}}(%esp)928; AVX512F-32-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]929; AVX512F-32-NEXT: xorl %ecx, %ecx930; AVX512F-32-NEXT: vcomiss %xmm1, %xmm2931; AVX512F-32-NEXT: setae %cl932; AVX512F-32-NEXT: kmovw %ecx, %k1933; AVX512F-32-NEXT: vmovss %xmm1, %xmm1, %xmm3 {%k1} {z}934; AVX512F-32-NEXT: vsubss %xmm3, %xmm2, %xmm2935; AVX512F-32-NEXT: vmovss %xmm2, {{[0-9]+}}(%esp)936; AVX512F-32-NEXT: xorl %ebx, %ebx937; AVX512F-32-NEXT: vcomiss %xmm1, %xmm0938; AVX512F-32-NEXT: setae %bl939; AVX512F-32-NEXT: kmovw %ebx, %k1940; AVX512F-32-NEXT: vmovss %xmm1, %xmm1, %xmm1 {%k1} {z}941; AVX512F-32-NEXT: vsubss %xmm1, %xmm0, %xmm0942; AVX512F-32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp)943; AVX512F-32-NEXT: flds (%esp)944; AVX512F-32-NEXT: fisttpll (%esp)945; AVX512F-32-NEXT: flds {{[0-9]+}}(%esp)946; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)947; AVX512F-32-NEXT: flds {{[0-9]+}}(%esp)948; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)949; AVX512F-32-NEXT: flds {{[0-9]+}}(%esp)950; AVX512F-32-NEXT: fisttpll {{[0-9]+}}(%esp)951; AVX512F-32-NEXT: wait952; AVX512F-32-NEXT: shll $31, %eax953; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %eax954; AVX512F-32-NEXT: shll $31, %edx955; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %edx956; AVX512F-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero957; AVX512F-32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0958; AVX512F-32-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm0959; AVX512F-32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0960; AVX512F-32-NEXT: shll $31, %ecx961; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx962; AVX512F-32-NEXT: shll $31, %ebx963; AVX512F-32-NEXT: xorl {{[0-9]+}}(%esp), %ebx964; AVX512F-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero965; AVX512F-32-NEXT: vpinsrd $1, %ebx, %xmm1, %xmm1966; AVX512F-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1967; AVX512F-32-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm1968; AVX512F-32-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0969; AVX512F-32-NEXT: leal -4(%ebp), %esp970; AVX512F-32-NEXT: popl %ebx971; AVX512F-32-NEXT: popl %ebp972; AVX512F-32-NEXT: .cfi_def_cfa %esp, 4973; AVX512F-32-NEXT: retl974;975; AVX512F-64-LABEL: strict_vector_fptoui_v4f32_to_v4i64:976; AVX512F-64: # %bb.0:977; AVX512F-64-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]978; AVX512F-64-NEXT: vcvttss2usi %xmm1, %rax979; AVX512F-64-NEXT: vmovq %rax, %xmm1980; AVX512F-64-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]981; AVX512F-64-NEXT: vcvttss2usi %xmm2, %rax982; AVX512F-64-NEXT: vmovq %rax, %xmm2983; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]984; AVX512F-64-NEXT: vcvttss2usi %xmm0, %rax985; AVX512F-64-NEXT: vmovq %rax, %xmm2986; AVX512F-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]987; AVX512F-64-NEXT: vcvttss2usi %xmm0, %rax988; AVX512F-64-NEXT: vmovq %rax, %xmm0989; AVX512F-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]990; AVX512F-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0991; AVX512F-64-NEXT: retq992;993; AVX512VL-32-LABEL: strict_vector_fptoui_v4f32_to_v4i64:994; AVX512VL-32: # %bb.0:995; AVX512VL-32-NEXT: pushl %ebp996; AVX512VL-32-NEXT: .cfi_def_cfa_offset 8997; AVX512VL-32-NEXT: .cfi_offset %ebp, -8998; AVX512VL-32-NEXT: movl %esp, %ebp999; AVX512VL-32-NEXT: .cfi_def_cfa_register %ebp1000; AVX512VL-32-NEXT: pushl %ebx1001; AVX512VL-32-NEXT: andl $-8, %esp1002; AVX512VL-32-NEXT: subl $40, %esp1003; AVX512VL-32-NEXT: .cfi_offset %ebx, -121004; AVX512VL-32-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]1005; AVX512VL-32-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]1006; AVX512VL-32-NEXT: xorl %eax, %eax1007; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm21008; AVX512VL-32-NEXT: setae %al1009; AVX512VL-32-NEXT: kmovw %eax, %k11010; AVX512VL-32-NEXT: vmovss %xmm1, %xmm1, %xmm3 {%k1} {z}1011; AVX512VL-32-NEXT: vsubss %xmm3, %xmm2, %xmm21012; AVX512VL-32-NEXT: vmovss %xmm2, (%esp)1013; AVX512VL-32-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1014; AVX512VL-32-NEXT: xorl %edx, %edx1015; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm21016; AVX512VL-32-NEXT: setae %dl1017; AVX512VL-32-NEXT: kmovw %edx, %k11018; AVX512VL-32-NEXT: vmovss %xmm1, %xmm1, %xmm3 {%k1} {z}1019; AVX512VL-32-NEXT: vsubss %xmm3, %xmm2, %xmm21020; AVX512VL-32-NEXT: vmovss %xmm2, {{[0-9]+}}(%esp)1021; AVX512VL-32-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]1022; AVX512VL-32-NEXT: xorl %ecx, %ecx1023; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm21024; AVX512VL-32-NEXT: setae %cl1025; AVX512VL-32-NEXT: kmovw %ecx, %k11026; AVX512VL-32-NEXT: vmovss %xmm1, %xmm1, %xmm3 {%k1} {z}1027; AVX512VL-32-NEXT: vsubss %xmm3, %xmm2, %xmm21028; AVX512VL-32-NEXT: vmovss %xmm2, {{[0-9]+}}(%esp)1029; AVX512VL-32-NEXT: xorl %ebx, %ebx1030; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm01031; AVX512VL-32-NEXT: setae %bl1032; AVX512VL-32-NEXT: kmovw %ebx, %k11033; AVX512VL-32-NEXT: vmovss %xmm1, %xmm1, %xmm1 {%k1} {z}1034; AVX512VL-32-NEXT: vsubss %xmm1, %xmm0, %xmm01035; AVX512VL-32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp)1036; AVX512VL-32-NEXT: flds (%esp)1037; AVX512VL-32-NEXT: fisttpll (%esp)1038; AVX512VL-32-NEXT: flds {{[0-9]+}}(%esp)1039; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)1040; AVX512VL-32-NEXT: flds {{[0-9]+}}(%esp)1041; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)1042; AVX512VL-32-NEXT: flds {{[0-9]+}}(%esp)1043; AVX512VL-32-NEXT: fisttpll {{[0-9]+}}(%esp)1044; AVX512VL-32-NEXT: wait1045; AVX512VL-32-NEXT: shll $31, %eax1046; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %eax1047; AVX512VL-32-NEXT: shll $31, %edx1048; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %edx1049; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero1050; AVX512VL-32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm01051; AVX512VL-32-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm01052; AVX512VL-32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm01053; AVX512VL-32-NEXT: shll $31, %ecx1054; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx1055; AVX512VL-32-NEXT: shll $31, %ebx1056; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %ebx1057; AVX512VL-32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero1058; AVX512VL-32-NEXT: vpinsrd $1, %ebx, %xmm1, %xmm11059; AVX512VL-32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm11060; AVX512VL-32-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm11061; AVX512VL-32-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm01062; AVX512VL-32-NEXT: leal -4(%ebp), %esp1063; AVX512VL-32-NEXT: popl %ebx1064; AVX512VL-32-NEXT: popl %ebp1065; AVX512VL-32-NEXT: .cfi_def_cfa %esp, 41066; AVX512VL-32-NEXT: retl1067;1068; AVX512VL-64-LABEL: strict_vector_fptoui_v4f32_to_v4i64:1069; AVX512VL-64: # %bb.0:1070; AVX512VL-64-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]1071; AVX512VL-64-NEXT: vcvttss2usi %xmm1, %rax1072; AVX512VL-64-NEXT: vmovq %rax, %xmm11073; AVX512VL-64-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1074; AVX512VL-64-NEXT: vcvttss2usi %xmm2, %rax1075; AVX512VL-64-NEXT: vmovq %rax, %xmm21076; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]1077; AVX512VL-64-NEXT: vcvttss2usi %xmm0, %rax1078; AVX512VL-64-NEXT: vmovq %rax, %xmm21079; AVX512VL-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]1080; AVX512VL-64-NEXT: vcvttss2usi %xmm0, %rax1081; AVX512VL-64-NEXT: vmovq %rax, %xmm01082; AVX512VL-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]1083; AVX512VL-64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm01084; AVX512VL-64-NEXT: retq1085;1086; AVX512DQ-LABEL: strict_vector_fptoui_v4f32_to_v4i64:1087; AVX512DQ: # %bb.0:1088; AVX512DQ-NEXT: vmovaps %xmm0, %xmm01089; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm01090; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm01091; AVX512DQ-NEXT: ret{{[l|q]}}1092;1093; AVX512DQVL-LABEL: strict_vector_fptoui_v4f32_to_v4i64:1094; AVX512DQVL: # %bb.0:1095; AVX512DQVL-NEXT: vcvttps2uqq %xmm0, %ymm01096; AVX512DQVL-NEXT: ret{{[l|q]}}1097 %ret = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(<4 x float> %a,1098 metadata !"fpexcept.strict") #01099 ret <4 x i64> %ret1100}1101 1102define <4 x i32> @strict_vector_fptosi_v4f64_to_v4i32(<4 x double> %a) #0 {1103; CHECK-LABEL: strict_vector_fptosi_v4f64_to_v4i32:1104; CHECK: # %bb.0:1105; CHECK-NEXT: vcvttpd2dq %ymm0, %xmm01106; CHECK-NEXT: vzeroupper1107; CHECK-NEXT: ret{{[l|q]}}1108 %ret = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(<4 x double> %a,1109 metadata !"fpexcept.strict") #01110 ret <4 x i32> %ret1111}1112 1113define <4 x i32> @strict_vector_fptoui_v4f64_to_v4i32(<4 x double> %a) #0 {1114; AVX-LABEL: strict_vector_fptoui_v4f64_to_v4i32:1115; AVX: # %bb.0:1116; AVX-NEXT: vbroadcastsd {{.*#+}} ymm1 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]1117; AVX-NEXT: vcmpltpd %ymm1, %ymm0, %ymm21118; AVX-NEXT: vextractf128 $1, %ymm2, %xmm31119; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm2[0,2],xmm3[0,2]1120; AVX-NEXT: vxorps %xmm4, %xmm4, %xmm41121; AVX-NEXT: vbroadcastss {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]1122; AVX-NEXT: vblendvps %xmm3, %xmm4, %xmm5, %xmm31123; AVX-NEXT: vxorps %xmm4, %xmm4, %xmm41124; AVX-NEXT: vblendvpd %ymm2, %ymm4, %ymm1, %ymm11125; AVX-NEXT: vsubpd %ymm1, %ymm0, %ymm01126; AVX-NEXT: vcvttpd2dq %ymm0, %xmm01127; AVX-NEXT: vxorpd %xmm3, %xmm0, %xmm01128; AVX-NEXT: vzeroupper1129; AVX-NEXT: ret{{[l|q]}}1130;1131; AVX512F-LABEL: strict_vector_fptoui_v4f64_to_v4i32:1132; AVX512F: # %bb.0:1133; AVX512F-NEXT: vmovaps %ymm0, %ymm01134; AVX512F-NEXT: vcvttpd2udq %zmm0, %ymm01135; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01136; AVX512F-NEXT: vzeroupper1137; AVX512F-NEXT: ret{{[l|q]}}1138;1139; AVX512VL-LABEL: strict_vector_fptoui_v4f64_to_v4i32:1140; AVX512VL: # %bb.0:1141; AVX512VL-NEXT: vcvttpd2udq %ymm0, %xmm01142; AVX512VL-NEXT: vzeroupper1143; AVX512VL-NEXT: ret{{[l|q]}}1144;1145; AVX512DQ-LABEL: strict_vector_fptoui_v4f64_to_v4i32:1146; AVX512DQ: # %bb.0:1147; AVX512DQ-NEXT: vmovaps %ymm0, %ymm01148; AVX512DQ-NEXT: vcvttpd2udq %zmm0, %ymm01149; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01150; AVX512DQ-NEXT: vzeroupper1151; AVX512DQ-NEXT: ret{{[l|q]}}1152;1153; AVX512DQVL-LABEL: strict_vector_fptoui_v4f64_to_v4i32:1154; AVX512DQVL: # %bb.0:1155; AVX512DQVL-NEXT: vcvttpd2udq %ymm0, %xmm01156; AVX512DQVL-NEXT: vzeroupper1157; AVX512DQVL-NEXT: ret{{[l|q]}}1158 %ret = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(<4 x double> %a,1159 metadata !"fpexcept.strict") #01160 ret <4 x i32> %ret1161}1162 1163define <4 x i16> @strict_vector_fptosi_v4f64_to_v4i16(<4 x double> %a) #0 {1164; CHECK-LABEL: strict_vector_fptosi_v4f64_to_v4i16:1165; CHECK: # %bb.0:1166; CHECK-NEXT: vcvttpd2dq %ymm0, %xmm01167; CHECK-NEXT: vpackssdw %xmm0, %xmm0, %xmm01168; CHECK-NEXT: vzeroupper1169; CHECK-NEXT: ret{{[l|q]}}1170 %ret = call <4 x i16> @llvm.experimental.constrained.fptosi.v4i16.v4f64(<4 x double> %a,1171 metadata !"fpexcept.strict") #01172 ret <4 x i16> %ret1173}1174 1175define <4 x i16> @strict_vector_fptoui_v4f64_to_v4i16(<4 x double> %a) #0 {1176; CHECK-LABEL: strict_vector_fptoui_v4f64_to_v4i16:1177; CHECK: # %bb.0:1178; CHECK-NEXT: vcvttpd2dq %ymm0, %xmm01179; CHECK-NEXT: vpackusdw %xmm0, %xmm0, %xmm01180; CHECK-NEXT: vzeroupper1181; CHECK-NEXT: ret{{[l|q]}}1182 %ret = call <4 x i16> @llvm.experimental.constrained.fptoui.v4i16.v4f64(<4 x double> %a,1183 metadata !"fpexcept.strict") #01184 ret <4 x i16> %ret1185}1186 1187define <4 x i8> @strict_vector_fptosi_v4f64_to_v4i8(<4 x double> %a) #0 {1188; AVX-LABEL: strict_vector_fptosi_v4f64_to_v4i8:1189; AVX: # %bb.0:1190; AVX-NEXT: vcvttpd2dq %ymm0, %xmm01191; AVX-NEXT: vpackssdw %xmm0, %xmm0, %xmm01192; AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm01193; AVX-NEXT: vzeroupper1194; AVX-NEXT: ret{{[l|q]}}1195;1196; AVX512F-LABEL: strict_vector_fptosi_v4f64_to_v4i8:1197; AVX512F: # %bb.0:1198; AVX512F-NEXT: vcvttpd2dq %ymm0, %xmm01199; AVX512F-NEXT: vpackssdw %xmm0, %xmm0, %xmm01200; AVX512F-NEXT: vpacksswb %xmm0, %xmm0, %xmm01201; AVX512F-NEXT: vzeroupper1202; AVX512F-NEXT: ret{{[l|q]}}1203;1204; AVX512VL-LABEL: strict_vector_fptosi_v4f64_to_v4i8:1205; AVX512VL: # %bb.0:1206; AVX512VL-NEXT: vcvttpd2dq %ymm0, %xmm01207; AVX512VL-NEXT: vpmovdb %xmm0, %xmm01208; AVX512VL-NEXT: vzeroupper1209; AVX512VL-NEXT: ret{{[l|q]}}1210;1211; AVX512DQ-LABEL: strict_vector_fptosi_v4f64_to_v4i8:1212; AVX512DQ: # %bb.0:1213; AVX512DQ-NEXT: vcvttpd2dq %ymm0, %xmm01214; AVX512DQ-NEXT: vpackssdw %xmm0, %xmm0, %xmm01215; AVX512DQ-NEXT: vpacksswb %xmm0, %xmm0, %xmm01216; AVX512DQ-NEXT: vzeroupper1217; AVX512DQ-NEXT: ret{{[l|q]}}1218;1219; AVX512DQVL-LABEL: strict_vector_fptosi_v4f64_to_v4i8:1220; AVX512DQVL: # %bb.0:1221; AVX512DQVL-NEXT: vcvttpd2dq %ymm0, %xmm01222; AVX512DQVL-NEXT: vpmovdb %xmm0, %xmm01223; AVX512DQVL-NEXT: vzeroupper1224; AVX512DQVL-NEXT: ret{{[l|q]}}1225 %ret = call <4 x i8> @llvm.experimental.constrained.fptosi.v4i8.v4f64(<4 x double> %a,1226 metadata !"fpexcept.strict") #01227 ret <4 x i8> %ret1228}1229 1230define <4 x i8> @strict_vector_fptoui_v4f64_to_v4i8(<4 x double> %a) #0 {1231; AVX-LABEL: strict_vector_fptoui_v4f64_to_v4i8:1232; AVX: # %bb.0:1233; AVX-NEXT: vcvttpd2dq %ymm0, %xmm01234; AVX-NEXT: vpackusdw %xmm0, %xmm0, %xmm01235; AVX-NEXT: vpackuswb %xmm0, %xmm0, %xmm01236; AVX-NEXT: vzeroupper1237; AVX-NEXT: ret{{[l|q]}}1238;1239; AVX512F-LABEL: strict_vector_fptoui_v4f64_to_v4i8:1240; AVX512F: # %bb.0:1241; AVX512F-NEXT: vcvttpd2dq %ymm0, %xmm01242; AVX512F-NEXT: vpackusdw %xmm0, %xmm0, %xmm01243; AVX512F-NEXT: vpackuswb %xmm0, %xmm0, %xmm01244; AVX512F-NEXT: vzeroupper1245; AVX512F-NEXT: ret{{[l|q]}}1246;1247; AVX512VL-LABEL: strict_vector_fptoui_v4f64_to_v4i8:1248; AVX512VL: # %bb.0:1249; AVX512VL-NEXT: vcvttpd2dq %ymm0, %xmm01250; AVX512VL-NEXT: vpmovdb %xmm0, %xmm01251; AVX512VL-NEXT: vzeroupper1252; AVX512VL-NEXT: ret{{[l|q]}}1253;1254; AVX512DQ-LABEL: strict_vector_fptoui_v4f64_to_v4i8:1255; AVX512DQ: # %bb.0:1256; AVX512DQ-NEXT: vcvttpd2dq %ymm0, %xmm01257; AVX512DQ-NEXT: vpackusdw %xmm0, %xmm0, %xmm01258; AVX512DQ-NEXT: vpackuswb %xmm0, %xmm0, %xmm01259; AVX512DQ-NEXT: vzeroupper1260; AVX512DQ-NEXT: ret{{[l|q]}}1261;1262; AVX512DQVL-LABEL: strict_vector_fptoui_v4f64_to_v4i8:1263; AVX512DQVL: # %bb.0:1264; AVX512DQVL-NEXT: vcvttpd2dq %ymm0, %xmm01265; AVX512DQVL-NEXT: vpmovdb %xmm0, %xmm01266; AVX512DQVL-NEXT: vzeroupper1267; AVX512DQVL-NEXT: ret{{[l|q]}}1268 %ret = call <4 x i8> @llvm.experimental.constrained.fptoui.v4i8.v4f64(<4 x double> %a,1269 metadata !"fpexcept.strict") #01270 ret <4 x i8> %ret1271}1272 1273define <4 x i1> @strict_vector_fptosi_v4f64_to_v4i1(<4 x double> %a) #0 {1274; AVX-LABEL: strict_vector_fptosi_v4f64_to_v4i1:1275; AVX: # %bb.0:1276; AVX-NEXT: vcvttpd2dq %ymm0, %xmm01277; AVX-NEXT: vzeroupper1278; AVX-NEXT: ret{{[l|q]}}1279;1280; AVX512F-LABEL: strict_vector_fptosi_v4f64_to_v4i1:1281; AVX512F: # %bb.0:1282; AVX512F-NEXT: vcvttpd2dq %ymm0, %xmm01283; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k11284; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -11285; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm01286; AVX512F-NEXT: vzeroupper1287; AVX512F-NEXT: ret{{[l|q]}}1288;1289; AVX512VL-LABEL: strict_vector_fptosi_v4f64_to_v4i1:1290; AVX512VL: # %bb.0:1291; AVX512VL-NEXT: vcvttpd2dq %ymm0, %xmm01292; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k11293; AVX512VL-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm01294; AVX512VL-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}1295; AVX512VL-NEXT: vzeroupper1296; AVX512VL-NEXT: ret{{[l|q]}}1297;1298; AVX512DQ-LABEL: strict_vector_fptosi_v4f64_to_v4i1:1299; AVX512DQ: # %bb.0:1300; AVX512DQ-NEXT: vcvttpd2dq %ymm0, %xmm01301; AVX512DQ-NEXT: vpmovd2m %zmm0, %k01302; AVX512DQ-NEXT: vpmovm2d %k0, %zmm01303; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm01304; AVX512DQ-NEXT: vzeroupper1305; AVX512DQ-NEXT: ret{{[l|q]}}1306;1307; AVX512DQVL-LABEL: strict_vector_fptosi_v4f64_to_v4i1:1308; AVX512DQVL: # %bb.0:1309; AVX512DQVL-NEXT: vcvttpd2dq %ymm0, %xmm01310; AVX512DQVL-NEXT: vpmovd2m %xmm0, %k01311; AVX512DQVL-NEXT: vpmovm2d %k0, %xmm01312; AVX512DQVL-NEXT: vzeroupper1313; AVX512DQVL-NEXT: ret{{[l|q]}}1314 %ret = call <4 x i1> @llvm.experimental.constrained.fptosi.v4i1.v4f64(<4 x double> %a,1315 metadata !"fpexcept.strict") #01316 ret <4 x i1> %ret1317}1318 1319define <4 x i1> @strict_vector_fptoui_v4f64_to_v4i1(<4 x double> %a) #0 {1320; AVX-LABEL: strict_vector_fptoui_v4f64_to_v4i1:1321; AVX: # %bb.0:1322; AVX-NEXT: vcvttpd2dq %ymm0, %xmm01323; AVX-NEXT: vzeroupper1324; AVX-NEXT: ret{{[l|q]}}1325;1326; AVX512F-LABEL: strict_vector_fptoui_v4f64_to_v4i1:1327; AVX512F: # %bb.0:1328; AVX512F-NEXT: vcvttpd2dq %ymm0, %xmm01329; AVX512F-NEXT: vpslld $31, %xmm0, %xmm01330; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k11331; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -11332; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm01333; AVX512F-NEXT: vzeroupper1334; AVX512F-NEXT: ret{{[l|q]}}1335;1336; AVX512VL-LABEL: strict_vector_fptoui_v4f64_to_v4i1:1337; AVX512VL: # %bb.0:1338; AVX512VL-NEXT: vcvttpd2dq %ymm0, %xmm01339; AVX512VL-NEXT: vpslld $31, %xmm0, %xmm01340; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k11341; AVX512VL-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm01342; AVX512VL-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}1343; AVX512VL-NEXT: vzeroupper1344; AVX512VL-NEXT: ret{{[l|q]}}1345;1346; AVX512DQ-LABEL: strict_vector_fptoui_v4f64_to_v4i1:1347; AVX512DQ: # %bb.0:1348; AVX512DQ-NEXT: vcvttpd2dq %ymm0, %xmm01349; AVX512DQ-NEXT: vpslld $31, %xmm0, %xmm01350; AVX512DQ-NEXT: vpmovd2m %zmm0, %k01351; AVX512DQ-NEXT: vpmovm2d %k0, %zmm01352; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm01353; AVX512DQ-NEXT: vzeroupper1354; AVX512DQ-NEXT: ret{{[l|q]}}1355;1356; AVX512DQVL-LABEL: strict_vector_fptoui_v4f64_to_v4i1:1357; AVX512DQVL: # %bb.0:1358; AVX512DQVL-NEXT: vcvttpd2dq %ymm0, %xmm01359; AVX512DQVL-NEXT: vpslld $31, %xmm0, %xmm01360; AVX512DQVL-NEXT: vpmovd2m %xmm0, %k01361; AVX512DQVL-NEXT: vpmovm2d %k0, %xmm01362; AVX512DQVL-NEXT: vzeroupper1363; AVX512DQVL-NEXT: ret{{[l|q]}}1364 %ret = call <4 x i1> @llvm.experimental.constrained.fptoui.v4i1.v4f64(<4 x double> %a,1365 metadata !"fpexcept.strict") #01366 ret <4 x i1> %ret1367}1368 1369define <8 x i32> @strict_vector_fptosi_v8f32_to_v8i32(<8 x float> %a) #0 {1370; CHECK-LABEL: strict_vector_fptosi_v8f32_to_v8i32:1371; CHECK: # %bb.0:1372; CHECK-NEXT: vcvttps2dq %ymm0, %ymm01373; CHECK-NEXT: ret{{[l|q]}}1374 %ret = call <8 x i32> @llvm.experimental.constrained.fptosi.v8i32.v8f32(<8 x float> %a,1375 metadata !"fpexcept.strict") #01376 ret <8 x i32> %ret1377}1378 1379define <8 x i32> @strict_vector_fptoui_v8f32_to_v8i32(<8 x float> %a) #0 {1380; AVX-LABEL: strict_vector_fptoui_v8f32_to_v8i32:1381; AVX: # %bb.0:1382; AVX-NEXT: vbroadcastss {{.*#+}} ymm1 = [2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9]1383; AVX-NEXT: vcmpltps %ymm1, %ymm0, %ymm21384; AVX-NEXT: vxorps %xmm3, %xmm3, %xmm31385; AVX-NEXT: vbroadcastss {{.*#+}} ymm4 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]1386; AVX-NEXT: vblendvps %ymm2, %ymm3, %ymm4, %ymm41387; AVX-NEXT: vblendvps %ymm2, %ymm3, %ymm1, %ymm11388; AVX-NEXT: vsubps %ymm1, %ymm0, %ymm01389; AVX-NEXT: vcvttps2dq %ymm0, %ymm01390; AVX-NEXT: vxorps %ymm4, %ymm0, %ymm01391; AVX-NEXT: ret{{[l|q]}}1392;1393; AVX512F-LABEL: strict_vector_fptoui_v8f32_to_v8i32:1394; AVX512F: # %bb.0:1395; AVX512F-NEXT: vmovaps %ymm0, %ymm01396; AVX512F-NEXT: vcvttps2udq %zmm0, %zmm01397; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm01398; AVX512F-NEXT: ret{{[l|q]}}1399;1400; AVX512VL-LABEL: strict_vector_fptoui_v8f32_to_v8i32:1401; AVX512VL: # %bb.0:1402; AVX512VL-NEXT: vcvttps2udq %ymm0, %ymm01403; AVX512VL-NEXT: ret{{[l|q]}}1404;1405; AVX512DQ-LABEL: strict_vector_fptoui_v8f32_to_v8i32:1406; AVX512DQ: # %bb.0:1407; AVX512DQ-NEXT: vmovaps %ymm0, %ymm01408; AVX512DQ-NEXT: vcvttps2udq %zmm0, %zmm01409; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm01410; AVX512DQ-NEXT: ret{{[l|q]}}1411;1412; AVX512DQVL-LABEL: strict_vector_fptoui_v8f32_to_v8i32:1413; AVX512DQVL: # %bb.0:1414; AVX512DQVL-NEXT: vcvttps2udq %ymm0, %ymm01415; AVX512DQVL-NEXT: ret{{[l|q]}}1416 %ret = call <8 x i32> @llvm.experimental.constrained.fptoui.v8i32.v8f32(<8 x float> %a,1417 metadata !"fpexcept.strict") #01418 ret <8 x i32> %ret1419}1420 1421define <8 x i16> @strict_vector_fptosi_v8f32_to_v8i16(<8 x float> %a) #0 {1422; AVX-LABEL: strict_vector_fptosi_v8f32_to_v8i16:1423; AVX: # %bb.0:1424; AVX-NEXT: vcvttps2dq %ymm0, %ymm01425; AVX-NEXT: vextractf128 $1, %ymm0, %xmm11426; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm01427; AVX-NEXT: vzeroupper1428; AVX-NEXT: ret{{[l|q]}}1429;1430; AVX512F-LABEL: strict_vector_fptosi_v8f32_to_v8i16:1431; AVX512F: # %bb.0:1432; AVX512F-NEXT: vcvttps2dq %ymm0, %ymm01433; AVX512F-NEXT: vpmovdw %zmm0, %ymm01434; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01435; AVX512F-NEXT: vzeroupper1436; AVX512F-NEXT: ret{{[l|q]}}1437;1438; AVX512VL-LABEL: strict_vector_fptosi_v8f32_to_v8i16:1439; AVX512VL: # %bb.0:1440; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm01441; AVX512VL-NEXT: vpmovdw %ymm0, %xmm01442; AVX512VL-NEXT: vzeroupper1443; AVX512VL-NEXT: ret{{[l|q]}}1444;1445; AVX512DQ-LABEL: strict_vector_fptosi_v8f32_to_v8i16:1446; AVX512DQ: # %bb.0:1447; AVX512DQ-NEXT: vcvttps2dq %ymm0, %ymm01448; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm01449; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01450; AVX512DQ-NEXT: vzeroupper1451; AVX512DQ-NEXT: ret{{[l|q]}}1452;1453; AVX512DQVL-LABEL: strict_vector_fptosi_v8f32_to_v8i16:1454; AVX512DQVL: # %bb.0:1455; AVX512DQVL-NEXT: vcvttps2dq %ymm0, %ymm01456; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm01457; AVX512DQVL-NEXT: vzeroupper1458; AVX512DQVL-NEXT: ret{{[l|q]}}1459 %ret = call <8 x i16> @llvm.experimental.constrained.fptosi.v8i16.v8f32(<8 x float> %a,1460 metadata !"fpexcept.strict") #01461 ret <8 x i16> %ret1462}1463 1464define <8 x i16> @strict_vector_fptoui_v8f32_to_v8i16(<8 x float> %a) #0 {1465; AVX-LABEL: strict_vector_fptoui_v8f32_to_v8i16:1466; AVX: # %bb.0:1467; AVX-NEXT: vcvttps2dq %ymm0, %ymm01468; AVX-NEXT: vextractf128 $1, %ymm0, %xmm11469; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm01470; AVX-NEXT: vzeroupper1471; AVX-NEXT: ret{{[l|q]}}1472;1473; AVX512F-LABEL: strict_vector_fptoui_v8f32_to_v8i16:1474; AVX512F: # %bb.0:1475; AVX512F-NEXT: vcvttps2dq %ymm0, %ymm01476; AVX512F-NEXT: vpmovdw %zmm0, %ymm01477; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01478; AVX512F-NEXT: vzeroupper1479; AVX512F-NEXT: ret{{[l|q]}}1480;1481; AVX512VL-LABEL: strict_vector_fptoui_v8f32_to_v8i16:1482; AVX512VL: # %bb.0:1483; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm01484; AVX512VL-NEXT: vpmovdw %ymm0, %xmm01485; AVX512VL-NEXT: vzeroupper1486; AVX512VL-NEXT: ret{{[l|q]}}1487;1488; AVX512DQ-LABEL: strict_vector_fptoui_v8f32_to_v8i16:1489; AVX512DQ: # %bb.0:1490; AVX512DQ-NEXT: vcvttps2dq %ymm0, %ymm01491; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm01492; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01493; AVX512DQ-NEXT: vzeroupper1494; AVX512DQ-NEXT: ret{{[l|q]}}1495;1496; AVX512DQVL-LABEL: strict_vector_fptoui_v8f32_to_v8i16:1497; AVX512DQVL: # %bb.0:1498; AVX512DQVL-NEXT: vcvttps2dq %ymm0, %ymm01499; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm01500; AVX512DQVL-NEXT: vzeroupper1501; AVX512DQVL-NEXT: ret{{[l|q]}}1502 %ret = call <8 x i16> @llvm.experimental.constrained.fptoui.v8i16.v8f32(<8 x float> %a,1503 metadata !"fpexcept.strict") #01504 ret <8 x i16> %ret1505}1506 1507define <8 x i8> @strict_vector_fptosi_v8f32_to_v8i8(<8 x float> %a) #0 {1508; AVX-LABEL: strict_vector_fptosi_v8f32_to_v8i8:1509; AVX: # %bb.0:1510; AVX-NEXT: vcvttps2dq %ymm0, %ymm01511; AVX-NEXT: vextractf128 $1, %ymm0, %xmm11512; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm01513; AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm01514; AVX-NEXT: vzeroupper1515; AVX-NEXT: ret{{[l|q]}}1516;1517; AVX512F-LABEL: strict_vector_fptosi_v8f32_to_v8i8:1518; AVX512F: # %bb.0:1519; AVX512F-NEXT: vcvttps2dq %ymm0, %ymm01520; AVX512F-NEXT: vpmovdb %zmm0, %xmm01521; AVX512F-NEXT: vzeroupper1522; AVX512F-NEXT: ret{{[l|q]}}1523;1524; AVX512VL-LABEL: strict_vector_fptosi_v8f32_to_v8i8:1525; AVX512VL: # %bb.0:1526; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm01527; AVX512VL-NEXT: vpmovdb %ymm0, %xmm01528; AVX512VL-NEXT: vzeroupper1529; AVX512VL-NEXT: ret{{[l|q]}}1530;1531; AVX512DQ-LABEL: strict_vector_fptosi_v8f32_to_v8i8:1532; AVX512DQ: # %bb.0:1533; AVX512DQ-NEXT: vcvttps2dq %ymm0, %ymm01534; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm01535; AVX512DQ-NEXT: vzeroupper1536; AVX512DQ-NEXT: ret{{[l|q]}}1537;1538; AVX512DQVL-LABEL: strict_vector_fptosi_v8f32_to_v8i8:1539; AVX512DQVL: # %bb.0:1540; AVX512DQVL-NEXT: vcvttps2dq %ymm0, %ymm01541; AVX512DQVL-NEXT: vpmovdb %ymm0, %xmm01542; AVX512DQVL-NEXT: vzeroupper1543; AVX512DQVL-NEXT: ret{{[l|q]}}1544 %ret = call <8 x i8> @llvm.experimental.constrained.fptosi.v8i8.v8f32(<8 x float> %a,1545 metadata !"fpexcept.strict") #01546 ret <8 x i8> %ret1547}1548 1549define <8 x i8> @strict_vector_fptoui_v8f32_to_v8i8(<8 x float> %a) #0 {1550; AVX-LABEL: strict_vector_fptoui_v8f32_to_v8i8:1551; AVX: # %bb.0:1552; AVX-NEXT: vcvttps2dq %ymm0, %ymm01553; AVX-NEXT: vextractf128 $1, %ymm0, %xmm11554; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm01555; AVX-NEXT: vpackuswb %xmm0, %xmm0, %xmm01556; AVX-NEXT: vzeroupper1557; AVX-NEXT: ret{{[l|q]}}1558;1559; AVX512F-LABEL: strict_vector_fptoui_v8f32_to_v8i8:1560; AVX512F: # %bb.0:1561; AVX512F-NEXT: vcvttps2dq %ymm0, %ymm01562; AVX512F-NEXT: vpmovdb %zmm0, %xmm01563; AVX512F-NEXT: vzeroupper1564; AVX512F-NEXT: ret{{[l|q]}}1565;1566; AVX512VL-LABEL: strict_vector_fptoui_v8f32_to_v8i8:1567; AVX512VL: # %bb.0:1568; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm01569; AVX512VL-NEXT: vpmovdb %ymm0, %xmm01570; AVX512VL-NEXT: vzeroupper1571; AVX512VL-NEXT: ret{{[l|q]}}1572;1573; AVX512DQ-LABEL: strict_vector_fptoui_v8f32_to_v8i8:1574; AVX512DQ: # %bb.0:1575; AVX512DQ-NEXT: vcvttps2dq %ymm0, %ymm01576; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm01577; AVX512DQ-NEXT: vzeroupper1578; AVX512DQ-NEXT: ret{{[l|q]}}1579;1580; AVX512DQVL-LABEL: strict_vector_fptoui_v8f32_to_v8i8:1581; AVX512DQVL: # %bb.0:1582; AVX512DQVL-NEXT: vcvttps2dq %ymm0, %ymm01583; AVX512DQVL-NEXT: vpmovdb %ymm0, %xmm01584; AVX512DQVL-NEXT: vzeroupper1585; AVX512DQVL-NEXT: ret{{[l|q]}}1586 %ret = call <8 x i8> @llvm.experimental.constrained.fptoui.v8i8.v8f32(<8 x float> %a,1587 metadata !"fpexcept.strict") #01588 ret <8 x i8> %ret1589}1590 1591define <8 x i1> @strict_vector_fptosi_v8f32_to_v8i1(<8 x float> %a) #0 {1592; AVX-LABEL: strict_vector_fptosi_v8f32_to_v8i1:1593; AVX: # %bb.0:1594; AVX-NEXT: vcvttps2dq %ymm0, %ymm01595; AVX-NEXT: vextractf128 $1, %ymm0, %xmm11596; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm01597; AVX-NEXT: vzeroupper1598; AVX-NEXT: ret{{[l|q]}}1599;1600; AVX512F-LABEL: strict_vector_fptosi_v8f32_to_v8i1:1601; AVX512F: # %bb.0:1602; AVX512F-NEXT: vcvttps2dq %ymm0, %ymm01603; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k11604; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -11605; AVX512F-NEXT: vpmovdw %zmm0, %ymm01606; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01607; AVX512F-NEXT: vzeroupper1608; AVX512F-NEXT: ret{{[l|q]}}1609;1610; AVX512VL-LABEL: strict_vector_fptosi_v8f32_to_v8i1:1611; AVX512VL: # %bb.0:1612; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm01613; AVX512VL-NEXT: vptestmd %ymm0, %ymm0, %k11614; AVX512VL-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm01615; AVX512VL-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z}1616; AVX512VL-NEXT: vpmovdw %ymm0, %xmm01617; AVX512VL-NEXT: vzeroupper1618; AVX512VL-NEXT: ret{{[l|q]}}1619;1620; AVX512DQ-LABEL: strict_vector_fptosi_v8f32_to_v8i1:1621; AVX512DQ: # %bb.0:1622; AVX512DQ-NEXT: vcvttps2dq %ymm0, %ymm01623; AVX512DQ-NEXT: vpmovd2m %zmm0, %k01624; AVX512DQ-NEXT: vpmovm2d %k0, %zmm01625; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm01626; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01627; AVX512DQ-NEXT: vzeroupper1628; AVX512DQ-NEXT: ret{{[l|q]}}1629;1630; AVX512DQVL-LABEL: strict_vector_fptosi_v8f32_to_v8i1:1631; AVX512DQVL: # %bb.0:1632; AVX512DQVL-NEXT: vcvttps2dq %ymm0, %ymm01633; AVX512DQVL-NEXT: vpmovd2m %ymm0, %k01634; AVX512DQVL-NEXT: vpmovm2d %k0, %ymm01635; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm01636; AVX512DQVL-NEXT: vzeroupper1637; AVX512DQVL-NEXT: ret{{[l|q]}}1638 %ret = call <8 x i1> @llvm.experimental.constrained.fptosi.v8i1.v8f32(<8 x float> %a,1639 metadata !"fpexcept.strict") #01640 ret <8 x i1> %ret1641}1642 1643define <8 x i1> @strict_vector_fptoui_v8f32_to_v8i1(<8 x float> %a) #0 {1644; AVX-LABEL: strict_vector_fptoui_v8f32_to_v8i1:1645; AVX: # %bb.0:1646; AVX-NEXT: vcvttps2dq %ymm0, %ymm01647; AVX-NEXT: vextractf128 $1, %ymm0, %xmm11648; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm01649; AVX-NEXT: vzeroupper1650; AVX-NEXT: ret{{[l|q]}}1651;1652; AVX512F-LABEL: strict_vector_fptoui_v8f32_to_v8i1:1653; AVX512F: # %bb.0:1654; AVX512F-NEXT: vcvttps2dq %ymm0, %ymm01655; AVX512F-NEXT: vpslld $31, %ymm0, %ymm01656; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k11657; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -11658; AVX512F-NEXT: vpmovdw %zmm0, %ymm01659; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01660; AVX512F-NEXT: vzeroupper1661; AVX512F-NEXT: ret{{[l|q]}}1662;1663; AVX512VL-LABEL: strict_vector_fptoui_v8f32_to_v8i1:1664; AVX512VL: # %bb.0:1665; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm01666; AVX512VL-NEXT: vpslld $31, %ymm0, %ymm01667; AVX512VL-NEXT: vptestmd %ymm0, %ymm0, %k11668; AVX512VL-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm01669; AVX512VL-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z}1670; AVX512VL-NEXT: vpmovdw %ymm0, %xmm01671; AVX512VL-NEXT: vzeroupper1672; AVX512VL-NEXT: ret{{[l|q]}}1673;1674; AVX512DQ-LABEL: strict_vector_fptoui_v8f32_to_v8i1:1675; AVX512DQ: # %bb.0:1676; AVX512DQ-NEXT: vcvttps2dq %ymm0, %ymm01677; AVX512DQ-NEXT: vpslld $31, %ymm0, %ymm01678; AVX512DQ-NEXT: vpmovd2m %zmm0, %k01679; AVX512DQ-NEXT: vpmovm2d %k0, %zmm01680; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm01681; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm01682; AVX512DQ-NEXT: vzeroupper1683; AVX512DQ-NEXT: ret{{[l|q]}}1684;1685; AVX512DQVL-LABEL: strict_vector_fptoui_v8f32_to_v8i1:1686; AVX512DQVL: # %bb.0:1687; AVX512DQVL-NEXT: vcvttps2dq %ymm0, %ymm01688; AVX512DQVL-NEXT: vpslld $31, %ymm0, %ymm01689; AVX512DQVL-NEXT: vpmovd2m %ymm0, %k01690; AVX512DQVL-NEXT: vpmovm2d %k0, %ymm01691; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm01692; AVX512DQVL-NEXT: vzeroupper1693; AVX512DQVL-NEXT: ret{{[l|q]}}1694 %ret = call <8 x i1> @llvm.experimental.constrained.fptoui.v8i1.v8f32(<8 x float> %a,1695 metadata !"fpexcept.strict") #01696 ret <8 x i1> %ret1697}1698 1699attributes #0 = { strictfp }1700