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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE3; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX4; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE5; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX6 7define void @fptrunc_frommem2(ptr %in, ptr %out) {8; X86-SSE-LABEL: fptrunc_frommem2:9; X86-SSE: # %bb.0: # %entry10; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax11; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx12; X86-SSE-NEXT: cvtpd2ps (%ecx), %xmm013; X86-SSE-NEXT: movlpd %xmm0, (%eax)14; X86-SSE-NEXT: retl15;16; X86-AVX-LABEL: fptrunc_frommem2:17; X86-AVX: # %bb.0: # %entry18; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax19; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx20; X86-AVX-NEXT: vcvtpd2psx (%ecx), %xmm021; X86-AVX-NEXT: vmovlpd %xmm0, (%eax)22; X86-AVX-NEXT: retl23;24; X64-SSE-LABEL: fptrunc_frommem2:25; X64-SSE: # %bb.0: # %entry26; X64-SSE-NEXT: cvtpd2ps (%rdi), %xmm027; X64-SSE-NEXT: movlpd %xmm0, (%rsi)28; X64-SSE-NEXT: retq29;30; X64-AVX-LABEL: fptrunc_frommem2:31; X64-AVX: # %bb.0: # %entry32; X64-AVX-NEXT: vcvtpd2psx (%rdi), %xmm033; X64-AVX-NEXT: vmovlpd %xmm0, (%rsi)34; X64-AVX-NEXT: retq35entry:36 %0 = load <2 x double>, ptr %in37 %1 = fptrunc <2 x double> %0 to <2 x float>38 store <2 x float> %1, ptr %out, align 139 ret void40}41 42define void @fptrunc_frommem4(ptr %in, ptr %out) {43; X86-SSE-LABEL: fptrunc_frommem4:44; X86-SSE: # %bb.0: # %entry45; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax46; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx47; X86-SSE-NEXT: cvtpd2ps 16(%ecx), %xmm048; X86-SSE-NEXT: cvtpd2ps (%ecx), %xmm149; X86-SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]50; X86-SSE-NEXT: movupd %xmm1, (%eax)51; X86-SSE-NEXT: retl52;53; X86-AVX-LABEL: fptrunc_frommem4:54; X86-AVX: # %bb.0: # %entry55; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax56; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx57; X86-AVX-NEXT: vcvtpd2psy (%ecx), %xmm058; X86-AVX-NEXT: vmovupd %xmm0, (%eax)59; X86-AVX-NEXT: retl60;61; X64-SSE-LABEL: fptrunc_frommem4:62; X64-SSE: # %bb.0: # %entry63; X64-SSE-NEXT: cvtpd2ps 16(%rdi), %xmm064; X64-SSE-NEXT: cvtpd2ps (%rdi), %xmm165; X64-SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]66; X64-SSE-NEXT: movupd %xmm1, (%rsi)67; X64-SSE-NEXT: retq68;69; X64-AVX-LABEL: fptrunc_frommem4:70; X64-AVX: # %bb.0: # %entry71; X64-AVX-NEXT: vcvtpd2psy (%rdi), %xmm072; X64-AVX-NEXT: vmovupd %xmm0, (%rsi)73; X64-AVX-NEXT: retq74entry:75 %0 = load <4 x double>, ptr %in76 %1 = fptrunc <4 x double> %0 to <4 x float>77 store <4 x float> %1, ptr %out, align 178 ret void79}80 81define void @fptrunc_frommem8(ptr %in, ptr %out) {82; X86-SSE-LABEL: fptrunc_frommem8:83; X86-SSE: # %bb.0: # %entry84; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax85; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx86; X86-SSE-NEXT: cvtpd2ps 16(%ecx), %xmm087; X86-SSE-NEXT: cvtpd2ps (%ecx), %xmm188; X86-SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]89; X86-SSE-NEXT: cvtpd2ps 48(%ecx), %xmm090; X86-SSE-NEXT: cvtpd2ps 32(%ecx), %xmm291; X86-SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm0[0]92; X86-SSE-NEXT: movupd %xmm2, 16(%eax)93; X86-SSE-NEXT: movupd %xmm1, (%eax)94; X86-SSE-NEXT: retl95;96; X86-AVX-LABEL: fptrunc_frommem8:97; X86-AVX: # %bb.0: # %entry98; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax99; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx100; X86-AVX-NEXT: vcvtpd2psy (%ecx), %xmm0101; X86-AVX-NEXT: vcvtpd2psy 32(%ecx), %xmm1102; X86-AVX-NEXT: vmovupd %xmm1, 16(%eax)103; X86-AVX-NEXT: vmovupd %xmm0, (%eax)104; X86-AVX-NEXT: retl105;106; X64-SSE-LABEL: fptrunc_frommem8:107; X64-SSE: # %bb.0: # %entry108; X64-SSE-NEXT: cvtpd2ps 16(%rdi), %xmm0109; X64-SSE-NEXT: cvtpd2ps (%rdi), %xmm1110; X64-SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]111; X64-SSE-NEXT: cvtpd2ps 48(%rdi), %xmm0112; X64-SSE-NEXT: cvtpd2ps 32(%rdi), %xmm2113; X64-SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm0[0]114; X64-SSE-NEXT: movupd %xmm2, 16(%rsi)115; X64-SSE-NEXT: movupd %xmm1, (%rsi)116; X64-SSE-NEXT: retq117;118; X64-AVX-LABEL: fptrunc_frommem8:119; X64-AVX: # %bb.0: # %entry120; X64-AVX-NEXT: vcvtpd2psy (%rdi), %xmm0121; X64-AVX-NEXT: vcvtpd2psy 32(%rdi), %xmm1122; X64-AVX-NEXT: vmovupd %xmm1, 16(%rsi)123; X64-AVX-NEXT: vmovupd %xmm0, (%rsi)124; X64-AVX-NEXT: retq125entry:126 %0 = load <8 x double>, ptr %in127 %1 = fptrunc <8 x double> %0 to <8 x float>128 store <8 x float> %1, ptr %out, align 1129 ret void130}131 132define <4 x float> @fptrunc_frommem2_zext(ptr %ld) {133; X86-SSE-LABEL: fptrunc_frommem2_zext:134; X86-SSE: # %bb.0:135; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax136; X86-SSE-NEXT: cvtpd2ps (%eax), %xmm0137; X86-SSE-NEXT: retl138;139; X86-AVX-LABEL: fptrunc_frommem2_zext:140; X86-AVX: # %bb.0:141; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax142; X86-AVX-NEXT: vcvtpd2psx (%eax), %xmm0143; X86-AVX-NEXT: retl144;145; X64-SSE-LABEL: fptrunc_frommem2_zext:146; X64-SSE: # %bb.0:147; X64-SSE-NEXT: cvtpd2ps (%rdi), %xmm0148; X64-SSE-NEXT: retq149;150; X64-AVX-LABEL: fptrunc_frommem2_zext:151; X64-AVX: # %bb.0:152; X64-AVX-NEXT: vcvtpd2psx (%rdi), %xmm0153; X64-AVX-NEXT: retq154 %arg = load <2 x double>, ptr %ld, align 16155 %cvt = fptrunc <2 x double> %arg to <2 x float>156 %ret = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>157 ret <4 x float> %ret158}159 160define <4 x float> @fptrunc_fromreg2_zext(<2 x double> %arg) {161; X86-SSE-LABEL: fptrunc_fromreg2_zext:162; X86-SSE: # %bb.0:163; X86-SSE-NEXT: cvtpd2ps %xmm0, %xmm0164; X86-SSE-NEXT: retl165;166; X86-AVX-LABEL: fptrunc_fromreg2_zext:167; X86-AVX: # %bb.0:168; X86-AVX-NEXT: vcvtpd2ps %xmm0, %xmm0169; X86-AVX-NEXT: retl170;171; X64-SSE-LABEL: fptrunc_fromreg2_zext:172; X64-SSE: # %bb.0:173; X64-SSE-NEXT: cvtpd2ps %xmm0, %xmm0174; X64-SSE-NEXT: retq175;176; X64-AVX-LABEL: fptrunc_fromreg2_zext:177; X64-AVX: # %bb.0:178; X64-AVX-NEXT: vcvtpd2ps %xmm0, %xmm0179; X64-AVX-NEXT: retq180 %cvt = fptrunc <2 x double> %arg to <2 x float>181 %ret = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>182 ret <4 x float> %ret183}184 185; FIXME: For exact truncations we should be able to fold this.186define <4 x float> @fptrunc_fromconst() {187; X86-SSE-LABEL: fptrunc_fromconst:188; X86-SSE: # %bb.0: # %entry189; X86-SSE-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1190; X86-SSE-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0191; X86-SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]192; X86-SSE-NEXT: retl193;194; X86-AVX-LABEL: fptrunc_fromconst:195; X86-AVX: # %bb.0: # %entry196; X86-AVX-NEXT: vcvtpd2psy {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0197; X86-AVX-NEXT: retl198;199; X64-SSE-LABEL: fptrunc_fromconst:200; X64-SSE: # %bb.0: # %entry201; X64-SSE-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1202; X64-SSE-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0203; X64-SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]204; X64-SSE-NEXT: retq205;206; X64-AVX-LABEL: fptrunc_fromconst:207; X64-AVX: # %bb.0: # %entry208; X64-AVX-NEXT: vcvtpd2psy {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0209; X64-AVX-NEXT: retq210entry:211 %0 = insertelement <4 x double> undef, double 1.0, i32 0212 %1 = insertelement <4 x double> %0, double -2.0, i32 1213 %2 = insertelement <4 x double> %1, double +4.0, i32 2214 %3 = insertelement <4 x double> %2, double -0.0, i32 3215 %4 = fptrunc <4 x double> %3 to <4 x float>216 ret <4 x float> %4217}218