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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: opt < %s -passes='sroa,instcombine' | \3; RUN: llc -mtriple=i686-- -mcpu=yonah | not grep sub.*esp4 5; This checks that various insert/extract idiom work without going to the6; stack.7target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"8 9define void @test(ptr %F, float %f) {10entry:11 %tmp = load <4 x float>, ptr %F ; <<4 x float>> [#uses=2]12 %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]13 %tmp10 = insertelement <4 x float> %tmp3, float %f, i32 0 ; <<4 x float>> [#uses=2]14 %tmp6 = fadd <4 x float> %tmp10, %tmp10 ; <<4 x float>> [#uses=1]15 store <4 x float> %tmp6, ptr %F16 ret void17}18 19define void @test2(ptr %F, float %f) {20entry:21 %G = alloca <4 x float>, align 16 ; <ptr> [#uses=3]22 %tmp = load <4 x float>, ptr %F ; <<4 x float>> [#uses=2]23 %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]24 store <4 x float> %tmp3, ptr %G25 %tmp.upgrd.1 = getelementptr <4 x float>, ptr %G, i32 0, i32 2 ; <ptr> [#uses=1]26 store float %f, ptr %tmp.upgrd.127 %tmp4 = load <4 x float>, ptr %G ; <<4 x float>> [#uses=2]28 %tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]29 store <4 x float> %tmp6, ptr %F30 ret void31}32 33define void @test3(ptr %F, ptr %f) {34entry:35 %G = alloca <4 x float>, align 16 ; <ptr> [#uses=2]36 %tmp = load <4 x float>, ptr %F ; <<4 x float>> [#uses=2]37 %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]38 store <4 x float> %tmp3, ptr %G39 %tmp.upgrd.2 = getelementptr <4 x float>, ptr %G, i32 0, i32 2 ; <ptr> [#uses=1]40 %tmp.upgrd.3 = load float, ptr %tmp.upgrd.2 ; <float> [#uses=1]41 store float %tmp.upgrd.3, ptr %f42 ret void43}44 45define void @test4(ptr %F, ptr %f) {46entry:47 %tmp = load <4 x float>, ptr %F ; <<4 x float>> [#uses=2]48 %tmp5.lhs = extractelement <4 x float> %tmp, i32 0 ; <float> [#uses=1]49 %tmp5.rhs = extractelement <4 x float> %tmp, i32 0 ; <float> [#uses=1]50 %tmp5 = fadd float %tmp5.lhs, %tmp5.rhs ; <float> [#uses=1]51 store float %tmp5, ptr %f52 ret void53}54