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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse4.1 | FileCheck %s --check-prefix=X644 5; This is not an MMX operation; promoted to xmm.6define <1 x i64> @t0(i32 %A) nounwind {7; X86-LABEL: t0:8; X86: ## %bb.0:9; X86-NEXT: movl {{[0-9]+}}(%esp), %edx10; X86-NEXT: xorl %eax, %eax11; X86-NEXT: retl12;13; X64-LABEL: t0:14; X64: ## %bb.0:15; X64-NEXT: movd %edi, %xmm016; X64-NEXT: psllq $32, %xmm017; X64-NEXT: movq %xmm0, %rax18; X64-NEXT: retq19 %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 120 %tmp4 = bitcast <2 x i32> %tmp3 to <1 x i64>21 ret <1 x i64> %tmp422}23 24define <8 x i8> @t1(i8 zeroext %x) nounwind {25; X86-LABEL: t1:26; X86: ## %bb.0:27; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero28; X86-NEXT: retl29;30; X64-LABEL: t1:31; X64: ## %bb.0:32; X64-NEXT: movd %edi, %xmm033; X64-NEXT: retq34 %r = insertelement <8 x i8> undef, i8 %x, i32 035 ret <8 x i8> %r36}37 38; PR257439define <2 x float> @t2(<2 x float> %a0) {40; X86-LABEL: t2:41; X86: ## %bb.0:42; X86-NEXT: xorps %xmm0, %xmm043; X86-NEXT: retl44;45; X64-LABEL: t2:46; X64: ## %bb.0:47; X64-NEXT: xorps %xmm0, %xmm048; X64-NEXT: retq49 %v1 = insertelement <2 x float> %a0, float 0.000000e+00, i32 050 %v2 = insertelement <2 x float> %v1, float 0.000000e+00, i32 151 ret <2 x float> %v252}53 54@g0 = external global i1655@g1 = external global <4 x i16>56 57; PR256258define void @t3() {59; X86-LABEL: t3:60; X86: ## %bb.0:61; X86-NEXT: movl L_g0$non_lazy_ptr, %eax62; X86-NEXT: movzwl (%eax), %eax63; X86-NEXT: movl L_g1$non_lazy_ptr, %ecx64; X86-NEXT: movw %ax, (%ecx)65; X86-NEXT: retl66;67; X64-LABEL: t3:68; X64: ## %bb.0:69; X64-NEXT: movq _g0@GOTPCREL(%rip), %rax70; X64-NEXT: movzwl (%rax), %eax71; X64-NEXT: movq _g1@GOTPCREL(%rip), %rcx72; X64-NEXT: movw %ax, (%rcx)73; X64-NEXT: retq74 load i16, ptr @g075 load <4 x i16>, ptr @g176 insertelement <4 x i16> %2, i16 %1, i32 077 store <4 x i16> %3, ptr @g178 ret void79}80