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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=FAST323; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=SLOW324 5define <4 x float> @merge_2_floats(ptr nocapture %p) nounwind readonly {6; ALL-LABEL: merge_2_floats:7; ALL: # %bb.0:8; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero9; ALL-NEXT: retq10 %tmp1 = load float, ptr %p11 %vecins = insertelement <4 x float> undef, float %tmp1, i32 012 %add.ptr = getelementptr float, ptr %p, i32 113 %tmp5 = load float, ptr %add.ptr14 %vecins7 = insertelement <4 x float> %vecins, float %tmp5, i32 115 ret <4 x float> %vecins716}17 18; Test-case generated due to a crash when trying to treat loading the first19; two i64s of a <4 x i64> as a load of two i32s.20define <4 x i64> @merge_2_floats_into_4() {21; ALL-LABEL: merge_2_floats_into_4:22; ALL: # %bb.0:23; ALL-NEXT: movq (%rax), %rax24; ALL-NEXT: vmovups (%rax), %xmm025; ALL-NEXT: retq26 %1 = load ptr, ptr undef, align 827 %2 = load i64, ptr %128 %3 = insertelement <4 x i64> undef, i64 %2, i32 029 %4 = load ptr, ptr undef, align 830 %5 = getelementptr inbounds i64, ptr %4, i64 131 %6 = load i64, ptr %532 %7 = insertelement <4 x i64> %3, i64 %6, i32 133 %8 = shufflevector <4 x i64> %7, <4 x i64> undef, <4 x i32> <i32 0, i32 1, i32 4, i32 5>34 ret <4 x i64> %835}36 37define <4 x float> @merge_4_floats(ptr %ptr) {38; ALL-LABEL: merge_4_floats:39; ALL: # %bb.0:40; ALL-NEXT: vmovups (%rdi), %xmm041; ALL-NEXT: retq42 %a = load float, ptr %ptr, align 843 %vec = insertelement <4 x float> undef, float %a, i32 044 %idx1 = getelementptr inbounds float, ptr %ptr, i64 145 %b = load float, ptr %idx1, align 846 %vec2 = insertelement <4 x float> %vec, float %b, i32 147 %idx3 = getelementptr inbounds float, ptr %ptr, i64 248 %c = load float, ptr %idx3, align 849 %vec4 = insertelement <4 x float> %vec2, float %c, i32 250 %idx5 = getelementptr inbounds float, ptr %ptr, i64 351 %d = load float, ptr %idx5, align 852 %vec6 = insertelement <4 x float> %vec4, float %d, i32 353 ret <4 x float> %vec654}55 56; PR21710 ( http://llvm.org/bugs/show_bug.cgi?id=21710 )57; Make sure that 32-byte vectors are handled efficiently.58; If the target has slow 32-byte accesses, we should still generate59; 16-byte loads.60 61define <8 x float> @merge_8_floats(ptr %ptr) {62; FAST32-LABEL: merge_8_floats:63; FAST32: # %bb.0:64; FAST32-NEXT: vmovups (%rdi), %ymm065; FAST32-NEXT: retq66;67; SLOW32-LABEL: merge_8_floats:68; SLOW32: # %bb.0:69; SLOW32-NEXT: vmovups (%rdi), %xmm070; SLOW32-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm071; SLOW32-NEXT: retq72 %a = load float, ptr %ptr, align 473 %vec = insertelement <8 x float> undef, float %a, i32 074 %idx1 = getelementptr inbounds float, ptr %ptr, i64 175 %b = load float, ptr %idx1, align 476 %vec2 = insertelement <8 x float> %vec, float %b, i32 177 %idx3 = getelementptr inbounds float, ptr %ptr, i64 278 %c = load float, ptr %idx3, align 479 %vec4 = insertelement <8 x float> %vec2, float %c, i32 280 %idx5 = getelementptr inbounds float, ptr %ptr, i64 381 %d = load float, ptr %idx5, align 482 %vec6 = insertelement <8 x float> %vec4, float %d, i32 383 %idx7 = getelementptr inbounds float, ptr %ptr, i64 484 %e = load float, ptr %idx7, align 485 %vec8 = insertelement <8 x float> %vec6, float %e, i32 486 %idx9 = getelementptr inbounds float, ptr %ptr, i64 587 %f = load float, ptr %idx9, align 488 %vec10 = insertelement <8 x float> %vec8, float %f, i32 589 %idx11 = getelementptr inbounds float, ptr %ptr, i64 690 %g = load float, ptr %idx11, align 491 %vec12 = insertelement <8 x float> %vec10, float %g, i32 692 %idx13 = getelementptr inbounds float, ptr %ptr, i64 793 %h = load float, ptr %idx13, align 494 %vec14 = insertelement <8 x float> %vec12, float %h, i32 795 ret <8 x float> %vec1496}97 98define <4 x double> @merge_4_doubles(ptr %ptr) {99; FAST32-LABEL: merge_4_doubles:100; FAST32: # %bb.0:101; FAST32-NEXT: vmovups (%rdi), %ymm0102; FAST32-NEXT: retq103;104; SLOW32-LABEL: merge_4_doubles:105; SLOW32: # %bb.0:106; SLOW32-NEXT: vmovups (%rdi), %xmm0107; SLOW32-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0108; SLOW32-NEXT: retq109 %a = load double, ptr %ptr, align 8110 %vec = insertelement <4 x double> undef, double %a, i32 0111 %idx1 = getelementptr inbounds double, ptr %ptr, i64 1112 %b = load double, ptr %idx1, align 8113 %vec2 = insertelement <4 x double> %vec, double %b, i32 1114 %idx3 = getelementptr inbounds double, ptr %ptr, i64 2115 %c = load double, ptr %idx3, align 8116 %vec4 = insertelement <4 x double> %vec2, double %c, i32 2117 %idx5 = getelementptr inbounds double, ptr %ptr, i64 3118 %d = load double, ptr %idx5, align 8119 %vec6 = insertelement <4 x double> %vec4, double %d, i32 3120 ret <4 x double> %vec6121}122 123; PR21771 ( http://llvm.org/bugs/show_bug.cgi?id=21771 )124; Recognize and combine consecutive loads even when the125; first of the combined loads is offset from the base address.126define <4 x double> @merge_4_doubles_offset(ptr %ptr) {127; FAST32-LABEL: merge_4_doubles_offset:128; FAST32: # %bb.0:129; FAST32-NEXT: vmovups 32(%rdi), %ymm0130; FAST32-NEXT: retq131;132; SLOW32-LABEL: merge_4_doubles_offset:133; SLOW32: # %bb.0:134; SLOW32-NEXT: vmovups 32(%rdi), %xmm0135; SLOW32-NEXT: vinsertf128 $1, 48(%rdi), %ymm0, %ymm0136; SLOW32-NEXT: retq137 %arrayidx4 = getelementptr inbounds double, ptr %ptr, i64 4138 %arrayidx5 = getelementptr inbounds double, ptr %ptr, i64 5139 %arrayidx6 = getelementptr inbounds double, ptr %ptr, i64 6140 %arrayidx7 = getelementptr inbounds double, ptr %ptr, i64 7141 %e = load double, ptr %arrayidx4, align 8142 %f = load double, ptr %arrayidx5, align 8143 %g = load double, ptr %arrayidx6, align 8144 %h = load double, ptr %arrayidx7, align 8145 %vecinit4 = insertelement <4 x double> undef, double %e, i32 0146 %vecinit5 = insertelement <4 x double> %vecinit4, double %f, i32 1147 %vecinit6 = insertelement <4 x double> %vecinit5, double %g, i32 2148 %vecinit7 = insertelement <4 x double> %vecinit6, double %h, i32 3149 ret <4 x double> %vecinit7150}151 152