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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX5 6define <16 x i8> @v16i8_icmp_uge(<16 x i8> %a, <16 x i8> %b) nounwind readnone ssp uwtable {7; SSE-LABEL: v16i8_icmp_uge:8; SSE:       # %bb.0:9; SSE-NEXT:    pmaxub %xmm0, %xmm110; SSE-NEXT:    pcmpeqb %xmm1, %xmm011; SSE-NEXT:    retq12;13; AVX-LABEL: v16i8_icmp_uge:14; AVX:       # %bb.0:15; AVX-NEXT:    vpmaxub %xmm1, %xmm0, %xmm116; AVX-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm017; AVX-NEXT:    retq18  %1 = icmp uge <16 x i8> %a, %b19  %2 = sext <16 x i1> %1 to <16 x i8>20  ret <16 x i8> %221}22 23define <16 x i8> @v16i8_icmp_ule(<16 x i8> %a, <16 x i8> %b) nounwind readnone ssp uwtable {24; SSE-LABEL: v16i8_icmp_ule:25; SSE:       # %bb.0:26; SSE-NEXT:    pminub %xmm0, %xmm127; SSE-NEXT:    pcmpeqb %xmm1, %xmm028; SSE-NEXT:    retq29;30; AVX-LABEL: v16i8_icmp_ule:31; AVX:       # %bb.0:32; AVX-NEXT:    vpminub %xmm1, %xmm0, %xmm133; AVX-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm034; AVX-NEXT:    retq35  %1 = icmp ule <16 x i8> %a, %b36  %2 = sext <16 x i1> %1 to <16 x i8>37  ret <16 x i8> %238}39 40define <8 x i16> @v8i16_icmp_uge(<8 x i16> %a, <8 x i16> %b) nounwind readnone ssp uwtable {41; SSE2-LABEL: v8i16_icmp_uge:42; SSE2:       # %bb.0:43; SSE2-NEXT:    psubusw %xmm0, %xmm144; SSE2-NEXT:    pxor %xmm0, %xmm045; SSE2-NEXT:    pcmpeqw %xmm1, %xmm046; SSE2-NEXT:    retq47;48; SSE41-LABEL: v8i16_icmp_uge:49; SSE41:       # %bb.0:50; SSE41-NEXT:    pmaxuw %xmm0, %xmm151; SSE41-NEXT:    pcmpeqw %xmm1, %xmm052; SSE41-NEXT:    retq53;54; AVX-LABEL: v8i16_icmp_uge:55; AVX:       # %bb.0:56; AVX-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm157; AVX-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm058; AVX-NEXT:    retq59  %1 = icmp uge <8 x i16> %a, %b60  %2 = sext <8 x i1> %1 to <8 x i16>61  ret <8 x i16> %262}63 64define <8 x i16> @v8i16_icmp_ule(<8 x i16> %a, <8 x i16> %b) nounwind readnone ssp uwtable {65; SSE2-LABEL: v8i16_icmp_ule:66; SSE2:       # %bb.0:67; SSE2-NEXT:    psubusw %xmm1, %xmm068; SSE2-NEXT:    pxor %xmm1, %xmm169; SSE2-NEXT:    pcmpeqw %xmm1, %xmm070; SSE2-NEXT:    retq71;72; SSE41-LABEL: v8i16_icmp_ule:73; SSE41:       # %bb.0:74; SSE41-NEXT:    pminuw %xmm0, %xmm175; SSE41-NEXT:    pcmpeqw %xmm1, %xmm076; SSE41-NEXT:    retq77;78; AVX-LABEL: v8i16_icmp_ule:79; AVX:       # %bb.0:80; AVX-NEXT:    vpminuw %xmm1, %xmm0, %xmm181; AVX-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm082; AVX-NEXT:    retq83  %1 = icmp ule <8 x i16> %a, %b84  %2 = sext <8 x i1> %1 to <8 x i16>85  ret <8 x i16> %286}87 88define <4 x i32> @v4i32_icmp_uge(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp uwtable {89; SSE2-LABEL: v4i32_icmp_uge:90; SSE2:       # %bb.0:91; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]92; SSE2-NEXT:    pxor %xmm2, %xmm093; SSE2-NEXT:    pxor %xmm1, %xmm294; SSE2-NEXT:    pcmpgtd %xmm0, %xmm295; SSE2-NEXT:    pcmpeqd %xmm0, %xmm096; SSE2-NEXT:    pxor %xmm2, %xmm097; SSE2-NEXT:    retq98;99; SSE41-LABEL: v4i32_icmp_uge:100; SSE41:       # %bb.0:101; SSE41-NEXT:    pmaxud %xmm0, %xmm1102; SSE41-NEXT:    pcmpeqd %xmm1, %xmm0103; SSE41-NEXT:    retq104;105; AVX-LABEL: v4i32_icmp_uge:106; AVX:       # %bb.0:107; AVX-NEXT:    vpmaxud %xmm1, %xmm0, %xmm1108; AVX-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0109; AVX-NEXT:    retq110  %1 = icmp uge <4 x i32> %a, %b111  %2 = sext <4 x i1> %1 to <4 x i32>112  ret <4 x i32> %2113}114 115define <4 x i32> @v4i32_icmp_ule(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp uwtable {116; SSE2-LABEL: v4i32_icmp_ule:117; SSE2:       # %bb.0:118; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]119; SSE2-NEXT:    pxor %xmm2, %xmm1120; SSE2-NEXT:    pxor %xmm2, %xmm0121; SSE2-NEXT:    pcmpgtd %xmm1, %xmm0122; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1123; SSE2-NEXT:    pxor %xmm1, %xmm0124; SSE2-NEXT:    retq125;126; SSE41-LABEL: v4i32_icmp_ule:127; SSE41:       # %bb.0:128; SSE41-NEXT:    pminud %xmm0, %xmm1129; SSE41-NEXT:    pcmpeqd %xmm1, %xmm0130; SSE41-NEXT:    retq131;132; AVX-LABEL: v4i32_icmp_ule:133; AVX:       # %bb.0:134; AVX-NEXT:    vpminud %xmm1, %xmm0, %xmm1135; AVX-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0136; AVX-NEXT:    retq137  %1 = icmp ule <4 x i32> %a, %b138  %2 = sext <4 x i1> %1 to <4 x i32>139  ret <4 x i32> %2140}141 142define <16 x i8> @or_icmp_eq_const_1bit_diff(<16 x i8> %x) {143; SSE-LABEL: or_icmp_eq_const_1bit_diff:144; SSE:       # %bb.0:145; SSE-NEXT:    movdqa {{.*#+}} xmm1 = [43,43,43,43,43,43,43,43,43,43,43,43,43,43,43,43]146; SSE-NEXT:    pcmpeqb %xmm0, %xmm1147; SSE-NEXT:    pcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0148; SSE-NEXT:    por %xmm1, %xmm0149; SSE-NEXT:    retq150;151; AVX-LABEL: or_icmp_eq_const_1bit_diff:152; AVX:       # %bb.0:153; AVX-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1154; AVX-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0155; AVX-NEXT:    vpor %xmm0, %xmm1, %xmm0156; AVX-NEXT:    retq157  %a = icmp eq <16 x i8> %x, <i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43, i8 43>158  %b = icmp eq <16 x i8> %x, <i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45, i8 45>159  %ax = sext <16 x i1> %a to <16 x i8>160  %bx = sext <16 x i1> %b to <16 x i8>161  %r = or <16 x i8> %ax, %bx162  ret <16 x i8> %r163}164 165define <4 x i32> @or_icmp_ne_const_1bit_diff(<4 x i32> %x) {166; SSE2-LABEL: or_icmp_ne_const_1bit_diff:167; SSE2:       # %bb.0:168; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [44,60,44,60]169; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1170; SSE2-NEXT:    pcmpeqd %xmm2, %xmm2171; SSE2-NEXT:    pxor %xmm2, %xmm1172; SSE2-NEXT:    pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0173; SSE2-NEXT:    pxor %xmm2, %xmm0174; SSE2-NEXT:    por %xmm1, %xmm0175; SSE2-NEXT:    retq176;177; SSE41-LABEL: or_icmp_ne_const_1bit_diff:178; SSE41:       # %bb.0:179; SSE41-NEXT:    pmovsxbd {{.*#+}} xmm1 = [44,60,44,60]180; SSE41-NEXT:    pcmpeqd %xmm0, %xmm1181; SSE41-NEXT:    pcmpeqd %xmm2, %xmm2182; SSE41-NEXT:    pxor %xmm2, %xmm1183; SSE41-NEXT:    pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0184; SSE41-NEXT:    pxor %xmm2, %xmm0185; SSE41-NEXT:    por %xmm1, %xmm0186; SSE41-NEXT:    retq187;188; AVX-LABEL: or_icmp_ne_const_1bit_diff:189; AVX:       # %bb.0:190; AVX-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1191; AVX-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2192; AVX-NEXT:    vpxor %xmm2, %xmm1, %xmm1193; AVX-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0194; AVX-NEXT:    vpxor %xmm2, %xmm0, %xmm0195; AVX-NEXT:    vpor %xmm0, %xmm1, %xmm0196; AVX-NEXT:    retq197  %a = icmp ne <4 x i32> %x, <i32 44, i32 60, i32 44, i32 60>198  %b = icmp ne <4 x i32> %x, <i32 60, i32 44, i32 60, i32 44>199  %ax = sext <4 x i1> %a to <4 x i32>200  %bx = sext <4 x i1> %b to <4 x i32>201  %r = or <4 x i32> %ax, %bx202  ret <4 x i32> %r203}204 205define <16 x i8> @and_icmp_eq_const_1bit_diff(<16 x i8> %x) {206; SSE-LABEL: and_icmp_eq_const_1bit_diff:207; SSE:       # %bb.0:208; SSE-NEXT:    movdqa {{.*#+}} xmm1 = [43,43,45,45,43,43,45,45,43,43,45,45,43,43,45,45]209; SSE-NEXT:    pcmpeqb %xmm0, %xmm1210; SSE-NEXT:    pcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0211; SSE-NEXT:    pand %xmm1, %xmm0212; SSE-NEXT:    retq213;214; AVX-LABEL: and_icmp_eq_const_1bit_diff:215; AVX:       # %bb.0:216; AVX-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1217; AVX-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0218; AVX-NEXT:    vpand %xmm0, %xmm1, %xmm0219; AVX-NEXT:    retq220  %a = icmp eq <16 x i8> %x, <i8 43, i8 43, i8 45, i8 45, i8 43, i8 43, i8 45, i8 45, i8 43, i8 43, i8 45, i8 45, i8 43, i8 43, i8 45, i8 45>221  %b = icmp eq <16 x i8> %x, <i8 45, i8 45, i8 43, i8 43, i8 45, i8 45, i8 43, i8 43, i8 45, i8 45, i8 43, i8 43, i8 45, i8 45, i8 43, i8 43>222  %ax = sext <16 x i1> %a to <16 x i8>223  %bx = sext <16 x i1> %b to <16 x i8>224  %r = and <16 x i8> %ax, %bx225  ret <16 x i8> %r226}227 228define <4 x i32> @and_icmp_ne_const_1bit_diff(<4 x i32> %x) {229; SSE2-LABEL: and_icmp_ne_const_1bit_diff:230; SSE2:       # %bb.0:231; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [44,60,54,44]232; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1233; SSE2-NEXT:    pcmpeqd %xmm2, %xmm2234; SSE2-NEXT:    pxor %xmm2, %xmm1235; SSE2-NEXT:    pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0236; SSE2-NEXT:    pxor %xmm2, %xmm0237; SSE2-NEXT:    por %xmm1, %xmm0238; SSE2-NEXT:    retq239;240; SSE41-LABEL: and_icmp_ne_const_1bit_diff:241; SSE41:       # %bb.0:242; SSE41-NEXT:    pmovsxbd {{.*#+}} xmm1 = [44,60,54,44]243; SSE41-NEXT:    pcmpeqd %xmm0, %xmm1244; SSE41-NEXT:    pcmpeqd %xmm2, %xmm2245; SSE41-NEXT:    pxor %xmm2, %xmm1246; SSE41-NEXT:    pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0247; SSE41-NEXT:    pxor %xmm2, %xmm0248; SSE41-NEXT:    por %xmm1, %xmm0249; SSE41-NEXT:    retq250;251; AVX-LABEL: and_icmp_ne_const_1bit_diff:252; AVX:       # %bb.0:253; AVX-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1254; AVX-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2255; AVX-NEXT:    vpxor %xmm2, %xmm1, %xmm1256; AVX-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0257; AVX-NEXT:    vpxor %xmm2, %xmm0, %xmm0258; AVX-NEXT:    vpor %xmm0, %xmm1, %xmm0259; AVX-NEXT:    retq260  %a = icmp ne <4 x i32> %x, <i32 44, i32 60, i32 54, i32 44>261  %b = icmp ne <4 x i32> %x, <i32 60, i32 52, i32 50, i32 60>262  %ax = sext <4 x i1> %a to <4 x i32>263  %bx = sext <4 x i1> %b to <4 x i32>264  %r = or <4 x i32> %ax, %bx265  ret <4 x i32> %r266}267 268; At one point we were incorrectly constant-folding a setcc to 0x1 instead of269; 0xff, leading to a constpool load. The instruction doesn't matter here, but it270; should set all bits to 1.271define <16 x i8> @test_setcc_constfold_vi8(<16 x i8> %l, <16 x i8> %r) {272; SSE-LABEL: test_setcc_constfold_vi8:273; SSE:       # %bb.0:274; SSE-NEXT:    pcmpeqd %xmm0, %xmm0275; SSE-NEXT:    retq276;277; AVX-LABEL: test_setcc_constfold_vi8:278; AVX:       # %bb.0:279; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0280; AVX-NEXT:    retq281  %test1 = icmp eq <16 x i8> %l, %r282  %mask1 = sext <16 x i1> %test1 to <16 x i8>283  %test2 = icmp ne <16 x i8> %l, %r284  %mask2 = sext <16 x i1> %test2 to <16 x i8>285  %res = or <16 x i8> %mask1, %mask2286  ret <16 x i8> %res287}288 289; Make sure sensible results come from doing extension afterwards290define <16 x i8> @test_setcc_constfold_vi1(<16 x i8> %l, <16 x i8> %r) {291; SSE-LABEL: test_setcc_constfold_vi1:292; SSE:       # %bb.0:293; SSE-NEXT:    pcmpeqd %xmm0, %xmm0294; SSE-NEXT:    retq295;296; AVX-LABEL: test_setcc_constfold_vi1:297; AVX:       # %bb.0:298; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0299; AVX-NEXT:    retq300  %test1 = icmp eq <16 x i8> %l, %r301  %test2 = icmp ne <16 x i8> %l, %r302  %res = or <16 x i1> %test1, %test2303  %mask = sext <16 x i1> %res to <16 x i8>304  ret <16 x i8> %mask305}306 307; 64-bit case is also particularly important, as the constant "-1" is probably308; just 32-bits wide.309define <2 x i64> @test_setcc_constfold_vi64(<2 x i64> %l, <2 x i64> %r) {310; SSE-LABEL: test_setcc_constfold_vi64:311; SSE:       # %bb.0:312; SSE-NEXT:    pcmpeqd %xmm0, %xmm0313; SSE-NEXT:    retq314;315; AVX-LABEL: test_setcc_constfold_vi64:316; AVX:       # %bb.0:317; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0318; AVX-NEXT:    retq319  %test1 = icmp eq <2 x i64> %l, %r320  %mask1 = sext <2 x i1> %test1 to <2 x i64>321  %test2 = icmp ne <2 x i64> %l, %r322  %mask2 = sext <2 x i1> %test2 to <2 x i64>323  %res = or <2 x i64> %mask1, %mask2324  ret <2 x i64> %res325}326 327; This asserted in type legalization for v3i1 setcc after v3i16 was made328; a simple value type.329define <3 x i1> @test_setcc_v3i1_v3i16(ptr %a) nounwind {330; SSE2-LABEL: test_setcc_v3i1_v3i16:331; SSE2:       # %bb.0:332; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero333; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]334; SSE2-NEXT:    pxor %xmm1, %xmm1335; SSE2-NEXT:    pcmpeqw %xmm0, %xmm1336; SSE2-NEXT:    movdqa %xmm1, -{{[0-9]+}}(%rsp)337; SSE2-NEXT:    movzbl -{{[0-9]+}}(%rsp), %eax338; SSE2-NEXT:    movzbl -{{[0-9]+}}(%rsp), %edx339; SSE2-NEXT:    movzbl -{{[0-9]+}}(%rsp), %ecx340; SSE2-NEXT:    retq341;342; SSE41-LABEL: test_setcc_v3i1_v3i16:343; SSE41:       # %bb.0:344; SSE41-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero345; SSE41-NEXT:    pxor %xmm1, %xmm1346; SSE41-NEXT:    pcmpeqw %xmm0, %xmm1347; SSE41-NEXT:    movd %xmm1, %eax348; SSE41-NEXT:    pextrb $2, %xmm1, %edx349; SSE41-NEXT:    pextrb $4, %xmm1, %ecx350; SSE41-NEXT:    # kill: def $al killed $al killed $eax351; SSE41-NEXT:    # kill: def $dl killed $dl killed $edx352; SSE41-NEXT:    # kill: def $cl killed $cl killed $ecx353; SSE41-NEXT:    retq354;355; AVX-LABEL: test_setcc_v3i1_v3i16:356; AVX:       # %bb.0:357; AVX-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero358; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1359; AVX-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0360; AVX-NEXT:    vmovd %xmm0, %eax361; AVX-NEXT:    vpextrb $2, %xmm0, %edx362; AVX-NEXT:    vpextrb $4, %xmm0, %ecx363; AVX-NEXT:    # kill: def $al killed $al killed $eax364; AVX-NEXT:    # kill: def $dl killed $dl killed $edx365; AVX-NEXT:    # kill: def $cl killed $cl killed $ecx366; AVX-NEXT:    retq367  %b = load <3 x i16>, ptr %a368  %cmp = icmp eq <3 x i16> %b, <i16 0, i16 0, i16 0>369  ret <3 x i1> %cmp370}371