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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s3 4; Test simplifications of vector compares that should simplify to true, false or equality.5 6define <4 x i32> @slt_min(<4 x i32> %x) {7; CHECK-LABEL: slt_min:8; CHECK: # %bb.0:9; CHECK-NEXT: xorps %xmm0, %xmm010; CHECK-NEXT: retq11 %cmp = icmp slt <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>12 %r = sext <4 x i1> %cmp to <4 x i32>13 ret <4 x i32> %r14}15 16define <4 x i32> @sge_min(<4 x i32> %x) {17; CHECK-LABEL: sge_min:18; CHECK: # %bb.0:19; CHECK-NEXT: pcmpeqd %xmm0, %xmm020; CHECK-NEXT: retq21 %cmp = icmp sge <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>22 %r = sext <4 x i1> %cmp to <4 x i32>23 ret <4 x i32> %r24}25 26define <4 x i32> @sgt_min(<4 x i32> %x) {27; CHECK-LABEL: sgt_min:28; CHECK: # %bb.0:29; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm030; CHECK-NEXT: retq31 %cmp = icmp sgt <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>32 %r = sext <4 x i1> %cmp to <4 x i32>33 ret <4 x i32> %r34}35 36define <4 x i32> @sle_min(<4 x i32> %x) {37; CHECK-LABEL: sle_min:38; CHECK: # %bb.0:39; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm040; CHECK-NEXT: retq41 %cmp = icmp sle <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>42 %r = sext <4 x i1> %cmp to <4 x i32>43 ret <4 x i32> %r44}45 46define <4 x i32> @sgt_max(<4 x i32> %x) {47; CHECK-LABEL: sgt_max:48; CHECK: # %bb.0:49; CHECK-NEXT: xorps %xmm0, %xmm050; CHECK-NEXT: retq51 %cmp = icmp sgt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>52 %r = sext <4 x i1> %cmp to <4 x i32>53 ret <4 x i32> %r54}55 56define <4 x i32> @sle_max(<4 x i32> %x) {57; CHECK-LABEL: sle_max:58; CHECK: # %bb.0:59; CHECK-NEXT: pcmpeqd %xmm0, %xmm060; CHECK-NEXT: retq61 %cmp = icmp sle <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>62 %r = sext <4 x i1> %cmp to <4 x i32>63 ret <4 x i32> %r64}65 66define <4 x i32> @slt_max(<4 x i32> %x) {67; CHECK-LABEL: slt_max:68; CHECK: # %bb.0:69; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]70; CHECK-NEXT: pcmpgtd %xmm0, %xmm171; CHECK-NEXT: movdqa %xmm1, %xmm072; CHECK-NEXT: retq73 %cmp = icmp slt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>74 %r = sext <4 x i1> %cmp to <4 x i32>75 ret <4 x i32> %r76}77 78define <4 x i32> @sge_max(<4 x i32> %x) {79; CHECK-LABEL: sge_max:80; CHECK: # %bb.0:81; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm082; CHECK-NEXT: retq83 %cmp = icmp sge <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>84 %r = sext <4 x i1> %cmp to <4 x i32>85 ret <4 x i32> %r86}87 88define <4 x i32> @ult_min(<4 x i32> %x) {89; CHECK-LABEL: ult_min:90; CHECK: # %bb.0:91; CHECK-NEXT: xorps %xmm0, %xmm092; CHECK-NEXT: retq93 %cmp = icmp ult <4 x i32> %x, zeroinitializer94 %r = sext <4 x i1> %cmp to <4 x i32>95 ret <4 x i32> %r96}97 98define <4 x i32> @uge_min(<4 x i32> %x) {99; CHECK-LABEL: uge_min:100; CHECK: # %bb.0:101; CHECK-NEXT: pcmpeqd %xmm0, %xmm0102; CHECK-NEXT: retq103 %cmp = icmp uge <4 x i32> %x, zeroinitializer104 %r = sext <4 x i1> %cmp to <4 x i32>105 ret <4 x i32> %r106}107 108define <4 x i32> @ugt_min(<4 x i32> %x) {109; CHECK-LABEL: ugt_min:110; CHECK: # %bb.0:111; CHECK-NEXT: pxor %xmm1, %xmm1112; CHECK-NEXT: pcmpeqd %xmm1, %xmm0113; CHECK-NEXT: pcmpeqd %xmm1, %xmm1114; CHECK-NEXT: pxor %xmm1, %xmm0115; CHECK-NEXT: retq116 %cmp = icmp ugt <4 x i32> %x, zeroinitializer117 %r = sext <4 x i1> %cmp to <4 x i32>118 ret <4 x i32> %r119}120 121define <4 x i32> @ule_min(<4 x i32> %x) {122; CHECK-LABEL: ule_min:123; CHECK: # %bb.0:124; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]125; CHECK-NEXT: pxor %xmm1, %xmm0126; CHECK-NEXT: pcmpgtd %xmm1, %xmm0127; CHECK-NEXT: pcmpeqd %xmm1, %xmm1128; CHECK-NEXT: pxor %xmm1, %xmm0129; CHECK-NEXT: retq130 %cmp = icmp ule <4 x i32> %x, zeroinitializer131 %r = sext <4 x i1> %cmp to <4 x i32>132 ret <4 x i32> %r133}134 135define <4 x i32> @ugt_max(<4 x i32> %x) {136; CHECK-LABEL: ugt_max:137; CHECK: # %bb.0:138; CHECK-NEXT: xorps %xmm0, %xmm0139; CHECK-NEXT: retq140 %cmp = icmp ugt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>141 %r = sext <4 x i1> %cmp to <4 x i32>142 ret <4 x i32> %r143}144 145define <4 x i32> @ule_max(<4 x i32> %x) {146; CHECK-LABEL: ule_max:147; CHECK: # %bb.0:148; CHECK-NEXT: pcmpeqd %xmm0, %xmm0149; CHECK-NEXT: retq150 %cmp = icmp ule <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>151 %r = sext <4 x i1> %cmp to <4 x i32>152 ret <4 x i32> %r153}154 155define <4 x i32> @ult_max(<4 x i32> %x) {156; CHECK-LABEL: ult_max:157; CHECK: # %bb.0:158; CHECK-NEXT: pcmpeqd %xmm1, %xmm1159; CHECK-NEXT: pcmpeqd %xmm1, %xmm0160; CHECK-NEXT: pxor %xmm1, %xmm0161; CHECK-NEXT: retq162 %cmp = icmp ult <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>163 %r = sext <4 x i1> %cmp to <4 x i32>164 ret <4 x i32> %r165}166 167define <4 x i32> @uge_max(<4 x i32> %x) {168; CHECK-LABEL: uge_max:169; CHECK: # %bb.0:170; CHECK-NEXT: pcmpeqd %xmm2, %xmm2171; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0172; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]173; CHECK-NEXT: pcmpgtd %xmm0, %xmm1174; CHECK-NEXT: pxor %xmm2, %xmm1175; CHECK-NEXT: movdqa %xmm1, %xmm0176; CHECK-NEXT: retq177 %cmp = icmp uge <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>178 %r = sext <4 x i1> %cmp to <4 x i32>179 ret <4 x i32> %r180}181 182define <4 x i32> @slt_min_plus1(<4 x i32> %x) {183; CHECK-LABEL: slt_min_plus1:184; CHECK: # %bb.0:185; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0186; CHECK-NEXT: retq187 %cmp = icmp slt <4 x i32> %x, <i32 -2147483647, i32 -2147483647, i32 -2147483647, i32 -2147483647>188 %r = sext <4 x i1> %cmp to <4 x i32>189 ret <4 x i32> %r190}191 192define <4 x i32> @sge_min_plus1(<4 x i32> %x) {193; CHECK-LABEL: sge_min_plus1:194; CHECK: # %bb.0:195; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0196; CHECK-NEXT: retq197 %cmp = icmp sge <4 x i32> %x, <i32 -2147483647, i32 -2147483647, i32 -2147483647, i32 -2147483647>198 %r = sext <4 x i1> %cmp to <4 x i32>199 ret <4 x i32> %r200}201 202define <4 x i32> @sgt_max_minus1(<4 x i32> %x) {203; CHECK-LABEL: sgt_max_minus1:204; CHECK: # %bb.0:205; CHECK-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0206; CHECK-NEXT: retq207 %cmp = icmp sgt <4 x i32> %x, <i32 2147483646, i32 2147483646, i32 2147483646, i32 2147483646>208 %r = sext <4 x i1> %cmp to <4 x i32>209 ret <4 x i32> %r210}211 212define <4 x i32> @sle_max_minus1(<4 x i32> %x) {213; CHECK-LABEL: sle_max_minus1:214; CHECK: # %bb.0:215; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]216; CHECK-NEXT: pcmpgtd %xmm0, %xmm1217; CHECK-NEXT: movdqa %xmm1, %xmm0218; CHECK-NEXT: retq219 %cmp = icmp sle <4 x i32> %x, <i32 2147483646, i32 2147483646, i32 2147483646, i32 2147483646>220 %r = sext <4 x i1> %cmp to <4 x i32>221 ret <4 x i32> %r222}223 224define <4 x i32> @ult_one(<4 x i32> %x) {225; CHECK-LABEL: ult_one:226; CHECK: # %bb.0:227; CHECK-NEXT: pxor %xmm1, %xmm1228; CHECK-NEXT: pcmpeqd %xmm1, %xmm0229; CHECK-NEXT: retq230 %cmp = icmp ult <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>231 %r = sext <4 x i1> %cmp to <4 x i32>232 ret <4 x i32> %r233}234 235define <4 x i32> @uge_one(<4 x i32> %x) {236; CHECK-LABEL: uge_one:237; CHECK: # %bb.0:238; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0239; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483649,2147483649,2147483649]240; CHECK-NEXT: pcmpgtd %xmm0, %xmm1241; CHECK-NEXT: pcmpeqd %xmm0, %xmm0242; CHECK-NEXT: pxor %xmm1, %xmm0243; CHECK-NEXT: retq244 %cmp = icmp uge <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>245 %r = sext <4 x i1> %cmp to <4 x i32>246 ret <4 x i32> %r247}248 249define <4 x i32> @ugt_max_minus1(<4 x i32> %x) {250; CHECK-LABEL: ugt_max_minus1:251; CHECK: # %bb.0:252; CHECK-NEXT: pcmpeqd %xmm1, %xmm1253; CHECK-NEXT: pcmpeqd %xmm1, %xmm0254; CHECK-NEXT: retq255 %cmp = icmp ugt <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>256 %r = sext <4 x i1> %cmp to <4 x i32>257 ret <4 x i32> %r258}259 260define <4 x i32> @ule_max_minus1(<4 x i32> %x) {261; CHECK-LABEL: ule_max_minus1:262; CHECK: # %bb.0:263; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0264; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0265; CHECK-NEXT: pcmpeqd %xmm1, %xmm1266; CHECK-NEXT: pxor %xmm1, %xmm0267; CHECK-NEXT: retq268 %cmp = icmp ule <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>269 %r = sext <4 x i1> %cmp to <4 x i32>270 ret <4 x i32> %r271}272 273define <4 x i32> @ugt_smax(<4 x i32> %x) {274; CHECK-LABEL: ugt_smax:275; CHECK: # %bb.0:276; CHECK-NEXT: pxor %xmm1, %xmm1277; CHECK-NEXT: pcmpgtd %xmm0, %xmm1278; CHECK-NEXT: movdqa %xmm1, %xmm0279; CHECK-NEXT: retq280 %cmp = icmp ugt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>281 %r = sext <4 x i1> %cmp to <4 x i32>282 ret <4 x i32> %r283}284 285define <4 x i32> @ule_smax(<4 x i32> %x) {286; CHECK-LABEL: ule_smax:287; CHECK: # %bb.0:288; CHECK-NEXT: pcmpeqd %xmm1, %xmm1289; CHECK-NEXT: pcmpgtd %xmm1, %xmm0290; CHECK-NEXT: retq291 %cmp = icmp ule <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>292 %r = sext <4 x i1> %cmp to <4 x i32>293 ret <4 x i32> %r294}295 296define <4 x i32> @ult_smin(<4 x i32> %x) {297; CHECK-LABEL: ult_smin:298; CHECK: # %bb.0:299; CHECK-NEXT: pcmpeqd %xmm1, %xmm1300; CHECK-NEXT: pcmpgtd %xmm1, %xmm0301; CHECK-NEXT: retq302 %cmp = icmp ult <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>303 %r = sext <4 x i1> %cmp to <4 x i32>304 ret <4 x i32> %r305}306 307define <4 x i32> @uge_smin(<4 x i32> %x) {308; CHECK-LABEL: uge_smin:309; CHECK: # %bb.0:310; CHECK-NEXT: pxor %xmm1, %xmm1311; CHECK-NEXT: pcmpgtd %xmm0, %xmm1312; CHECK-NEXT: movdqa %xmm1, %xmm0313; CHECK-NEXT: retq314 %cmp = icmp uge <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>315 %r = sext <4 x i1> %cmp to <4 x i32>316 ret <4 x i32> %r317}318 319; Make sure we can efficiently handle ne smin by turning into sgt.320define <4 x i32> @ne_smin(<4 x i32> %x) {321; CHECK-LABEL: ne_smin:322; CHECK: # %bb.0:323; CHECK-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0324; CHECK-NEXT: retq325 %cmp = icmp ne <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>326 %r = sext <4 x i1> %cmp to <4 x i32>327 ret <4 x i32> %r328}329 330; Make sure we can efficiently handle ne smax by turning into sgt. We can't fold331; the constant pool load, but the alternative is a cmpeq+invert which is 3 instructions.332; The PCMPGT version is two instructions given sufficient register allocation freedom333; to avoid the last mov to %xmm0 seen here.334define <4 x i32> @ne_smax(<4 x i32> %x) {335; CHECK-LABEL: ne_smax:336; CHECK: # %bb.0:337; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]338; CHECK-NEXT: pcmpgtd %xmm0, %xmm1339; CHECK-NEXT: movdqa %xmm1, %xmm0340; CHECK-NEXT: retq341 %cmp = icmp ne <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>342 %r = sext <4 x i1> %cmp to <4 x i32>343 ret <4 x i32> %r344}345