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1; RUN: llc -O3 -mtriple=x86_64-pc-linux -stop-after=finalize-isel < %s | FileCheck %s2 3define <1 x float> @constrained_vector_fadd_v1f32() #0 {4; CHECK-LABEL: name: constrained_vector_fadd_v1f325; CHECK: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)6; CHECK: [[ADDSSrm:%[0-9]+]]:fr32 = ADDSSrm [[MOVSSrm_alt]], $rip, 1, $noreg, %const.1, $noreg, implicit $mxcsr :: (load (s32) from constant-pool)7; CHECK: $xmm0 = COPY [[ADDSSrm]]8; CHECK: RET 0, $xmm09entry:10 %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 1.0>, metadata !"round.dynamic", metadata !"fpexcept.strict") #011 ret <1 x float> %add12}13 14define <3 x float> @constrained_vector_fadd_v3f32() #0 {15; CHECK-LABEL: name: constrained_vector_fadd_v3f3216; CHECK: [[FsFLD0SS:%[0-9]+]]:fr32 = FsFLD0SS17; CHECK: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)18; CHECK: [[ADDSSrr:%[0-9]+]]:fr32 = ADDSSrr [[MOVSSrm_alt]], killed [[FsFLD0SS]], implicit $mxcsr19; CHECK: [[ADDSSrm:%[0-9]+]]:fr32 = ADDSSrm [[MOVSSrm_alt]], $rip, 1, $noreg, %const.1, $noreg, implicit $mxcsr :: (load (s32) from constant-pool)20; CHECK: [[ADDSSrm1:%[0-9]+]]:fr32 = ADDSSrm [[MOVSSrm_alt]], $rip, 1, $noreg, %const.2, $noreg, implicit $mxcsr :: (load (s32) from constant-pool)21; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY killed [[ADDSSrm1]]22; CHECK: [[COPY1:%[0-9]+]]:vr128 = COPY killed [[ADDSSrm]]23; CHECK: [[UNPCKLPSrr:%[0-9]+]]:vr128 = UNPCKLPSrr [[COPY1]], killed [[COPY]]24; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY killed [[ADDSSrr]]25; CHECK: [[UNPCKLPDrr:%[0-9]+]]:vr128 = UNPCKLPDrr [[UNPCKLPSrr]], killed [[COPY2]]26; CHECK: $xmm0 = COPY [[UNPCKLPDrr]]27; CHECK: RET 0, $xmm028entry:29 %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(30 <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,31 float 0xFFFFFFFFE0000000>,32 <3 x float> <float 2.0, float 1.0, float 0.0>,33 metadata !"round.dynamic",34 metadata !"fpexcept.strict") #035 ret <3 x float> %add36}37 38define <4 x double> @constrained_vector_fadd_v4f64() #0 {39; CHECK-LABEL: name: constrained_vector_fadd_v4f6440; CHECK: [[MOVAPDrm:%[0-9]+]]:vr128 = MOVAPDrm $rip, 1, $noreg, %const.0, $noreg :: (load (s128) from constant-pool)41; CHECK: [[ADDPDrm:%[0-9]+]]:vr128 = ADDPDrm [[MOVAPDrm]], $rip, 1, $noreg, %const.1, $noreg, implicit $mxcsr :: (load (s128) from constant-pool)42; CHECK: [[ADDPDrm1:%[0-9]+]]:vr128 = ADDPDrm [[MOVAPDrm]], $rip, 1, $noreg, %const.2, $noreg, implicit $mxcsr :: (load (s128) from constant-pool)43; CHECK: $xmm0 = COPY [[ADDPDrm1]]44; CHECK: $xmm1 = COPY [[ADDPDrm]]45; CHECK: RET 0, $xmm0, $xmm146entry:47 %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(48 <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,49 double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,50 <4 x double> <double 1.000000e+00, double 1.000000e-01,51 double 2.000000e+00, double 2.000000e-01>,52 metadata !"round.dynamic",53 metadata !"fpexcept.strict") #054 ret <4 x double> %add55}56 57attributes #0 = { strictfp }58 59declare <1 x float> @llvm.experimental.constrained.fadd.v1f32(<1 x float>, <1 x float>, metadata, metadata)60declare <3 x float> @llvm.experimental.constrained.fadd.v3f32(<3 x float>, <3 x float>, metadata, metadata)61declare <4 x double> @llvm.experimental.constrained.fadd.v4f64(<4 x double>, <4 x double>, metadata, metadata)62