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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s3; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX14; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx512f < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F5; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx512dq < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512DQ6 7define <1 x float> @constrained_vector_fdiv_v1f32() #0 {8; CHECK-LABEL: constrained_vector_fdiv_v1f32:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]11; CHECK-NEXT: divss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm012; CHECK-NEXT: retq13;14; AVX-LABEL: constrained_vector_fdiv_v1f32:15; AVX: # %bb.0: # %entry16; AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]17; AVX-NEXT: vdivss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm018; AVX-NEXT: retq19entry:20 %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(21 <1 x float> <float 1.000000e+00>,22 <1 x float> <float 1.000000e+01>,23 metadata !"round.dynamic",24 metadata !"fpexcept.strict") #025 ret <1 x float> %div26}27 28define <2 x double> @constrained_vector_fdiv_v2f64() #0 {29; CHECK-LABEL: constrained_vector_fdiv_v2f64:30; CHECK: # %bb.0: # %entry31; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]32; CHECK-NEXT: divpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm033; CHECK-NEXT: retq34;35; AVX-LABEL: constrained_vector_fdiv_v2f64:36; AVX: # %bb.0: # %entry37; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]38; AVX-NEXT: vdivpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm039; AVX-NEXT: retq40entry:41 %div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(42 <2 x double> <double 1.000000e+00, double 2.000000e+00>,43 <2 x double> <double 1.000000e+01, double 1.000000e+01>,44 metadata !"round.dynamic",45 metadata !"fpexcept.strict") #046 ret <2 x double> %div47}48 49define <3 x float> @constrained_vector_fdiv_v3f32() #0 {50; CHECK-LABEL: constrained_vector_fdiv_v3f32:51; CHECK: # %bb.0: # %entry52; CHECK-NEXT: movss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]53; CHECK-NEXT: movss {{.*#+}} xmm2 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]54; CHECK-NEXT: divss %xmm1, %xmm255; CHECK-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]56; CHECK-NEXT: divss %xmm1, %xmm057; CHECK-NEXT: movss {{.*#+}} xmm3 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]58; CHECK-NEXT: divss %xmm1, %xmm359; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]60; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]61; CHECK-NEXT: retq62;63; AVX-LABEL: constrained_vector_fdiv_v3f32:64; AVX: # %bb.0: # %entry65; AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]66; AVX-NEXT: vmovss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]67; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm168; AVX-NEXT: vmovss {{.*#+}} xmm2 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]69; AVX-NEXT: vdivss %xmm0, %xmm2, %xmm270; AVX-NEXT: vmovss {{.*#+}} xmm3 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]71; AVX-NEXT: vdivss %xmm0, %xmm3, %xmm072; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]73; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]74; AVX-NEXT: retq75entry:76 %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(77 <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,78 <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,79 metadata !"round.dynamic",80 metadata !"fpexcept.strict") #081 ret <3 x float> %div82}83 84define <3 x double> @constrained_vector_fdiv_v3f64() #0 {85; CHECK-LABEL: constrained_vector_fdiv_v3f64:86; CHECK: # %bb.0: # %entry87; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]88; CHECK-NEXT: divpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm089; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]90; CHECK-NEXT: divsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm191; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)92; CHECK-NEXT: movapd %xmm0, %xmm193; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]94; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)95; CHECK-NEXT: wait96; CHECK-NEXT: retq97;98; AVX-LABEL: constrained_vector_fdiv_v3f64:99; AVX: # %bb.0: # %entry100; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [3.0E+0,0.0E+0]101; AVX-NEXT: vdivsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0102; AVX-NEXT: vmovapd {{.*#+}} xmm1 = [1.0E+0,2.0E+0]103; AVX-NEXT: vdivpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1104; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0105; AVX-NEXT: retq106entry:107 %div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(108 <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,109 <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,110 metadata !"round.dynamic",111 metadata !"fpexcept.strict") #0112 ret <3 x double> %div113}114 115define <4 x double> @constrained_vector_fdiv_v4f64() #0 {116; CHECK-LABEL: constrained_vector_fdiv_v4f64:117; CHECK: # %bb.0: # %entry118; CHECK-NEXT: movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1]119; CHECK-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0]120; CHECK-NEXT: divpd %xmm2, %xmm1121; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]122; CHECK-NEXT: divpd %xmm2, %xmm0123; CHECK-NEXT: retq124;125; AVX1-LABEL: constrained_vector_fdiv_v4f64:126; AVX1: # %bb.0: # %entry127; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]128; AVX1-NEXT: vdivpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0129; AVX1-NEXT: retq130;131; AVX512-LABEL: constrained_vector_fdiv_v4f64:132; AVX512: # %bb.0: # %entry133; AVX512-NEXT: vbroadcastsd {{.*#+}} ymm0 = [1.0E+1,1.0E+1,1.0E+1,1.0E+1]134; AVX512-NEXT: vmovapd {{.*#+}} ymm1 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]135; AVX512-NEXT: vdivpd %ymm0, %ymm1, %ymm0136; AVX512-NEXT: retq137entry:138 %div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64(139 <4 x double> <double 1.000000e+00, double 2.000000e+00,140 double 3.000000e+00, double 4.000000e+00>,141 <4 x double> <double 1.000000e+01, double 1.000000e+01,142 double 1.000000e+01, double 1.000000e+01>,143 metadata !"round.dynamic",144 metadata !"fpexcept.strict") #0145 ret <4 x double> %div146}147 148define <1 x float> @constrained_vector_frem_v1f32() #0 {149; CHECK-LABEL: constrained_vector_frem_v1f32:150; CHECK: # %bb.0: # %entry151; CHECK-NEXT: pushq %rax152; CHECK-NEXT: .cfi_def_cfa_offset 16153; CHECK-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]154; CHECK-NEXT: movss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]155; CHECK-NEXT: callq fmodf@PLT156; CHECK-NEXT: popq %rax157; CHECK-NEXT: .cfi_def_cfa_offset 8158; CHECK-NEXT: retq159;160; AVX-LABEL: constrained_vector_frem_v1f32:161; AVX: # %bb.0: # %entry162; AVX-NEXT: pushq %rax163; AVX-NEXT: .cfi_def_cfa_offset 16164; AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]165; AVX-NEXT: vmovss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]166; AVX-NEXT: callq fmodf@PLT167; AVX-NEXT: popq %rax168; AVX-NEXT: .cfi_def_cfa_offset 8169; AVX-NEXT: retq170entry:171 %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(172 <1 x float> <float 1.000000e+00>,173 <1 x float> <float 1.000000e+01>,174 metadata !"round.dynamic",175 metadata !"fpexcept.strict") #0176 ret <1 x float> %rem177}178 179define <2 x double> @constrained_vector_frem_v2f64() #0 {180; CHECK-LABEL: constrained_vector_frem_v2f64:181; CHECK: # %bb.0: # %entry182; CHECK-NEXT: subq $24, %rsp183; CHECK-NEXT: .cfi_def_cfa_offset 32184; CHECK-NEXT: movsd {{.*#+}} xmm0 = [2.0E+0,0.0E+0]185; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]186; CHECK-NEXT: callq fmod@PLT187; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill188; CHECK-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]189; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]190; CHECK-NEXT: callq fmod@PLT191; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload192; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]193; CHECK-NEXT: addq $24, %rsp194; CHECK-NEXT: .cfi_def_cfa_offset 8195; CHECK-NEXT: retq196;197; AVX-LABEL: constrained_vector_frem_v2f64:198; AVX: # %bb.0: # %entry199; AVX-NEXT: subq $24, %rsp200; AVX-NEXT: .cfi_def_cfa_offset 32201; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [2.0E+0,0.0E+0]202; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]203; AVX-NEXT: callq fmod@PLT204; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill205; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]206; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]207; AVX-NEXT: callq fmod@PLT208; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload209; AVX-NEXT: # xmm0 = xmm0[0],mem[0]210; AVX-NEXT: addq $24, %rsp211; AVX-NEXT: .cfi_def_cfa_offset 8212; AVX-NEXT: retq213entry:214 %rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64(215 <2 x double> <double 1.000000e+00, double 2.000000e+00>,216 <2 x double> <double 1.000000e+01, double 1.000000e+01>,217 metadata !"round.dynamic",218 metadata !"fpexcept.strict") #0219 ret <2 x double> %rem220}221 222define <3 x float> @constrained_vector_frem_v3f32() #0 {223; CHECK-LABEL: constrained_vector_frem_v3f32:224; CHECK: # %bb.0: # %entry225; CHECK-NEXT: subq $40, %rsp226; CHECK-NEXT: .cfi_def_cfa_offset 48227; CHECK-NEXT: movss {{.*#+}} xmm0 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]228; CHECK-NEXT: movss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]229; CHECK-NEXT: callq fmodf@PLT230; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill231; CHECK-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]232; CHECK-NEXT: movss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]233; CHECK-NEXT: callq fmodf@PLT234; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill235; CHECK-NEXT: movss {{.*#+}} xmm0 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]236; CHECK-NEXT: movss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]237; CHECK-NEXT: callq fmodf@PLT238; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload239; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]240; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload241; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]242; CHECK-NEXT: movaps %xmm1, %xmm0243; CHECK-NEXT: addq $40, %rsp244; CHECK-NEXT: .cfi_def_cfa_offset 8245; CHECK-NEXT: retq246;247; AVX-LABEL: constrained_vector_frem_v3f32:248; AVX: # %bb.0: # %entry249; AVX-NEXT: subq $40, %rsp250; AVX-NEXT: .cfi_def_cfa_offset 48251; AVX-NEXT: vmovss {{.*#+}} xmm0 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]252; AVX-NEXT: vmovss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]253; AVX-NEXT: callq fmodf@PLT254; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill255; AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]256; AVX-NEXT: vmovss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]257; AVX-NEXT: callq fmodf@PLT258; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill259; AVX-NEXT: vmovss {{.*#+}} xmm0 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]260; AVX-NEXT: vmovss {{.*#+}} xmm1 = [1.0E+1,0.0E+0,0.0E+0,0.0E+0]261; AVX-NEXT: callq fmodf@PLT262; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload263; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]264; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload265; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]266; AVX-NEXT: addq $40, %rsp267; AVX-NEXT: .cfi_def_cfa_offset 8268; AVX-NEXT: retq269entry:270 %rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32(271 <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,272 <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,273 metadata !"round.dynamic",274 metadata !"fpexcept.strict") #0275 ret <3 x float> %rem276}277 278define <3 x double> @constrained_vector_frem_v3f64() #0 {279; CHECK-LABEL: constrained_vector_frem_v3f64:280; CHECK: # %bb.0: # %entry281; CHECK-NEXT: subq $24, %rsp282; CHECK-NEXT: .cfi_def_cfa_offset 32283; CHECK-NEXT: movsd {{.*#+}} xmm0 = [2.0E+0,0.0E+0]284; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]285; CHECK-NEXT: callq fmod@PLT286; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill287; CHECK-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]288; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]289; CHECK-NEXT: callq fmod@PLT290; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill291; CHECK-NEXT: movsd {{.*#+}} xmm0 = [3.0E+0,0.0E+0]292; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]293; CHECK-NEXT: callq fmod@PLT294; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)295; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)296; CHECK-NEXT: wait297; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload298; CHECK-NEXT: # xmm0 = mem[0],zero299; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload300; CHECK-NEXT: # xmm1 = mem[0],zero301; CHECK-NEXT: addq $24, %rsp302; CHECK-NEXT: .cfi_def_cfa_offset 8303; CHECK-NEXT: retq304;305; AVX-LABEL: constrained_vector_frem_v3f64:306; AVX: # %bb.0: # %entry307; AVX-NEXT: subq $40, %rsp308; AVX-NEXT: .cfi_def_cfa_offset 48309; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [2.0E+0,0.0E+0]310; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]311; AVX-NEXT: callq fmod@PLT312; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill313; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]314; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]315; AVX-NEXT: callq fmod@PLT316; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload317; AVX-NEXT: # xmm0 = xmm0[0],mem[0]318; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill319; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [3.0E+0,0.0E+0]320; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]321; AVX-NEXT: vzeroupper322; AVX-NEXT: callq fmod@PLT323; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload324; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0325; AVX-NEXT: addq $40, %rsp326; AVX-NEXT: .cfi_def_cfa_offset 8327; AVX-NEXT: retq328entry:329 %rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64(330 <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,331 <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,332 metadata !"round.dynamic",333 metadata !"fpexcept.strict") #0334 ret <3 x double> %rem335}336 337define <4 x double> @constrained_vector_frem_v4f64() #0 {338; CHECK-LABEL: constrained_vector_frem_v4f64:339; CHECK: # %bb.0:340; CHECK-NEXT: subq $40, %rsp341; CHECK-NEXT: .cfi_def_cfa_offset 48342; CHECK-NEXT: movsd {{.*#+}} xmm0 = [2.0E+0,0.0E+0]343; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]344; CHECK-NEXT: callq fmod@PLT345; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill346; CHECK-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]347; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]348; CHECK-NEXT: callq fmod@PLT349; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload350; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]351; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill352; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.0E+0,0.0E+0]353; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]354; CHECK-NEXT: callq fmod@PLT355; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill356; CHECK-NEXT: movsd {{.*#+}} xmm0 = [3.0E+0,0.0E+0]357; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]358; CHECK-NEXT: callq fmod@PLT359; CHECK-NEXT: movaps %xmm0, %xmm1360; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload361; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]362; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload363; CHECK-NEXT: addq $40, %rsp364; CHECK-NEXT: .cfi_def_cfa_offset 8365; CHECK-NEXT: retq366;367; AVX-LABEL: constrained_vector_frem_v4f64:368; AVX: # %bb.0:369; AVX-NEXT: subq $40, %rsp370; AVX-NEXT: .cfi_def_cfa_offset 48371; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.0E+0,0.0E+0]372; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]373; AVX-NEXT: callq fmod@PLT374; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill375; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [3.0E+0,0.0E+0]376; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]377; AVX-NEXT: callq fmod@PLT378; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload379; AVX-NEXT: # xmm0 = xmm0[0],mem[0]380; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill381; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [2.0E+0,0.0E+0]382; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]383; AVX-NEXT: callq fmod@PLT384; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill385; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]386; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [1.0E+1,0.0E+0]387; AVX-NEXT: callq fmod@PLT388; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload389; AVX-NEXT: # xmm0 = xmm0[0],mem[0]390; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload391; AVX-NEXT: addq $40, %rsp392; AVX-NEXT: .cfi_def_cfa_offset 8393; AVX-NEXT: retq394 %rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64(395 <4 x double> <double 1.000000e+00, double 2.000000e+00,396 double 3.000000e+00, double 4.000000e+00>,397 <4 x double> <double 1.000000e+01, double 1.000000e+01,398 double 1.000000e+01, double 1.000000e+01>,399 metadata !"round.dynamic",400 metadata !"fpexcept.strict") #0401 ret <4 x double> %rem402}403 404define <1 x float> @constrained_vector_fmul_v1f32() #0 {405; CHECK-LABEL: constrained_vector_fmul_v1f32:406; CHECK: # %bb.0: # %entry407; CHECK-NEXT: movss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]408; CHECK-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0409; CHECK-NEXT: retq410;411; AVX-LABEL: constrained_vector_fmul_v1f32:412; AVX: # %bb.0: # %entry413; AVX-NEXT: vmovss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]414; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0415; AVX-NEXT: retq416entry:417 %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(418 <1 x float> <float 0x7FF0000000000000>,419 <1 x float> <float 2.000000e+00>,420 metadata !"round.dynamic",421 metadata !"fpexcept.strict") #0422 ret <1 x float> %mul423}424 425define <2 x double> @constrained_vector_fmul_v2f64() #0 {426; CHECK-LABEL: constrained_vector_fmul_v2f64:427; CHECK: # %bb.0: # %entry428; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]429; CHECK-NEXT: mulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0430; CHECK-NEXT: retq431;432; AVX-LABEL: constrained_vector_fmul_v2f64:433; AVX: # %bb.0: # %entry434; AVX-NEXT: vmovddup {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]435; AVX-NEXT: # xmm0 = mem[0,0]436; AVX-NEXT: vmulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0437; AVX-NEXT: retq438entry:439 %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(440 <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,441 <2 x double> <double 2.000000e+00, double 3.000000e+00>,442 metadata !"round.dynamic",443 metadata !"fpexcept.strict") #0444 ret <2 x double> %mul445}446 447define <3 x float> @constrained_vector_fmul_v3f32() #0 {448; CHECK-LABEL: constrained_vector_fmul_v3f32:449; CHECK: # %bb.0: # %entry450; CHECK-NEXT: movss {{.*#+}} xmm1 = [+Inf,0.0E+0,0.0E+0,0.0E+0]451; CHECK-NEXT: movss {{.*#+}} xmm2 = [1.0E+2,0.0E+0,0.0E+0,0.0E+0]452; CHECK-NEXT: mulss %xmm1, %xmm2453; CHECK-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]454; CHECK-NEXT: mulss %xmm1, %xmm0455; CHECK-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1456; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]457; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]458; CHECK-NEXT: retq459;460; AVX-LABEL: constrained_vector_fmul_v3f32:461; AVX: # %bb.0: # %entry462; AVX-NEXT: vmovss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]463; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1464; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2465; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0466; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]467; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]468; AVX-NEXT: retq469entry:470 %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(471 <3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000,472 float 0x7FF0000000000000>,473 <3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>,474 metadata !"round.dynamic",475 metadata !"fpexcept.strict") #0476 ret <3 x float> %mul477}478 479define <3 x double> @constrained_vector_fmul_v3f64() #0 {480; CHECK-LABEL: constrained_vector_fmul_v3f64:481; CHECK: # %bb.0: # %entry482; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]483; CHECK-NEXT: mulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0484; CHECK-NEXT: movsd {{.*#+}} xmm1 = [1.7976931348623157E+308,0.0E+0]485; CHECK-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1486; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)487; CHECK-NEXT: movapd %xmm0, %xmm1488; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]489; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)490; CHECK-NEXT: wait491; CHECK-NEXT: retq492;493; AVX-LABEL: constrained_vector_fmul_v3f64:494; AVX: # %bb.0: # %entry495; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.7976931348623157E+308,0.0E+0]496; AVX-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0497; AVX-NEXT: vmovddup {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]498; AVX-NEXT: # xmm1 = mem[0,0]499; AVX-NEXT: vmulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1500; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0501; AVX-NEXT: retq502entry:503 %mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(504 <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,505 double 0x7FEFFFFFFFFFFFFF>,506 <3 x double> <double 1.000000e+00, double 1.000000e+01, double 1.000000e+02>,507 metadata !"round.dynamic",508 metadata !"fpexcept.strict") #0509 ret <3 x double> %mul510}511 512define <4 x double> @constrained_vector_fmul_v4f64() #0 {513; CHECK-LABEL: constrained_vector_fmul_v4f64:514; CHECK: # %bb.0: # %entry515; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]516; CHECK-NEXT: movapd {{.*#+}} xmm1 = [4.0E+0,5.0E+0]517; CHECK-NEXT: mulpd %xmm0, %xmm1518; CHECK-NEXT: mulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0519; CHECK-NEXT: retq520;521; AVX-LABEL: constrained_vector_fmul_v4f64:522; AVX: # %bb.0: # %entry523; AVX-NEXT: vbroadcastsd {{.*#+}} ymm0 = [1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308]524; AVX-NEXT: vmulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0525; AVX-NEXT: retq526entry:527 %mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64(528 <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,529 double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,530 <4 x double> <double 2.000000e+00, double 3.000000e+00,531 double 4.000000e+00, double 5.000000e+00>,532 metadata !"round.dynamic",533 metadata !"fpexcept.strict") #0534 ret <4 x double> %mul535}536 537define <1 x float> @constrained_vector_fadd_v1f32() #0 {538; CHECK-LABEL: constrained_vector_fadd_v1f32:539; CHECK: # %bb.0: # %entry540; CHECK-NEXT: movss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]541; CHECK-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0542; CHECK-NEXT: retq543;544; AVX-LABEL: constrained_vector_fadd_v1f32:545; AVX: # %bb.0: # %entry546; AVX-NEXT: vmovss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]547; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0548; AVX-NEXT: retq549entry:550 %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(551 <1 x float> <float 0x7FF0000000000000>,552 <1 x float> <float 1.0>,553 metadata !"round.dynamic",554 metadata !"fpexcept.strict") #0555 ret <1 x float> %add556}557 558define <2 x double> @constrained_vector_fadd_v2f64() #0 {559; CHECK-LABEL: constrained_vector_fadd_v2f64:560; CHECK: # %bb.0: # %entry561; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]562; CHECK-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0563; CHECK-NEXT: retq564;565; AVX-LABEL: constrained_vector_fadd_v2f64:566; AVX: # %bb.0: # %entry567; AVX-NEXT: vmovddup {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]568; AVX-NEXT: # xmm0 = mem[0,0]569; AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0570; AVX-NEXT: retq571entry:572 %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(573 <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,574 <2 x double> <double 1.000000e+00, double 1.000000e-01>,575 metadata !"round.dynamic",576 metadata !"fpexcept.strict") #0577 ret <2 x double> %add578}579 580define <3 x float> @constrained_vector_fadd_v3f32() #0 {581; CHECK-LABEL: constrained_vector_fadd_v3f32:582; CHECK: # %bb.0: # %entry583; CHECK-NEXT: xorps %xmm1, %xmm1584; CHECK-NEXT: movss {{.*#+}} xmm2 = [NaN,0.0E+0,0.0E+0,0.0E+0]585; CHECK-NEXT: addss %xmm2, %xmm1586; CHECK-NEXT: movss {{.*#+}} xmm0 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]587; CHECK-NEXT: addss %xmm2, %xmm0588; CHECK-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2589; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]590; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]591; CHECK-NEXT: retq592;593; AVX-LABEL: constrained_vector_fadd_v3f32:594; AVX: # %bb.0: # %entry595; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0596; AVX-NEXT: vmovss {{.*#+}} xmm1 = [NaN,0.0E+0,0.0E+0,0.0E+0]597; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0598; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2599; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1600; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]601; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]602; AVX-NEXT: retq603entry:604 %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(605 <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,606 float 0xFFFFFFFFE0000000>,607 <3 x float> <float 2.0, float 1.0, float 0.0>,608 metadata !"round.dynamic",609 metadata !"fpexcept.strict") #0610 ret <3 x float> %add611}612 613define <3 x double> @constrained_vector_fadd_v3f64() #0 {614; CHECK-LABEL: constrained_vector_fadd_v3f64:615; CHECK: # %bb.0: # %entry616; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]617; CHECK-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0618; CHECK-NEXT: xorpd %xmm1, %xmm1619; CHECK-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1620; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)621; CHECK-NEXT: movapd %xmm0, %xmm1622; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]623; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)624; CHECK-NEXT: wait625; CHECK-NEXT: retq626;627; AVX-LABEL: constrained_vector_fadd_v3f64:628; AVX: # %bb.0: # %entry629; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0630; AVX-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0631; AVX-NEXT: vmovddup {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]632; AVX-NEXT: # xmm1 = mem[0,0]633; AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1634; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0635; AVX-NEXT: retq636entry:637 %add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(638 <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,639 double 0x7FEFFFFFFFFFFFFF>,640 <3 x double> <double 2.0, double 1.0, double 0.0>,641 metadata !"round.dynamic",642 metadata !"fpexcept.strict") #0643 ret <3 x double> %add644}645 646define <4 x double> @constrained_vector_fadd_v4f64() #0 {647; CHECK-LABEL: constrained_vector_fadd_v4f64:648; CHECK: # %bb.0: # %entry649; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]650; CHECK-NEXT: movapd {{.*#+}} xmm1 = [2.0E+0,2.0000000000000001E-1]651; CHECK-NEXT: addpd %xmm0, %xmm1652; CHECK-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0653; CHECK-NEXT: retq654;655; AVX-LABEL: constrained_vector_fadd_v4f64:656; AVX: # %bb.0: # %entry657; AVX-NEXT: vbroadcastsd {{.*#+}} ymm0 = [1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308]658; AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0659; AVX-NEXT: retq660entry:661 %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(662 <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,663 double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,664 <4 x double> <double 1.000000e+00, double 1.000000e-01,665 double 2.000000e+00, double 2.000000e-01>,666 metadata !"round.dynamic",667 metadata !"fpexcept.strict") #0668 ret <4 x double> %add669}670 671define <1 x float> @constrained_vector_fsub_v1f32() #0 {672; CHECK-LABEL: constrained_vector_fsub_v1f32:673; CHECK: # %bb.0: # %entry674; CHECK-NEXT: movss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]675; CHECK-NEXT: subss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0676; CHECK-NEXT: retq677;678; AVX-LABEL: constrained_vector_fsub_v1f32:679; AVX: # %bb.0: # %entry680; AVX-NEXT: vmovss {{.*#+}} xmm0 = [+Inf,0.0E+0,0.0E+0,0.0E+0]681; AVX-NEXT: vsubss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0682; AVX-NEXT: retq683entry:684 %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(685 <1 x float> <float 0x7FF0000000000000>,686 <1 x float> <float 1.000000e+00>,687 metadata !"round.dynamic",688 metadata !"fpexcept.strict") #0689 ret <1 x float> %sub690}691 692define <2 x double> @constrained_vector_fsub_v2f64() #0 {693; CHECK-LABEL: constrained_vector_fsub_v2f64:694; CHECK: # %bb.0: # %entry695; CHECK-NEXT: movapd {{.*#+}} xmm0 = [-1.7976931348623157E+308,-1.7976931348623157E+308]696; CHECK-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0697; CHECK-NEXT: retq698;699; AVX-LABEL: constrained_vector_fsub_v2f64:700; AVX: # %bb.0: # %entry701; AVX-NEXT: vmovddup {{.*#+}} xmm0 = [-1.7976931348623157E+308,-1.7976931348623157E+308]702; AVX-NEXT: # xmm0 = mem[0,0]703; AVX-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0704; AVX-NEXT: retq705entry:706 %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(707 <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,708 <2 x double> <double 1.000000e+00, double 1.000000e-01>,709 metadata !"round.dynamic",710 metadata !"fpexcept.strict") #0711 ret <2 x double> %sub712}713 714define <3 x float> @constrained_vector_fsub_v3f32() #0 {715; CHECK-LABEL: constrained_vector_fsub_v3f32:716; CHECK: # %bb.0: # %entry717; CHECK-NEXT: xorps %xmm0, %xmm0718; CHECK-NEXT: movss {{.*#+}} xmm1 = [NaN,0.0E+0,0.0E+0,0.0E+0]719; CHECK-NEXT: movaps %xmm1, %xmm2720; CHECK-NEXT: subss %xmm0, %xmm2721; CHECK-NEXT: movaps %xmm1, %xmm0722; CHECK-NEXT: subss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0723; CHECK-NEXT: subss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1724; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]725; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]726; CHECK-NEXT: retq727;728; AVX-LABEL: constrained_vector_fsub_v3f32:729; AVX: # %bb.0: # %entry730; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0731; AVX-NEXT: vmovss {{.*#+}} xmm1 = [NaN,0.0E+0,0.0E+0,0.0E+0]732; AVX-NEXT: vsubss %xmm0, %xmm1, %xmm0733; AVX-NEXT: vsubss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2734; AVX-NEXT: vsubss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1735; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]736; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]737; AVX-NEXT: retq738entry:739 %sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(740 <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,741 float 0xFFFFFFFFE0000000>,742 <3 x float> <float 2.0, float 1.0, float 0.0>,743 metadata !"round.dynamic",744 metadata !"fpexcept.strict") #0745 ret <3 x float> %sub746}747 748define <3 x double> @constrained_vector_fsub_v3f64() #0 {749; CHECK-LABEL: constrained_vector_fsub_v3f64:750; CHECK: # %bb.0: # %entry751; CHECK-NEXT: xorpd %xmm0, %xmm0752; CHECK-NEXT: movsd {{.*#+}} xmm1 = [-1.7976931348623157E+308,0.0E+0]753; CHECK-NEXT: subsd %xmm0, %xmm1754; CHECK-NEXT: movapd {{.*#+}} xmm0 = [-1.7976931348623157E+308,-1.7976931348623157E+308]755; CHECK-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0756; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)757; CHECK-NEXT: movapd %xmm0, %xmm1758; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]759; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)760; CHECK-NEXT: wait761; CHECK-NEXT: retq762;763; AVX-LABEL: constrained_vector_fsub_v3f64:764; AVX: # %bb.0: # %entry765; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0766; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [-1.7976931348623157E+308,0.0E+0]767; AVX-NEXT: vsubsd %xmm0, %xmm1, %xmm0768; AVX-NEXT: vmovddup {{.*#+}} xmm1 = [-1.7976931348623157E+308,-1.7976931348623157E+308]769; AVX-NEXT: # xmm1 = mem[0,0]770; AVX-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1771; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0772; AVX-NEXT: retq773entry:774 %sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(775 <3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,776 double 0xFFEFFFFFFFFFFFFF>,777 <3 x double> <double 2.0, double 1.0, double 0.0>,778 metadata !"round.dynamic",779 metadata !"fpexcept.strict") #0780 ret <3 x double> %sub781}782 783define <4 x double> @constrained_vector_fsub_v4f64() #0 {784; CHECK-LABEL: constrained_vector_fsub_v4f64:785; CHECK: # %bb.0: # %entry786; CHECK-NEXT: movapd {{.*#+}} xmm0 = [-1.7976931348623157E+308,-1.7976931348623157E+308]787; CHECK-NEXT: movapd %xmm0, %xmm1788; CHECK-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1789; CHECK-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0790; CHECK-NEXT: retq791;792; AVX-LABEL: constrained_vector_fsub_v4f64:793; AVX: # %bb.0: # %entry794; AVX-NEXT: vbroadcastsd {{.*#+}} ymm0 = [-1.7976931348623157E+308,-1.7976931348623157E+308,-1.7976931348623157E+308,-1.7976931348623157E+308]795; AVX-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0796; AVX-NEXT: retq797entry:798 %sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64(799 <4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,800 double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,801 <4 x double> <double 1.000000e+00, double 1.000000e-01,802 double 2.000000e+00, double 2.000000e-01>,803 metadata !"round.dynamic",804 metadata !"fpexcept.strict") #0805 ret <4 x double> %sub806}807 808define <1 x float> @constrained_vector_sqrt_v1f32() #0 {809; CHECK-LABEL: constrained_vector_sqrt_v1f32:810; CHECK: # %bb.0: # %entry811; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]812; CHECK-NEXT: sqrtss %xmm0, %xmm0813; CHECK-NEXT: retq814;815; AVX-LABEL: constrained_vector_sqrt_v1f32:816; AVX: # %bb.0: # %entry817; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]818; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0819; AVX-NEXT: retq820entry:821 %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(822 <1 x float> <float 42.0>,823 metadata !"round.dynamic",824 metadata !"fpexcept.strict") #0825 ret <1 x float> %sqrt826}827 828define <2 x double> @constrained_vector_sqrt_v2f64() #0 {829; CHECK-LABEL: constrained_vector_sqrt_v2f64:830; CHECK: # %bb.0: # %entry831; CHECK-NEXT: sqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0832; CHECK-NEXT: retq833;834; AVX-LABEL: constrained_vector_sqrt_v2f64:835; AVX: # %bb.0: # %entry836; AVX-NEXT: vsqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0837; AVX-NEXT: retq838entry:839 %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(840 <2 x double> <double 42.0, double 42.1>,841 metadata !"round.dynamic",842 metadata !"fpexcept.strict") #0843 ret <2 x double> %sqrt844}845 846define <3 x float> @constrained_vector_sqrt_v3f32() #0 {847; CHECK-LABEL: constrained_vector_sqrt_v3f32:848; CHECK: # %bb.0: # %entry849; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]850; CHECK-NEXT: sqrtss %xmm0, %xmm1851; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]852; CHECK-NEXT: sqrtss %xmm0, %xmm0853; CHECK-NEXT: movss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]854; CHECK-NEXT: sqrtss %xmm2, %xmm2855; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]856; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]857; CHECK-NEXT: retq858;859; AVX-LABEL: constrained_vector_sqrt_v3f32:860; AVX: # %bb.0: # %entry861; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]862; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0863; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]864; AVX-NEXT: vsqrtss %xmm1, %xmm1, %xmm1865; AVX-NEXT: vmovss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]866; AVX-NEXT: vsqrtss %xmm2, %xmm2, %xmm2867; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]868; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]869; AVX-NEXT: retq870entry:871 %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(872 <3 x float> <float 42.0, float 43.0, float 44.0>,873 metadata !"round.dynamic",874 metadata !"fpexcept.strict") #0875 ret <3 x float> %sqrt876}877 878define <3 x double> @constrained_vector_sqrt_v3f64() #0 {879; CHECK-LABEL: constrained_vector_sqrt_v3f64:880; CHECK: # %bb.0: # %entry881; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]882; CHECK-NEXT: sqrtsd %xmm0, %xmm1883; CHECK-NEXT: sqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0884; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)885; CHECK-NEXT: movapd %xmm0, %xmm1886; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]887; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)888; CHECK-NEXT: wait889; CHECK-NEXT: retq890;891; AVX-LABEL: constrained_vector_sqrt_v3f64:892; AVX: # %bb.0: # %entry893; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]894; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0895; AVX-NEXT: vsqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1896; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0897; AVX-NEXT: retq898entry:899 %sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(900 <3 x double> <double 42.0, double 42.1, double 42.2>,901 metadata !"round.dynamic",902 metadata !"fpexcept.strict") #0903 ret <3 x double> %sqrt904}905 906define <4 x double> @constrained_vector_sqrt_v4f64() #0 {907; CHECK-LABEL: constrained_vector_sqrt_v4f64:908; CHECK: # %bb.0: # %entry909; CHECK-NEXT: sqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1910; CHECK-NEXT: sqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0911; CHECK-NEXT: retq912;913; AVX-LABEL: constrained_vector_sqrt_v4f64:914; AVX: # %bb.0: # %entry915; AVX-NEXT: vsqrtpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0916; AVX-NEXT: retq917 entry:918 %sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64(919 <4 x double> <double 42.0, double 42.1,920 double 42.2, double 42.3>,921 metadata !"round.dynamic",922 metadata !"fpexcept.strict") #0923 ret <4 x double> %sqrt924}925 926define <1 x float> @constrained_vector_pow_v1f32() #0 {927; CHECK-LABEL: constrained_vector_pow_v1f32:928; CHECK: # %bb.0: # %entry929; CHECK-NEXT: pushq %rax930; CHECK-NEXT: .cfi_def_cfa_offset 16931; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]932; CHECK-NEXT: movss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]933; CHECK-NEXT: callq powf@PLT934; CHECK-NEXT: popq %rax935; CHECK-NEXT: .cfi_def_cfa_offset 8936; CHECK-NEXT: retq937;938; AVX-LABEL: constrained_vector_pow_v1f32:939; AVX: # %bb.0: # %entry940; AVX-NEXT: pushq %rax941; AVX-NEXT: .cfi_def_cfa_offset 16942; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]943; AVX-NEXT: vmovss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]944; AVX-NEXT: callq powf@PLT945; AVX-NEXT: popq %rax946; AVX-NEXT: .cfi_def_cfa_offset 8947; AVX-NEXT: retq948entry:949 %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(950 <1 x float> <float 42.0>,951 <1 x float> <float 3.0>,952 metadata !"round.dynamic",953 metadata !"fpexcept.strict") #0954 ret <1 x float> %pow955}956 957define <2 x double> @constrained_vector_pow_v2f64() #0 {958; CHECK-LABEL: constrained_vector_pow_v2f64:959; CHECK: # %bb.0: # %entry960; CHECK-NEXT: subq $24, %rsp961; CHECK-NEXT: .cfi_def_cfa_offset 32962; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]963; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]964; CHECK-NEXT: callq pow@PLT965; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill966; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]967; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]968; CHECK-NEXT: callq pow@PLT969; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload970; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]971; CHECK-NEXT: addq $24, %rsp972; CHECK-NEXT: .cfi_def_cfa_offset 8973; CHECK-NEXT: retq974;975; AVX-LABEL: constrained_vector_pow_v2f64:976; AVX: # %bb.0: # %entry977; AVX-NEXT: subq $24, %rsp978; AVX-NEXT: .cfi_def_cfa_offset 32979; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]980; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]981; AVX-NEXT: callq pow@PLT982; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill983; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]984; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]985; AVX-NEXT: callq pow@PLT986; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload987; AVX-NEXT: # xmm0 = xmm0[0],mem[0]988; AVX-NEXT: addq $24, %rsp989; AVX-NEXT: .cfi_def_cfa_offset 8990; AVX-NEXT: retq991entry:992 %pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64(993 <2 x double> <double 42.1, double 42.2>,994 <2 x double> <double 3.0, double 3.0>,995 metadata !"round.dynamic",996 metadata !"fpexcept.strict") #0997 ret <2 x double> %pow998}999 1000define <3 x float> @constrained_vector_pow_v3f32() #0 {1001; CHECK-LABEL: constrained_vector_pow_v3f32:1002; CHECK: # %bb.0: # %entry1003; CHECK-NEXT: subq $40, %rsp1004; CHECK-NEXT: .cfi_def_cfa_offset 481005; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1006; CHECK-NEXT: movss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]1007; CHECK-NEXT: callq powf@PLT1008; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1009; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1010; CHECK-NEXT: movss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]1011; CHECK-NEXT: callq powf@PLT1012; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1013; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1014; CHECK-NEXT: movss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]1015; CHECK-NEXT: callq powf@PLT1016; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload1017; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]1018; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1019; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1020; CHECK-NEXT: movaps %xmm1, %xmm01021; CHECK-NEXT: addq $40, %rsp1022; CHECK-NEXT: .cfi_def_cfa_offset 81023; CHECK-NEXT: retq1024;1025; AVX-LABEL: constrained_vector_pow_v3f32:1026; AVX: # %bb.0: # %entry1027; AVX-NEXT: subq $40, %rsp1028; AVX-NEXT: .cfi_def_cfa_offset 481029; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1030; AVX-NEXT: vmovss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]1031; AVX-NEXT: callq powf@PLT1032; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1033; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1034; AVX-NEXT: vmovss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]1035; AVX-NEXT: callq powf@PLT1036; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1037; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1038; AVX-NEXT: vmovss {{.*#+}} xmm1 = [3.0E+0,0.0E+0,0.0E+0,0.0E+0]1039; AVX-NEXT: callq powf@PLT1040; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload1041; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]1042; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1043; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]1044; AVX-NEXT: addq $40, %rsp1045; AVX-NEXT: .cfi_def_cfa_offset 81046; AVX-NEXT: retq1047entry:1048 %pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32(1049 <3 x float> <float 42.0, float 43.0, float 44.0>,1050 <3 x float> <float 3.0, float 3.0, float 3.0>,1051 metadata !"round.dynamic",1052 metadata !"fpexcept.strict") #01053 ret <3 x float> %pow1054}1055 1056define <3 x double> @constrained_vector_pow_v3f64() #0 {1057; CHECK-LABEL: constrained_vector_pow_v3f64:1058; CHECK: # %bb.0: # %entry1059; CHECK-NEXT: subq $24, %rsp1060; CHECK-NEXT: .cfi_def_cfa_offset 321061; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1062; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1063; CHECK-NEXT: callq pow@PLT1064; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1065; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1066; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1067; CHECK-NEXT: callq pow@PLT1068; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill1069; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1070; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1071; CHECK-NEXT: callq pow@PLT1072; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)1073; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)1074; CHECK-NEXT: wait1075; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload1076; CHECK-NEXT: # xmm0 = mem[0],zero1077; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload1078; CHECK-NEXT: # xmm1 = mem[0],zero1079; CHECK-NEXT: addq $24, %rsp1080; CHECK-NEXT: .cfi_def_cfa_offset 81081; CHECK-NEXT: retq1082;1083; AVX-LABEL: constrained_vector_pow_v3f64:1084; AVX: # %bb.0: # %entry1085; AVX-NEXT: subq $40, %rsp1086; AVX-NEXT: .cfi_def_cfa_offset 481087; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1088; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1089; AVX-NEXT: callq pow@PLT1090; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1091; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1092; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1093; AVX-NEXT: callq pow@PLT1094; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1095; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1096; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill1097; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1098; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1099; AVX-NEXT: vzeroupper1100; AVX-NEXT: callq pow@PLT1101; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload1102; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm01103; AVX-NEXT: addq $40, %rsp1104; AVX-NEXT: .cfi_def_cfa_offset 81105; AVX-NEXT: retq1106entry:1107 %pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64(1108 <3 x double> <double 42.0, double 42.1, double 42.2>,1109 <3 x double> <double 3.0, double 3.0, double 3.0>,1110 metadata !"round.dynamic",1111 metadata !"fpexcept.strict") #01112 ret <3 x double> %pow1113}1114 1115define <4 x double> @constrained_vector_pow_v4f64() #0 {1116; CHECK-LABEL: constrained_vector_pow_v4f64:1117; CHECK: # %bb.0: # %entry1118; CHECK-NEXT: subq $40, %rsp1119; CHECK-NEXT: .cfi_def_cfa_offset 481120; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1121; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1122; CHECK-NEXT: callq pow@PLT1123; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1124; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1125; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1126; CHECK-NEXT: callq pow@PLT1127; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1128; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1129; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1130; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]1131; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1132; CHECK-NEXT: callq pow@PLT1133; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1134; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1135; CHECK-NEXT: movsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1136; CHECK-NEXT: callq pow@PLT1137; CHECK-NEXT: movaps %xmm0, %xmm11138; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1139; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1140; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload1141; CHECK-NEXT: addq $40, %rsp1142; CHECK-NEXT: .cfi_def_cfa_offset 81143; CHECK-NEXT: retq1144;1145; AVX-LABEL: constrained_vector_pow_v4f64:1146; AVX: # %bb.0: # %entry1147; AVX-NEXT: subq $40, %rsp1148; AVX-NEXT: .cfi_def_cfa_offset 481149; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]1150; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1151; AVX-NEXT: callq pow@PLT1152; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1153; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1154; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1155; AVX-NEXT: callq pow@PLT1156; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1157; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1158; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1159; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1160; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1161; AVX-NEXT: callq pow@PLT1162; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1163; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1164; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [3.0E+0,0.0E+0]1165; AVX-NEXT: callq pow@PLT1166; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1167; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1168; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload1169; AVX-NEXT: addq $40, %rsp1170; AVX-NEXT: .cfi_def_cfa_offset 81171; AVX-NEXT: retq1172entry:1173 %pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64(1174 <4 x double> <double 42.1, double 42.2,1175 double 42.3, double 42.4>,1176 <4 x double> <double 3.0, double 3.0,1177 double 3.0, double 3.0>,1178 metadata !"round.dynamic",1179 metadata !"fpexcept.strict") #01180 ret <4 x double> %pow1181}1182 1183define <1 x float> @constrained_vector_powi_v1f32() #0 {1184; CHECK-LABEL: constrained_vector_powi_v1f32:1185; CHECK: # %bb.0: # %entry1186; CHECK-NEXT: pushq %rax1187; CHECK-NEXT: .cfi_def_cfa_offset 161188; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1189; CHECK-NEXT: movl $3, %edi1190; CHECK-NEXT: callq __powisf2@PLT1191; CHECK-NEXT: popq %rax1192; CHECK-NEXT: .cfi_def_cfa_offset 81193; CHECK-NEXT: retq1194;1195; AVX-LABEL: constrained_vector_powi_v1f32:1196; AVX: # %bb.0: # %entry1197; AVX-NEXT: pushq %rax1198; AVX-NEXT: .cfi_def_cfa_offset 161199; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1200; AVX-NEXT: movl $3, %edi1201; AVX-NEXT: callq __powisf2@PLT1202; AVX-NEXT: popq %rax1203; AVX-NEXT: .cfi_def_cfa_offset 81204; AVX-NEXT: retq1205entry:1206 %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(1207 <1 x float> <float 42.0>,1208 i32 3,1209 metadata !"round.dynamic",1210 metadata !"fpexcept.strict") #01211 ret <1 x float> %powi1212}1213 1214define <2 x double> @constrained_vector_powi_v2f64() #0 {1215; CHECK-LABEL: constrained_vector_powi_v2f64:1216; CHECK: # %bb.0: # %entry1217; CHECK-NEXT: subq $24, %rsp1218; CHECK-NEXT: .cfi_def_cfa_offset 321219; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1220; CHECK-NEXT: movl $3, %edi1221; CHECK-NEXT: callq __powidf2@PLT1222; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1223; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1224; CHECK-NEXT: movl $3, %edi1225; CHECK-NEXT: callq __powidf2@PLT1226; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1227; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1228; CHECK-NEXT: addq $24, %rsp1229; CHECK-NEXT: .cfi_def_cfa_offset 81230; CHECK-NEXT: retq1231;1232; AVX-LABEL: constrained_vector_powi_v2f64:1233; AVX: # %bb.0: # %entry1234; AVX-NEXT: subq $24, %rsp1235; AVX-NEXT: .cfi_def_cfa_offset 321236; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1237; AVX-NEXT: movl $3, %edi1238; AVX-NEXT: callq __powidf2@PLT1239; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1240; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1241; AVX-NEXT: movl $3, %edi1242; AVX-NEXT: callq __powidf2@PLT1243; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1244; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1245; AVX-NEXT: addq $24, %rsp1246; AVX-NEXT: .cfi_def_cfa_offset 81247; AVX-NEXT: retq1248entry:1249 %powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64(1250 <2 x double> <double 42.1, double 42.2>,1251 i32 3,1252 metadata !"round.dynamic",1253 metadata !"fpexcept.strict") #01254 ret <2 x double> %powi1255}1256 1257define <3 x float> @constrained_vector_powi_v3f32() #0 {1258; CHECK-LABEL: constrained_vector_powi_v3f32:1259; CHECK: # %bb.0: # %entry1260; CHECK-NEXT: subq $40, %rsp1261; CHECK-NEXT: .cfi_def_cfa_offset 481262; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1263; CHECK-NEXT: movl $3, %edi1264; CHECK-NEXT: callq __powisf2@PLT1265; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1266; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1267; CHECK-NEXT: movl $3, %edi1268; CHECK-NEXT: callq __powisf2@PLT1269; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1270; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1271; CHECK-NEXT: movl $3, %edi1272; CHECK-NEXT: callq __powisf2@PLT1273; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload1274; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]1275; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1276; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1277; CHECK-NEXT: movaps %xmm1, %xmm01278; CHECK-NEXT: addq $40, %rsp1279; CHECK-NEXT: .cfi_def_cfa_offset 81280; CHECK-NEXT: retq1281;1282; AVX-LABEL: constrained_vector_powi_v3f32:1283; AVX: # %bb.0: # %entry1284; AVX-NEXT: subq $40, %rsp1285; AVX-NEXT: .cfi_def_cfa_offset 481286; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1287; AVX-NEXT: movl $3, %edi1288; AVX-NEXT: callq __powisf2@PLT1289; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1290; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1291; AVX-NEXT: movl $3, %edi1292; AVX-NEXT: callq __powisf2@PLT1293; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1294; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1295; AVX-NEXT: movl $3, %edi1296; AVX-NEXT: callq __powisf2@PLT1297; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload1298; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]1299; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1300; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]1301; AVX-NEXT: addq $40, %rsp1302; AVX-NEXT: .cfi_def_cfa_offset 81303; AVX-NEXT: retq1304entry:1305 %powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32(1306 <3 x float> <float 42.0, float 43.0, float 44.0>,1307 i32 3,1308 metadata !"round.dynamic",1309 metadata !"fpexcept.strict") #01310 ret <3 x float> %powi1311}1312 1313define <3 x double> @constrained_vector_powi_v3f64() #0 {1314; CHECK-LABEL: constrained_vector_powi_v3f64:1315; CHECK: # %bb.0: # %entry1316; CHECK-NEXT: subq $24, %rsp1317; CHECK-NEXT: .cfi_def_cfa_offset 321318; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1319; CHECK-NEXT: movl $3, %edi1320; CHECK-NEXT: callq __powidf2@PLT1321; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1322; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1323; CHECK-NEXT: movl $3, %edi1324; CHECK-NEXT: callq __powidf2@PLT1325; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill1326; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1327; CHECK-NEXT: movl $3, %edi1328; CHECK-NEXT: callq __powidf2@PLT1329; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)1330; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)1331; CHECK-NEXT: wait1332; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload1333; CHECK-NEXT: # xmm0 = mem[0],zero1334; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload1335; CHECK-NEXT: # xmm1 = mem[0],zero1336; CHECK-NEXT: addq $24, %rsp1337; CHECK-NEXT: .cfi_def_cfa_offset 81338; CHECK-NEXT: retq1339;1340; AVX-LABEL: constrained_vector_powi_v3f64:1341; AVX: # %bb.0: # %entry1342; AVX-NEXT: subq $40, %rsp1343; AVX-NEXT: .cfi_def_cfa_offset 481344; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1345; AVX-NEXT: movl $3, %edi1346; AVX-NEXT: callq __powidf2@PLT1347; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1348; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1349; AVX-NEXT: movl $3, %edi1350; AVX-NEXT: callq __powidf2@PLT1351; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1352; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1353; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill1354; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1355; AVX-NEXT: movl $3, %edi1356; AVX-NEXT: vzeroupper1357; AVX-NEXT: callq __powidf2@PLT1358; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload1359; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm01360; AVX-NEXT: addq $40, %rsp1361; AVX-NEXT: .cfi_def_cfa_offset 81362; AVX-NEXT: retq1363entry:1364 %powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64(1365 <3 x double> <double 42.0, double 42.1, double 42.2>,1366 i32 3,1367 metadata !"round.dynamic",1368 metadata !"fpexcept.strict") #01369 ret <3 x double> %powi1370}1371 1372define <4 x double> @constrained_vector_powi_v4f64() #0 {1373; CHECK-LABEL: constrained_vector_powi_v4f64:1374; CHECK: # %bb.0: # %entry1375; CHECK-NEXT: subq $40, %rsp1376; CHECK-NEXT: .cfi_def_cfa_offset 481377; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1378; CHECK-NEXT: movl $3, %edi1379; CHECK-NEXT: callq __powidf2@PLT1380; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1381; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1382; CHECK-NEXT: movl $3, %edi1383; CHECK-NEXT: callq __powidf2@PLT1384; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1385; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1386; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1387; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]1388; CHECK-NEXT: movl $3, %edi1389; CHECK-NEXT: callq __powidf2@PLT1390; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1391; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1392; CHECK-NEXT: movl $3, %edi1393; CHECK-NEXT: callq __powidf2@PLT1394; CHECK-NEXT: movaps %xmm0, %xmm11395; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1396; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1397; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload1398; CHECK-NEXT: addq $40, %rsp1399; CHECK-NEXT: .cfi_def_cfa_offset 81400; CHECK-NEXT: retq1401;1402; AVX-LABEL: constrained_vector_powi_v4f64:1403; AVX: # %bb.0: # %entry1404; AVX-NEXT: subq $40, %rsp1405; AVX-NEXT: .cfi_def_cfa_offset 481406; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]1407; AVX-NEXT: movl $3, %edi1408; AVX-NEXT: callq __powidf2@PLT1409; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1410; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1411; AVX-NEXT: movl $3, %edi1412; AVX-NEXT: callq __powidf2@PLT1413; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1414; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1415; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1416; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1417; AVX-NEXT: movl $3, %edi1418; AVX-NEXT: callq __powidf2@PLT1419; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1420; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1421; AVX-NEXT: movl $3, %edi1422; AVX-NEXT: callq __powidf2@PLT1423; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1424; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1425; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload1426; AVX-NEXT: addq $40, %rsp1427; AVX-NEXT: .cfi_def_cfa_offset 81428; AVX-NEXT: retq1429entry:1430 %powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64(1431 <4 x double> <double 42.1, double 42.2,1432 double 42.3, double 42.4>,1433 i32 3,1434 metadata !"round.dynamic",1435 metadata !"fpexcept.strict") #01436 ret <4 x double> %powi1437}1438 1439define <1 x float> @constrained_vector_sin_v1f32() #0 {1440; CHECK-LABEL: constrained_vector_sin_v1f32:1441; CHECK: # %bb.0: # %entry1442; CHECK-NEXT: pushq %rax1443; CHECK-NEXT: .cfi_def_cfa_offset 161444; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1445; CHECK-NEXT: callq sinf@PLT1446; CHECK-NEXT: popq %rax1447; CHECK-NEXT: .cfi_def_cfa_offset 81448; CHECK-NEXT: retq1449;1450; AVX-LABEL: constrained_vector_sin_v1f32:1451; AVX: # %bb.0: # %entry1452; AVX-NEXT: pushq %rax1453; AVX-NEXT: .cfi_def_cfa_offset 161454; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1455; AVX-NEXT: callq sinf@PLT1456; AVX-NEXT: popq %rax1457; AVX-NEXT: .cfi_def_cfa_offset 81458; AVX-NEXT: retq1459entry:1460 %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(1461 <1 x float> <float 42.0>,1462 metadata !"round.dynamic",1463 metadata !"fpexcept.strict") #01464 ret <1 x float> %sin1465}1466 1467define <2 x double> @constrained_vector_sin_v2f64() #0 {1468; CHECK-LABEL: constrained_vector_sin_v2f64:1469; CHECK: # %bb.0: # %entry1470; CHECK-NEXT: subq $24, %rsp1471; CHECK-NEXT: .cfi_def_cfa_offset 321472; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1473; CHECK-NEXT: callq sin@PLT1474; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1475; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1476; CHECK-NEXT: callq sin@PLT1477; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1478; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1479; CHECK-NEXT: addq $24, %rsp1480; CHECK-NEXT: .cfi_def_cfa_offset 81481; CHECK-NEXT: retq1482;1483; AVX-LABEL: constrained_vector_sin_v2f64:1484; AVX: # %bb.0: # %entry1485; AVX-NEXT: subq $24, %rsp1486; AVX-NEXT: .cfi_def_cfa_offset 321487; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1488; AVX-NEXT: callq sin@PLT1489; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1490; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1491; AVX-NEXT: callq sin@PLT1492; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1493; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1494; AVX-NEXT: addq $24, %rsp1495; AVX-NEXT: .cfi_def_cfa_offset 81496; AVX-NEXT: retq1497entry:1498 %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(1499 <2 x double> <double 42.0, double 42.1>,1500 metadata !"round.dynamic",1501 metadata !"fpexcept.strict") #01502 ret <2 x double> %sin1503}1504 1505define <3 x float> @constrained_vector_sin_v3f32() #0 {1506; CHECK-LABEL: constrained_vector_sin_v3f32:1507; CHECK: # %bb.0: # %entry1508; CHECK-NEXT: subq $40, %rsp1509; CHECK-NEXT: .cfi_def_cfa_offset 481510; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1511; CHECK-NEXT: callq sinf@PLT1512; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1513; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1514; CHECK-NEXT: callq sinf@PLT1515; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1516; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1517; CHECK-NEXT: callq sinf@PLT1518; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload1519; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]1520; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1521; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1522; CHECK-NEXT: movaps %xmm1, %xmm01523; CHECK-NEXT: addq $40, %rsp1524; CHECK-NEXT: .cfi_def_cfa_offset 81525; CHECK-NEXT: retq1526;1527; AVX-LABEL: constrained_vector_sin_v3f32:1528; AVX: # %bb.0: # %entry1529; AVX-NEXT: subq $40, %rsp1530; AVX-NEXT: .cfi_def_cfa_offset 481531; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1532; AVX-NEXT: callq sinf@PLT1533; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1534; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1535; AVX-NEXT: callq sinf@PLT1536; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1537; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1538; AVX-NEXT: callq sinf@PLT1539; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload1540; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]1541; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1542; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]1543; AVX-NEXT: addq $40, %rsp1544; AVX-NEXT: .cfi_def_cfa_offset 81545; AVX-NEXT: retq1546entry:1547 %sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32(1548 <3 x float> <float 42.0, float 43.0, float 44.0>,1549 metadata !"round.dynamic",1550 metadata !"fpexcept.strict") #01551 ret <3 x float> %sin1552}1553 1554define <3 x double> @constrained_vector_sin_v3f64() #0 {1555; CHECK-LABEL: constrained_vector_sin_v3f64:1556; CHECK: # %bb.0: # %entry1557; CHECK-NEXT: subq $24, %rsp1558; CHECK-NEXT: .cfi_def_cfa_offset 321559; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1560; CHECK-NEXT: callq sin@PLT1561; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1562; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1563; CHECK-NEXT: callq sin@PLT1564; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill1565; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1566; CHECK-NEXT: callq sin@PLT1567; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)1568; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)1569; CHECK-NEXT: wait1570; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload1571; CHECK-NEXT: # xmm0 = mem[0],zero1572; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload1573; CHECK-NEXT: # xmm1 = mem[0],zero1574; CHECK-NEXT: addq $24, %rsp1575; CHECK-NEXT: .cfi_def_cfa_offset 81576; CHECK-NEXT: retq1577;1578; AVX-LABEL: constrained_vector_sin_v3f64:1579; AVX: # %bb.0: # %entry1580; AVX-NEXT: subq $40, %rsp1581; AVX-NEXT: .cfi_def_cfa_offset 481582; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1583; AVX-NEXT: callq sin@PLT1584; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1585; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1586; AVX-NEXT: callq sin@PLT1587; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1588; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1589; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill1590; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1591; AVX-NEXT: vzeroupper1592; AVX-NEXT: callq sin@PLT1593; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload1594; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm01595; AVX-NEXT: addq $40, %rsp1596; AVX-NEXT: .cfi_def_cfa_offset 81597; AVX-NEXT: retq1598entry:1599 %sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64(1600 <3 x double> <double 42.0, double 42.1, double 42.2>,1601 metadata !"round.dynamic",1602 metadata !"fpexcept.strict") #01603 ret <3 x double> %sin1604}1605 1606define <4 x double> @constrained_vector_sin_v4f64() #0 {1607; CHECK-LABEL: constrained_vector_sin_v4f64:1608; CHECK: # %bb.0: # %entry1609; CHECK-NEXT: subq $40, %rsp1610; CHECK-NEXT: .cfi_def_cfa_offset 481611; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1612; CHECK-NEXT: callq sin@PLT1613; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1614; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1615; CHECK-NEXT: callq sin@PLT1616; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1617; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1618; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1619; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1620; CHECK-NEXT: callq sin@PLT1621; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1622; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1623; CHECK-NEXT: callq sin@PLT1624; CHECK-NEXT: movaps %xmm0, %xmm11625; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1626; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1627; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload1628; CHECK-NEXT: addq $40, %rsp1629; CHECK-NEXT: .cfi_def_cfa_offset 81630; CHECK-NEXT: retq1631;1632; AVX-LABEL: constrained_vector_sin_v4f64:1633; AVX: # %bb.0: # %entry1634; AVX-NEXT: subq $40, %rsp1635; AVX-NEXT: .cfi_def_cfa_offset 481636; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1637; AVX-NEXT: callq sin@PLT1638; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1639; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1640; AVX-NEXT: callq sin@PLT1641; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1642; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1643; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1644; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1645; AVX-NEXT: callq sin@PLT1646; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1647; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1648; AVX-NEXT: callq sin@PLT1649; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1650; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1651; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload1652; AVX-NEXT: addq $40, %rsp1653; AVX-NEXT: .cfi_def_cfa_offset 81654; AVX-NEXT: retq1655entry:1656 %sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64(1657 <4 x double> <double 42.0, double 42.1,1658 double 42.2, double 42.3>,1659 metadata !"round.dynamic",1660 metadata !"fpexcept.strict") #01661 ret <4 x double> %sin1662}1663 1664define <1 x float> @constrained_vector_cos_v1f32() #0 {1665; CHECK-LABEL: constrained_vector_cos_v1f32:1666; CHECK: # %bb.0: # %entry1667; CHECK-NEXT: pushq %rax1668; CHECK-NEXT: .cfi_def_cfa_offset 161669; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1670; CHECK-NEXT: callq cosf@PLT1671; CHECK-NEXT: popq %rax1672; CHECK-NEXT: .cfi_def_cfa_offset 81673; CHECK-NEXT: retq1674;1675; AVX-LABEL: constrained_vector_cos_v1f32:1676; AVX: # %bb.0: # %entry1677; AVX-NEXT: pushq %rax1678; AVX-NEXT: .cfi_def_cfa_offset 161679; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1680; AVX-NEXT: callq cosf@PLT1681; AVX-NEXT: popq %rax1682; AVX-NEXT: .cfi_def_cfa_offset 81683; AVX-NEXT: retq1684entry:1685 %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(1686 <1 x float> <float 42.0>,1687 metadata !"round.dynamic",1688 metadata !"fpexcept.strict") #01689 ret <1 x float> %cos1690}1691 1692define <2 x double> @constrained_vector_cos_v2f64() #0 {1693; CHECK-LABEL: constrained_vector_cos_v2f64:1694; CHECK: # %bb.0: # %entry1695; CHECK-NEXT: subq $24, %rsp1696; CHECK-NEXT: .cfi_def_cfa_offset 321697; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1698; CHECK-NEXT: callq cos@PLT1699; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1700; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1701; CHECK-NEXT: callq cos@PLT1702; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1703; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1704; CHECK-NEXT: addq $24, %rsp1705; CHECK-NEXT: .cfi_def_cfa_offset 81706; CHECK-NEXT: retq1707;1708; AVX-LABEL: constrained_vector_cos_v2f64:1709; AVX: # %bb.0: # %entry1710; AVX-NEXT: subq $24, %rsp1711; AVX-NEXT: .cfi_def_cfa_offset 321712; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1713; AVX-NEXT: callq cos@PLT1714; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1715; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1716; AVX-NEXT: callq cos@PLT1717; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1718; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1719; AVX-NEXT: addq $24, %rsp1720; AVX-NEXT: .cfi_def_cfa_offset 81721; AVX-NEXT: retq1722entry:1723 %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(1724 <2 x double> <double 42.0, double 42.1>,1725 metadata !"round.dynamic",1726 metadata !"fpexcept.strict") #01727 ret <2 x double> %cos1728}1729 1730define <3 x float> @constrained_vector_cos_v3f32() #0 {1731; CHECK-LABEL: constrained_vector_cos_v3f32:1732; CHECK: # %bb.0: # %entry1733; CHECK-NEXT: subq $40, %rsp1734; CHECK-NEXT: .cfi_def_cfa_offset 481735; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1736; CHECK-NEXT: callq cosf@PLT1737; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1738; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1739; CHECK-NEXT: callq cosf@PLT1740; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1741; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1742; CHECK-NEXT: callq cosf@PLT1743; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload1744; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]1745; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1746; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1747; CHECK-NEXT: movaps %xmm1, %xmm01748; CHECK-NEXT: addq $40, %rsp1749; CHECK-NEXT: .cfi_def_cfa_offset 81750; CHECK-NEXT: retq1751;1752; AVX-LABEL: constrained_vector_cos_v3f32:1753; AVX: # %bb.0: # %entry1754; AVX-NEXT: subq $40, %rsp1755; AVX-NEXT: .cfi_def_cfa_offset 481756; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1757; AVX-NEXT: callq cosf@PLT1758; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1759; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1760; AVX-NEXT: callq cosf@PLT1761; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1762; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1763; AVX-NEXT: callq cosf@PLT1764; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload1765; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]1766; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1767; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]1768; AVX-NEXT: addq $40, %rsp1769; AVX-NEXT: .cfi_def_cfa_offset 81770; AVX-NEXT: retq1771entry:1772 %cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32(1773 <3 x float> <float 42.0, float 43.0, float 44.0>,1774 metadata !"round.dynamic",1775 metadata !"fpexcept.strict") #01776 ret <3 x float> %cos1777}1778 1779define <3 x double> @constrained_vector_cos_v3f64() #0 {1780; CHECK-LABEL: constrained_vector_cos_v3f64:1781; CHECK: # %bb.0: # %entry1782; CHECK-NEXT: subq $24, %rsp1783; CHECK-NEXT: .cfi_def_cfa_offset 321784; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1785; CHECK-NEXT: callq cos@PLT1786; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill1787; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1788; CHECK-NEXT: callq cos@PLT1789; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill1790; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1791; CHECK-NEXT: callq cos@PLT1792; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)1793; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)1794; CHECK-NEXT: wait1795; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload1796; CHECK-NEXT: # xmm0 = mem[0],zero1797; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload1798; CHECK-NEXT: # xmm1 = mem[0],zero1799; CHECK-NEXT: addq $24, %rsp1800; CHECK-NEXT: .cfi_def_cfa_offset 81801; CHECK-NEXT: retq1802;1803; AVX-LABEL: constrained_vector_cos_v3f64:1804; AVX: # %bb.0: # %entry1805; AVX-NEXT: subq $40, %rsp1806; AVX-NEXT: .cfi_def_cfa_offset 481807; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1808; AVX-NEXT: callq cos@PLT1809; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1810; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1811; AVX-NEXT: callq cos@PLT1812; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1813; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1814; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill1815; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1816; AVX-NEXT: vzeroupper1817; AVX-NEXT: callq cos@PLT1818; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload1819; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm01820; AVX-NEXT: addq $40, %rsp1821; AVX-NEXT: .cfi_def_cfa_offset 81822; AVX-NEXT: retq1823entry:1824 %cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64(1825 <3 x double> <double 42.0, double 42.1, double 42.2>,1826 metadata !"round.dynamic",1827 metadata !"fpexcept.strict") #01828 ret <3 x double> %cos1829}1830 1831define <4 x double> @constrained_vector_cos_v4f64() #0 {1832; CHECK-LABEL: constrained_vector_cos_v4f64:1833; CHECK: # %bb.0: # %entry1834; CHECK-NEXT: subq $40, %rsp1835; CHECK-NEXT: .cfi_def_cfa_offset 481836; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1837; CHECK-NEXT: callq cos@PLT1838; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1839; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1840; CHECK-NEXT: callq cos@PLT1841; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1842; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1843; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1844; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1845; CHECK-NEXT: callq cos@PLT1846; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1847; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1848; CHECK-NEXT: callq cos@PLT1849; CHECK-NEXT: movaps %xmm0, %xmm11850; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1851; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1852; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload1853; CHECK-NEXT: addq $40, %rsp1854; CHECK-NEXT: .cfi_def_cfa_offset 81855; CHECK-NEXT: retq1856;1857; AVX-LABEL: constrained_vector_cos_v4f64:1858; AVX: # %bb.0: # %entry1859; AVX-NEXT: subq $40, %rsp1860; AVX-NEXT: .cfi_def_cfa_offset 481861; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]1862; AVX-NEXT: callq cos@PLT1863; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1864; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]1865; AVX-NEXT: callq cos@PLT1866; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1867; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1868; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1869; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1870; AVX-NEXT: callq cos@PLT1871; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1872; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1873; AVX-NEXT: callq cos@PLT1874; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1875; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1876; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload1877; AVX-NEXT: addq $40, %rsp1878; AVX-NEXT: .cfi_def_cfa_offset 81879; AVX-NEXT: retq1880entry:1881 %cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64(1882 <4 x double> <double 42.0, double 42.1,1883 double 42.2, double 42.3>,1884 metadata !"round.dynamic",1885 metadata !"fpexcept.strict") #01886 ret <4 x double> %cos1887}1888 1889define <1 x float> @constrained_vector_exp_v1f32() #0 {1890; CHECK-LABEL: constrained_vector_exp_v1f32:1891; CHECK: # %bb.0: # %entry1892; CHECK-NEXT: pushq %rax1893; CHECK-NEXT: .cfi_def_cfa_offset 161894; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1895; CHECK-NEXT: callq expf@PLT1896; CHECK-NEXT: popq %rax1897; CHECK-NEXT: .cfi_def_cfa_offset 81898; CHECK-NEXT: retq1899;1900; AVX-LABEL: constrained_vector_exp_v1f32:1901; AVX: # %bb.0: # %entry1902; AVX-NEXT: pushq %rax1903; AVX-NEXT: .cfi_def_cfa_offset 161904; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1905; AVX-NEXT: callq expf@PLT1906; AVX-NEXT: popq %rax1907; AVX-NEXT: .cfi_def_cfa_offset 81908; AVX-NEXT: retq1909entry:1910 %exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32(1911 <1 x float> <float 42.0>,1912 metadata !"round.dynamic",1913 metadata !"fpexcept.strict") #01914 ret <1 x float> %exp1915}1916 1917define <2 x double> @constrained_vector_exp_v2f64() #0 {1918; CHECK-LABEL: constrained_vector_exp_v2f64:1919; CHECK: # %bb.0: # %entry1920; CHECK-NEXT: subq $24, %rsp1921; CHECK-NEXT: .cfi_def_cfa_offset 321922; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1923; CHECK-NEXT: callq exp@PLT1924; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1925; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1926; CHECK-NEXT: callq exp@PLT1927; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload1928; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]1929; CHECK-NEXT: addq $24, %rsp1930; CHECK-NEXT: .cfi_def_cfa_offset 81931; CHECK-NEXT: retq1932;1933; AVX-LABEL: constrained_vector_exp_v2f64:1934; AVX: # %bb.0: # %entry1935; AVX-NEXT: subq $24, %rsp1936; AVX-NEXT: .cfi_def_cfa_offset 321937; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]1938; AVX-NEXT: callq exp@PLT1939; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1940; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]1941; AVX-NEXT: callq exp@PLT1942; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload1943; AVX-NEXT: # xmm0 = xmm0[0],mem[0]1944; AVX-NEXT: addq $24, %rsp1945; AVX-NEXT: .cfi_def_cfa_offset 81946; AVX-NEXT: retq1947entry:1948 %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(1949 <2 x double> <double 42.0, double 42.1>,1950 metadata !"round.dynamic",1951 metadata !"fpexcept.strict") #01952 ret <2 x double> %exp1953}1954 1955define <3 x float> @constrained_vector_exp_v3f32() #0 {1956; CHECK-LABEL: constrained_vector_exp_v3f32:1957; CHECK: # %bb.0: # %entry1958; CHECK-NEXT: subq $40, %rsp1959; CHECK-NEXT: .cfi_def_cfa_offset 481960; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1961; CHECK-NEXT: callq expf@PLT1962; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1963; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1964; CHECK-NEXT: callq expf@PLT1965; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill1966; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1967; CHECK-NEXT: callq expf@PLT1968; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload1969; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]1970; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload1971; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]1972; CHECK-NEXT: movaps %xmm1, %xmm01973; CHECK-NEXT: addq $40, %rsp1974; CHECK-NEXT: .cfi_def_cfa_offset 81975; CHECK-NEXT: retq1976;1977; AVX-LABEL: constrained_vector_exp_v3f32:1978; AVX: # %bb.0: # %entry1979; AVX-NEXT: subq $40, %rsp1980; AVX-NEXT: .cfi_def_cfa_offset 481981; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]1982; AVX-NEXT: callq expf@PLT1983; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1984; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]1985; AVX-NEXT: callq expf@PLT1986; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill1987; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]1988; AVX-NEXT: callq expf@PLT1989; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload1990; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]1991; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload1992; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]1993; AVX-NEXT: addq $40, %rsp1994; AVX-NEXT: .cfi_def_cfa_offset 81995; AVX-NEXT: retq1996entry:1997 %exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32(1998 <3 x float> <float 42.0, float 43.0, float 44.0>,1999 metadata !"round.dynamic",2000 metadata !"fpexcept.strict") #02001 ret <3 x float> %exp2002}2003 2004define <3 x double> @constrained_vector_exp_v3f64() #0 {2005; CHECK-LABEL: constrained_vector_exp_v3f64:2006; CHECK: # %bb.0: # %entry2007; CHECK-NEXT: subq $24, %rsp2008; CHECK-NEXT: .cfi_def_cfa_offset 322009; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2010; CHECK-NEXT: callq exp@PLT2011; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2012; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2013; CHECK-NEXT: callq exp@PLT2014; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill2015; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2016; CHECK-NEXT: callq exp@PLT2017; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)2018; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)2019; CHECK-NEXT: wait2020; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload2021; CHECK-NEXT: # xmm0 = mem[0],zero2022; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload2023; CHECK-NEXT: # xmm1 = mem[0],zero2024; CHECK-NEXT: addq $24, %rsp2025; CHECK-NEXT: .cfi_def_cfa_offset 82026; CHECK-NEXT: retq2027;2028; AVX-LABEL: constrained_vector_exp_v3f64:2029; AVX: # %bb.0: # %entry2030; AVX-NEXT: subq $40, %rsp2031; AVX-NEXT: .cfi_def_cfa_offset 482032; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2033; AVX-NEXT: callq exp@PLT2034; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2035; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2036; AVX-NEXT: callq exp@PLT2037; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2038; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2039; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill2040; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2041; AVX-NEXT: vzeroupper2042; AVX-NEXT: callq exp@PLT2043; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload2044; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm02045; AVX-NEXT: addq $40, %rsp2046; AVX-NEXT: .cfi_def_cfa_offset 82047; AVX-NEXT: retq2048entry:2049 %exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64(2050 <3 x double> <double 42.0, double 42.1, double 42.2>,2051 metadata !"round.dynamic",2052 metadata !"fpexcept.strict") #02053 ret <3 x double> %exp2054}2055 2056define <4 x double> @constrained_vector_exp_v4f64() #0 {2057; CHECK-LABEL: constrained_vector_exp_v4f64:2058; CHECK: # %bb.0: # %entry2059; CHECK-NEXT: subq $40, %rsp2060; CHECK-NEXT: .cfi_def_cfa_offset 482061; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2062; CHECK-NEXT: callq exp@PLT2063; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2064; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2065; CHECK-NEXT: callq exp@PLT2066; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2067; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2068; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2069; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2070; CHECK-NEXT: callq exp@PLT2071; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2072; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2073; CHECK-NEXT: callq exp@PLT2074; CHECK-NEXT: movaps %xmm0, %xmm12075; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2076; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2077; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload2078; CHECK-NEXT: addq $40, %rsp2079; CHECK-NEXT: .cfi_def_cfa_offset 82080; CHECK-NEXT: retq2081;2082; AVX-LABEL: constrained_vector_exp_v4f64:2083; AVX: # %bb.0: # %entry2084; AVX-NEXT: subq $40, %rsp2085; AVX-NEXT: .cfi_def_cfa_offset 482086; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2087; AVX-NEXT: callq exp@PLT2088; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2089; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2090; AVX-NEXT: callq exp@PLT2091; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2092; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2093; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2094; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2095; AVX-NEXT: callq exp@PLT2096; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2097; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2098; AVX-NEXT: callq exp@PLT2099; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2100; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2101; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload2102; AVX-NEXT: addq $40, %rsp2103; AVX-NEXT: .cfi_def_cfa_offset 82104; AVX-NEXT: retq2105entry:2106 %exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64(2107 <4 x double> <double 42.0, double 42.1,2108 double 42.2, double 42.3>,2109 metadata !"round.dynamic",2110 metadata !"fpexcept.strict") #02111 ret <4 x double> %exp2112}2113 2114define <1 x float> @constrained_vector_exp2_v1f32() #0 {2115; CHECK-LABEL: constrained_vector_exp2_v1f32:2116; CHECK: # %bb.0: # %entry2117; CHECK-NEXT: pushq %rax2118; CHECK-NEXT: .cfi_def_cfa_offset 162119; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2120; CHECK-NEXT: callq exp2f@PLT2121; CHECK-NEXT: popq %rax2122; CHECK-NEXT: .cfi_def_cfa_offset 82123; CHECK-NEXT: retq2124;2125; AVX-LABEL: constrained_vector_exp2_v1f32:2126; AVX: # %bb.0: # %entry2127; AVX-NEXT: pushq %rax2128; AVX-NEXT: .cfi_def_cfa_offset 162129; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2130; AVX-NEXT: callq exp2f@PLT2131; AVX-NEXT: popq %rax2132; AVX-NEXT: .cfi_def_cfa_offset 82133; AVX-NEXT: retq2134entry:2135 %exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32(2136 <1 x float> <float 42.0>,2137 metadata !"round.dynamic",2138 metadata !"fpexcept.strict") #02139 ret <1 x float> %exp22140}2141 2142define <2 x double> @constrained_vector_exp2_v2f64() #0 {2143; CHECK-LABEL: constrained_vector_exp2_v2f64:2144; CHECK: # %bb.0: # %entry2145; CHECK-NEXT: subq $24, %rsp2146; CHECK-NEXT: .cfi_def_cfa_offset 322147; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2148; CHECK-NEXT: callq exp2@PLT2149; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2150; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2151; CHECK-NEXT: callq exp2@PLT2152; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2153; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2154; CHECK-NEXT: addq $24, %rsp2155; CHECK-NEXT: .cfi_def_cfa_offset 82156; CHECK-NEXT: retq2157;2158; AVX-LABEL: constrained_vector_exp2_v2f64:2159; AVX: # %bb.0: # %entry2160; AVX-NEXT: subq $24, %rsp2161; AVX-NEXT: .cfi_def_cfa_offset 322162; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2163; AVX-NEXT: callq exp2@PLT2164; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2165; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2166; AVX-NEXT: callq exp2@PLT2167; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2168; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2169; AVX-NEXT: addq $24, %rsp2170; AVX-NEXT: .cfi_def_cfa_offset 82171; AVX-NEXT: retq2172entry:2173 %exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64(2174 <2 x double> <double 42.1, double 42.0>,2175 metadata !"round.dynamic",2176 metadata !"fpexcept.strict") #02177 ret <2 x double> %exp22178}2179 2180define <3 x float> @constrained_vector_exp2_v3f32() #0 {2181; CHECK-LABEL: constrained_vector_exp2_v3f32:2182; CHECK: # %bb.0: # %entry2183; CHECK-NEXT: subq $40, %rsp2184; CHECK-NEXT: .cfi_def_cfa_offset 482185; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2186; CHECK-NEXT: callq exp2f@PLT2187; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2188; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2189; CHECK-NEXT: callq exp2f@PLT2190; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2191; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2192; CHECK-NEXT: callq exp2f@PLT2193; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload2194; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]2195; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2196; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2197; CHECK-NEXT: movaps %xmm1, %xmm02198; CHECK-NEXT: addq $40, %rsp2199; CHECK-NEXT: .cfi_def_cfa_offset 82200; CHECK-NEXT: retq2201;2202; AVX-LABEL: constrained_vector_exp2_v3f32:2203; AVX: # %bb.0: # %entry2204; AVX-NEXT: subq $40, %rsp2205; AVX-NEXT: .cfi_def_cfa_offset 482206; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2207; AVX-NEXT: callq exp2f@PLT2208; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2209; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2210; AVX-NEXT: callq exp2f@PLT2211; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2212; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2213; AVX-NEXT: callq exp2f@PLT2214; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload2215; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]2216; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2217; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]2218; AVX-NEXT: addq $40, %rsp2219; AVX-NEXT: .cfi_def_cfa_offset 82220; AVX-NEXT: retq2221entry:2222 %exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32(2223 <3 x float> <float 42.0, float 43.0, float 44.0>,2224 metadata !"round.dynamic",2225 metadata !"fpexcept.strict") #02226 ret <3 x float> %exp22227}2228 2229define <3 x double> @constrained_vector_exp2_v3f64() #0 {2230; CHECK-LABEL: constrained_vector_exp2_v3f64:2231; CHECK: # %bb.0: # %entry2232; CHECK-NEXT: subq $24, %rsp2233; CHECK-NEXT: .cfi_def_cfa_offset 322234; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2235; CHECK-NEXT: callq exp2@PLT2236; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2237; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2238; CHECK-NEXT: callq exp2@PLT2239; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill2240; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2241; CHECK-NEXT: callq exp2@PLT2242; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)2243; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)2244; CHECK-NEXT: wait2245; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload2246; CHECK-NEXT: # xmm0 = mem[0],zero2247; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload2248; CHECK-NEXT: # xmm1 = mem[0],zero2249; CHECK-NEXT: addq $24, %rsp2250; CHECK-NEXT: .cfi_def_cfa_offset 82251; CHECK-NEXT: retq2252;2253; AVX-LABEL: constrained_vector_exp2_v3f64:2254; AVX: # %bb.0: # %entry2255; AVX-NEXT: subq $40, %rsp2256; AVX-NEXT: .cfi_def_cfa_offset 482257; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2258; AVX-NEXT: callq exp2@PLT2259; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2260; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2261; AVX-NEXT: callq exp2@PLT2262; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2263; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2264; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill2265; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2266; AVX-NEXT: vzeroupper2267; AVX-NEXT: callq exp2@PLT2268; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload2269; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm02270; AVX-NEXT: addq $40, %rsp2271; AVX-NEXT: .cfi_def_cfa_offset 82272; AVX-NEXT: retq2273entry:2274 %exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64(2275 <3 x double> <double 42.0, double 42.1, double 42.2>,2276 metadata !"round.dynamic",2277 metadata !"fpexcept.strict") #02278 ret <3 x double> %exp22279}2280 2281define <4 x double> @constrained_vector_exp2_v4f64() #0 {2282; CHECK-LABEL: constrained_vector_exp2_v4f64:2283; CHECK: # %bb.0: # %entry2284; CHECK-NEXT: subq $40, %rsp2285; CHECK-NEXT: .cfi_def_cfa_offset 482286; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2287; CHECK-NEXT: callq exp2@PLT2288; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2289; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2290; CHECK-NEXT: callq exp2@PLT2291; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2292; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2293; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2294; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]2295; CHECK-NEXT: callq exp2@PLT2296; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2297; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2298; CHECK-NEXT: callq exp2@PLT2299; CHECK-NEXT: movaps %xmm0, %xmm12300; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2301; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2302; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload2303; CHECK-NEXT: addq $40, %rsp2304; CHECK-NEXT: .cfi_def_cfa_offset 82305; CHECK-NEXT: retq2306;2307; AVX-LABEL: constrained_vector_exp2_v4f64:2308; AVX: # %bb.0: # %entry2309; AVX-NEXT: subq $40, %rsp2310; AVX-NEXT: .cfi_def_cfa_offset 482311; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]2312; AVX-NEXT: callq exp2@PLT2313; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2314; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2315; AVX-NEXT: callq exp2@PLT2316; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2317; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2318; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2319; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2320; AVX-NEXT: callq exp2@PLT2321; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2322; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2323; AVX-NEXT: callq exp2@PLT2324; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2325; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2326; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload2327; AVX-NEXT: addq $40, %rsp2328; AVX-NEXT: .cfi_def_cfa_offset 82329; AVX-NEXT: retq2330entry:2331 %exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64(2332 <4 x double> <double 42.1, double 42.2,2333 double 42.3, double 42.4>,2334 metadata !"round.dynamic",2335 metadata !"fpexcept.strict") #02336 ret <4 x double> %exp22337}2338 2339define <1 x float> @constrained_vector_log_v1f32() #0 {2340; CHECK-LABEL: constrained_vector_log_v1f32:2341; CHECK: # %bb.0: # %entry2342; CHECK-NEXT: pushq %rax2343; CHECK-NEXT: .cfi_def_cfa_offset 162344; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2345; CHECK-NEXT: callq logf@PLT2346; CHECK-NEXT: popq %rax2347; CHECK-NEXT: .cfi_def_cfa_offset 82348; CHECK-NEXT: retq2349;2350; AVX-LABEL: constrained_vector_log_v1f32:2351; AVX: # %bb.0: # %entry2352; AVX-NEXT: pushq %rax2353; AVX-NEXT: .cfi_def_cfa_offset 162354; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2355; AVX-NEXT: callq logf@PLT2356; AVX-NEXT: popq %rax2357; AVX-NEXT: .cfi_def_cfa_offset 82358; AVX-NEXT: retq2359entry:2360 %log = call <1 x float> @llvm.experimental.constrained.log.v1f32(2361 <1 x float> <float 42.0>,2362 metadata !"round.dynamic",2363 metadata !"fpexcept.strict") #02364 ret <1 x float> %log2365}2366 2367define <2 x double> @constrained_vector_log_v2f64() #0 {2368; CHECK-LABEL: constrained_vector_log_v2f64:2369; CHECK: # %bb.0: # %entry2370; CHECK-NEXT: subq $24, %rsp2371; CHECK-NEXT: .cfi_def_cfa_offset 322372; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2373; CHECK-NEXT: callq log@PLT2374; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2375; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2376; CHECK-NEXT: callq log@PLT2377; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2378; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2379; CHECK-NEXT: addq $24, %rsp2380; CHECK-NEXT: .cfi_def_cfa_offset 82381; CHECK-NEXT: retq2382;2383; AVX-LABEL: constrained_vector_log_v2f64:2384; AVX: # %bb.0: # %entry2385; AVX-NEXT: subq $24, %rsp2386; AVX-NEXT: .cfi_def_cfa_offset 322387; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2388; AVX-NEXT: callq log@PLT2389; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2390; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2391; AVX-NEXT: callq log@PLT2392; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2393; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2394; AVX-NEXT: addq $24, %rsp2395; AVX-NEXT: .cfi_def_cfa_offset 82396; AVX-NEXT: retq2397entry:2398 %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(2399 <2 x double> <double 42.0, double 42.1>,2400 metadata !"round.dynamic",2401 metadata !"fpexcept.strict") #02402 ret <2 x double> %log2403}2404 2405define <3 x float> @constrained_vector_log_v3f32() #0 {2406; CHECK-LABEL: constrained_vector_log_v3f32:2407; CHECK: # %bb.0: # %entry2408; CHECK-NEXT: subq $40, %rsp2409; CHECK-NEXT: .cfi_def_cfa_offset 482410; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2411; CHECK-NEXT: callq logf@PLT2412; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2413; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2414; CHECK-NEXT: callq logf@PLT2415; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2416; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2417; CHECK-NEXT: callq logf@PLT2418; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload2419; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]2420; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2421; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2422; CHECK-NEXT: movaps %xmm1, %xmm02423; CHECK-NEXT: addq $40, %rsp2424; CHECK-NEXT: .cfi_def_cfa_offset 82425; CHECK-NEXT: retq2426;2427; AVX-LABEL: constrained_vector_log_v3f32:2428; AVX: # %bb.0: # %entry2429; AVX-NEXT: subq $40, %rsp2430; AVX-NEXT: .cfi_def_cfa_offset 482431; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2432; AVX-NEXT: callq logf@PLT2433; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2434; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2435; AVX-NEXT: callq logf@PLT2436; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2437; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2438; AVX-NEXT: callq logf@PLT2439; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload2440; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]2441; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2442; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]2443; AVX-NEXT: addq $40, %rsp2444; AVX-NEXT: .cfi_def_cfa_offset 82445; AVX-NEXT: retq2446entry:2447 %log = call <3 x float> @llvm.experimental.constrained.log.v3f32(2448 <3 x float> <float 42.0, float 43.0, float 44.0>,2449 metadata !"round.dynamic",2450 metadata !"fpexcept.strict") #02451 ret <3 x float> %log2452}2453 2454define <3 x double> @constrained_vector_log_v3f64() #0 {2455; CHECK-LABEL: constrained_vector_log_v3f64:2456; CHECK: # %bb.0: # %entry2457; CHECK-NEXT: subq $24, %rsp2458; CHECK-NEXT: .cfi_def_cfa_offset 322459; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2460; CHECK-NEXT: callq log@PLT2461; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2462; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2463; CHECK-NEXT: callq log@PLT2464; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill2465; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2466; CHECK-NEXT: callq log@PLT2467; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)2468; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)2469; CHECK-NEXT: wait2470; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload2471; CHECK-NEXT: # xmm0 = mem[0],zero2472; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload2473; CHECK-NEXT: # xmm1 = mem[0],zero2474; CHECK-NEXT: addq $24, %rsp2475; CHECK-NEXT: .cfi_def_cfa_offset 82476; CHECK-NEXT: retq2477;2478; AVX-LABEL: constrained_vector_log_v3f64:2479; AVX: # %bb.0: # %entry2480; AVX-NEXT: subq $40, %rsp2481; AVX-NEXT: .cfi_def_cfa_offset 482482; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2483; AVX-NEXT: callq log@PLT2484; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2485; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2486; AVX-NEXT: callq log@PLT2487; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2488; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2489; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill2490; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2491; AVX-NEXT: vzeroupper2492; AVX-NEXT: callq log@PLT2493; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload2494; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm02495; AVX-NEXT: addq $40, %rsp2496; AVX-NEXT: .cfi_def_cfa_offset 82497; AVX-NEXT: retq2498entry:2499 %log = call <3 x double> @llvm.experimental.constrained.log.v3f64(2500 <3 x double> <double 42.0, double 42.1, double 42.2>,2501 metadata !"round.dynamic",2502 metadata !"fpexcept.strict") #02503 ret <3 x double> %log2504}2505 2506define <4 x double> @constrained_vector_log_v4f64() #0 {2507; CHECK-LABEL: constrained_vector_log_v4f64:2508; CHECK: # %bb.0: # %entry2509; CHECK-NEXT: subq $40, %rsp2510; CHECK-NEXT: .cfi_def_cfa_offset 482511; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2512; CHECK-NEXT: callq log@PLT2513; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2514; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2515; CHECK-NEXT: callq log@PLT2516; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2517; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2518; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2519; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2520; CHECK-NEXT: callq log@PLT2521; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2522; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2523; CHECK-NEXT: callq log@PLT2524; CHECK-NEXT: movaps %xmm0, %xmm12525; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2526; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2527; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload2528; CHECK-NEXT: addq $40, %rsp2529; CHECK-NEXT: .cfi_def_cfa_offset 82530; CHECK-NEXT: retq2531;2532; AVX-LABEL: constrained_vector_log_v4f64:2533; AVX: # %bb.0: # %entry2534; AVX-NEXT: subq $40, %rsp2535; AVX-NEXT: .cfi_def_cfa_offset 482536; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2537; AVX-NEXT: callq log@PLT2538; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2539; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2540; AVX-NEXT: callq log@PLT2541; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2542; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2543; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2544; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2545; AVX-NEXT: callq log@PLT2546; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2547; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2548; AVX-NEXT: callq log@PLT2549; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2550; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2551; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload2552; AVX-NEXT: addq $40, %rsp2553; AVX-NEXT: .cfi_def_cfa_offset 82554; AVX-NEXT: retq2555entry:2556 %log = call <4 x double> @llvm.experimental.constrained.log.v4f64(2557 <4 x double> <double 42.0, double 42.1,2558 double 42.2, double 42.3>,2559 metadata !"round.dynamic",2560 metadata !"fpexcept.strict") #02561 ret <4 x double> %log2562}2563 2564define <1 x float> @constrained_vector_log10_v1f32() #0 {2565; CHECK-LABEL: constrained_vector_log10_v1f32:2566; CHECK: # %bb.0: # %entry2567; CHECK-NEXT: pushq %rax2568; CHECK-NEXT: .cfi_def_cfa_offset 162569; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2570; CHECK-NEXT: callq log10f@PLT2571; CHECK-NEXT: popq %rax2572; CHECK-NEXT: .cfi_def_cfa_offset 82573; CHECK-NEXT: retq2574;2575; AVX-LABEL: constrained_vector_log10_v1f32:2576; AVX: # %bb.0: # %entry2577; AVX-NEXT: pushq %rax2578; AVX-NEXT: .cfi_def_cfa_offset 162579; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2580; AVX-NEXT: callq log10f@PLT2581; AVX-NEXT: popq %rax2582; AVX-NEXT: .cfi_def_cfa_offset 82583; AVX-NEXT: retq2584entry:2585 %log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32(2586 <1 x float> <float 42.0>,2587 metadata !"round.dynamic",2588 metadata !"fpexcept.strict") #02589 ret <1 x float> %log102590}2591 2592define <2 x double> @constrained_vector_log10_v2f64() #0 {2593; CHECK-LABEL: constrained_vector_log10_v2f64:2594; CHECK: # %bb.0: # %entry2595; CHECK-NEXT: subq $24, %rsp2596; CHECK-NEXT: .cfi_def_cfa_offset 322597; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2598; CHECK-NEXT: callq log10@PLT2599; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2600; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2601; CHECK-NEXT: callq log10@PLT2602; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2603; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2604; CHECK-NEXT: addq $24, %rsp2605; CHECK-NEXT: .cfi_def_cfa_offset 82606; CHECK-NEXT: retq2607;2608; AVX-LABEL: constrained_vector_log10_v2f64:2609; AVX: # %bb.0: # %entry2610; AVX-NEXT: subq $24, %rsp2611; AVX-NEXT: .cfi_def_cfa_offset 322612; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2613; AVX-NEXT: callq log10@PLT2614; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2615; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2616; AVX-NEXT: callq log10@PLT2617; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2618; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2619; AVX-NEXT: addq $24, %rsp2620; AVX-NEXT: .cfi_def_cfa_offset 82621; AVX-NEXT: retq2622entry:2623 %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(2624 <2 x double> <double 42.0, double 42.1>,2625 metadata !"round.dynamic",2626 metadata !"fpexcept.strict") #02627 ret <2 x double> %log102628}2629 2630define <3 x float> @constrained_vector_log10_v3f32() #0 {2631; CHECK-LABEL: constrained_vector_log10_v3f32:2632; CHECK: # %bb.0: # %entry2633; CHECK-NEXT: subq $40, %rsp2634; CHECK-NEXT: .cfi_def_cfa_offset 482635; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2636; CHECK-NEXT: callq log10f@PLT2637; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2638; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2639; CHECK-NEXT: callq log10f@PLT2640; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2641; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2642; CHECK-NEXT: callq log10f@PLT2643; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload2644; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]2645; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2646; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2647; CHECK-NEXT: movaps %xmm1, %xmm02648; CHECK-NEXT: addq $40, %rsp2649; CHECK-NEXT: .cfi_def_cfa_offset 82650; CHECK-NEXT: retq2651;2652; AVX-LABEL: constrained_vector_log10_v3f32:2653; AVX: # %bb.0: # %entry2654; AVX-NEXT: subq $40, %rsp2655; AVX-NEXT: .cfi_def_cfa_offset 482656; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2657; AVX-NEXT: callq log10f@PLT2658; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2659; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2660; AVX-NEXT: callq log10f@PLT2661; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2662; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2663; AVX-NEXT: callq log10f@PLT2664; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload2665; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]2666; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2667; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]2668; AVX-NEXT: addq $40, %rsp2669; AVX-NEXT: .cfi_def_cfa_offset 82670; AVX-NEXT: retq2671entry:2672 %log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32(2673 <3 x float> <float 42.0, float 43.0, float 44.0>,2674 metadata !"round.dynamic",2675 metadata !"fpexcept.strict") #02676 ret <3 x float> %log102677}2678 2679define <3 x double> @constrained_vector_log10_v3f64() #0 {2680; CHECK-LABEL: constrained_vector_log10_v3f64:2681; CHECK: # %bb.0: # %entry2682; CHECK-NEXT: subq $24, %rsp2683; CHECK-NEXT: .cfi_def_cfa_offset 322684; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2685; CHECK-NEXT: callq log10@PLT2686; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2687; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2688; CHECK-NEXT: callq log10@PLT2689; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill2690; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2691; CHECK-NEXT: callq log10@PLT2692; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)2693; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)2694; CHECK-NEXT: wait2695; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload2696; CHECK-NEXT: # xmm0 = mem[0],zero2697; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload2698; CHECK-NEXT: # xmm1 = mem[0],zero2699; CHECK-NEXT: addq $24, %rsp2700; CHECK-NEXT: .cfi_def_cfa_offset 82701; CHECK-NEXT: retq2702;2703; AVX-LABEL: constrained_vector_log10_v3f64:2704; AVX: # %bb.0: # %entry2705; AVX-NEXT: subq $40, %rsp2706; AVX-NEXT: .cfi_def_cfa_offset 482707; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2708; AVX-NEXT: callq log10@PLT2709; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2710; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2711; AVX-NEXT: callq log10@PLT2712; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2713; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2714; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill2715; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2716; AVX-NEXT: vzeroupper2717; AVX-NEXT: callq log10@PLT2718; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload2719; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm02720; AVX-NEXT: addq $40, %rsp2721; AVX-NEXT: .cfi_def_cfa_offset 82722; AVX-NEXT: retq2723entry:2724 %log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64(2725 <3 x double> <double 42.0, double 42.1, double 42.2>,2726 metadata !"round.dynamic",2727 metadata !"fpexcept.strict") #02728 ret <3 x double> %log102729}2730 2731define <4 x double> @constrained_vector_log10_v4f64() #0 {2732; CHECK-LABEL: constrained_vector_log10_v4f64:2733; CHECK: # %bb.0: # %entry2734; CHECK-NEXT: subq $40, %rsp2735; CHECK-NEXT: .cfi_def_cfa_offset 482736; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2737; CHECK-NEXT: callq log10@PLT2738; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2739; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2740; CHECK-NEXT: callq log10@PLT2741; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2742; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2743; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2744; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2745; CHECK-NEXT: callq log10@PLT2746; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2747; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2748; CHECK-NEXT: callq log10@PLT2749; CHECK-NEXT: movaps %xmm0, %xmm12750; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2751; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2752; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload2753; CHECK-NEXT: addq $40, %rsp2754; CHECK-NEXT: .cfi_def_cfa_offset 82755; CHECK-NEXT: retq2756;2757; AVX-LABEL: constrained_vector_log10_v4f64:2758; AVX: # %bb.0: # %entry2759; AVX-NEXT: subq $40, %rsp2760; AVX-NEXT: .cfi_def_cfa_offset 482761; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2762; AVX-NEXT: callq log10@PLT2763; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2764; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2765; AVX-NEXT: callq log10@PLT2766; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2767; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2768; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2769; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2770; AVX-NEXT: callq log10@PLT2771; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2772; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2773; AVX-NEXT: callq log10@PLT2774; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2775; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2776; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload2777; AVX-NEXT: addq $40, %rsp2778; AVX-NEXT: .cfi_def_cfa_offset 82779; AVX-NEXT: retq2780entry:2781 %log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64(2782 <4 x double> <double 42.0, double 42.1,2783 double 42.2, double 42.3>,2784 metadata !"round.dynamic",2785 metadata !"fpexcept.strict") #02786 ret <4 x double> %log102787}2788 2789define <1 x float> @constrained_vector_log2_v1f32() #0 {2790; CHECK-LABEL: constrained_vector_log2_v1f32:2791; CHECK: # %bb.0: # %entry2792; CHECK-NEXT: pushq %rax2793; CHECK-NEXT: .cfi_def_cfa_offset 162794; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2795; CHECK-NEXT: callq log2f@PLT2796; CHECK-NEXT: popq %rax2797; CHECK-NEXT: .cfi_def_cfa_offset 82798; CHECK-NEXT: retq2799;2800; AVX-LABEL: constrained_vector_log2_v1f32:2801; AVX: # %bb.0: # %entry2802; AVX-NEXT: pushq %rax2803; AVX-NEXT: .cfi_def_cfa_offset 162804; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2805; AVX-NEXT: callq log2f@PLT2806; AVX-NEXT: popq %rax2807; AVX-NEXT: .cfi_def_cfa_offset 82808; AVX-NEXT: retq2809entry:2810 %log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32(2811 <1 x float> <float 42.0>,2812 metadata !"round.dynamic",2813 metadata !"fpexcept.strict") #02814 ret <1 x float> %log22815}2816 2817define <2 x double> @constrained_vector_log2_v2f64() #0 {2818; CHECK-LABEL: constrained_vector_log2_v2f64:2819; CHECK: # %bb.0: # %entry2820; CHECK-NEXT: subq $24, %rsp2821; CHECK-NEXT: .cfi_def_cfa_offset 322822; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2823; CHECK-NEXT: callq log2@PLT2824; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2825; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2826; CHECK-NEXT: callq log2@PLT2827; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2828; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2829; CHECK-NEXT: addq $24, %rsp2830; CHECK-NEXT: .cfi_def_cfa_offset 82831; CHECK-NEXT: retq2832;2833; AVX-LABEL: constrained_vector_log2_v2f64:2834; AVX: # %bb.0: # %entry2835; AVX-NEXT: subq $24, %rsp2836; AVX-NEXT: .cfi_def_cfa_offset 322837; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2838; AVX-NEXT: callq log2@PLT2839; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2840; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2841; AVX-NEXT: callq log2@PLT2842; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2843; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2844; AVX-NEXT: addq $24, %rsp2845; AVX-NEXT: .cfi_def_cfa_offset 82846; AVX-NEXT: retq2847entry:2848 %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(2849 <2 x double> <double 42.0, double 42.1>,2850 metadata !"round.dynamic",2851 metadata !"fpexcept.strict") #02852 ret <2 x double> %log22853}2854 2855define <3 x float> @constrained_vector_log2_v3f32() #0 {2856; CHECK-LABEL: constrained_vector_log2_v3f32:2857; CHECK: # %bb.0: # %entry2858; CHECK-NEXT: subq $40, %rsp2859; CHECK-NEXT: .cfi_def_cfa_offset 482860; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2861; CHECK-NEXT: callq log2f@PLT2862; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2863; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2864; CHECK-NEXT: callq log2f@PLT2865; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2866; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2867; CHECK-NEXT: callq log2f@PLT2868; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload2869; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]2870; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2871; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2872; CHECK-NEXT: movaps %xmm1, %xmm02873; CHECK-NEXT: addq $40, %rsp2874; CHECK-NEXT: .cfi_def_cfa_offset 82875; CHECK-NEXT: retq2876;2877; AVX-LABEL: constrained_vector_log2_v3f32:2878; AVX: # %bb.0: # %entry2879; AVX-NEXT: subq $40, %rsp2880; AVX-NEXT: .cfi_def_cfa_offset 482881; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]2882; AVX-NEXT: callq log2f@PLT2883; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2884; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]2885; AVX-NEXT: callq log2f@PLT2886; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2887; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]2888; AVX-NEXT: callq log2f@PLT2889; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload2890; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]2891; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload2892; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]2893; AVX-NEXT: addq $40, %rsp2894; AVX-NEXT: .cfi_def_cfa_offset 82895; AVX-NEXT: retq2896entry:2897 %log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32(2898 <3 x float> <float 42.0, float 43.0, float 44.0>,2899 metadata !"round.dynamic",2900 metadata !"fpexcept.strict") #02901 ret <3 x float> %log22902}2903 2904define <3 x double> @constrained_vector_log2_v3f64() #0 {2905; CHECK-LABEL: constrained_vector_log2_v3f64:2906; CHECK: # %bb.0: # %entry2907; CHECK-NEXT: subq $24, %rsp2908; CHECK-NEXT: .cfi_def_cfa_offset 322909; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2910; CHECK-NEXT: callq log2@PLT2911; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill2912; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2913; CHECK-NEXT: callq log2@PLT2914; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill2915; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2916; CHECK-NEXT: callq log2@PLT2917; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)2918; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)2919; CHECK-NEXT: wait2920; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload2921; CHECK-NEXT: # xmm0 = mem[0],zero2922; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload2923; CHECK-NEXT: # xmm1 = mem[0],zero2924; CHECK-NEXT: addq $24, %rsp2925; CHECK-NEXT: .cfi_def_cfa_offset 82926; CHECK-NEXT: retq2927;2928; AVX-LABEL: constrained_vector_log2_v3f64:2929; AVX: # %bb.0: # %entry2930; AVX-NEXT: subq $40, %rsp2931; AVX-NEXT: .cfi_def_cfa_offset 482932; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2933; AVX-NEXT: callq log2@PLT2934; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2935; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2936; AVX-NEXT: callq log2@PLT2937; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2938; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2939; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill2940; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2941; AVX-NEXT: vzeroupper2942; AVX-NEXT: callq log2@PLT2943; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload2944; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm02945; AVX-NEXT: addq $40, %rsp2946; AVX-NEXT: .cfi_def_cfa_offset 82947; AVX-NEXT: retq2948entry:2949 %log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64(2950 <3 x double> <double 42.0, double 42.1, double 42.2>,2951 metadata !"round.dynamic",2952 metadata !"fpexcept.strict") #02953 ret <3 x double> %log22954}2955 2956define <4 x double> @constrained_vector_log2_v4f64() #0 {2957; CHECK-LABEL: constrained_vector_log2_v4f64:2958; CHECK: # %bb.0: # %entry2959; CHECK-NEXT: subq $40, %rsp2960; CHECK-NEXT: .cfi_def_cfa_offset 482961; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2962; CHECK-NEXT: callq log2@PLT2963; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2964; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2965; CHECK-NEXT: callq log2@PLT2966; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload2967; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]2968; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill2969; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2970; CHECK-NEXT: callq log2@PLT2971; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2972; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2973; CHECK-NEXT: callq log2@PLT2974; CHECK-NEXT: movaps %xmm0, %xmm12975; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload2976; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]2977; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload2978; CHECK-NEXT: addq $40, %rsp2979; CHECK-NEXT: .cfi_def_cfa_offset 82980; CHECK-NEXT: retq2981;2982; AVX-LABEL: constrained_vector_log2_v4f64:2983; AVX: # %bb.0: # %entry2984; AVX-NEXT: subq $40, %rsp2985; AVX-NEXT: .cfi_def_cfa_offset 482986; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]2987; AVX-NEXT: callq log2@PLT2988; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2989; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]2990; AVX-NEXT: callq log2@PLT2991; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload2992; AVX-NEXT: # xmm0 = xmm0[0],mem[0]2993; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill2994; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]2995; AVX-NEXT: callq log2@PLT2996; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill2997; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]2998; AVX-NEXT: callq log2@PLT2999; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3000; AVX-NEXT: # xmm0 = xmm0[0],mem[0]3001; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload3002; AVX-NEXT: addq $40, %rsp3003; AVX-NEXT: .cfi_def_cfa_offset 83004; AVX-NEXT: retq3005entry:3006 %log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64(3007 <4 x double> <double 42.0, double 42.1,3008 double 42.2, double 42.3>,3009 metadata !"round.dynamic",3010 metadata !"fpexcept.strict") #03011 ret <4 x double> %log23012}3013 3014define <1 x float> @constrained_vector_rint_v1f32_var(ptr %a) #0 {3015; CHECK-LABEL: constrained_vector_rint_v1f32_var:3016; CHECK: # %bb.0: # %entry3017; CHECK-NEXT: pushq %rax3018; CHECK-NEXT: .cfi_def_cfa_offset 163019; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero3020; CHECK-NEXT: callq rintf@PLT3021; CHECK-NEXT: popq %rax3022; CHECK-NEXT: .cfi_def_cfa_offset 83023; CHECK-NEXT: retq3024;3025; AVX-LABEL: constrained_vector_rint_v1f32_var:3026; AVX: # %bb.0: # %entry3027; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero3028; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm03029; AVX-NEXT: retq3030entry:3031 %b = load <1 x float>, ptr %a3032 %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(3033 <1 x float> %b,3034 metadata !"round.dynamic",3035 metadata !"fpexcept.strict") #03036 ret <1 x float> %rint3037}3038 3039define <2 x double> @constrained_vector_rint_v2f64() #0 {3040; CHECK-LABEL: constrained_vector_rint_v2f64:3041; CHECK: # %bb.0: # %entry3042; CHECK-NEXT: subq $24, %rsp3043; CHECK-NEXT: .cfi_def_cfa_offset 323044; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3045; CHECK-NEXT: callq rint@PLT3046; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3047; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]3048; CHECK-NEXT: callq rint@PLT3049; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3050; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3051; CHECK-NEXT: addq $24, %rsp3052; CHECK-NEXT: .cfi_def_cfa_offset 83053; CHECK-NEXT: retq3054;3055; AVX-LABEL: constrained_vector_rint_v2f64:3056; AVX: # %bb.0: # %entry3057; AVX-NEXT: vroundpd $4, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03058; AVX-NEXT: retq3059entry:3060 %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(3061 <2 x double> <double 42.1, double 42.0>,3062 metadata !"round.dynamic",3063 metadata !"fpexcept.strict") #03064 ret <2 x double> %rint3065}3066 3067define <2 x double> @constrained_vector_rint_v2f64_var(ptr %a) #0 {3068; CHECK-LABEL: constrained_vector_rint_v2f64_var:3069; CHECK: # %bb.0: # %entry3070; CHECK-NEXT: subq $40, %rsp3071; CHECK-NEXT: .cfi_def_cfa_offset 483072; CHECK-NEXT: movaps (%rdi), %xmm03073; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3074; CHECK-NEXT: callq rint@PLT3075; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3076; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3077; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3078; CHECK-NEXT: callq rint@PLT3079; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload3080; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]3081; CHECK-NEXT: movaps %xmm1, %xmm03082; CHECK-NEXT: addq $40, %rsp3083; CHECK-NEXT: .cfi_def_cfa_offset 83084; CHECK-NEXT: retq3085;3086; AVX-LABEL: constrained_vector_rint_v2f64_var:3087; AVX: # %bb.0: # %entry3088; AVX-NEXT: vroundpd $4, (%rdi), %xmm03089; AVX-NEXT: retq3090entry:3091 %b = load <2 x double>, ptr %a3092 %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(3093 <2 x double> %b,3094 metadata !"round.dynamic",3095 metadata !"fpexcept.strict") #03096 ret <2 x double> %rint3097}3098 3099define <3 x float> @constrained_vector_rint_v3f32_var(ptr %a) #0 {3100; CHECK-LABEL: constrained_vector_rint_v3f32_var:3101; CHECK: # %bb.0: # %entry3102; CHECK-NEXT: subq $56, %rsp3103; CHECK-NEXT: .cfi_def_cfa_offset 643104; CHECK-NEXT: movaps (%rdi), %xmm03105; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3106; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3107; CHECK-NEXT: callq rintf@PLT3108; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3109; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3110; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]3111; CHECK-NEXT: callq rintf@PLT3112; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3113; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3114; CHECK-NEXT: callq rintf@PLT3115; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3116; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]3117; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3118; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3119; CHECK-NEXT: addq $56, %rsp3120; CHECK-NEXT: .cfi_def_cfa_offset 83121; CHECK-NEXT: retq3122;3123; AVX-LABEL: constrained_vector_rint_v3f32_var:3124; AVX: # %bb.0: # %entry3125; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero3126; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm03127; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero3128; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero3129; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm13130; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm23131; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]3132; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]3133; AVX-NEXT: retq3134 entry:3135 %b = load <3 x float>, ptr %a3136 %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(3137 <3 x float> %b,3138 metadata !"round.dynamic",3139 metadata !"fpexcept.strict") #03140 ret <3 x float> %rint3141}3142 3143define <3 x double> @constrained_vector_rint_v3f64() #0 {3144; CHECK-LABEL: constrained_vector_rint_v3f64:3145; CHECK: # %bb.0: # %entry3146; CHECK-NEXT: subq $24, %rsp3147; CHECK-NEXT: .cfi_def_cfa_offset 323148; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]3149; CHECK-NEXT: callq rint@PLT3150; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3151; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3152; CHECK-NEXT: callq rint@PLT3153; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill3154; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]3155; CHECK-NEXT: callq rint@PLT3156; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)3157; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)3158; CHECK-NEXT: wait3159; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload3160; CHECK-NEXT: # xmm0 = mem[0],zero3161; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload3162; CHECK-NEXT: # xmm1 = mem[0],zero3163; CHECK-NEXT: addq $24, %rsp3164; CHECK-NEXT: .cfi_def_cfa_offset 83165; CHECK-NEXT: retq3166;3167; AVX-LABEL: constrained_vector_rint_v3f64:3168; AVX: # %bb.0: # %entry3169; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]3170; AVX-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm03171; AVX-NEXT: vroundpd $4, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm13172; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm03173; AVX-NEXT: retq3174entry:3175 %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(3176 <3 x double> <double 42.0, double 42.1, double 42.2>,3177 metadata !"round.dynamic",3178 metadata !"fpexcept.strict") #03179 ret <3 x double> %rint3180}3181 3182define <3 x double> @constrained_vector_rint_v3f64_var(ptr %a) #0 {3183; CHECK-LABEL: constrained_vector_rint_v3f64_var:3184; CHECK: # %bb.0: # %entry3185; CHECK-NEXT: subq $40, %rsp3186; CHECK-NEXT: .cfi_def_cfa_offset 483187; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero3188; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3189; CHECK-NEXT: movaps (%rdi), %xmm03190; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3191; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3192; CHECK-NEXT: callq rint@PLT3193; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3194; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3195; CHECK-NEXT: callq rint@PLT3196; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill3197; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload3198; CHECK-NEXT: # xmm0 = mem[0],zero3199; CHECK-NEXT: callq rint@PLT3200; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)3201; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)3202; CHECK-NEXT: wait3203; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload3204; CHECK-NEXT: # xmm0 = mem[0],zero3205; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload3206; CHECK-NEXT: # xmm1 = mem[0],zero3207; CHECK-NEXT: addq $40, %rsp3208; CHECK-NEXT: .cfi_def_cfa_offset 83209; CHECK-NEXT: retq3210;3211; AVX-LABEL: constrained_vector_rint_v3f64_var:3212; AVX: # %bb.0: # %entry3213; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero3214; AVX-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm03215; AVX-NEXT: vroundpd $4, (%rdi), %xmm13216; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm03217; AVX-NEXT: retq3218entry:3219 %b = load <3 x double>, ptr %a3220 %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(3221 <3 x double> %b,3222 metadata !"round.dynamic",3223 metadata !"fpexcept.strict") #03224 ret <3 x double> %rint3225}3226 3227define <4 x double> @constrained_vector_rint_v4f64() #0 {3228; CHECK-LABEL: constrained_vector_rint_v4f64:3229; CHECK: # %bb.0: # %entry3230; CHECK-NEXT: subq $40, %rsp3231; CHECK-NEXT: .cfi_def_cfa_offset 483232; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]3233; CHECK-NEXT: callq rint@PLT3234; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3235; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]3236; CHECK-NEXT: callq rint@PLT3237; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3238; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3239; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3240; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]3241; CHECK-NEXT: callq rint@PLT3242; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3243; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]3244; CHECK-NEXT: callq rint@PLT3245; CHECK-NEXT: movaps %xmm0, %xmm13246; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload3247; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]3248; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3249; CHECK-NEXT: addq $40, %rsp3250; CHECK-NEXT: .cfi_def_cfa_offset 83251; CHECK-NEXT: retq3252;3253; AVX-LABEL: constrained_vector_rint_v4f64:3254; AVX: # %bb.0: # %entry3255; AVX-NEXT: vroundpd $4, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm03256; AVX-NEXT: retq3257entry:3258 %rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64(3259 <4 x double> <double 42.1, double 42.2,3260 double 42.3, double 42.4>,3261 metadata !"round.dynamic",3262 metadata !"fpexcept.strict") #03263 ret <4 x double> %rint3264}3265 3266define <4 x double> @constrained_vector_rint_v4f64_var(ptr %a) #0 {3267; CHECK-LABEL: constrained_vector_rint_v4f64_var:3268; CHECK: # %bb.0: # %entry3269; CHECK-NEXT: subq $56, %rsp3270; CHECK-NEXT: .cfi_def_cfa_offset 643271; CHECK-NEXT: movaps (%rdi), %xmm13272; CHECK-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill3273; CHECK-NEXT: movaps 16(%rdi), %xmm03274; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3275; CHECK-NEXT: movaps %xmm1, %xmm03276; CHECK-NEXT: callq rint@PLT3277; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3278; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3279; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3280; CHECK-NEXT: callq rint@PLT3281; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload3282; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]3283; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3284; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload3285; CHECK-NEXT: callq rint@PLT3286; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3287; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload3288; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3289; CHECK-NEXT: callq rint@PLT3290; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload3291; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]3292; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload3293; CHECK-NEXT: addq $56, %rsp3294; CHECK-NEXT: .cfi_def_cfa_offset 83295; CHECK-NEXT: retq3296;3297; AVX-LABEL: constrained_vector_rint_v4f64_var:3298; AVX: # %bb.0: # %entry3299; AVX-NEXT: vroundpd $4, (%rdi), %ymm03300; AVX-NEXT: retq3301entry:3302 %b = load <4 x double>, ptr %a3303 %rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64(3304 <4 x double> %b,3305 metadata !"round.dynamic",3306 metadata !"fpexcept.strict") #03307 ret <4 x double> %rint3308}3309 3310define <1 x float> @constrained_vector_nearbyint_v1f32_var(ptr %a) #0 {3311; CHECK-LABEL: constrained_vector_nearbyint_v1f32_var:3312; CHECK: # %bb.0: # %entry3313; CHECK-NEXT: pushq %rax3314; CHECK-NEXT: .cfi_def_cfa_offset 163315; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero3316; CHECK-NEXT: callq nearbyintf@PLT3317; CHECK-NEXT: popq %rax3318; CHECK-NEXT: .cfi_def_cfa_offset 83319; CHECK-NEXT: retq3320;3321; AVX-LABEL: constrained_vector_nearbyint_v1f32_var:3322; AVX: # %bb.0: # %entry3323; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero3324; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm03325; AVX-NEXT: retq3326entry:3327 %b = load <1 x float>, ptr %a3328 %nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(3329 <1 x float> %b,3330 metadata !"round.dynamic",3331 metadata !"fpexcept.strict") #03332 ret <1 x float> %nearby3333}3334 3335define <2 x double> @constrained_vector_nearbyint_v2f64() #0 {3336; CHECK-LABEL: constrained_vector_nearbyint_v2f64:3337; CHECK: # %bb.0: # %entry3338; CHECK-NEXT: subq $24, %rsp3339; CHECK-NEXT: .cfi_def_cfa_offset 323340; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3341; CHECK-NEXT: callq nearbyint@PLT3342; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3343; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]3344; CHECK-NEXT: callq nearbyint@PLT3345; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3346; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3347; CHECK-NEXT: addq $24, %rsp3348; CHECK-NEXT: .cfi_def_cfa_offset 83349; CHECK-NEXT: retq3350;3351; AVX-LABEL: constrained_vector_nearbyint_v2f64:3352; AVX: # %bb.0: # %entry3353; AVX-NEXT: vroundpd $12, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03354; AVX-NEXT: retq3355entry:3356 %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(3357 <2 x double> <double 42.1, double 42.0>,3358 metadata !"round.dynamic",3359 metadata !"fpexcept.strict") #03360 ret <2 x double> %nearby3361}3362 3363define <2 x double> @constrained_vector_nearbyint_v2f64_var(ptr %a) #0 {3364; CHECK-LABEL: constrained_vector_nearbyint_v2f64_var:3365; CHECK: # %bb.0: # %entry3366; CHECK-NEXT: subq $40, %rsp3367; CHECK-NEXT: .cfi_def_cfa_offset 483368; CHECK-NEXT: movaps (%rdi), %xmm03369; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3370; CHECK-NEXT: callq nearbyint@PLT3371; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3372; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3373; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3374; CHECK-NEXT: callq nearbyint@PLT3375; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload3376; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]3377; CHECK-NEXT: movaps %xmm1, %xmm03378; CHECK-NEXT: addq $40, %rsp3379; CHECK-NEXT: .cfi_def_cfa_offset 83380; CHECK-NEXT: retq3381;3382; AVX-LABEL: constrained_vector_nearbyint_v2f64_var:3383; AVX: # %bb.0: # %entry3384; AVX-NEXT: vroundpd $12, (%rdi), %xmm03385; AVX-NEXT: retq3386entry:3387 %b = load <2 x double>, ptr %a3388 %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(3389 <2 x double> %b,3390 metadata !"round.dynamic",3391 metadata !"fpexcept.strict") #03392 ret <2 x double> %nearby3393}3394 3395define <3 x float> @constrained_vector_nearbyint_v3f32_var(ptr %a) #0 {3396; CHECK-LABEL: constrained_vector_nearbyint_v3f32_var:3397; CHECK: # %bb.0: # %entry3398; CHECK-NEXT: subq $56, %rsp3399; CHECK-NEXT: .cfi_def_cfa_offset 643400; CHECK-NEXT: movaps (%rdi), %xmm03401; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3402; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3403; CHECK-NEXT: callq nearbyintf@PLT3404; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3405; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3406; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]3407; CHECK-NEXT: callq nearbyintf@PLT3408; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3409; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3410; CHECK-NEXT: callq nearbyintf@PLT3411; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3412; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]3413; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload3414; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3415; CHECK-NEXT: addq $56, %rsp3416; CHECK-NEXT: .cfi_def_cfa_offset 83417; CHECK-NEXT: retq3418;3419; AVX-LABEL: constrained_vector_nearbyint_v3f32_var:3420; AVX: # %bb.0: # %entry3421; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero3422; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm03423; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero3424; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero3425; AVX-NEXT: vroundss $12, %xmm1, %xmm1, %xmm13426; AVX-NEXT: vroundss $12, %xmm2, %xmm2, %xmm23427; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]3428; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]3429; AVX-NEXT: retq3430entry:3431 %b = load <3 x float>, ptr %a3432 %nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(3433 <3 x float> %b,3434 metadata !"round.dynamic",3435 metadata !"fpexcept.strict") #03436 ret <3 x float> %nearby3437}3438 3439define <3 x double> @constrained_vector_nearby_v3f64() #0 {3440; CHECK-LABEL: constrained_vector_nearby_v3f64:3441; CHECK: # %bb.0: # %entry3442; CHECK-NEXT: subq $24, %rsp3443; CHECK-NEXT: .cfi_def_cfa_offset 323444; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]3445; CHECK-NEXT: callq nearbyint@PLT3446; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3447; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3448; CHECK-NEXT: callq nearbyint@PLT3449; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill3450; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]3451; CHECK-NEXT: callq nearbyint@PLT3452; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)3453; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)3454; CHECK-NEXT: wait3455; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload3456; CHECK-NEXT: # xmm0 = mem[0],zero3457; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload3458; CHECK-NEXT: # xmm1 = mem[0],zero3459; CHECK-NEXT: addq $24, %rsp3460; CHECK-NEXT: .cfi_def_cfa_offset 83461; CHECK-NEXT: retq3462;3463; AVX-LABEL: constrained_vector_nearby_v3f64:3464; AVX: # %bb.0: # %entry3465; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]3466; AVX-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm03467; AVX-NEXT: vroundpd $12, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm13468; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm03469; AVX-NEXT: retq3470entry:3471 %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(3472 <3 x double> <double 42.0, double 42.1, double 42.2>,3473 metadata !"round.dynamic",3474 metadata !"fpexcept.strict") #03475 ret <3 x double> %nearby3476}3477 3478define <3 x double> @constrained_vector_nearbyint_v3f64_var(ptr %a) #0 {3479; CHECK-LABEL: constrained_vector_nearbyint_v3f64_var:3480; CHECK: # %bb.0: # %entry3481; CHECK-NEXT: subq $40, %rsp3482; CHECK-NEXT: .cfi_def_cfa_offset 483483; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero3484; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3485; CHECK-NEXT: movaps (%rdi), %xmm03486; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3487; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3488; CHECK-NEXT: callq nearbyint@PLT3489; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3490; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3491; CHECK-NEXT: callq nearbyint@PLT3492; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill3493; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload3494; CHECK-NEXT: # xmm0 = mem[0],zero3495; CHECK-NEXT: callq nearbyint@PLT3496; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)3497; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)3498; CHECK-NEXT: wait3499; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload3500; CHECK-NEXT: # xmm0 = mem[0],zero3501; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload3502; CHECK-NEXT: # xmm1 = mem[0],zero3503; CHECK-NEXT: addq $40, %rsp3504; CHECK-NEXT: .cfi_def_cfa_offset 83505; CHECK-NEXT: retq3506;3507; AVX-LABEL: constrained_vector_nearbyint_v3f64_var:3508; AVX: # %bb.0: # %entry3509; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero3510; AVX-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm03511; AVX-NEXT: vroundpd $12, (%rdi), %xmm13512; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm03513; AVX-NEXT: retq3514entry:3515 %b = load <3 x double>, ptr %a3516 %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(3517 <3 x double> %b,3518 metadata !"round.dynamic",3519 metadata !"fpexcept.strict") #03520 ret <3 x double> %nearby3521}3522 3523define <4 x double> @constrained_vector_nearbyint_v4f64() #0 {3524; CHECK-LABEL: constrained_vector_nearbyint_v4f64:3525; CHECK: # %bb.0: # %entry3526; CHECK-NEXT: subq $40, %rsp3527; CHECK-NEXT: .cfi_def_cfa_offset 483528; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]3529; CHECK-NEXT: callq nearbyint@PLT3530; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3531; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]3532; CHECK-NEXT: callq nearbyint@PLT3533; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3534; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3535; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3536; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2399999999999999E+1,0.0E+0]3537; CHECK-NEXT: callq nearbyint@PLT3538; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3539; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]3540; CHECK-NEXT: callq nearbyint@PLT3541; CHECK-NEXT: movaps %xmm0, %xmm13542; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload3543; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]3544; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3545; CHECK-NEXT: addq $40, %rsp3546; CHECK-NEXT: .cfi_def_cfa_offset 83547; CHECK-NEXT: retq3548;3549; AVX-LABEL: constrained_vector_nearbyint_v4f64:3550; AVX: # %bb.0: # %entry3551; AVX-NEXT: vroundpd $12, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm03552; AVX-NEXT: retq3553entry:3554 %nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(3555 <4 x double> <double 42.1, double 42.2,3556 double 42.3, double 42.4>,3557 metadata !"round.dynamic",3558 metadata !"fpexcept.strict") #03559 ret <4 x double> %nearby3560}3561 3562define <4 x double> @constrained_vector_nearbyint_v4f64_var(ptr %a) #0 {3563; CHECK-LABEL: constrained_vector_nearbyint_v4f64_var:3564; CHECK: # %bb.0: # %entry3565; CHECK-NEXT: subq $56, %rsp3566; CHECK-NEXT: .cfi_def_cfa_offset 643567; CHECK-NEXT: movaps (%rdi), %xmm13568; CHECK-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill3569; CHECK-NEXT: movaps 16(%rdi), %xmm03570; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3571; CHECK-NEXT: movaps %xmm1, %xmm03572; CHECK-NEXT: callq nearbyint@PLT3573; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3574; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3575; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3576; CHECK-NEXT: callq nearbyint@PLT3577; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload3578; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]3579; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3580; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload3581; CHECK-NEXT: callq nearbyint@PLT3582; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3583; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload3584; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]3585; CHECK-NEXT: callq nearbyint@PLT3586; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload3587; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]3588; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload3589; CHECK-NEXT: addq $56, %rsp3590; CHECK-NEXT: .cfi_def_cfa_offset 83591; CHECK-NEXT: retq3592;3593; AVX-LABEL: constrained_vector_nearbyint_v4f64_var:3594; AVX: # %bb.0: # %entry3595; AVX-NEXT: vroundpd $12, (%rdi), %ymm03596; AVX-NEXT: retq3597entry:3598 %b = load <4 x double>, ptr %a3599 %nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(3600 <4 x double> %b,3601 metadata !"round.dynamic",3602 metadata !"fpexcept.strict") #03603 ret <4 x double> %nearby3604}3605 3606define <1 x float> @constrained_vector_maxnum_v1f32() #0 {3607; CHECK-LABEL: constrained_vector_maxnum_v1f32:3608; CHECK: # %bb.0: # %entry3609; CHECK-NEXT: pushq %rax3610; CHECK-NEXT: .cfi_def_cfa_offset 163611; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3612; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3613; CHECK-NEXT: callq fmaxf@PLT3614; CHECK-NEXT: popq %rax3615; CHECK-NEXT: .cfi_def_cfa_offset 83616; CHECK-NEXT: retq3617;3618; AVX-LABEL: constrained_vector_maxnum_v1f32:3619; AVX: # %bb.0: # %entry3620; AVX-NEXT: pushq %rax3621; AVX-NEXT: .cfi_def_cfa_offset 163622; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3623; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3624; AVX-NEXT: callq fmaxf@PLT3625; AVX-NEXT: popq %rax3626; AVX-NEXT: .cfi_def_cfa_offset 83627; AVX-NEXT: retq3628entry:3629 %max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32(3630 <1 x float> <float 42.0>, <1 x float> <float 41.0>,3631 metadata !"fpexcept.strict") #03632 ret <1 x float> %max3633}3634 3635define <2 x double> @constrained_vector_maxnum_v2f64() #0 {3636; CHECK-LABEL: constrained_vector_maxnum_v2f64:3637; CHECK: # %bb.0: # %entry3638; CHECK-NEXT: subq $24, %rsp3639; CHECK-NEXT: .cfi_def_cfa_offset 323640; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3641; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3642; CHECK-NEXT: callq fmax@PLT3643; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3644; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3645; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3646; CHECK-NEXT: callq fmax@PLT3647; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3648; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3649; CHECK-NEXT: addq $24, %rsp3650; CHECK-NEXT: .cfi_def_cfa_offset 83651; CHECK-NEXT: retq3652;3653; AVX-LABEL: constrained_vector_maxnum_v2f64:3654; AVX: # %bb.0: # %entry3655; AVX-NEXT: subq $24, %rsp3656; AVX-NEXT: .cfi_def_cfa_offset 323657; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3658; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3659; AVX-NEXT: callq fmax@PLT3660; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3661; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3662; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3663; AVX-NEXT: callq fmax@PLT3664; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload3665; AVX-NEXT: # xmm0 = xmm0[0],mem[0]3666; AVX-NEXT: addq $24, %rsp3667; AVX-NEXT: .cfi_def_cfa_offset 83668; AVX-NEXT: retq3669entry:3670 %max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(3671 <2 x double> <double 43.0, double 42.0>,3672 <2 x double> <double 41.0, double 40.0>,3673 metadata !"fpexcept.strict") #03674 ret <2 x double> %max3675}3676 3677define <3 x float> @constrained_vector_maxnum_v3f32() #0 {3678; CHECK-LABEL: constrained_vector_maxnum_v3f32:3679; CHECK: # %bb.0: # %entry3680; CHECK-NEXT: subq $40, %rsp3681; CHECK-NEXT: .cfi_def_cfa_offset 483682; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.5E+1,0.0E+0,0.0E+0,0.0E+0]3683; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3684; CHECK-NEXT: callq fmaxf@PLT3685; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3686; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3687; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3688; CHECK-NEXT: callq fmaxf@PLT3689; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3690; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]3691; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3692; CHECK-NEXT: callq fmaxf@PLT3693; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload3694; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]3695; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload3696; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]3697; CHECK-NEXT: movaps %xmm1, %xmm03698; CHECK-NEXT: addq $40, %rsp3699; CHECK-NEXT: .cfi_def_cfa_offset 83700; CHECK-NEXT: retq3701;3702; AVX-LABEL: constrained_vector_maxnum_v3f32:3703; AVX: # %bb.0: # %entry3704; AVX-NEXT: subq $40, %rsp3705; AVX-NEXT: .cfi_def_cfa_offset 483706; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.5E+1,0.0E+0,0.0E+0,0.0E+0]3707; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3708; AVX-NEXT: callq fmaxf@PLT3709; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3710; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3711; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3712; AVX-NEXT: callq fmaxf@PLT3713; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3714; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]3715; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3716; AVX-NEXT: callq fmaxf@PLT3717; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload3718; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]3719; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3720; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]3721; AVX-NEXT: addq $40, %rsp3722; AVX-NEXT: .cfi_def_cfa_offset 83723; AVX-NEXT: retq3724entry:3725 %max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32(3726 <3 x float> <float 43.0, float 44.0, float 45.0>,3727 <3 x float> <float 41.0, float 42.0, float 43.0>,3728 metadata !"fpexcept.strict") #03729 ret <3 x float> %max3730}3731 3732define <3 x double> @constrained_vector_max_v3f64() #0 {3733; CHECK-LABEL: constrained_vector_max_v3f64:3734; CHECK: # %bb.0: # %entry3735; CHECK-NEXT: subq $24, %rsp3736; CHECK-NEXT: .cfi_def_cfa_offset 323737; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]3738; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3739; CHECK-NEXT: callq fmax@PLT3740; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3741; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3742; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3743; CHECK-NEXT: callq fmax@PLT3744; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill3745; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]3746; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]3747; CHECK-NEXT: callq fmax@PLT3748; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)3749; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)3750; CHECK-NEXT: wait3751; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload3752; CHECK-NEXT: # xmm0 = mem[0],zero3753; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload3754; CHECK-NEXT: # xmm1 = mem[0],zero3755; CHECK-NEXT: addq $24, %rsp3756; CHECK-NEXT: .cfi_def_cfa_offset 83757; CHECK-NEXT: retq3758;3759; AVX-LABEL: constrained_vector_max_v3f64:3760; AVX: # %bb.0: # %entry3761; AVX-NEXT: subq $40, %rsp3762; AVX-NEXT: .cfi_def_cfa_offset 483763; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]3764; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3765; AVX-NEXT: callq fmax@PLT3766; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3767; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3768; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3769; AVX-NEXT: callq fmax@PLT3770; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload3771; AVX-NEXT: # xmm0 = xmm0[0],mem[0]3772; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill3773; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]3774; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]3775; AVX-NEXT: vzeroupper3776; AVX-NEXT: callq fmax@PLT3777; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload3778; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm03779; AVX-NEXT: addq $40, %rsp3780; AVX-NEXT: .cfi_def_cfa_offset 83781; AVX-NEXT: retq3782entry:3783 %max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64(3784 <3 x double> <double 43.0, double 44.0, double 45.0>,3785 <3 x double> <double 40.0, double 41.0, double 42.0>,3786 metadata !"fpexcept.strict") #03787 ret <3 x double> %max3788}3789 3790define <4 x double> @constrained_vector_maxnum_v4f64() #0 {3791; CHECK-LABEL: constrained_vector_maxnum_v4f64:3792; CHECK: # %bb.0: # %entry3793; CHECK-NEXT: subq $40, %rsp3794; CHECK-NEXT: .cfi_def_cfa_offset 483795; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]3796; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3797; CHECK-NEXT: callq fmax@PLT3798; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3799; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]3800; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3801; CHECK-NEXT: callq fmax@PLT3802; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3803; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3804; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3805; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.7E+1,0.0E+0]3806; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.3E+1,0.0E+0]3807; CHECK-NEXT: callq fmax@PLT3808; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3809; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.6E+1,0.0E+0]3810; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]3811; CHECK-NEXT: callq fmax@PLT3812; CHECK-NEXT: movaps %xmm0, %xmm13813; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload3814; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]3815; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload3816; CHECK-NEXT: addq $40, %rsp3817; CHECK-NEXT: .cfi_def_cfa_offset 83818; CHECK-NEXT: retq3819;3820; AVX-LABEL: constrained_vector_maxnum_v4f64:3821; AVX: # %bb.0: # %entry3822; AVX-NEXT: subq $40, %rsp3823; AVX-NEXT: .cfi_def_cfa_offset 483824; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.7E+1,0.0E+0]3825; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.3E+1,0.0E+0]3826; AVX-NEXT: callq fmax@PLT3827; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3828; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.6E+1,0.0E+0]3829; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]3830; AVX-NEXT: callq fmax@PLT3831; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload3832; AVX-NEXT: # xmm0 = xmm0[0],mem[0]3833; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3834; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]3835; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3836; AVX-NEXT: callq fmax@PLT3837; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3838; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]3839; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3840; AVX-NEXT: callq fmax@PLT3841; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3842; AVX-NEXT: # xmm0 = xmm0[0],mem[0]3843; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload3844; AVX-NEXT: addq $40, %rsp3845; AVX-NEXT: .cfi_def_cfa_offset 83846; AVX-NEXT: retq3847entry:3848 %max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64(3849 <4 x double> <double 44.0, double 45.0,3850 double 46.0, double 47.0>,3851 <4 x double> <double 40.0, double 41.0,3852 double 42.0, double 43.0>,3853 metadata !"fpexcept.strict") #03854 ret <4 x double> %max3855}3856 3857define <1 x float> @constrained_vector_minnum_v1f32() #0 {3858; CHECK-LABEL: constrained_vector_minnum_v1f32:3859; CHECK: # %bb.0: # %entry3860; CHECK-NEXT: pushq %rax3861; CHECK-NEXT: .cfi_def_cfa_offset 163862; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3863; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3864; CHECK-NEXT: callq fminf@PLT3865; CHECK-NEXT: popq %rax3866; CHECK-NEXT: .cfi_def_cfa_offset 83867; CHECK-NEXT: retq3868;3869; AVX-LABEL: constrained_vector_minnum_v1f32:3870; AVX: # %bb.0: # %entry3871; AVX-NEXT: pushq %rax3872; AVX-NEXT: .cfi_def_cfa_offset 163873; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3874; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3875; AVX-NEXT: callq fminf@PLT3876; AVX-NEXT: popq %rax3877; AVX-NEXT: .cfi_def_cfa_offset 83878; AVX-NEXT: retq3879 entry:3880 %min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32(3881 <1 x float> <float 42.0>, <1 x float> <float 41.0>,3882 metadata !"fpexcept.strict") #03883 ret <1 x float> %min3884}3885 3886define <2 x double> @constrained_vector_minnum_v2f64() #0 {3887; CHECK-LABEL: constrained_vector_minnum_v2f64:3888; CHECK: # %bb.0: # %entry3889; CHECK-NEXT: subq $24, %rsp3890; CHECK-NEXT: .cfi_def_cfa_offset 323891; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3892; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3893; CHECK-NEXT: callq fmin@PLT3894; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3895; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3896; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3897; CHECK-NEXT: callq fmin@PLT3898; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload3899; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]3900; CHECK-NEXT: addq $24, %rsp3901; CHECK-NEXT: .cfi_def_cfa_offset 83902; CHECK-NEXT: retq3903;3904; AVX-LABEL: constrained_vector_minnum_v2f64:3905; AVX: # %bb.0: # %entry3906; AVX-NEXT: subq $24, %rsp3907; AVX-NEXT: .cfi_def_cfa_offset 323908; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]3909; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3910; AVX-NEXT: callq fmin@PLT3911; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3912; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3913; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3914; AVX-NEXT: callq fmin@PLT3915; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload3916; AVX-NEXT: # xmm0 = xmm0[0],mem[0]3917; AVX-NEXT: addq $24, %rsp3918; AVX-NEXT: .cfi_def_cfa_offset 83919; AVX-NEXT: retq3920entry:3921 %min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(3922 <2 x double> <double 43.0, double 42.0>,3923 <2 x double> <double 41.0, double 40.0>,3924 metadata !"fpexcept.strict") #03925 ret <2 x double> %min3926}3927 3928define <3 x float> @constrained_vector_minnum_v3f32() #0 {3929; CHECK-LABEL: constrained_vector_minnum_v3f32:3930; CHECK: # %bb.0: # %entry3931; CHECK-NEXT: subq $40, %rsp3932; CHECK-NEXT: .cfi_def_cfa_offset 483933; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.5E+1,0.0E+0,0.0E+0,0.0E+0]3934; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3935; CHECK-NEXT: callq fminf@PLT3936; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3937; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3938; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3939; CHECK-NEXT: callq fminf@PLT3940; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill3941; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]3942; CHECK-NEXT: movss {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3943; CHECK-NEXT: callq fminf@PLT3944; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload3945; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]3946; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload3947; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]3948; CHECK-NEXT: movaps %xmm1, %xmm03949; CHECK-NEXT: addq $40, %rsp3950; CHECK-NEXT: .cfi_def_cfa_offset 83951; CHECK-NEXT: retq3952;3953; AVX-LABEL: constrained_vector_minnum_v3f32:3954; AVX: # %bb.0: # %entry3955; AVX-NEXT: subq $40, %rsp3956; AVX-NEXT: .cfi_def_cfa_offset 483957; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.5E+1,0.0E+0,0.0E+0,0.0E+0]3958; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3959; AVX-NEXT: callq fminf@PLT3960; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill3961; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.1E+1,0.0E+0,0.0E+0,0.0E+0]3962; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]3963; AVX-NEXT: callq fminf@PLT3964; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill3965; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]3966; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]3967; AVX-NEXT: callq fminf@PLT3968; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload3969; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]3970; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload3971; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]3972; AVX-NEXT: addq $40, %rsp3973; AVX-NEXT: .cfi_def_cfa_offset 83974; AVX-NEXT: retq3975entry:3976 %min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32(3977 <3 x float> <float 43.0, float 44.0, float 45.0>,3978 <3 x float> <float 41.0, float 42.0, float 43.0>,3979 metadata !"fpexcept.strict") #03980 ret <3 x float> %min3981}3982 3983define <3 x double> @constrained_vector_min_v3f64() #0 {3984; CHECK-LABEL: constrained_vector_min_v3f64:3985; CHECK: # %bb.0: # %entry3986; CHECK-NEXT: subq $24, %rsp3987; CHECK-NEXT: .cfi_def_cfa_offset 323988; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]3989; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]3990; CHECK-NEXT: callq fmin@PLT3991; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill3992; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]3993; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]3994; CHECK-NEXT: callq fmin@PLT3995; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill3996; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]3997; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]3998; CHECK-NEXT: callq fmin@PLT3999; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)4000; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)4001; CHECK-NEXT: wait4002; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload4003; CHECK-NEXT: # xmm0 = mem[0],zero4004; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload4005; CHECK-NEXT: # xmm1 = mem[0],zero4006; CHECK-NEXT: addq $24, %rsp4007; CHECK-NEXT: .cfi_def_cfa_offset 84008; CHECK-NEXT: retq4009;4010; AVX-LABEL: constrained_vector_min_v3f64:4011; AVX: # %bb.0: # %entry4012; AVX-NEXT: subq $40, %rsp4013; AVX-NEXT: .cfi_def_cfa_offset 484014; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]4015; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]4016; AVX-NEXT: callq fmin@PLT4017; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill4018; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.3E+1,0.0E+0]4019; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]4020; AVX-NEXT: callq fmin@PLT4021; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload4022; AVX-NEXT: # xmm0 = xmm0[0],mem[0]4023; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill4024; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]4025; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]4026; AVX-NEXT: vzeroupper4027; AVX-NEXT: callq fmin@PLT4028; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload4029; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm04030; AVX-NEXT: addq $40, %rsp4031; AVX-NEXT: .cfi_def_cfa_offset 84032; AVX-NEXT: retq4033entry:4034 %min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64(4035 <3 x double> <double 43.0, double 44.0, double 45.0>,4036 <3 x double> <double 40.0, double 41.0, double 42.0>,4037 metadata !"fpexcept.strict") #04038 ret <3 x double> %min4039}4040 4041define <4 x double> @constrained_vector_minnum_v4f64() #0 {4042; CHECK-LABEL: constrained_vector_minnum_v4f64:4043; CHECK: # %bb.0: # %entry4044; CHECK-NEXT: subq $40, %rsp4045; CHECK-NEXT: .cfi_def_cfa_offset 484046; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]4047; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]4048; CHECK-NEXT: callq fmin@PLT4049; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill4050; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]4051; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]4052; CHECK-NEXT: callq fmin@PLT4053; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload4054; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]4055; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill4056; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.7E+1,0.0E+0]4057; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.3E+1,0.0E+0]4058; CHECK-NEXT: callq fmin@PLT4059; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill4060; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.6E+1,0.0E+0]4061; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]4062; CHECK-NEXT: callq fmin@PLT4063; CHECK-NEXT: movaps %xmm0, %xmm14064; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload4065; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]4066; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload4067; CHECK-NEXT: addq $40, %rsp4068; CHECK-NEXT: .cfi_def_cfa_offset 84069; CHECK-NEXT: retq4070;4071; AVX-LABEL: constrained_vector_minnum_v4f64:4072; AVX: # %bb.0: # %entry4073; AVX-NEXT: subq $40, %rsp4074; AVX-NEXT: .cfi_def_cfa_offset 484075; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.7E+1,0.0E+0]4076; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.3E+1,0.0E+0]4077; AVX-NEXT: callq fmin@PLT4078; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill4079; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.6E+1,0.0E+0]4080; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]4081; AVX-NEXT: callq fmin@PLT4082; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload4083; AVX-NEXT: # xmm0 = xmm0[0],mem[0]4084; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill4085; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.5E+1,0.0E+0]4086; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.1E+1,0.0E+0]4087; AVX-NEXT: callq fmin@PLT4088; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill4089; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.4E+1,0.0E+0]4090; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.0E+1,0.0E+0]4091; AVX-NEXT: callq fmin@PLT4092; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload4093; AVX-NEXT: # xmm0 = xmm0[0],mem[0]4094; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload4095; AVX-NEXT: addq $40, %rsp4096; AVX-NEXT: .cfi_def_cfa_offset 84097; AVX-NEXT: retq4098entry:4099 %min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64(4100 <4 x double> <double 44.0, double 45.0,4101 double 46.0, double 47.0>,4102 <4 x double> <double 40.0, double 41.0,4103 double 42.0, double 43.0>,4104 metadata !"fpexcept.strict") #04105 ret <4 x double> %min4106}4107 4108define <1 x i32> @constrained_vector_fptosi_v1i32_v1f32() #0 {4109; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f32:4110; CHECK: # %bb.0: # %entry4111; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4112; CHECK-NEXT: retq4113;4114; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f32:4115; AVX: # %bb.0: # %entry4116; AVX-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4117; AVX-NEXT: retq4118entry:4119 %result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f32(4120 <1 x float><float 42.0>,4121 metadata !"fpexcept.strict") #04122 ret <1 x i32> %result4123}4124 4125define <2 x i32> @constrained_vector_fptosi_v2i32_v2f32() #0 {4126; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f32:4127; CHECK: # %bb.0: # %entry4128; CHECK-NEXT: cvttps2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04129; CHECK-NEXT: retq4130;4131; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f32:4132; AVX: # %bb.0: # %entry4133; AVX-NEXT: vcvttps2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04134; AVX-NEXT: retq4135entry:4136 %result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f32(4137 <2 x float><float 42.0, float 43.0>,4138 metadata !"fpexcept.strict") #04139 ret <2 x i32> %result4140}4141 4142define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32() #0 {4143; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f32:4144; CHECK: # %bb.0: # %entry4145; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4146; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx4147; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %edx4148; CHECK-NEXT: movd %edx, %xmm14149; CHECK-NEXT: movd %ecx, %xmm04150; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]4151; CHECK-NEXT: movd %eax, %xmm14152; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4153; CHECK-NEXT: retq4154;4155; AVX-LABEL: constrained_vector_fptosi_v3i32_v3f32:4156; AVX: # %bb.0: # %entry4157; AVX-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4158; AVX-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx4159; AVX-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %edx4160; AVX-NEXT: vmovd %edx, %xmm04161; AVX-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm04162; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm04163; AVX-NEXT: retq4164entry:4165 %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32(4166 <3 x float><float 42.0, float 43.0,4167 float 44.0>,4168 metadata !"fpexcept.strict") #04169 ret <3 x i32> %result4170}4171 4172define <4 x i32> @constrained_vector_fptosi_v4i32_v4f32() #0 {4173; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f32:4174; CHECK: # %bb.0: # %entry4175; CHECK-NEXT: cvttps2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04176; CHECK-NEXT: retq4177;4178; AVX-LABEL: constrained_vector_fptosi_v4i32_v4f32:4179; AVX: # %bb.0: # %entry4180; AVX-NEXT: vcvttps2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04181; AVX-NEXT: retq4182entry:4183 %result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(4184 <4 x float><float 42.0, float 43.0,4185 float 44.0, float 45.0>,4186 metadata !"fpexcept.strict") #04187 ret <4 x i32> %result4188}4189 4190define <1 x i64> @constrained_vector_fptosi_v1i64_v1f32() #0 {4191; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f32:4192; CHECK: # %bb.0: # %entry4193; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4194; CHECK-NEXT: retq4195;4196; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f32:4197; AVX: # %bb.0: # %entry4198; AVX-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4199; AVX-NEXT: retq4200entry:4201 %result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f32(4202 <1 x float><float 42.0>,4203 metadata !"fpexcept.strict") #04204 ret <1 x i64> %result4205}4206 4207define <2 x i64> @constrained_vector_fptosi_v2i64_v2f32() #0 {4208; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f32:4209; CHECK: # %bb.0: # %entry4210; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4211; CHECK-NEXT: movq %rax, %xmm14212; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4213; CHECK-NEXT: movq %rax, %xmm04214; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4215; CHECK-NEXT: retq4216;4217; AVX1-LABEL: constrained_vector_fptosi_v2i64_v2f32:4218; AVX1: # %bb.0: # %entry4219; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4220; AVX1-NEXT: vmovq %rax, %xmm04221; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4222; AVX1-NEXT: vmovq %rax, %xmm14223; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4224; AVX1-NEXT: retq4225;4226; AVX512F-LABEL: constrained_vector_fptosi_v2i64_v2f32:4227; AVX512F: # %bb.0: # %entry4228; AVX512F-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4229; AVX512F-NEXT: vmovq %rax, %xmm04230; AVX512F-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4231; AVX512F-NEXT: vmovq %rax, %xmm14232; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4233; AVX512F-NEXT: retq4234;4235; AVX512DQ-LABEL: constrained_vector_fptosi_v2i64_v2f32:4236; AVX512DQ: # %bb.0: # %entry4237; AVX512DQ-NEXT: vcvttps2qq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm04238; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm04239; AVX512DQ-NEXT: vzeroupper4240; AVX512DQ-NEXT: retq4241entry:4242 %result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(4243 <2 x float><float 42.0, float 43.0>,4244 metadata !"fpexcept.strict") #04245 ret <2 x i64> %result4246}4247 4248define <3 x i64> @constrained_vector_fptosi_v3i64_v3f32() #0 {4249; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f32:4250; CHECK: # %bb.0: # %entry4251; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4252; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4253; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4254; CHECK-NEXT: retq4255;4256; AVX1-LABEL: constrained_vector_fptosi_v3i64_v3f32:4257; AVX1: # %bb.0: # %entry4258; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4259; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4260; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4261; AVX1-NEXT: vmovq %rdx, %xmm04262; AVX1-NEXT: vmovq %rcx, %xmm14263; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4264; AVX1-NEXT: vmovq %rax, %xmm14265; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm04266; AVX1-NEXT: retq4267;4268; AVX512-LABEL: constrained_vector_fptosi_v3i64_v3f32:4269; AVX512: # %bb.0: # %entry4270; AVX512-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4271; AVX512-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4272; AVX512-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4273; AVX512-NEXT: vmovq %rdx, %xmm04274; AVX512-NEXT: vmovq %rcx, %xmm14275; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4276; AVX512-NEXT: vmovq %rax, %xmm14277; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm04278; AVX512-NEXT: retq4279entry:4280 %result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f32(4281 <3 x float><float 42.0, float 43.0,4282 float 44.0>,4283 metadata !"fpexcept.strict") #04284 ret <3 x i64> %result4285}4286 4287define <4 x i64> @constrained_vector_fptosi_v4i64_v4f32() #0 {4288; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f32:4289; CHECK: # %bb.0: # %entry4290; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4291; CHECK-NEXT: movq %rax, %xmm14292; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4293; CHECK-NEXT: movq %rax, %xmm04294; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4295; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4296; CHECK-NEXT: movq %rax, %xmm24297; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4298; CHECK-NEXT: movq %rax, %xmm14299; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]4300; CHECK-NEXT: retq4301;4302; AVX1-LABEL: constrained_vector_fptosi_v4i64_v4f32:4303; AVX1: # %bb.0: # %entry4304; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4305; AVX1-NEXT: vmovq %rax, %xmm04306; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4307; AVX1-NEXT: vmovq %rax, %xmm14308; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4309; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4310; AVX1-NEXT: vmovq %rax, %xmm14311; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4312; AVX1-NEXT: vmovq %rax, %xmm24313; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]4314; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm04315; AVX1-NEXT: retq4316;4317; AVX512F-LABEL: constrained_vector_fptosi_v4i64_v4f32:4318; AVX512F: # %bb.0: # %entry4319; AVX512F-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4320; AVX512F-NEXT: vmovq %rax, %xmm04321; AVX512F-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4322; AVX512F-NEXT: vmovq %rax, %xmm14323; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4324; AVX512F-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4325; AVX512F-NEXT: vmovq %rax, %xmm14326; AVX512F-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4327; AVX512F-NEXT: vmovq %rax, %xmm24328; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]4329; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm04330; AVX512F-NEXT: retq4331;4332; AVX512DQ-LABEL: constrained_vector_fptosi_v4i64_v4f32:4333; AVX512DQ: # %bb.0: # %entry4334; AVX512DQ-NEXT: vmovaps {{.*#+}} xmm0 = [4.2E+1,4.3E+1,4.4E+1,4.5E+1]4335; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm04336; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm04337; AVX512DQ-NEXT: retq4338entry:4339 %result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(4340 <4 x float><float 42.0, float 43.0,4341 float 44.0, float 45.0>,4342 metadata !"fpexcept.strict") #04343 ret <4 x i64> %result4344}4345 4346define <1 x i32> @constrained_vector_fptosi_v1i32_v1f64() #0 {4347; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f64:4348; CHECK: # %bb.0: # %entry4349; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4350; CHECK-NEXT: retq4351;4352; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f64:4353; AVX: # %bb.0: # %entry4354; AVX-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4355; AVX-NEXT: retq4356entry:4357 %result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f64(4358 <1 x double><double 42.1>,4359 metadata !"fpexcept.strict") #04360 ret <1 x i32> %result4361}4362 4363 4364define <2 x i32> @constrained_vector_fptosi_v2i32_v2f64() #0 {4365; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f64:4366; CHECK: # %bb.0: # %entry4367; CHECK-NEXT: cvttpd2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04368; CHECK-NEXT: retq4369;4370; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f64:4371; AVX: # %bb.0: # %entry4372; AVX-NEXT: vcvttpd2dqx {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04373; AVX-NEXT: retq4374entry:4375 %result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(4376 <2 x double><double 42.1, double 42.2>,4377 metadata !"fpexcept.strict") #04378 ret <2 x i32> %result4379}4380 4381define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64() #0 {4382; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f64:4383; CHECK: # %bb.0: # %entry4384; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4385; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx4386; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %edx4387; CHECK-NEXT: movd %edx, %xmm14388; CHECK-NEXT: movd %ecx, %xmm04389; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]4390; CHECK-NEXT: movd %eax, %xmm14391; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4392; CHECK-NEXT: retq4393;4394; AVX-LABEL: constrained_vector_fptosi_v3i32_v3f64:4395; AVX: # %bb.0: # %entry4396; AVX-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4397; AVX-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx4398; AVX-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %edx4399; AVX-NEXT: vmovd %edx, %xmm04400; AVX-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm04401; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm04402; AVX-NEXT: retq4403entry:4404 %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64(4405 <3 x double><double 42.1, double 42.2,4406 double 42.3>,4407 metadata !"fpexcept.strict") #04408 ret <3 x i32> %result4409}4410 4411define <4 x i32> @constrained_vector_fptosi_v4i32_v4f64() #0 {4412; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f64:4413; CHECK: # %bb.0: # %entry4414; CHECK-NEXT: cvttpd2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm14415; CHECK-NEXT: cvttpd2dq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04416; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]4417; CHECK-NEXT: retq4418;4419; AVX-LABEL: constrained_vector_fptosi_v4i32_v4f64:4420; AVX: # %bb.0: # %entry4421; AVX-NEXT: vcvttpd2dqy {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm04422; AVX-NEXT: retq4423entry:4424 %result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(4425 <4 x double><double 42.1, double 42.2,4426 double 42.3, double 42.4>,4427 metadata !"fpexcept.strict") #04428 ret <4 x i32> %result4429}4430 4431define <1 x i64> @constrained_vector_fptosi_v1i64_v1f64() #0 {4432; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f64:4433; CHECK: # %bb.0: # %entry4434; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4435; CHECK-NEXT: retq4436;4437; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f64:4438; AVX: # %bb.0: # %entry4439; AVX-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4440; AVX-NEXT: retq4441entry:4442 %result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(4443 <1 x double><double 42.1>,4444 metadata !"fpexcept.strict") #04445 ret <1 x i64> %result4446}4447 4448define <2 x i64> @constrained_vector_fptosi_v2i64_v2f64() #0 {4449; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f64:4450; CHECK: # %bb.0: # %entry4451; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4452; CHECK-NEXT: movq %rax, %xmm14453; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4454; CHECK-NEXT: movq %rax, %xmm04455; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4456; CHECK-NEXT: retq4457;4458; AVX1-LABEL: constrained_vector_fptosi_v2i64_v2f64:4459; AVX1: # %bb.0: # %entry4460; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4461; AVX1-NEXT: vmovq %rax, %xmm04462; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4463; AVX1-NEXT: vmovq %rax, %xmm14464; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4465; AVX1-NEXT: retq4466;4467; AVX512F-LABEL: constrained_vector_fptosi_v2i64_v2f64:4468; AVX512F: # %bb.0: # %entry4469; AVX512F-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4470; AVX512F-NEXT: vmovq %rax, %xmm04471; AVX512F-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4472; AVX512F-NEXT: vmovq %rax, %xmm14473; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4474; AVX512F-NEXT: retq4475;4476; AVX512DQ-LABEL: constrained_vector_fptosi_v2i64_v2f64:4477; AVX512DQ: # %bb.0: # %entry4478; AVX512DQ-NEXT: vmovaps {{.*#+}} xmm0 = [4.2100000000000001E+1,4.2200000000000003E+1]4479; AVX512DQ-NEXT: vcvttpd2qq %zmm0, %zmm04480; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm04481; AVX512DQ-NEXT: vzeroupper4482; AVX512DQ-NEXT: retq4483entry:4484 %result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(4485 <2 x double><double 42.1, double 42.2>,4486 metadata !"fpexcept.strict") #04487 ret <2 x i64> %result4488}4489 4490define <3 x i64> @constrained_vector_fptosi_v3i64_v3f64() #0 {4491; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f64:4492; CHECK: # %bb.0: # %entry4493; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4494; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4495; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4496; CHECK-NEXT: retq4497;4498; AVX1-LABEL: constrained_vector_fptosi_v3i64_v3f64:4499; AVX1: # %bb.0: # %entry4500; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4501; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4502; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4503; AVX1-NEXT: vmovq %rdx, %xmm04504; AVX1-NEXT: vmovq %rcx, %xmm14505; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4506; AVX1-NEXT: vmovq %rax, %xmm14507; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm04508; AVX1-NEXT: retq4509;4510; AVX512-LABEL: constrained_vector_fptosi_v3i64_v3f64:4511; AVX512: # %bb.0: # %entry4512; AVX512-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4513; AVX512-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4514; AVX512-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4515; AVX512-NEXT: vmovq %rdx, %xmm04516; AVX512-NEXT: vmovq %rcx, %xmm14517; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4518; AVX512-NEXT: vmovq %rax, %xmm14519; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm04520; AVX512-NEXT: retq4521entry:4522 %result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f64(4523 <3 x double><double 42.1, double 42.2,4524 double 42.3>,4525 metadata !"fpexcept.strict") #04526 ret <3 x i64> %result4527}4528 4529define <4 x i64> @constrained_vector_fptosi_v4i64_v4f64() #0 {4530; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f64:4531; CHECK: # %bb.0: # %entry4532; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4533; CHECK-NEXT: movq %rax, %xmm14534; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4535; CHECK-NEXT: movq %rax, %xmm04536; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4537; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4538; CHECK-NEXT: movq %rax, %xmm24539; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4540; CHECK-NEXT: movq %rax, %xmm14541; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]4542; CHECK-NEXT: retq4543;4544; AVX1-LABEL: constrained_vector_fptosi_v4i64_v4f64:4545; AVX1: # %bb.0: # %entry4546; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4547; AVX1-NEXT: vmovq %rax, %xmm04548; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4549; AVX1-NEXT: vmovq %rax, %xmm14550; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4551; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4552; AVX1-NEXT: vmovq %rax, %xmm14553; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4554; AVX1-NEXT: vmovq %rax, %xmm24555; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]4556; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm04557; AVX1-NEXT: retq4558;4559; AVX512F-LABEL: constrained_vector_fptosi_v4i64_v4f64:4560; AVX512F: # %bb.0: # %entry4561; AVX512F-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4562; AVX512F-NEXT: vmovq %rax, %xmm04563; AVX512F-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4564; AVX512F-NEXT: vmovq %rax, %xmm14565; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4566; AVX512F-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4567; AVX512F-NEXT: vmovq %rax, %xmm14568; AVX512F-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4569; AVX512F-NEXT: vmovq %rax, %xmm24570; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]4571; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm04572; AVX512F-NEXT: retq4573;4574; AVX512DQ-LABEL: constrained_vector_fptosi_v4i64_v4f64:4575; AVX512DQ: # %bb.0: # %entry4576; AVX512DQ-NEXT: vmovaps {{.*#+}} ymm0 = [4.2100000000000001E+1,4.2200000000000003E+1,4.2299999999999997E+1,4.2399999999999999E+1]4577; AVX512DQ-NEXT: vcvttpd2qq %zmm0, %zmm04578; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm04579; AVX512DQ-NEXT: retq4580entry:4581 %result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(4582 <4 x double><double 42.1, double 42.2,4583 double 42.3, double 42.4>,4584 metadata !"fpexcept.strict") #04585 ret <4 x i64> %result4586}4587 4588define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() #0 {4589; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f32:4590; CHECK: # %bb.0: # %entry4591; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4592; CHECK-NEXT: # kill: def $eax killed $eax killed $rax4593; CHECK-NEXT: retq4594;4595; AVX1-LABEL: constrained_vector_fptoui_v1i32_v1f32:4596; AVX1: # %bb.0: # %entry4597; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4598; AVX1-NEXT: # kill: def $eax killed $eax killed $rax4599; AVX1-NEXT: retq4600;4601; AVX512-LABEL: constrained_vector_fptoui_v1i32_v1f32:4602; AVX512: # %bb.0: # %entry4603; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4604; AVX512-NEXT: retq4605entry:4606 %result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32(4607 <1 x float><float 42.0>,4608 metadata !"fpexcept.strict") #04609 ret <1 x i32> %result4610}4611 4612define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() #0 {4613; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f32:4614; CHECK: # %bb.0: # %entry4615; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4616; CHECK-NEXT: movd %eax, %xmm14617; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4618; CHECK-NEXT: movd %eax, %xmm04619; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]4620; CHECK-NEXT: retq4621;4622; AVX1-LABEL: constrained_vector_fptoui_v2i32_v2f32:4623; AVX1: # %bb.0: # %entry4624; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4625; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4626; AVX1-NEXT: vmovd %ecx, %xmm04627; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm04628; AVX1-NEXT: retq4629;4630; AVX512-LABEL: constrained_vector_fptoui_v2i32_v2f32:4631; AVX512: # %bb.0: # %entry4632; AVX512-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,4.3E+1,0.0E+0,0.0E+0]4633; AVX512-NEXT: vcvttps2udq %zmm0, %zmm04634; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm04635; AVX512-NEXT: vzeroupper4636; AVX512-NEXT: retq4637entry:4638 %result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32(4639 <2 x float><float 42.0, float 43.0>,4640 metadata !"fpexcept.strict") #04641 ret <2 x i32> %result4642}4643 4644define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() #0 {4645; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f32:4646; CHECK: # %bb.0: # %entry4647; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4648; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4649; CHECK-NEXT: cvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4650; CHECK-NEXT: movd %edx, %xmm14651; CHECK-NEXT: movd %ecx, %xmm04652; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]4653; CHECK-NEXT: movd %eax, %xmm14654; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]4655; CHECK-NEXT: retq4656;4657; AVX1-LABEL: constrained_vector_fptoui_v3i32_v3f32:4658; AVX1: # %bb.0: # %entry4659; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4660; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4661; AVX1-NEXT: vcvttss2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4662; AVX1-NEXT: vmovd %edx, %xmm04663; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm04664; AVX1-NEXT: vpinsrd $2, %eax, %xmm0, %xmm04665; AVX1-NEXT: retq4666;4667; AVX512-LABEL: constrained_vector_fptoui_v3i32_v3f32:4668; AVX512: # %bb.0: # %entry4669; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax4670; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx4671; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %edx4672; AVX512-NEXT: vmovd %edx, %xmm04673; AVX512-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm04674; AVX512-NEXT: vpinsrd $2, %eax, %xmm0, %xmm04675; AVX512-NEXT: retq4676entry:4677 %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(4678 <3 x float><float 42.0, float 43.0,4679 float 44.0>,4680 metadata !"fpexcept.strict") #04681 ret <3 x i32> %result4682}4683 4684define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() #0 {4685; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f32:4686; CHECK: # %bb.0: # %entry4687; CHECK-NEXT: movaps {{.*#+}} xmm0 = [2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9]4688; CHECK-NEXT: movaps {{.*#+}} xmm1 = [4.2E+1,4.3E+1,4.4E+1,4.5E+1]4689; CHECK-NEXT: movaps %xmm1, %xmm24690; CHECK-NEXT: cmpltps %xmm0, %xmm24691; CHECK-NEXT: movaps %xmm2, %xmm34692; CHECK-NEXT: andnps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm34693; CHECK-NEXT: andnps %xmm0, %xmm24694; CHECK-NEXT: subps %xmm2, %xmm14695; CHECK-NEXT: cvttps2dq %xmm1, %xmm04696; CHECK-NEXT: xorps %xmm3, %xmm04697; CHECK-NEXT: retq4698;4699; AVX1-LABEL: constrained_vector_fptoui_v4i32_v4f32:4700; AVX1: # %bb.0: # %entry4701; AVX1-NEXT: vbroadcastss {{.*#+}} xmm0 = [2.14748365E+9,2.14748365E+9,2.14748365E+9,2.14748365E+9]4702; AVX1-NEXT: vmovaps {{.*#+}} xmm1 = [4.2E+1,4.3E+1,4.4E+1,4.5E+1]4703; AVX1-NEXT: vcmpltps %xmm0, %xmm1, %xmm24704; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm34705; AVX1-NEXT: vbroadcastss {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]4706; AVX1-NEXT: vblendvps %xmm2, %xmm3, %xmm4, %xmm44707; AVX1-NEXT: vblendvps %xmm2, %xmm3, %xmm0, %xmm04708; AVX1-NEXT: vsubps %xmm0, %xmm1, %xmm04709; AVX1-NEXT: vcvttps2dq %xmm0, %xmm04710; AVX1-NEXT: vxorps %xmm4, %xmm0, %xmm04711; AVX1-NEXT: retq4712;4713; AVX512-LABEL: constrained_vector_fptoui_v4i32_v4f32:4714; AVX512: # %bb.0: # %entry4715; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [4.2E+1,4.3E+1,4.4E+1,4.5E+1]4716; AVX512-NEXT: vcvttps2udq %zmm0, %zmm04717; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm04718; AVX512-NEXT: vzeroupper4719; AVX512-NEXT: retq4720entry:4721 %result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(4722 <4 x float><float 42.0, float 43.0,4723 float 44.0, float 45.0>,4724 metadata !"fpexcept.strict") #04725 ret <4 x i32> %result4726}4727 4728define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() #0 {4729; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f32:4730; CHECK: # %bb.0: # %entry4731; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4732; CHECK-NEXT: movss {{.*#+}} xmm2 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4733; CHECK-NEXT: comiss %xmm0, %xmm24734; CHECK-NEXT: xorps %xmm1, %xmm14735; CHECK-NEXT: ja .LBB121_24736; CHECK-NEXT: # %bb.1: # %entry4737; CHECK-NEXT: movaps %xmm2, %xmm14738; CHECK-NEXT: .LBB121_2: # %entry4739; CHECK-NEXT: subss %xmm1, %xmm04740; CHECK-NEXT: cvttss2si %xmm0, %rcx4741; CHECK-NEXT: setbe %al4742; CHECK-NEXT: movzbl %al, %eax4743; CHECK-NEXT: shlq $63, %rax4744; CHECK-NEXT: xorq %rcx, %rax4745; CHECK-NEXT: retq4746;4747; AVX1-LABEL: constrained_vector_fptoui_v1i64_v1f32:4748; AVX1: # %bb.0: # %entry4749; AVX1-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4750; AVX1-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4751; AVX1-NEXT: vcomiss %xmm0, %xmm14752; AVX1-NEXT: vxorps %xmm2, %xmm2, %xmm24753; AVX1-NEXT: ja .LBB121_24754; AVX1-NEXT: # %bb.1: # %entry4755; AVX1-NEXT: vmovaps %xmm1, %xmm24756; AVX1-NEXT: .LBB121_2: # %entry4757; AVX1-NEXT: vsubss %xmm2, %xmm0, %xmm04758; AVX1-NEXT: vcvttss2si %xmm0, %rcx4759; AVX1-NEXT: setbe %al4760; AVX1-NEXT: movzbl %al, %eax4761; AVX1-NEXT: shlq $63, %rax4762; AVX1-NEXT: xorq %rcx, %rax4763; AVX1-NEXT: retq4764;4765; AVX512-LABEL: constrained_vector_fptoui_v1i64_v1f32:4766; AVX512: # %bb.0: # %entry4767; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4768; AVX512-NEXT: retq4769entry:4770 %result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32(4771 <1 x float><float 42.0>,4772 metadata !"fpexcept.strict") #04773 ret <1 x i64> %result4774}4775 4776define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() #0 {4777; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f32:4778; CHECK: # %bb.0: # %entry4779; CHECK-NEXT: movss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]4780; CHECK-NEXT: movss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4781; CHECK-NEXT: comiss %xmm2, %xmm14782; CHECK-NEXT: xorps %xmm0, %xmm04783; CHECK-NEXT: xorps %xmm3, %xmm34784; CHECK-NEXT: ja .LBB122_24785; CHECK-NEXT: # %bb.1: # %entry4786; CHECK-NEXT: movaps %xmm1, %xmm34787; CHECK-NEXT: .LBB122_2: # %entry4788; CHECK-NEXT: subss %xmm3, %xmm24789; CHECK-NEXT: cvttss2si %xmm2, %rax4790; CHECK-NEXT: setbe %cl4791; CHECK-NEXT: movzbl %cl, %ecx4792; CHECK-NEXT: shlq $63, %rcx4793; CHECK-NEXT: xorq %rax, %rcx4794; CHECK-NEXT: movq %rcx, %xmm24795; CHECK-NEXT: movss {{.*#+}} xmm3 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4796; CHECK-NEXT: comiss %xmm3, %xmm14797; CHECK-NEXT: ja .LBB122_44798; CHECK-NEXT: # %bb.3: # %entry4799; CHECK-NEXT: movaps %xmm1, %xmm04800; CHECK-NEXT: .LBB122_4: # %entry4801; CHECK-NEXT: subss %xmm0, %xmm34802; CHECK-NEXT: cvttss2si %xmm3, %rax4803; CHECK-NEXT: setbe %cl4804; CHECK-NEXT: movzbl %cl, %ecx4805; CHECK-NEXT: shlq $63, %rcx4806; CHECK-NEXT: xorq %rax, %rcx4807; CHECK-NEXT: movq %rcx, %xmm04808; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]4809; CHECK-NEXT: retq4810;4811; AVX1-LABEL: constrained_vector_fptoui_v2i64_v2f32:4812; AVX1: # %bb.0: # %entry4813; AVX1-NEXT: vmovss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]4814; AVX1-NEXT: vmovss {{.*#+}} xmm0 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4815; AVX1-NEXT: vcomiss %xmm2, %xmm04816; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm14817; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm34818; AVX1-NEXT: ja .LBB122_24819; AVX1-NEXT: # %bb.1: # %entry4820; AVX1-NEXT: vmovaps %xmm0, %xmm34821; AVX1-NEXT: .LBB122_2: # %entry4822; AVX1-NEXT: vsubss %xmm3, %xmm2, %xmm24823; AVX1-NEXT: vcvttss2si %xmm2, %rax4824; AVX1-NEXT: setbe %cl4825; AVX1-NEXT: movzbl %cl, %ecx4826; AVX1-NEXT: shlq $63, %rcx4827; AVX1-NEXT: xorq %rax, %rcx4828; AVX1-NEXT: vmovq %rcx, %xmm24829; AVX1-NEXT: vmovss {{.*#+}} xmm3 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4830; AVX1-NEXT: vcomiss %xmm3, %xmm04831; AVX1-NEXT: ja .LBB122_44832; AVX1-NEXT: # %bb.3: # %entry4833; AVX1-NEXT: vmovaps %xmm0, %xmm14834; AVX1-NEXT: .LBB122_4: # %entry4835; AVX1-NEXT: vsubss %xmm1, %xmm3, %xmm04836; AVX1-NEXT: vcvttss2si %xmm0, %rax4837; AVX1-NEXT: setbe %cl4838; AVX1-NEXT: movzbl %cl, %ecx4839; AVX1-NEXT: shlq $63, %rcx4840; AVX1-NEXT: xorq %rax, %rcx4841; AVX1-NEXT: vmovq %rcx, %xmm04842; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]4843; AVX1-NEXT: retq4844;4845; AVX512F-LABEL: constrained_vector_fptoui_v2i64_v2f32:4846; AVX512F: # %bb.0: # %entry4847; AVX512F-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4848; AVX512F-NEXT: vmovq %rax, %xmm04849; AVX512F-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4850; AVX512F-NEXT: vmovq %rax, %xmm14851; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4852; AVX512F-NEXT: retq4853;4854; AVX512DQ-LABEL: constrained_vector_fptoui_v2i64_v2f32:4855; AVX512DQ: # %bb.0: # %entry4856; AVX512DQ-NEXT: vcvttps2uqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm04857; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm04858; AVX512DQ-NEXT: vzeroupper4859; AVX512DQ-NEXT: retq4860entry:4861 %result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(4862 <2 x float><float 42.0, float 43.0>,4863 metadata !"fpexcept.strict") #04864 ret <2 x i64> %result4865}4866 4867define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() #0 {4868; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f32:4869; CHECK: # %bb.0: # %entry4870; CHECK-NEXT: movss {{.*#+}} xmm2 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4871; CHECK-NEXT: movss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4872; CHECK-NEXT: comiss %xmm2, %xmm14873; CHECK-NEXT: xorps %xmm0, %xmm04874; CHECK-NEXT: xorps %xmm3, %xmm34875; CHECK-NEXT: ja .LBB123_24876; CHECK-NEXT: # %bb.1: # %entry4877; CHECK-NEXT: movaps %xmm1, %xmm34878; CHECK-NEXT: .LBB123_2: # %entry4879; CHECK-NEXT: subss %xmm3, %xmm24880; CHECK-NEXT: cvttss2si %xmm2, %rcx4881; CHECK-NEXT: setbe %al4882; CHECK-NEXT: movzbl %al, %eax4883; CHECK-NEXT: shlq $63, %rax4884; CHECK-NEXT: xorq %rcx, %rax4885; CHECK-NEXT: movss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]4886; CHECK-NEXT: comiss %xmm2, %xmm14887; CHECK-NEXT: xorps %xmm3, %xmm34888; CHECK-NEXT: ja .LBB123_44889; CHECK-NEXT: # %bb.3: # %entry4890; CHECK-NEXT: movaps %xmm1, %xmm34891; CHECK-NEXT: .LBB123_4: # %entry4892; CHECK-NEXT: subss %xmm3, %xmm24893; CHECK-NEXT: cvttss2si %xmm2, %rcx4894; CHECK-NEXT: setbe %dl4895; CHECK-NEXT: movzbl %dl, %edx4896; CHECK-NEXT: shlq $63, %rdx4897; CHECK-NEXT: xorq %rcx, %rdx4898; CHECK-NEXT: movss {{.*#+}} xmm2 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]4899; CHECK-NEXT: comiss %xmm2, %xmm14900; CHECK-NEXT: ja .LBB123_64901; CHECK-NEXT: # %bb.5: # %entry4902; CHECK-NEXT: movaps %xmm1, %xmm04903; CHECK-NEXT: .LBB123_6: # %entry4904; CHECK-NEXT: subss %xmm0, %xmm24905; CHECK-NEXT: cvttss2si %xmm2, %rsi4906; CHECK-NEXT: setbe %cl4907; CHECK-NEXT: movzbl %cl, %ecx4908; CHECK-NEXT: shlq $63, %rcx4909; CHECK-NEXT: xorq %rsi, %rcx4910; CHECK-NEXT: retq4911;4912; AVX1-LABEL: constrained_vector_fptoui_v3i64_v3f32:4913; AVX1: # %bb.0: # %entry4914; AVX1-NEXT: vmovss {{.*#+}} xmm2 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]4915; AVX1-NEXT: vmovss {{.*#+}} xmm0 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4916; AVX1-NEXT: vcomiss %xmm2, %xmm04917; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm14918; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm34919; AVX1-NEXT: ja .LBB123_24920; AVX1-NEXT: # %bb.1: # %entry4921; AVX1-NEXT: vmovaps %xmm0, %xmm34922; AVX1-NEXT: .LBB123_2: # %entry4923; AVX1-NEXT: vsubss %xmm3, %xmm2, %xmm24924; AVX1-NEXT: vcvttss2si %xmm2, %rcx4925; AVX1-NEXT: setbe %al4926; AVX1-NEXT: movzbl %al, %eax4927; AVX1-NEXT: shlq $63, %rax4928; AVX1-NEXT: xorq %rcx, %rax4929; AVX1-NEXT: vmovss {{.*#+}} xmm2 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4930; AVX1-NEXT: vcomiss %xmm2, %xmm04931; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm34932; AVX1-NEXT: ja .LBB123_44933; AVX1-NEXT: # %bb.3: # %entry4934; AVX1-NEXT: vmovaps %xmm0, %xmm34935; AVX1-NEXT: .LBB123_4: # %entry4936; AVX1-NEXT: vsubss %xmm3, %xmm2, %xmm24937; AVX1-NEXT: vcvttss2si %xmm2, %rdx4938; AVX1-NEXT: setbe %cl4939; AVX1-NEXT: movzbl %cl, %ecx4940; AVX1-NEXT: shlq $63, %rcx4941; AVX1-NEXT: xorq %rdx, %rcx4942; AVX1-NEXT: vmovss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]4943; AVX1-NEXT: vcomiss %xmm2, %xmm04944; AVX1-NEXT: ja .LBB123_64945; AVX1-NEXT: # %bb.5: # %entry4946; AVX1-NEXT: vmovaps %xmm0, %xmm14947; AVX1-NEXT: .LBB123_6: # %entry4948; AVX1-NEXT: vsubss %xmm1, %xmm2, %xmm04949; AVX1-NEXT: vcvttss2si %xmm0, %rdx4950; AVX1-NEXT: setbe %sil4951; AVX1-NEXT: movzbl %sil, %esi4952; AVX1-NEXT: shlq $63, %rsi4953; AVX1-NEXT: xorq %rdx, %rsi4954; AVX1-NEXT: vmovq %rsi, %xmm04955; AVX1-NEXT: vmovq %rcx, %xmm14956; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4957; AVX1-NEXT: vmovq %rax, %xmm14958; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm04959; AVX1-NEXT: retq4960;4961; AVX512-LABEL: constrained_vector_fptoui_v3i64_v3f32:4962; AVX512: # %bb.0: # %entry4963; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax4964; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx4965; AVX512-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx4966; AVX512-NEXT: vmovq %rdx, %xmm04967; AVX512-NEXT: vmovq %rcx, %xmm14968; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]4969; AVX512-NEXT: vmovq %rax, %xmm14970; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm04971; AVX512-NEXT: retq4972entry:4973 %result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f32(4974 <3 x float><float 42.0, float 43.0,4975 float 44.0>,4976 metadata !"fpexcept.strict") #04977 ret <3 x i64> %result4978}4979 4980define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() #0 {4981; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f32:4982; CHECK: # %bb.0: # %entry4983; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]4984; CHECK-NEXT: movss {{.*#+}} xmm2 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]4985; CHECK-NEXT: comiss %xmm0, %xmm24986; CHECK-NEXT: xorps %xmm1, %xmm14987; CHECK-NEXT: xorps %xmm3, %xmm34988; CHECK-NEXT: ja .LBB124_24989; CHECK-NEXT: # %bb.1: # %entry4990; CHECK-NEXT: movaps %xmm2, %xmm34991; CHECK-NEXT: .LBB124_2: # %entry4992; CHECK-NEXT: subss %xmm3, %xmm04993; CHECK-NEXT: cvttss2si %xmm0, %rcx4994; CHECK-NEXT: setbe %al4995; CHECK-NEXT: movzbl %al, %eax4996; CHECK-NEXT: shlq $63, %rax4997; CHECK-NEXT: xorq %rcx, %rax4998; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]4999; CHECK-NEXT: comiss %xmm0, %xmm25000; CHECK-NEXT: xorps %xmm4, %xmm45001; CHECK-NEXT: ja .LBB124_45002; CHECK-NEXT: # %bb.3: # %entry5003; CHECK-NEXT: movaps %xmm2, %xmm45004; CHECK-NEXT: .LBB124_4: # %entry5005; CHECK-NEXT: movq %rax, %xmm35006; CHECK-NEXT: subss %xmm4, %xmm05007; CHECK-NEXT: cvttss2si %xmm0, %rax5008; CHECK-NEXT: setbe %cl5009; CHECK-NEXT: movzbl %cl, %ecx5010; CHECK-NEXT: shlq $63, %rcx5011; CHECK-NEXT: xorq %rax, %rcx5012; CHECK-NEXT: movq %rcx, %xmm05013; CHECK-NEXT: movss {{.*#+}} xmm4 = [4.5E+1,0.0E+0,0.0E+0,0.0E+0]5014; CHECK-NEXT: comiss %xmm4, %xmm25015; CHECK-NEXT: xorps %xmm5, %xmm55016; CHECK-NEXT: ja .LBB124_65017; CHECK-NEXT: # %bb.5: # %entry5018; CHECK-NEXT: movaps %xmm2, %xmm55019; CHECK-NEXT: .LBB124_6: # %entry5020; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]5021; CHECK-NEXT: subss %xmm5, %xmm45022; CHECK-NEXT: cvttss2si %xmm4, %rax5023; CHECK-NEXT: setbe %cl5024; CHECK-NEXT: movzbl %cl, %ecx5025; CHECK-NEXT: shlq $63, %rcx5026; CHECK-NEXT: xorq %rax, %rcx5027; CHECK-NEXT: movq %rcx, %xmm35028; CHECK-NEXT: movss {{.*#+}} xmm4 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]5029; CHECK-NEXT: comiss %xmm4, %xmm25030; CHECK-NEXT: ja .LBB124_85031; CHECK-NEXT: # %bb.7: # %entry5032; CHECK-NEXT: movaps %xmm2, %xmm15033; CHECK-NEXT: .LBB124_8: # %entry5034; CHECK-NEXT: subss %xmm1, %xmm45035; CHECK-NEXT: cvttss2si %xmm4, %rax5036; CHECK-NEXT: setbe %cl5037; CHECK-NEXT: movzbl %cl, %ecx5038; CHECK-NEXT: shlq $63, %rcx5039; CHECK-NEXT: xorq %rax, %rcx5040; CHECK-NEXT: movq %rcx, %xmm15041; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]5042; CHECK-NEXT: retq5043;5044; AVX1-LABEL: constrained_vector_fptoui_v4i64_v4f32:5045; AVX1: # %bb.0: # %entry5046; AVX1-NEXT: vmovss {{.*#+}} xmm2 = [4.5E+1,0.0E+0,0.0E+0,0.0E+0]5047; AVX1-NEXT: vmovss {{.*#+}} xmm0 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]5048; AVX1-NEXT: vcomiss %xmm2, %xmm05049; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm15050; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm35051; AVX1-NEXT: ja .LBB124_25052; AVX1-NEXT: # %bb.1: # %entry5053; AVX1-NEXT: vmovaps %xmm0, %xmm35054; AVX1-NEXT: .LBB124_2: # %entry5055; AVX1-NEXT: vsubss %xmm3, %xmm2, %xmm25056; AVX1-NEXT: vcvttss2si %xmm2, %rcx5057; AVX1-NEXT: setbe %al5058; AVX1-NEXT: movzbl %al, %eax5059; AVX1-NEXT: shlq $63, %rax5060; AVX1-NEXT: xorq %rcx, %rax5061; AVX1-NEXT: vmovss {{.*#+}} xmm3 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]5062; AVX1-NEXT: vcomiss %xmm3, %xmm05063; AVX1-NEXT: vxorps %xmm4, %xmm4, %xmm45064; AVX1-NEXT: ja .LBB124_45065; AVX1-NEXT: # %bb.3: # %entry5066; AVX1-NEXT: vmovaps %xmm0, %xmm45067; AVX1-NEXT: .LBB124_4: # %entry5068; AVX1-NEXT: vmovq %rax, %xmm25069; AVX1-NEXT: vsubss %xmm4, %xmm3, %xmm35070; AVX1-NEXT: vcvttss2si %xmm3, %rax5071; AVX1-NEXT: setbe %cl5072; AVX1-NEXT: movzbl %cl, %ecx5073; AVX1-NEXT: shlq $63, %rcx5074; AVX1-NEXT: xorq %rax, %rcx5075; AVX1-NEXT: vmovq %rcx, %xmm35076; AVX1-NEXT: vmovss {{.*#+}} xmm4 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]5077; AVX1-NEXT: vcomiss %xmm4, %xmm05078; AVX1-NEXT: vxorps %xmm5, %xmm5, %xmm55079; AVX1-NEXT: ja .LBB124_65080; AVX1-NEXT: # %bb.5: # %entry5081; AVX1-NEXT: vmovaps %xmm0, %xmm55082; AVX1-NEXT: .LBB124_6: # %entry5083; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]5084; AVX1-NEXT: vsubss %xmm5, %xmm4, %xmm35085; AVX1-NEXT: vcvttss2si %xmm3, %rax5086; AVX1-NEXT: setbe %cl5087; AVX1-NEXT: movzbl %cl, %ecx5088; AVX1-NEXT: shlq $63, %rcx5089; AVX1-NEXT: xorq %rax, %rcx5090; AVX1-NEXT: vmovq %rcx, %xmm35091; AVX1-NEXT: vmovss {{.*#+}} xmm4 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]5092; AVX1-NEXT: vcomiss %xmm4, %xmm05093; AVX1-NEXT: ja .LBB124_85094; AVX1-NEXT: # %bb.7: # %entry5095; AVX1-NEXT: vmovaps %xmm0, %xmm15096; AVX1-NEXT: .LBB124_8: # %entry5097; AVX1-NEXT: vsubss %xmm1, %xmm4, %xmm05098; AVX1-NEXT: vcvttss2si %xmm0, %rax5099; AVX1-NEXT: setbe %cl5100; AVX1-NEXT: movzbl %cl, %ecx5101; AVX1-NEXT: shlq $63, %rcx5102; AVX1-NEXT: xorq %rax, %rcx5103; AVX1-NEXT: vmovq %rcx, %xmm05104; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]5105; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm05106; AVX1-NEXT: retq5107;5108; AVX512F-LABEL: constrained_vector_fptoui_v4i64_v4f32:5109; AVX512F: # %bb.0: # %entry5110; AVX512F-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5111; AVX512F-NEXT: vmovq %rax, %xmm05112; AVX512F-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5113; AVX512F-NEXT: vmovq %rax, %xmm15114; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]5115; AVX512F-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5116; AVX512F-NEXT: vmovq %rax, %xmm15117; AVX512F-NEXT: vcvttss2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5118; AVX512F-NEXT: vmovq %rax, %xmm25119; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]5120; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm05121; AVX512F-NEXT: retq5122;5123; AVX512DQ-LABEL: constrained_vector_fptoui_v4i64_v4f32:5124; AVX512DQ: # %bb.0: # %entry5125; AVX512DQ-NEXT: vmovaps {{.*#+}} xmm0 = [4.2E+1,4.3E+1,4.4E+1,4.5E+1]5126; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm05127; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm05128; AVX512DQ-NEXT: retq5129entry:5130 %result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(5131 <4 x float><float 42.0, float 43.0,5132 float 44.0, float 45.0>,5133 metadata !"fpexcept.strict") #05134 ret <4 x i64> %result5135}5136 5137define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() #0 {5138; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f64:5139; CHECK: # %bb.0: # %entry5140; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5141; CHECK-NEXT: # kill: def $eax killed $eax killed $rax5142; CHECK-NEXT: retq5143;5144; AVX1-LABEL: constrained_vector_fptoui_v1i32_v1f64:5145; AVX1: # %bb.0: # %entry5146; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5147; AVX1-NEXT: # kill: def $eax killed $eax killed $rax5148; AVX1-NEXT: retq5149;5150; AVX512-LABEL: constrained_vector_fptoui_v1i32_v1f64:5151; AVX512: # %bb.0: # %entry5152; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax5153; AVX512-NEXT: retq5154entry:5155 %result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64(5156 <1 x double><double 42.1>,5157 metadata !"fpexcept.strict") #05158 ret <1 x i32> %result5159}5160 5161define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() #0 {5162; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f64:5163; CHECK: # %bb.0: # %entry5164; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5165; CHECK-NEXT: movd %eax, %xmm15166; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5167; CHECK-NEXT: movd %eax, %xmm05168; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]5169; CHECK-NEXT: retq5170;5171; AVX1-LABEL: constrained_vector_fptoui_v2i32_v2f64:5172; AVX1: # %bb.0: # %entry5173; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5174; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx5175; AVX1-NEXT: vmovd %ecx, %xmm05176; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm05177; AVX1-NEXT: retq5178;5179; AVX512-LABEL: constrained_vector_fptoui_v2i32_v2f64:5180; AVX512: # %bb.0: # %entry5181; AVX512-NEXT: vmovaps {{.*#+}} ymm0 = [4.2100000000000001E+1,4.2200000000000003E+1,0.0E+0,0.0E+0]5182; AVX512-NEXT: vcvttpd2udq %zmm0, %ymm05183; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm05184; AVX512-NEXT: vzeroupper5185; AVX512-NEXT: retq5186entry:5187 %result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(5188 <2 x double><double 42.1, double 42.2>,5189 metadata !"fpexcept.strict") #05190 ret <2 x i32> %result5191}5192 5193define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() #0 {5194; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f64:5195; CHECK: # %bb.0: # %entry5196; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5197; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx5198; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx5199; CHECK-NEXT: movd %edx, %xmm15200; CHECK-NEXT: movd %ecx, %xmm05201; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]5202; CHECK-NEXT: movd %eax, %xmm15203; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]5204; CHECK-NEXT: retq5205;5206; AVX1-LABEL: constrained_vector_fptoui_v3i32_v3f64:5207; AVX1: # %bb.0: # %entry5208; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5209; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx5210; AVX1-NEXT: vcvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx5211; AVX1-NEXT: vmovd %edx, %xmm05212; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm05213; AVX1-NEXT: vpinsrd $2, %eax, %xmm0, %xmm05214; AVX1-NEXT: retq5215;5216; AVX512-LABEL: constrained_vector_fptoui_v3i32_v3f64:5217; AVX512: # %bb.0: # %entry5218; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax5219; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx5220; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %edx5221; AVX512-NEXT: vmovd %edx, %xmm05222; AVX512-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm05223; AVX512-NEXT: vpinsrd $2, %eax, %xmm0, %xmm05224; AVX512-NEXT: retq5225entry:5226 %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(5227 <3 x double><double 42.1, double 42.2,5228 double 42.3>,5229 metadata !"fpexcept.strict") #05230 ret <3 x i32> %result5231}5232 5233define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() #0 {5234; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f64:5235; CHECK: # %bb.0: # %entry5236; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5237; CHECK-NEXT: movd %eax, %xmm05238; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5239; CHECK-NEXT: movd %eax, %xmm15240; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]5241; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5242; CHECK-NEXT: movd %eax, %xmm25243; CHECK-NEXT: cvttsd2si {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5244; CHECK-NEXT: movd %eax, %xmm05245; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]5246; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]5247; CHECK-NEXT: retq5248;5249; AVX1-LABEL: constrained_vector_fptoui_v4i32_v4f64:5250; AVX1: # %bb.0: # %entry5251; AVX1-NEXT: vbroadcastsd {{.*#+}} ymm0 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]5252; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [4.2100000000000001E+1,4.2200000000000003E+1,4.2299999999999997E+1,4.2399999999999999E+1]5253; AVX1-NEXT: vcmpltpd %ymm0, %ymm1, %ymm25254; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm35255; AVX1-NEXT: vshufps {{.*#+}} xmm3 = xmm2[0,2],xmm3[0,2]5256; AVX1-NEXT: vxorps %xmm4, %xmm4, %xmm45257; AVX1-NEXT: vbroadcastss {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]5258; AVX1-NEXT: vblendvps %xmm3, %xmm4, %xmm5, %xmm35259; AVX1-NEXT: vxorps %xmm4, %xmm4, %xmm45260; AVX1-NEXT: vblendvpd %ymm2, %ymm4, %ymm0, %ymm05261; AVX1-NEXT: vsubpd %ymm0, %ymm1, %ymm05262; AVX1-NEXT: vcvttpd2dq %ymm0, %xmm05263; AVX1-NEXT: vxorpd %xmm3, %xmm0, %xmm05264; AVX1-NEXT: vzeroupper5265; AVX1-NEXT: retq5266;5267; AVX512-LABEL: constrained_vector_fptoui_v4i32_v4f64:5268; AVX512: # %bb.0: # %entry5269; AVX512-NEXT: vmovaps {{.*#+}} ymm0 = [4.2100000000000001E+1,4.2200000000000003E+1,4.2299999999999997E+1,4.2399999999999999E+1]5270; AVX512-NEXT: vcvttpd2udq %zmm0, %ymm05271; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm05272; AVX512-NEXT: vzeroupper5273; AVX512-NEXT: retq5274entry:5275 %result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(5276 <4 x double><double 42.1, double 42.2,5277 double 42.3, double 42.4>,5278 metadata !"fpexcept.strict") #05279 ret <4 x i32> %result5280}5281 5282define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() #0 {5283; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f64:5284; CHECK: # %bb.0: # %entry5285; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]5286; CHECK-NEXT: movsd {{.*#+}} xmm2 = [9.2233720368547758E+18,0.0E+0]5287; CHECK-NEXT: comisd %xmm0, %xmm25288; CHECK-NEXT: xorpd %xmm1, %xmm15289; CHECK-NEXT: ja .LBB129_25290; CHECK-NEXT: # %bb.1: # %entry5291; CHECK-NEXT: movapd %xmm2, %xmm15292; CHECK-NEXT: .LBB129_2: # %entry5293; CHECK-NEXT: subsd %xmm1, %xmm05294; CHECK-NEXT: cvttsd2si %xmm0, %rcx5295; CHECK-NEXT: setbe %al5296; CHECK-NEXT: movzbl %al, %eax5297; CHECK-NEXT: shlq $63, %rax5298; CHECK-NEXT: xorq %rcx, %rax5299; CHECK-NEXT: retq5300;5301; AVX1-LABEL: constrained_vector_fptoui_v1i64_v1f64:5302; AVX1: # %bb.0: # %entry5303; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]5304; AVX1-NEXT: vmovsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]5305; AVX1-NEXT: vcomisd %xmm0, %xmm15306; AVX1-NEXT: vxorpd %xmm2, %xmm2, %xmm25307; AVX1-NEXT: ja .LBB129_25308; AVX1-NEXT: # %bb.1: # %entry5309; AVX1-NEXT: vmovapd %xmm1, %xmm25310; AVX1-NEXT: .LBB129_2: # %entry5311; AVX1-NEXT: vsubsd %xmm2, %xmm0, %xmm05312; AVX1-NEXT: vcvttsd2si %xmm0, %rcx5313; AVX1-NEXT: setbe %al5314; AVX1-NEXT: movzbl %al, %eax5315; AVX1-NEXT: shlq $63, %rax5316; AVX1-NEXT: xorq %rcx, %rax5317; AVX1-NEXT: retq5318;5319; AVX512-LABEL: constrained_vector_fptoui_v1i64_v1f64:5320; AVX512: # %bb.0: # %entry5321; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5322; AVX512-NEXT: retq5323entry:5324 %result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(5325 <1 x double><double 42.1>,5326 metadata !"fpexcept.strict") #05327 ret <1 x i64> %result5328}5329 5330define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() #0 {5331; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f64:5332; CHECK: # %bb.0: # %entry5333; CHECK-NEXT: movsd {{.*#+}} xmm2 = [4.2200000000000003E+1,0.0E+0]5334; CHECK-NEXT: movsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]5335; CHECK-NEXT: comisd %xmm2, %xmm15336; CHECK-NEXT: xorpd %xmm0, %xmm05337; CHECK-NEXT: xorpd %xmm3, %xmm35338; CHECK-NEXT: ja .LBB130_25339; CHECK-NEXT: # %bb.1: # %entry5340; CHECK-NEXT: movapd %xmm1, %xmm35341; CHECK-NEXT: .LBB130_2: # %entry5342; CHECK-NEXT: subsd %xmm3, %xmm25343; CHECK-NEXT: cvttsd2si %xmm2, %rax5344; CHECK-NEXT: setbe %cl5345; CHECK-NEXT: movzbl %cl, %ecx5346; CHECK-NEXT: shlq $63, %rcx5347; CHECK-NEXT: xorq %rax, %rcx5348; CHECK-NEXT: movq %rcx, %xmm25349; CHECK-NEXT: movsd {{.*#+}} xmm3 = [4.2100000000000001E+1,0.0E+0]5350; CHECK-NEXT: comisd %xmm3, %xmm15351; CHECK-NEXT: ja .LBB130_45352; CHECK-NEXT: # %bb.3: # %entry5353; CHECK-NEXT: movapd %xmm1, %xmm05354; CHECK-NEXT: .LBB130_4: # %entry5355; CHECK-NEXT: subsd %xmm0, %xmm35356; CHECK-NEXT: cvttsd2si %xmm3, %rax5357; CHECK-NEXT: setbe %cl5358; CHECK-NEXT: movzbl %cl, %ecx5359; CHECK-NEXT: shlq $63, %rcx5360; CHECK-NEXT: xorq %rax, %rcx5361; CHECK-NEXT: movq %rcx, %xmm05362; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]5363; CHECK-NEXT: retq5364;5365; AVX1-LABEL: constrained_vector_fptoui_v2i64_v2f64:5366; AVX1: # %bb.0: # %entry5367; AVX1-NEXT: vmovsd {{.*#+}} xmm2 = [4.2200000000000003E+1,0.0E+0]5368; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = [9.2233720368547758E+18,0.0E+0]5369; AVX1-NEXT: vcomisd %xmm2, %xmm05370; AVX1-NEXT: vxorpd %xmm1, %xmm1, %xmm15371; AVX1-NEXT: vxorpd %xmm3, %xmm3, %xmm35372; AVX1-NEXT: ja .LBB130_25373; AVX1-NEXT: # %bb.1: # %entry5374; AVX1-NEXT: vmovapd %xmm0, %xmm35375; AVX1-NEXT: .LBB130_2: # %entry5376; AVX1-NEXT: vsubsd %xmm3, %xmm2, %xmm25377; AVX1-NEXT: vcvttsd2si %xmm2, %rax5378; AVX1-NEXT: setbe %cl5379; AVX1-NEXT: movzbl %cl, %ecx5380; AVX1-NEXT: shlq $63, %rcx5381; AVX1-NEXT: xorq %rax, %rcx5382; AVX1-NEXT: vmovq %rcx, %xmm25383; AVX1-NEXT: vmovsd {{.*#+}} xmm3 = [4.2100000000000001E+1,0.0E+0]5384; AVX1-NEXT: vcomisd %xmm3, %xmm05385; AVX1-NEXT: ja .LBB130_45386; AVX1-NEXT: # %bb.3: # %entry5387; AVX1-NEXT: vmovapd %xmm0, %xmm15388; AVX1-NEXT: .LBB130_4: # %entry5389; AVX1-NEXT: vsubsd %xmm1, %xmm3, %xmm05390; AVX1-NEXT: vcvttsd2si %xmm0, %rax5391; AVX1-NEXT: setbe %cl5392; AVX1-NEXT: movzbl %cl, %ecx5393; AVX1-NEXT: shlq $63, %rcx5394; AVX1-NEXT: xorq %rax, %rcx5395; AVX1-NEXT: vmovq %rcx, %xmm05396; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]5397; AVX1-NEXT: retq5398;5399; AVX512F-LABEL: constrained_vector_fptoui_v2i64_v2f64:5400; AVX512F: # %bb.0: # %entry5401; AVX512F-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5402; AVX512F-NEXT: vmovq %rax, %xmm05403; AVX512F-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5404; AVX512F-NEXT: vmovq %rax, %xmm15405; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]5406; AVX512F-NEXT: retq5407;5408; AVX512DQ-LABEL: constrained_vector_fptoui_v2i64_v2f64:5409; AVX512DQ: # %bb.0: # %entry5410; AVX512DQ-NEXT: vmovaps {{.*#+}} xmm0 = [4.2100000000000001E+1,4.2200000000000003E+1]5411; AVX512DQ-NEXT: vcvttpd2uqq %zmm0, %zmm05412; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm05413; AVX512DQ-NEXT: vzeroupper5414; AVX512DQ-NEXT: retq5415entry:5416 %result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(5417 <2 x double><double 42.1, double 42.2>,5418 metadata !"fpexcept.strict") #05419 ret <2 x i64> %result5420}5421 5422define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() #0 {5423; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f64:5424; CHECK: # %bb.0: # %entry5425; CHECK-NEXT: movsd {{.*#+}} xmm2 = [4.2100000000000001E+1,0.0E+0]5426; CHECK-NEXT: movsd {{.*#+}} xmm1 = [9.2233720368547758E+18,0.0E+0]5427; CHECK-NEXT: comisd %xmm2, %xmm15428; CHECK-NEXT: xorpd %xmm0, %xmm05429; CHECK-NEXT: xorpd %xmm3, %xmm35430; CHECK-NEXT: ja .LBB131_25431; CHECK-NEXT: # %bb.1: # %entry5432; CHECK-NEXT: movapd %xmm1, %xmm35433; CHECK-NEXT: .LBB131_2: # %entry5434; CHECK-NEXT: subsd %xmm3, %xmm25435; CHECK-NEXT: cvttsd2si %xmm2, %rcx5436; CHECK-NEXT: setbe %al5437; CHECK-NEXT: movzbl %al, %eax5438; CHECK-NEXT: shlq $63, %rax5439; CHECK-NEXT: xorq %rcx, %rax5440; CHECK-NEXT: movsd {{.*#+}} xmm2 = [4.2200000000000003E+1,0.0E+0]5441; CHECK-NEXT: comisd %xmm2, %xmm15442; CHECK-NEXT: xorpd %xmm3, %xmm35443; CHECK-NEXT: ja .LBB131_45444; CHECK-NEXT: # %bb.3: # %entry5445; CHECK-NEXT: movapd %xmm1, %xmm35446; CHECK-NEXT: .LBB131_4: # %entry5447; CHECK-NEXT: subsd %xmm3, %xmm25448; CHECK-NEXT: cvttsd2si %xmm2, %rcx5449; CHECK-NEXT: setbe %dl5450; CHECK-NEXT: movzbl %dl, %edx5451; CHECK-NEXT: shlq $63, %rdx5452; CHECK-NEXT: xorq %rcx, %rdx5453; CHECK-NEXT: movsd {{.*#+}} xmm2 = [4.2299999999999997E+1,0.0E+0]5454; CHECK-NEXT: comisd %xmm2, %xmm15455; CHECK-NEXT: ja .LBB131_65456; CHECK-NEXT: # %bb.5: # %entry5457; CHECK-NEXT: movapd %xmm1, %xmm05458; CHECK-NEXT: .LBB131_6: # %entry5459; CHECK-NEXT: subsd %xmm0, %xmm25460; CHECK-NEXT: cvttsd2si %xmm2, %rsi5461; CHECK-NEXT: setbe %cl5462; CHECK-NEXT: movzbl %cl, %ecx5463; CHECK-NEXT: shlq $63, %rcx5464; CHECK-NEXT: xorq %rsi, %rcx5465; CHECK-NEXT: retq5466;5467; AVX1-LABEL: constrained_vector_fptoui_v3i64_v3f64:5468; AVX1: # %bb.0: # %entry5469; AVX1-NEXT: vmovsd {{.*#+}} xmm2 = [4.2299999999999997E+1,0.0E+0]5470; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = [9.2233720368547758E+18,0.0E+0]5471; AVX1-NEXT: vcomisd %xmm2, %xmm05472; AVX1-NEXT: vxorpd %xmm1, %xmm1, %xmm15473; AVX1-NEXT: vxorpd %xmm3, %xmm3, %xmm35474; AVX1-NEXT: ja .LBB131_25475; AVX1-NEXT: # %bb.1: # %entry5476; AVX1-NEXT: vmovapd %xmm0, %xmm35477; AVX1-NEXT: .LBB131_2: # %entry5478; AVX1-NEXT: vsubsd %xmm3, %xmm2, %xmm25479; AVX1-NEXT: vcvttsd2si %xmm2, %rcx5480; AVX1-NEXT: setbe %al5481; AVX1-NEXT: movzbl %al, %eax5482; AVX1-NEXT: shlq $63, %rax5483; AVX1-NEXT: xorq %rcx, %rax5484; AVX1-NEXT: vmovsd {{.*#+}} xmm2 = [4.2100000000000001E+1,0.0E+0]5485; AVX1-NEXT: vcomisd %xmm2, %xmm05486; AVX1-NEXT: vxorpd %xmm3, %xmm3, %xmm35487; AVX1-NEXT: ja .LBB131_45488; AVX1-NEXT: # %bb.3: # %entry5489; AVX1-NEXT: vmovapd %xmm0, %xmm35490; AVX1-NEXT: .LBB131_4: # %entry5491; AVX1-NEXT: vsubsd %xmm3, %xmm2, %xmm25492; AVX1-NEXT: vcvttsd2si %xmm2, %rdx5493; AVX1-NEXT: setbe %cl5494; AVX1-NEXT: movzbl %cl, %ecx5495; AVX1-NEXT: shlq $63, %rcx5496; AVX1-NEXT: xorq %rdx, %rcx5497; AVX1-NEXT: vmovsd {{.*#+}} xmm2 = [4.2200000000000003E+1,0.0E+0]5498; AVX1-NEXT: vcomisd %xmm2, %xmm05499; AVX1-NEXT: ja .LBB131_65500; AVX1-NEXT: # %bb.5: # %entry5501; AVX1-NEXT: vmovapd %xmm0, %xmm15502; AVX1-NEXT: .LBB131_6: # %entry5503; AVX1-NEXT: vsubsd %xmm1, %xmm2, %xmm05504; AVX1-NEXT: vcvttsd2si %xmm0, %rdx5505; AVX1-NEXT: setbe %sil5506; AVX1-NEXT: movzbl %sil, %esi5507; AVX1-NEXT: shlq $63, %rsi5508; AVX1-NEXT: xorq %rdx, %rsi5509; AVX1-NEXT: vmovq %rsi, %xmm05510; AVX1-NEXT: vmovq %rcx, %xmm15511; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]5512; AVX1-NEXT: vmovq %rax, %xmm15513; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm05514; AVX1-NEXT: retq5515;5516; AVX512-LABEL: constrained_vector_fptoui_v3i64_v3f64:5517; AVX512: # %bb.0: # %entry5518; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5519; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx5520; AVX512-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rdx5521; AVX512-NEXT: vmovq %rdx, %xmm05522; AVX512-NEXT: vmovq %rcx, %xmm15523; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]5524; AVX512-NEXT: vmovq %rax, %xmm15525; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm05526; AVX512-NEXT: retq5527entry:5528 %result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f64(5529 <3 x double><double 42.1, double 42.2,5530 double 42.3>,5531 metadata !"fpexcept.strict") #05532 ret <3 x i64> %result5533}5534 5535define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() #0 {5536; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f64:5537; CHECK: # %bb.0: # %entry5538; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]5539; CHECK-NEXT: movsd {{.*#+}} xmm2 = [9.2233720368547758E+18,0.0E+0]5540; CHECK-NEXT: comisd %xmm0, %xmm25541; CHECK-NEXT: xorpd %xmm1, %xmm15542; CHECK-NEXT: xorpd %xmm3, %xmm35543; CHECK-NEXT: ja .LBB132_25544; CHECK-NEXT: # %bb.1: # %entry5545; CHECK-NEXT: movapd %xmm2, %xmm35546; CHECK-NEXT: .LBB132_2: # %entry5547; CHECK-NEXT: subsd %xmm3, %xmm05548; CHECK-NEXT: cvttsd2si %xmm0, %rcx5549; CHECK-NEXT: setbe %al5550; CHECK-NEXT: movzbl %al, %eax5551; CHECK-NEXT: shlq $63, %rax5552; CHECK-NEXT: xorq %rcx, %rax5553; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]5554; CHECK-NEXT: comisd %xmm0, %xmm25555; CHECK-NEXT: xorpd %xmm4, %xmm45556; CHECK-NEXT: ja .LBB132_45557; CHECK-NEXT: # %bb.3: # %entry5558; CHECK-NEXT: movapd %xmm2, %xmm45559; CHECK-NEXT: .LBB132_4: # %entry5560; CHECK-NEXT: movq %rax, %xmm35561; CHECK-NEXT: subsd %xmm4, %xmm05562; CHECK-NEXT: cvttsd2si %xmm0, %rax5563; CHECK-NEXT: setbe %cl5564; CHECK-NEXT: movzbl %cl, %ecx5565; CHECK-NEXT: shlq $63, %rcx5566; CHECK-NEXT: xorq %rax, %rcx5567; CHECK-NEXT: movq %rcx, %xmm05568; CHECK-NEXT: movsd {{.*#+}} xmm4 = [4.2399999999999999E+1,0.0E+0]5569; CHECK-NEXT: comisd %xmm4, %xmm25570; CHECK-NEXT: xorpd %xmm5, %xmm55571; CHECK-NEXT: ja .LBB132_65572; CHECK-NEXT: # %bb.5: # %entry5573; CHECK-NEXT: movapd %xmm2, %xmm55574; CHECK-NEXT: .LBB132_6: # %entry5575; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]5576; CHECK-NEXT: subsd %xmm5, %xmm45577; CHECK-NEXT: cvttsd2si %xmm4, %rax5578; CHECK-NEXT: setbe %cl5579; CHECK-NEXT: movzbl %cl, %ecx5580; CHECK-NEXT: shlq $63, %rcx5581; CHECK-NEXT: xorq %rax, %rcx5582; CHECK-NEXT: movq %rcx, %xmm35583; CHECK-NEXT: movsd {{.*#+}} xmm4 = [4.2299999999999997E+1,0.0E+0]5584; CHECK-NEXT: comisd %xmm4, %xmm25585; CHECK-NEXT: ja .LBB132_85586; CHECK-NEXT: # %bb.7: # %entry5587; CHECK-NEXT: movapd %xmm2, %xmm15588; CHECK-NEXT: .LBB132_8: # %entry5589; CHECK-NEXT: subsd %xmm1, %xmm45590; CHECK-NEXT: cvttsd2si %xmm4, %rax5591; CHECK-NEXT: setbe %cl5592; CHECK-NEXT: movzbl %cl, %ecx5593; CHECK-NEXT: shlq $63, %rcx5594; CHECK-NEXT: xorq %rax, %rcx5595; CHECK-NEXT: movq %rcx, %xmm15596; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]5597; CHECK-NEXT: retq5598;5599; AVX1-LABEL: constrained_vector_fptoui_v4i64_v4f64:5600; AVX1: # %bb.0: # %entry5601; AVX1-NEXT: vmovsd {{.*#+}} xmm2 = [4.2399999999999999E+1,0.0E+0]5602; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = [9.2233720368547758E+18,0.0E+0]5603; AVX1-NEXT: vcomisd %xmm2, %xmm05604; AVX1-NEXT: vxorpd %xmm1, %xmm1, %xmm15605; AVX1-NEXT: vxorpd %xmm3, %xmm3, %xmm35606; AVX1-NEXT: ja .LBB132_25607; AVX1-NEXT: # %bb.1: # %entry5608; AVX1-NEXT: vmovapd %xmm0, %xmm35609; AVX1-NEXT: .LBB132_2: # %entry5610; AVX1-NEXT: vsubsd %xmm3, %xmm2, %xmm25611; AVX1-NEXT: vcvttsd2si %xmm2, %rcx5612; AVX1-NEXT: setbe %al5613; AVX1-NEXT: movzbl %al, %eax5614; AVX1-NEXT: shlq $63, %rax5615; AVX1-NEXT: xorq %rcx, %rax5616; AVX1-NEXT: vmovsd {{.*#+}} xmm3 = [4.2299999999999997E+1,0.0E+0]5617; AVX1-NEXT: vcomisd %xmm3, %xmm05618; AVX1-NEXT: vxorpd %xmm4, %xmm4, %xmm45619; AVX1-NEXT: ja .LBB132_45620; AVX1-NEXT: # %bb.3: # %entry5621; AVX1-NEXT: vmovapd %xmm0, %xmm45622; AVX1-NEXT: .LBB132_4: # %entry5623; AVX1-NEXT: vmovq %rax, %xmm25624; AVX1-NEXT: vsubsd %xmm4, %xmm3, %xmm35625; AVX1-NEXT: vcvttsd2si %xmm3, %rax5626; AVX1-NEXT: setbe %cl5627; AVX1-NEXT: movzbl %cl, %ecx5628; AVX1-NEXT: shlq $63, %rcx5629; AVX1-NEXT: xorq %rax, %rcx5630; AVX1-NEXT: vmovq %rcx, %xmm35631; AVX1-NEXT: vmovsd {{.*#+}} xmm4 = [4.2200000000000003E+1,0.0E+0]5632; AVX1-NEXT: vcomisd %xmm4, %xmm05633; AVX1-NEXT: vxorpd %xmm5, %xmm5, %xmm55634; AVX1-NEXT: ja .LBB132_65635; AVX1-NEXT: # %bb.5: # %entry5636; AVX1-NEXT: vmovapd %xmm0, %xmm55637; AVX1-NEXT: .LBB132_6: # %entry5638; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]5639; AVX1-NEXT: vsubsd %xmm5, %xmm4, %xmm35640; AVX1-NEXT: vcvttsd2si %xmm3, %rax5641; AVX1-NEXT: setbe %cl5642; AVX1-NEXT: movzbl %cl, %ecx5643; AVX1-NEXT: shlq $63, %rcx5644; AVX1-NEXT: xorq %rax, %rcx5645; AVX1-NEXT: vmovq %rcx, %xmm35646; AVX1-NEXT: vmovsd {{.*#+}} xmm4 = [4.2100000000000001E+1,0.0E+0]5647; AVX1-NEXT: vcomisd %xmm4, %xmm05648; AVX1-NEXT: ja .LBB132_85649; AVX1-NEXT: # %bb.7: # %entry5650; AVX1-NEXT: vmovapd %xmm0, %xmm15651; AVX1-NEXT: .LBB132_8: # %entry5652; AVX1-NEXT: vsubsd %xmm1, %xmm4, %xmm05653; AVX1-NEXT: vcvttsd2si %xmm0, %rax5654; AVX1-NEXT: setbe %cl5655; AVX1-NEXT: movzbl %cl, %ecx5656; AVX1-NEXT: shlq $63, %rcx5657; AVX1-NEXT: xorq %rax, %rcx5658; AVX1-NEXT: vmovq %rcx, %xmm05659; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]5660; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm05661; AVX1-NEXT: retq5662;5663; AVX512F-LABEL: constrained_vector_fptoui_v4i64_v4f64:5664; AVX512F: # %bb.0: # %entry5665; AVX512F-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5666; AVX512F-NEXT: vmovq %rax, %xmm05667; AVX512F-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5668; AVX512F-NEXT: vmovq %rax, %xmm15669; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]5670; AVX512F-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5671; AVX512F-NEXT: vmovq %rax, %xmm15672; AVX512F-NEXT: vcvttsd2usi {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax5673; AVX512F-NEXT: vmovq %rax, %xmm25674; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]5675; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm05676; AVX512F-NEXT: retq5677;5678; AVX512DQ-LABEL: constrained_vector_fptoui_v4i64_v4f64:5679; AVX512DQ: # %bb.0: # %entry5680; AVX512DQ-NEXT: vmovaps {{.*#+}} ymm0 = [4.2100000000000001E+1,4.2200000000000003E+1,4.2299999999999997E+1,4.2399999999999999E+1]5681; AVX512DQ-NEXT: vcvttpd2uqq %zmm0, %zmm05682; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm05683; AVX512DQ-NEXT: retq5684entry:5685 %result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(5686 <4 x double><double 42.1, double 42.2,5687 double 42.3, double 42.4>,5688 metadata !"fpexcept.strict") #05689 ret <4 x i64> %result5690}5691 5692 5693define <1 x float> @constrained_vector_fptrunc_v1f64() #0 {5694; CHECK-LABEL: constrained_vector_fptrunc_v1f64:5695; CHECK: # %bb.0: # %entry5696; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]5697; CHECK-NEXT: cvtsd2ss %xmm0, %xmm05698; CHECK-NEXT: retq5699;5700; AVX-LABEL: constrained_vector_fptrunc_v1f64:5701; AVX: # %bb.0: # %entry5702; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]5703; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm05704; AVX-NEXT: retq5705entry:5706 %result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(5707 <1 x double><double 42.1>,5708 metadata !"round.dynamic",5709 metadata !"fpexcept.strict") #05710 ret <1 x float> %result5711}5712 5713define <2 x float> @constrained_vector_fptrunc_v2f64() #0 {5714; CHECK-LABEL: constrained_vector_fptrunc_v2f64:5715; CHECK: # %bb.0: # %entry5716; CHECK-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05717; CHECK-NEXT: retq5718;5719; AVX-LABEL: constrained_vector_fptrunc_v2f64:5720; AVX: # %bb.0: # %entry5721; AVX-NEXT: vcvtpd2psx {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05722; AVX-NEXT: retq5723entry:5724 %result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(5725 <2 x double><double 42.1, double 42.2>,5726 metadata !"round.dynamic",5727 metadata !"fpexcept.strict") #05728 ret <2 x float> %result5729}5730 5731define <3 x float> @constrained_vector_fptrunc_v3f64() #0 {5732; CHECK-LABEL: constrained_vector_fptrunc_v3f64:5733; CHECK: # %bb.0: # %entry5734; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]5735; CHECK-NEXT: cvtsd2ss %xmm0, %xmm15736; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]5737; CHECK-NEXT: cvtsd2ss %xmm0, %xmm05738; CHECK-NEXT: movsd {{.*#+}} xmm2 = [4.2200000000000003E+1,0.0E+0]5739; CHECK-NEXT: cvtsd2ss %xmm2, %xmm25740; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]5741; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]5742; CHECK-NEXT: retq5743;5744; AVX-LABEL: constrained_vector_fptrunc_v3f64:5745; AVX: # %bb.0: # %entry5746; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]5747; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm05748; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [4.2100000000000001E+1,0.0E+0]5749; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm15750; AVX-NEXT: vmovsd {{.*#+}} xmm2 = [4.2200000000000003E+1,0.0E+0]5751; AVX-NEXT: vcvtsd2ss %xmm2, %xmm2, %xmm25752; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]5753; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]5754; AVX-NEXT: retq5755entry:5756 %result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(5757 <3 x double><double 42.1, double 42.2,5758 double 42.3>,5759 metadata !"round.dynamic",5760 metadata !"fpexcept.strict") #05761 ret <3 x float> %result5762}5763 5764define <4 x float> @constrained_vector_fptrunc_v4f64() #0 {5765; CHECK-LABEL: constrained_vector_fptrunc_v4f64:5766; CHECK: # %bb.0: # %entry5767; CHECK-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm15768; CHECK-NEXT: cvtpd2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05769; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]5770; CHECK-NEXT: retq5771;5772; AVX-LABEL: constrained_vector_fptrunc_v4f64:5773; AVX: # %bb.0: # %entry5774; AVX-NEXT: vcvtpd2psy {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05775; AVX-NEXT: retq5776entry:5777 %result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(5778 <4 x double><double 42.1, double 42.2,5779 double 42.3, double 42.4>,5780 metadata !"round.dynamic",5781 metadata !"fpexcept.strict") #05782 ret <4 x float> %result5783}5784 5785define <1 x double> @constrained_vector_fpext_v1f32() #0 {5786; CHECK-LABEL: constrained_vector_fpext_v1f32:5787; CHECK: # %bb.0: # %entry5788; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]5789; CHECK-NEXT: cvtss2sd %xmm0, %xmm05790; CHECK-NEXT: retq5791;5792; AVX-LABEL: constrained_vector_fpext_v1f32:5793; AVX: # %bb.0: # %entry5794; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]5795; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm05796; AVX-NEXT: retq5797entry:5798 %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(5799 <1 x float><float 42.0>,5800 metadata !"fpexcept.strict") #05801 ret <1 x double> %result5802}5803 5804define <2 x double> @constrained_vector_fpext_v2f32() #0 {5805; CHECK-LABEL: constrained_vector_fpext_v2f32:5806; CHECK: # %bb.0: # %entry5807; CHECK-NEXT: cvtps2pd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05808; CHECK-NEXT: retq5809;5810; AVX-LABEL: constrained_vector_fpext_v2f32:5811; AVX: # %bb.0: # %entry5812; AVX-NEXT: vcvtps2pd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05813; AVX-NEXT: retq5814entry:5815 %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(5816 <2 x float><float 42.0, float 43.0>,5817 metadata !"fpexcept.strict") #05818 ret <2 x double> %result5819}5820 5821define <3 x double> @constrained_vector_fpext_v3f32() #0 {5822; CHECK-LABEL: constrained_vector_fpext_v3f32:5823; CHECK: # %bb.0: # %entry5824; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]5825; CHECK-NEXT: cvtss2sd %xmm0, %xmm15826; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]5827; CHECK-NEXT: cvtss2sd %xmm0, %xmm05828; CHECK-NEXT: movss {{.*#+}} xmm2 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]5829; CHECK-NEXT: cvtss2sd %xmm2, %xmm25830; CHECK-NEXT: movsd %xmm2, -{{[0-9]+}}(%rsp)5831; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)5832; CHECK-NEXT: wait5833; CHECK-NEXT: retq5834;5835; AVX-LABEL: constrained_vector_fpext_v3f32:5836; AVX: # %bb.0: # %entry5837; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]5838; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm05839; AVX-NEXT: vmovss {{.*#+}} xmm1 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]5840; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm15841; AVX-NEXT: vmovss {{.*#+}} xmm2 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]5842; AVX-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm25843; AVX-NEXT: vmovlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]5844; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm05845; AVX-NEXT: retq5846entry:5847 %result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(5848 <3 x float><float 42.0, float 43.0,5849 float 44.0>,5850 metadata !"fpexcept.strict") #05851 ret <3 x double> %result5852}5853 5854define <4 x double> @constrained_vector_fpext_v4f32() #0 {5855; CHECK-LABEL: constrained_vector_fpext_v4f32:5856; CHECK: # %bb.0: # %entry5857; CHECK-NEXT: cvtps2pd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm15858; CHECK-NEXT: cvtps2pd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm05859; CHECK-NEXT: retq5860;5861; AVX-LABEL: constrained_vector_fpext_v4f32:5862; AVX: # %bb.0: # %entry5863; AVX-NEXT: vcvtps2pd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm05864; AVX-NEXT: retq5865entry:5866 %result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(5867 <4 x float><float 42.0, float 43.0,5868 float 44.0, float 45.0>,5869 metadata !"fpexcept.strict") #05870 ret <4 x double> %result5871}5872 5873define <1 x float> @constrained_vector_ceil_v1f32_var(ptr %a) #0 {5874; CHECK-LABEL: constrained_vector_ceil_v1f32_var:5875; CHECK: # %bb.0: # %entry5876; CHECK-NEXT: pushq %rax5877; CHECK-NEXT: .cfi_def_cfa_offset 165878; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero5879; CHECK-NEXT: callq ceilf@PLT5880; CHECK-NEXT: popq %rax5881; CHECK-NEXT: .cfi_def_cfa_offset 85882; CHECK-NEXT: retq5883;5884; AVX-LABEL: constrained_vector_ceil_v1f32_var:5885; AVX: # %bb.0: # %entry5886; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero5887; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm05888; AVX-NEXT: retq5889entry:5890 %b = load <1 x float>, ptr %a5891 %ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32(5892 <1 x float> %b,5893 metadata !"fpexcept.strict") #05894 ret <1 x float> %ceil5895}5896 5897define <2 x double> @constrained_vector_ceil_v2f64_var(ptr %a) #0 {5898; CHECK-LABEL: constrained_vector_ceil_v2f64_var:5899; CHECK: # %bb.0: # %entry5900; CHECK-NEXT: subq $40, %rsp5901; CHECK-NEXT: .cfi_def_cfa_offset 485902; CHECK-NEXT: movaps (%rdi), %xmm05903; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill5904; CHECK-NEXT: callq ceil@PLT5905; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill5906; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload5907; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]5908; CHECK-NEXT: callq ceil@PLT5909; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload5910; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]5911; CHECK-NEXT: movaps %xmm1, %xmm05912; CHECK-NEXT: addq $40, %rsp5913; CHECK-NEXT: .cfi_def_cfa_offset 85914; CHECK-NEXT: retq5915;5916; AVX-LABEL: constrained_vector_ceil_v2f64_var:5917; AVX: # %bb.0: # %entry5918; AVX-NEXT: vroundpd $10, (%rdi), %xmm05919; AVX-NEXT: retq5920entry:5921 %b = load <2 x double>, ptr %a5922 %ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(5923 <2 x double> %b,5924 metadata !"fpexcept.strict") #05925 ret <2 x double> %ceil5926}5927 5928define <3 x float> @constrained_vector_ceil_v3f32_var(ptr %a) #0 {5929; CHECK-LABEL: constrained_vector_ceil_v3f32_var:5930; CHECK: # %bb.0: # %entry5931; CHECK-NEXT: subq $56, %rsp5932; CHECK-NEXT: .cfi_def_cfa_offset 645933; CHECK-NEXT: movaps (%rdi), %xmm05934; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill5935; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]5936; CHECK-NEXT: callq ceilf@PLT5937; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill5938; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload5939; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]5940; CHECK-NEXT: callq ceilf@PLT5941; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill5942; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload5943; CHECK-NEXT: callq ceilf@PLT5944; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload5945; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]5946; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload5947; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]5948; CHECK-NEXT: addq $56, %rsp5949; CHECK-NEXT: .cfi_def_cfa_offset 85950; CHECK-NEXT: retq5951;5952; AVX-LABEL: constrained_vector_ceil_v3f32_var:5953; AVX: # %bb.0: # %entry5954; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero5955; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm05956; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero5957; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero5958; AVX-NEXT: vroundss $10, %xmm1, %xmm1, %xmm15959; AVX-NEXT: vroundss $10, %xmm2, %xmm2, %xmm25960; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]5961; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]5962; AVX-NEXT: retq5963entry:5964 %b = load <3 x float>, ptr %a5965 %ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32(5966 <3 x float> %b,5967 metadata !"fpexcept.strict") #05968 ret <3 x float> %ceil5969}5970 5971define <3 x double> @constrained_vector_ceil_v3f64_var(ptr %a) #0 {5972; CHECK-LABEL: constrained_vector_ceil_v3f64_var:5973; CHECK: # %bb.0: # %entry5974; CHECK-NEXT: subq $40, %rsp5975; CHECK-NEXT: .cfi_def_cfa_offset 485976; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero5977; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill5978; CHECK-NEXT: movaps (%rdi), %xmm05979; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill5980; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]5981; CHECK-NEXT: callq ceil@PLT5982; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill5983; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload5984; CHECK-NEXT: callq ceil@PLT5985; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill5986; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload5987; CHECK-NEXT: # xmm0 = mem[0],zero5988; CHECK-NEXT: callq ceil@PLT5989; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)5990; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)5991; CHECK-NEXT: wait5992; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload5993; CHECK-NEXT: # xmm0 = mem[0],zero5994; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload5995; CHECK-NEXT: # xmm1 = mem[0],zero5996; CHECK-NEXT: addq $40, %rsp5997; CHECK-NEXT: .cfi_def_cfa_offset 85998; CHECK-NEXT: retq5999;6000; AVX-LABEL: constrained_vector_ceil_v3f64_var:6001; AVX: # %bb.0: # %entry6002; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6003; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm06004; AVX-NEXT: vroundpd $10, (%rdi), %xmm16005; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm06006; AVX-NEXT: retq6007entry:6008 %b = load <3 x double>, ptr %a6009 %ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(6010 <3 x double> %b,6011 metadata !"fpexcept.strict") #06012 ret <3 x double> %ceil6013}6014 6015define <1 x float> @constrained_vector_floor_v1f32_var(ptr %a) #0 {6016; CHECK-LABEL: constrained_vector_floor_v1f32_var:6017; CHECK: # %bb.0: # %entry6018; CHECK-NEXT: pushq %rax6019; CHECK-NEXT: .cfi_def_cfa_offset 166020; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero6021; CHECK-NEXT: callq floorf@PLT6022; CHECK-NEXT: popq %rax6023; CHECK-NEXT: .cfi_def_cfa_offset 86024; CHECK-NEXT: retq6025;6026; AVX-LABEL: constrained_vector_floor_v1f32_var:6027; AVX: # %bb.0: # %entry6028; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6029; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm06030; AVX-NEXT: retq6031entry:6032 %b = load <1 x float>, ptr %a6033 %floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32(6034 <1 x float> %b,6035 metadata !"fpexcept.strict") #06036 ret <1 x float> %floor6037}6038 6039 6040define <2 x double> @constrained_vector_floor_v2f64_var(ptr %a) #0 {6041; CHECK-LABEL: constrained_vector_floor_v2f64_var:6042; CHECK: # %bb.0: # %entry6043; CHECK-NEXT: subq $40, %rsp6044; CHECK-NEXT: .cfi_def_cfa_offset 486045; CHECK-NEXT: movaps (%rdi), %xmm06046; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6047; CHECK-NEXT: callq floor@PLT6048; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6049; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6050; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6051; CHECK-NEXT: callq floor@PLT6052; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload6053; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]6054; CHECK-NEXT: movaps %xmm1, %xmm06055; CHECK-NEXT: addq $40, %rsp6056; CHECK-NEXT: .cfi_def_cfa_offset 86057; CHECK-NEXT: retq6058;6059; AVX-LABEL: constrained_vector_floor_v2f64_var:6060; AVX: # %bb.0: # %entry6061; AVX-NEXT: vroundpd $9, (%rdi), %xmm06062; AVX-NEXT: retq6063entry:6064 %b = load <2 x double>, ptr %a6065 %floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64(6066 <2 x double> %b,6067 metadata !"fpexcept.strict") #06068 ret <2 x double> %floor6069}6070 6071define <3 x float> @constrained_vector_floor_v3f32_var(ptr %a) #0 {6072; CHECK-LABEL: constrained_vector_floor_v3f32_var:6073; CHECK: # %bb.0: # %entry6074; CHECK-NEXT: subq $56, %rsp6075; CHECK-NEXT: .cfi_def_cfa_offset 646076; CHECK-NEXT: movaps (%rdi), %xmm06077; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6078; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6079; CHECK-NEXT: callq floorf@PLT6080; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6081; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6082; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]6083; CHECK-NEXT: callq floorf@PLT6084; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6085; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6086; CHECK-NEXT: callq floorf@PLT6087; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload6088; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]6089; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload6090; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]6091; CHECK-NEXT: addq $56, %rsp6092; CHECK-NEXT: .cfi_def_cfa_offset 86093; CHECK-NEXT: retq6094;6095; AVX-LABEL: constrained_vector_floor_v3f32_var:6096; AVX: # %bb.0: # %entry6097; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6098; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm06099; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero6100; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero6101; AVX-NEXT: vroundss $9, %xmm1, %xmm1, %xmm16102; AVX-NEXT: vroundss $9, %xmm2, %xmm2, %xmm26103; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]6104; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]6105; AVX-NEXT: retq6106entry:6107 %b = load <3 x float>, ptr %a6108 %floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32(6109 <3 x float> %b,6110 metadata !"fpexcept.strict") #06111 ret <3 x float> %floor6112}6113 6114define <3 x double> @constrained_vector_floor_v3f64_var(ptr %a) #0 {6115; CHECK-LABEL: constrained_vector_floor_v3f64_var:6116; CHECK: # %bb.0: # %entry6117; CHECK-NEXT: subq $40, %rsp6118; CHECK-NEXT: .cfi_def_cfa_offset 486119; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero6120; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6121; CHECK-NEXT: movaps (%rdi), %xmm06122; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6123; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6124; CHECK-NEXT: callq floor@PLT6125; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6126; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6127; CHECK-NEXT: callq floor@PLT6128; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill6129; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload6130; CHECK-NEXT: # xmm0 = mem[0],zero6131; CHECK-NEXT: callq floor@PLT6132; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)6133; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)6134; CHECK-NEXT: wait6135; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload6136; CHECK-NEXT: # xmm0 = mem[0],zero6137; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload6138; CHECK-NEXT: # xmm1 = mem[0],zero6139; CHECK-NEXT: addq $40, %rsp6140; CHECK-NEXT: .cfi_def_cfa_offset 86141; CHECK-NEXT: retq6142;6143; AVX-LABEL: constrained_vector_floor_v3f64_var:6144; AVX: # %bb.0: # %entry6145; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6146; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm06147; AVX-NEXT: vroundpd $9, (%rdi), %xmm16148; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm06149; AVX-NEXT: retq6150entry:6151 %b = load <3 x double>, ptr %a6152 %floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(6153 <3 x double> %b,6154 metadata !"fpexcept.strict") #06155 ret <3 x double> %floor6156}6157 6158define <1 x float> @constrained_vector_round_v1f32_var(ptr %a) #0 {6159; CHECK-LABEL: constrained_vector_round_v1f32_var:6160; CHECK: # %bb.0: # %entry6161; CHECK-NEXT: pushq %rax6162; CHECK-NEXT: .cfi_def_cfa_offset 166163; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero6164; CHECK-NEXT: callq roundf@PLT6165; CHECK-NEXT: popq %rax6166; CHECK-NEXT: .cfi_def_cfa_offset 86167; CHECK-NEXT: retq6168;6169; AVX-LABEL: constrained_vector_round_v1f32_var:6170; AVX: # %bb.0: # %entry6171; AVX-NEXT: pushq %rax6172; AVX-NEXT: .cfi_def_cfa_offset 166173; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6174; AVX-NEXT: callq roundf@PLT6175; AVX-NEXT: popq %rax6176; AVX-NEXT: .cfi_def_cfa_offset 86177; AVX-NEXT: retq6178entry:6179 %b = load <1 x float>, ptr %a6180 %round = call <1 x float> @llvm.experimental.constrained.round.v1f32(6181 <1 x float> %b,6182 metadata !"fpexcept.strict") #06183 ret <1 x float> %round6184}6185 6186define <2 x double> @constrained_vector_round_v2f64_var(ptr %a) #0 {6187; CHECK-LABEL: constrained_vector_round_v2f64_var:6188; CHECK: # %bb.0: # %entry6189; CHECK-NEXT: subq $40, %rsp6190; CHECK-NEXT: .cfi_def_cfa_offset 486191; CHECK-NEXT: movaps (%rdi), %xmm06192; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6193; CHECK-NEXT: callq round@PLT6194; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6195; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6196; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6197; CHECK-NEXT: callq round@PLT6198; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload6199; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]6200; CHECK-NEXT: movaps %xmm1, %xmm06201; CHECK-NEXT: addq $40, %rsp6202; CHECK-NEXT: .cfi_def_cfa_offset 86203; CHECK-NEXT: retq6204;6205; AVX-LABEL: constrained_vector_round_v2f64_var:6206; AVX: # %bb.0: # %entry6207; AVX-NEXT: subq $40, %rsp6208; AVX-NEXT: .cfi_def_cfa_offset 486209; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6210; AVX-NEXT: vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6211; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6212; AVX-NEXT: callq round@PLT6213; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6214; AVX-NEXT: vmovsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload6215; AVX-NEXT: # xmm0 = mem[0],zero6216; AVX-NEXT: callq round@PLT6217; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload6218; AVX-NEXT: # xmm0 = xmm0[0],mem[0]6219; AVX-NEXT: addq $40, %rsp6220; AVX-NEXT: .cfi_def_cfa_offset 86221; AVX-NEXT: retq6222entry:6223 %b = load <2 x double>, ptr %a6224 %round = call <2 x double> @llvm.experimental.constrained.round.v2f64(6225 <2 x double> %b,6226 metadata !"fpexcept.strict") #06227 ret <2 x double> %round6228}6229 6230define <3 x float> @constrained_vector_round_v3f32_var(ptr %a) #0 {6231; CHECK-LABEL: constrained_vector_round_v3f32_var:6232; CHECK: # %bb.0: # %entry6233; CHECK-NEXT: subq $56, %rsp6234; CHECK-NEXT: .cfi_def_cfa_offset 646235; CHECK-NEXT: movaps (%rdi), %xmm06236; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6237; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6238; CHECK-NEXT: callq roundf@PLT6239; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6240; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6241; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]6242; CHECK-NEXT: callq roundf@PLT6243; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6244; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6245; CHECK-NEXT: callq roundf@PLT6246; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload6247; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]6248; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload6249; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]6250; CHECK-NEXT: addq $56, %rsp6251; CHECK-NEXT: .cfi_def_cfa_offset 86252; CHECK-NEXT: retq6253;6254; AVX-LABEL: constrained_vector_round_v3f32_var:6255; AVX: # %bb.0: # %entry6256; AVX-NEXT: pushq %rbx6257; AVX-NEXT: .cfi_def_cfa_offset 166258; AVX-NEXT: subq $48, %rsp6259; AVX-NEXT: .cfi_def_cfa_offset 646260; AVX-NEXT: .cfi_offset %rbx, -166261; AVX-NEXT: movq %rdi, %rbx6262; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6263; AVX-NEXT: callq roundf@PLT6264; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6265; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6266; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero6267; AVX-NEXT: vmovss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill6268; AVX-NEXT: callq roundf@PLT6269; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6270; AVX-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload6271; AVX-NEXT: # xmm0 = mem[0],zero,zero,zero6272; AVX-NEXT: callq roundf@PLT6273; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload6274; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]6275; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload6276; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]6277; AVX-NEXT: addq $48, %rsp6278; AVX-NEXT: .cfi_def_cfa_offset 166279; AVX-NEXT: popq %rbx6280; AVX-NEXT: .cfi_def_cfa_offset 86281; AVX-NEXT: retq6282entry:6283 %b = load <3 x float>, ptr %a6284 %round = call <3 x float> @llvm.experimental.constrained.round.v3f32(6285 <3 x float> %b,6286 metadata !"fpexcept.strict") #06287 ret <3 x float> %round6288}6289 6290 6291define <3 x double> @constrained_vector_round_v3f64_var(ptr %a) #0 {6292; CHECK-LABEL: constrained_vector_round_v3f64_var:6293; CHECK: # %bb.0: # %entry6294; CHECK-NEXT: subq $40, %rsp6295; CHECK-NEXT: .cfi_def_cfa_offset 486296; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero6297; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6298; CHECK-NEXT: movaps (%rdi), %xmm06299; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6300; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6301; CHECK-NEXT: callq round@PLT6302; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6303; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6304; CHECK-NEXT: callq round@PLT6305; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill6306; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload6307; CHECK-NEXT: # xmm0 = mem[0],zero6308; CHECK-NEXT: callq round@PLT6309; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)6310; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)6311; CHECK-NEXT: wait6312; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload6313; CHECK-NEXT: # xmm0 = mem[0],zero6314; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload6315; CHECK-NEXT: # xmm1 = mem[0],zero6316; CHECK-NEXT: addq $40, %rsp6317; CHECK-NEXT: .cfi_def_cfa_offset 86318; CHECK-NEXT: retq6319;6320; AVX-LABEL: constrained_vector_round_v3f64_var:6321; AVX: # %bb.0: # %entry6322; AVX-NEXT: pushq %rbx6323; AVX-NEXT: .cfi_def_cfa_offset 166324; AVX-NEXT: subq $48, %rsp6325; AVX-NEXT: .cfi_def_cfa_offset 646326; AVX-NEXT: .cfi_offset %rbx, -166327; AVX-NEXT: movq %rdi, %rbx6328; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6329; AVX-NEXT: vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6330; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6331; AVX-NEXT: callq round@PLT6332; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill6333; AVX-NEXT: vmovsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload6334; AVX-NEXT: # xmm0 = mem[0],zero6335; AVX-NEXT: callq round@PLT6336; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload6337; AVX-NEXT: # xmm0 = xmm0[0],mem[0]6338; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill6339; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6340; AVX-NEXT: vzeroupper6341; AVX-NEXT: callq round@PLT6342; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload6343; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm06344; AVX-NEXT: addq $48, %rsp6345; AVX-NEXT: .cfi_def_cfa_offset 166346; AVX-NEXT: popq %rbx6347; AVX-NEXT: .cfi_def_cfa_offset 86348; AVX-NEXT: retq6349entry:6350 %b = load <3 x double>, ptr %a6351 %round = call <3 x double> @llvm.experimental.constrained.round.v3f64(6352 <3 x double> %b,6353 metadata !"fpexcept.strict") #06354 ret <3 x double> %round6355}6356 6357define <1 x float> @constrained_vector_trunc_v1f32_var(ptr %a) #0 {6358; CHECK-LABEL: constrained_vector_trunc_v1f32_var:6359; CHECK: # %bb.0: # %entry6360; CHECK-NEXT: pushq %rax6361; CHECK-NEXT: .cfi_def_cfa_offset 166362; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero6363; CHECK-NEXT: callq truncf@PLT6364; CHECK-NEXT: popq %rax6365; CHECK-NEXT: .cfi_def_cfa_offset 86366; CHECK-NEXT: retq6367;6368; AVX-LABEL: constrained_vector_trunc_v1f32_var:6369; AVX: # %bb.0: # %entry6370; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6371; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm06372; AVX-NEXT: retq6373entry:6374 %b = load <1 x float>, ptr %a6375 %trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32(6376 <1 x float> %b,6377 metadata !"fpexcept.strict") #06378 ret <1 x float> %trunc6379}6380 6381define <2 x double> @constrained_vector_trunc_v2f64_var(ptr %a) #0 {6382; CHECK-LABEL: constrained_vector_trunc_v2f64_var:6383; CHECK: # %bb.0: # %entry6384; CHECK-NEXT: subq $40, %rsp6385; CHECK-NEXT: .cfi_def_cfa_offset 486386; CHECK-NEXT: movaps (%rdi), %xmm06387; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6388; CHECK-NEXT: callq trunc@PLT6389; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6390; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6391; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6392; CHECK-NEXT: callq trunc@PLT6393; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload6394; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]6395; CHECK-NEXT: movaps %xmm1, %xmm06396; CHECK-NEXT: addq $40, %rsp6397; CHECK-NEXT: .cfi_def_cfa_offset 86398; CHECK-NEXT: retq6399;6400; AVX-LABEL: constrained_vector_trunc_v2f64_var:6401; AVX: # %bb.0: # %entry6402; AVX-NEXT: vroundpd $11, (%rdi), %xmm06403; AVX-NEXT: retq6404entry:6405 %b = load <2 x double>, ptr %a6406 %trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(6407 <2 x double> %b,6408 metadata !"fpexcept.strict") #06409 ret <2 x double> %trunc6410}6411 6412define <3 x float> @constrained_vector_trunc_v3f32_var(ptr %a) #0 {6413; CHECK-LABEL: constrained_vector_trunc_v3f32_var:6414; CHECK: # %bb.0: # %entry6415; CHECK-NEXT: subq $56, %rsp6416; CHECK-NEXT: .cfi_def_cfa_offset 646417; CHECK-NEXT: movaps (%rdi), %xmm06418; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6419; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6420; CHECK-NEXT: callq truncf@PLT6421; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6422; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6423; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]6424; CHECK-NEXT: callq truncf@PLT6425; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill6426; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6427; CHECK-NEXT: callq truncf@PLT6428; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload6429; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]6430; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload6431; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]6432; CHECK-NEXT: addq $56, %rsp6433; CHECK-NEXT: .cfi_def_cfa_offset 86434; CHECK-NEXT: retq6435;6436; AVX-LABEL: constrained_vector_trunc_v3f32_var:6437; AVX: # %bb.0: # %entry6438; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6439; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm06440; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero6441; AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero6442; AVX-NEXT: vroundss $11, %xmm1, %xmm1, %xmm16443; AVX-NEXT: vroundss $11, %xmm2, %xmm2, %xmm26444; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]6445; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]6446; AVX-NEXT: retq6447entry:6448 %b = load <3 x float>, ptr %a6449 %trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32(6450 <3 x float> %b,6451 metadata !"fpexcept.strict") #06452 ret <3 x float> %trunc6453}6454 6455define <3 x double> @constrained_vector_trunc_v3f64_var(ptr %a) #0 {6456; CHECK-LABEL: constrained_vector_trunc_v3f64_var:6457; CHECK: # %bb.0: # %entry6458; CHECK-NEXT: subq $40, %rsp6459; CHECK-NEXT: .cfi_def_cfa_offset 486460; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero6461; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6462; CHECK-NEXT: movaps (%rdi), %xmm06463; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill6464; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]6465; CHECK-NEXT: callq trunc@PLT6466; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill6467; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload6468; CHECK-NEXT: callq trunc@PLT6469; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill6470; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload6471; CHECK-NEXT: # xmm0 = mem[0],zero6472; CHECK-NEXT: callq trunc@PLT6473; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)6474; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)6475; CHECK-NEXT: wait6476; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload6477; CHECK-NEXT: # xmm0 = mem[0],zero6478; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload6479; CHECK-NEXT: # xmm1 = mem[0],zero6480; CHECK-NEXT: addq $40, %rsp6481; CHECK-NEXT: .cfi_def_cfa_offset 86482; CHECK-NEXT: retq6483;6484; AVX-LABEL: constrained_vector_trunc_v3f64_var:6485; AVX: # %bb.0: # %entry6486; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero6487; AVX-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm06488; AVX-NEXT: vroundpd $11, (%rdi), %xmm16489; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm06490; AVX-NEXT: retq6491entry:6492 %b = load <3 x double>, ptr %a6493 %trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(6494 <3 x double> %b,6495 metadata !"fpexcept.strict") #06496 ret <3 x double> %trunc6497}6498 6499define <1 x double> @constrained_vector_sitofp_v1f64_v1i32(<1 x i32> %x) #0 {6500; CHECK-LABEL: constrained_vector_sitofp_v1f64_v1i32:6501; CHECK: # %bb.0: # %entry6502; CHECK-NEXT: cvtsi2sd %edi, %xmm06503; CHECK-NEXT: retq6504;6505; AVX-LABEL: constrained_vector_sitofp_v1f64_v1i32:6506; AVX: # %bb.0: # %entry6507; AVX-NEXT: vcvtsi2sd %edi, %xmm15, %xmm06508; AVX-NEXT: retq6509entry:6510 %result = call <1 x double>6511 @llvm.experimental.constrained.sitofp.v1f64.v1i32(<1 x i32> %x,6512 metadata !"round.dynamic",6513 metadata !"fpexcept.strict") #06514 ret <1 x double> %result6515}6516 6517define <1 x float> @constrained_vector_sitofp_v1f32_v1i32(<1 x i32> %x) #0 {6518; CHECK-LABEL: constrained_vector_sitofp_v1f32_v1i32:6519; CHECK: # %bb.0: # %entry6520; CHECK-NEXT: cvtsi2ss %edi, %xmm06521; CHECK-NEXT: retq6522;6523; AVX-LABEL: constrained_vector_sitofp_v1f32_v1i32:6524; AVX: # %bb.0: # %entry6525; AVX-NEXT: vcvtsi2ss %edi, %xmm15, %xmm06526; AVX-NEXT: retq6527entry:6528 %result = call <1 x float>6529 @llvm.experimental.constrained.sitofp.v1f32.v1i32(<1 x i32> %x,6530 metadata !"round.dynamic",6531 metadata !"fpexcept.strict") #06532 ret <1 x float> %result6533}6534 6535define <1 x double> @constrained_vector_sitofp_v1f64_v1i64(<1 x i64> %x) #0 {6536; CHECK-LABEL: constrained_vector_sitofp_v1f64_v1i64:6537; CHECK: # %bb.0: # %entry6538; CHECK-NEXT: cvtsi2sd %rdi, %xmm06539; CHECK-NEXT: retq6540;6541; AVX-LABEL: constrained_vector_sitofp_v1f64_v1i64:6542; AVX: # %bb.0: # %entry6543; AVX-NEXT: vcvtsi2sd %rdi, %xmm15, %xmm06544; AVX-NEXT: retq6545entry:6546 %result = call <1 x double>6547 @llvm.experimental.constrained.sitofp.v1f64.v1i64(<1 x i64> %x,6548 metadata !"round.dynamic",6549 metadata !"fpexcept.strict") #06550 ret <1 x double> %result6551}6552 6553define <1 x float> @constrained_vector_sitofp_v1f32_v1i64(<1 x i64> %x) #0 {6554; CHECK-LABEL: constrained_vector_sitofp_v1f32_v1i64:6555; CHECK: # %bb.0: # %entry6556; CHECK-NEXT: cvtsi2ss %rdi, %xmm06557; CHECK-NEXT: retq6558;6559; AVX-LABEL: constrained_vector_sitofp_v1f32_v1i64:6560; AVX: # %bb.0: # %entry6561; AVX-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm06562; AVX-NEXT: retq6563entry:6564 %result = call <1 x float>6565 @llvm.experimental.constrained.sitofp.v1f32.v1i64(<1 x i64> %x,6566 metadata !"round.dynamic",6567 metadata !"fpexcept.strict") #06568 ret <1 x float> %result6569}6570 6571define <2 x double> @constrained_vector_sitofp_v2f64_v2i32(<2 x i32> %x) #0 {6572; CHECK-LABEL: constrained_vector_sitofp_v2f64_v2i32:6573; CHECK: # %bb.0: # %entry6574; CHECK-NEXT: cvtdq2pd %xmm0, %xmm06575; CHECK-NEXT: retq6576;6577; AVX-LABEL: constrained_vector_sitofp_v2f64_v2i32:6578; AVX: # %bb.0: # %entry6579; AVX-NEXT: vcvtdq2pd %xmm0, %xmm06580; AVX-NEXT: retq6581entry:6582 %result = call <2 x double>6583 @llvm.experimental.constrained.sitofp.v2f64.v2i32(<2 x i32> %x,6584 metadata !"round.dynamic",6585 metadata !"fpexcept.strict") #06586 ret <2 x double> %result6587}6588 6589define <2 x float> @constrained_vector_sitofp_v2f32_v2i32(<2 x i32> %x) #0 {6590; CHECK-LABEL: constrained_vector_sitofp_v2f32_v2i32:6591; CHECK: # %bb.0: # %entry6592; CHECK-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero6593; CHECK-NEXT: cvtdq2ps %xmm0, %xmm06594; CHECK-NEXT: retq6595;6596; AVX-LABEL: constrained_vector_sitofp_v2f32_v2i32:6597; AVX: # %bb.0: # %entry6598; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero6599; AVX-NEXT: vcvtdq2ps %xmm0, %xmm06600; AVX-NEXT: retq6601entry:6602 %result = call <2 x float>6603 @llvm.experimental.constrained.sitofp.v2f32.v2i32(<2 x i32> %x,6604 metadata !"round.dynamic",6605 metadata !"fpexcept.strict") #06606 ret <2 x float> %result6607}6608 6609define <2 x double> @constrained_vector_sitofp_v2f64_v2i64(<2 x i64> %x) #0 {6610; CHECK-LABEL: constrained_vector_sitofp_v2f64_v2i64:6611; CHECK: # %bb.0: # %entry6612; CHECK-NEXT: movq %xmm0, %rax6613; CHECK-NEXT: cvtsi2sd %rax, %xmm16614; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]6615; CHECK-NEXT: movq %xmm0, %rax6616; CHECK-NEXT: xorps %xmm0, %xmm06617; CHECK-NEXT: cvtsi2sd %rax, %xmm06618; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]6619; CHECK-NEXT: movapd %xmm1, %xmm06620; CHECK-NEXT: retq6621;6622; AVX1-LABEL: constrained_vector_sitofp_v2f64_v2i64:6623; AVX1: # %bb.0: # %entry6624; AVX1-NEXT: vpextrq $1, %xmm0, %rax6625; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm16626; AVX1-NEXT: vmovq %xmm0, %rax6627; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm06628; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]6629; AVX1-NEXT: retq6630;6631; AVX512F-LABEL: constrained_vector_sitofp_v2f64_v2i64:6632; AVX512F: # %bb.0: # %entry6633; AVX512F-NEXT: vpextrq $1, %xmm0, %rax6634; AVX512F-NEXT: vcvtsi2sd %rax, %xmm15, %xmm16635; AVX512F-NEXT: vmovq %xmm0, %rax6636; AVX512F-NEXT: vcvtsi2sd %rax, %xmm15, %xmm06637; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]6638; AVX512F-NEXT: retq6639;6640; AVX512DQ-LABEL: constrained_vector_sitofp_v2f64_v2i64:6641; AVX512DQ: # %bb.0: # %entry6642; AVX512DQ-NEXT: vmovaps %xmm0, %xmm06643; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm06644; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm06645; AVX512DQ-NEXT: vzeroupper6646; AVX512DQ-NEXT: retq6647entry:6648 %result = call <2 x double>6649 @llvm.experimental.constrained.sitofp.v2f64.v2i64(<2 x i64> %x,6650 metadata !"round.dynamic",6651 metadata !"fpexcept.strict") #06652 ret <2 x double> %result6653}6654 6655define <2 x float> @constrained_vector_sitofp_v2f32_v2i64(<2 x i64> %x) #0 {6656; CHECK-LABEL: constrained_vector_sitofp_v2f32_v2i64:6657; CHECK: # %bb.0: # %entry6658; CHECK-NEXT: movq %xmm0, %rax6659; CHECK-NEXT: cvtsi2ss %rax, %xmm16660; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]6661; CHECK-NEXT: movq %xmm0, %rax6662; CHECK-NEXT: xorps %xmm0, %xmm06663; CHECK-NEXT: cvtsi2ss %rax, %xmm06664; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]6665; CHECK-NEXT: movaps %xmm1, %xmm06666; CHECK-NEXT: retq6667;6668; AVX-LABEL: constrained_vector_sitofp_v2f32_v2i64:6669; AVX: # %bb.0: # %entry6670; AVX-NEXT: vpextrq $1, %xmm0, %rax6671; AVX-NEXT: vcvtsi2ss %rax, %xmm15, %xmm16672; AVX-NEXT: vmovq %xmm0, %rax6673; AVX-NEXT: vcvtsi2ss %rax, %xmm15, %xmm06674; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]6675; AVX-NEXT: retq6676entry:6677 %result = call <2 x float>6678 @llvm.experimental.constrained.sitofp.v2f32.v2i64(<2 x i64> %x,6679 metadata !"round.dynamic",6680 metadata !"fpexcept.strict") #06681 ret <2 x float> %result6682}6683 6684define <3 x double> @constrained_vector_sitofp_v3f64_v3i32(<3 x i32> %x) #0 {6685; CHECK-LABEL: constrained_vector_sitofp_v3f64_v3i32:6686; CHECK: # %bb.0: # %entry6687; CHECK-NEXT: movd %xmm0, %eax6688; CHECK-NEXT: cvtsi2sd %eax, %xmm26689; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]6690; CHECK-NEXT: movd %xmm1, %eax6691; CHECK-NEXT: xorps %xmm1, %xmm16692; CHECK-NEXT: cvtsi2sd %eax, %xmm16693; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]6694; CHECK-NEXT: movd %xmm0, %eax6695; CHECK-NEXT: xorps %xmm0, %xmm06696; CHECK-NEXT: cvtsi2sd %eax, %xmm06697; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)6698; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)6699; CHECK-NEXT: wait6700; CHECK-NEXT: movapd %xmm2, %xmm06701; CHECK-NEXT: retq6702;6703; AVX-LABEL: constrained_vector_sitofp_v3f64_v3i32:6704; AVX: # %bb.0: # %entry6705; AVX-NEXT: vextractps $2, %xmm0, %eax6706; AVX-NEXT: vcvtsi2sd %eax, %xmm15, %xmm16707; AVX-NEXT: vmovd %xmm0, %eax6708; AVX-NEXT: vcvtsi2sd %eax, %xmm15, %xmm26709; AVX-NEXT: vpextrd $1, %xmm0, %eax6710; AVX-NEXT: vcvtsi2sd %eax, %xmm15, %xmm06711; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]6712; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm06713; AVX-NEXT: retq6714entry:6715 %result = call <3 x double>6716 @llvm.experimental.constrained.sitofp.v3f64.v3i32(<3 x i32> %x,6717 metadata !"round.dynamic",6718 metadata !"fpexcept.strict") #06719 ret <3 x double> %result6720}6721 6722define <3 x float> @constrained_vector_sitofp_v3f32_v3i32(<3 x i32> %x) #0 {6723; CHECK-LABEL: constrained_vector_sitofp_v3f32_v3i32:6724; CHECK: # %bb.0: # %entry6725; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6726; CHECK-NEXT: movd %xmm1, %eax6727; CHECK-NEXT: xorps %xmm1, %xmm16728; CHECK-NEXT: cvtsi2ss %eax, %xmm16729; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]6730; CHECK-NEXT: movd %xmm2, %eax6731; CHECK-NEXT: xorps %xmm2, %xmm26732; CHECK-NEXT: cvtsi2ss %eax, %xmm26733; CHECK-NEXT: movd %xmm0, %eax6734; CHECK-NEXT: xorps %xmm0, %xmm06735; CHECK-NEXT: cvtsi2ss %eax, %xmm06736; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]6737; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]6738; CHECK-NEXT: retq6739;6740; AVX-LABEL: constrained_vector_sitofp_v3f32_v3i32:6741; AVX: # %bb.0: # %entry6742; AVX-NEXT: vextractps $2, %xmm0, %eax6743; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm16744; AVX-NEXT: vmovd %xmm0, %eax6745; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm26746; AVX-NEXT: vpextrd $1, %xmm0, %eax6747; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm06748; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]6749; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]6750; AVX-NEXT: retq6751entry:6752 %result = call <3 x float>6753 @llvm.experimental.constrained.sitofp.v3f32.v3i32(<3 x i32> %x,6754 metadata !"round.dynamic",6755 metadata !"fpexcept.strict") #06756 ret <3 x float> %result6757}6758 6759define <3 x double> @constrained_vector_sitofp_v3f64_v3i64(<3 x i64> %x) #0 {6760; CHECK-LABEL: constrained_vector_sitofp_v3f64_v3i64:6761; CHECK: # %bb.0: # %entry6762; CHECK-NEXT: cvtsi2sd %rsi, %xmm16763; CHECK-NEXT: cvtsi2sd %rdi, %xmm06764; CHECK-NEXT: cvtsi2sd %rdx, %xmm26765; CHECK-NEXT: movsd %xmm2, -{{[0-9]+}}(%rsp)6766; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)6767; CHECK-NEXT: wait6768; CHECK-NEXT: retq6769;6770; AVX1-LABEL: constrained_vector_sitofp_v3f64_v3i64:6771; AVX1: # %bb.0: # %entry6772; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm16773; AVX1-NEXT: vmovq %xmm1, %rax6774; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm16775; AVX1-NEXT: vmovq %xmm0, %rax6776; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm26777; AVX1-NEXT: vpextrq $1, %xmm0, %rax6778; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm06779; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]6780; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm06781; AVX1-NEXT: retq6782;6783; AVX512-LABEL: constrained_vector_sitofp_v3f64_v3i64:6784; AVX512: # %bb.0: # %entry6785; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm16786; AVX512-NEXT: vmovq %xmm1, %rax6787; AVX512-NEXT: vcvtsi2sd %rax, %xmm15, %xmm16788; AVX512-NEXT: vmovq %xmm0, %rax6789; AVX512-NEXT: vcvtsi2sd %rax, %xmm15, %xmm26790; AVX512-NEXT: vpextrq $1, %xmm0, %rax6791; AVX512-NEXT: vcvtsi2sd %rax, %xmm15, %xmm06792; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]6793; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm06794; AVX512-NEXT: retq6795entry:6796 %result = call <3 x double>6797 @llvm.experimental.constrained.sitofp.v3f64.v3i64(<3 x i64> %x,6798 metadata !"round.dynamic",6799 metadata !"fpexcept.strict") #06800 ret <3 x double> %result6801}6802 6803define <3 x float> @constrained_vector_sitofp_v3f32_v3i64(<3 x i64> %x) #0 {6804; CHECK-LABEL: constrained_vector_sitofp_v3f32_v3i64:6805; CHECK: # %bb.0: # %entry6806; CHECK-NEXT: cvtsi2ss %rdx, %xmm16807; CHECK-NEXT: cvtsi2ss %rdi, %xmm06808; CHECK-NEXT: cvtsi2ss %rsi, %xmm26809; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]6810; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]6811; CHECK-NEXT: retq6812;6813; AVX1-LABEL: constrained_vector_sitofp_v3f32_v3i64:6814; AVX1: # %bb.0: # %entry6815; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm16816; AVX1-NEXT: vmovq %xmm1, %rax6817; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm16818; AVX1-NEXT: vmovq %xmm0, %rax6819; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm26820; AVX1-NEXT: vpextrq $1, %xmm0, %rax6821; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm06822; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]6823; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]6824; AVX1-NEXT: vzeroupper6825; AVX1-NEXT: retq6826;6827; AVX512-LABEL: constrained_vector_sitofp_v3f32_v3i64:6828; AVX512: # %bb.0: # %entry6829; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm16830; AVX512-NEXT: vmovq %xmm1, %rax6831; AVX512-NEXT: vcvtsi2ss %rax, %xmm15, %xmm16832; AVX512-NEXT: vmovq %xmm0, %rax6833; AVX512-NEXT: vcvtsi2ss %rax, %xmm15, %xmm26834; AVX512-NEXT: vpextrq $1, %xmm0, %rax6835; AVX512-NEXT: vcvtsi2ss %rax, %xmm15, %xmm06836; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]6837; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]6838; AVX512-NEXT: vzeroupper6839; AVX512-NEXT: retq6840entry:6841 %result = call <3 x float>6842 @llvm.experimental.constrained.sitofp.v3f32.v3i64(<3 x i64> %x,6843 metadata !"round.dynamic",6844 metadata !"fpexcept.strict") #06845 ret <3 x float> %result6846}6847 6848define <4 x double> @constrained_vector_sitofp_v4f64_v4i32(<4 x i32> %x) #0 {6849; CHECK-LABEL: constrained_vector_sitofp_v4f64_v4i32:6850; CHECK: # %bb.0: # %entry6851; CHECK-NEXT: cvtdq2pd %xmm0, %xmm26852; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]6853; CHECK-NEXT: cvtdq2pd %xmm0, %xmm16854; CHECK-NEXT: movaps %xmm2, %xmm06855; CHECK-NEXT: retq6856;6857; AVX-LABEL: constrained_vector_sitofp_v4f64_v4i32:6858; AVX: # %bb.0: # %entry6859; AVX-NEXT: vcvtdq2pd %xmm0, %ymm06860; AVX-NEXT: retq6861entry:6862 %result = call <4 x double>6863 @llvm.experimental.constrained.sitofp.v4f64.v4i32(<4 x i32> %x,6864 metadata !"round.dynamic",6865 metadata !"fpexcept.strict") #06866 ret <4 x double> %result6867}6868 6869define <4 x float> @constrained_vector_sitofp_v4f32_v4i32(<4 x i32> %x) #0 {6870; CHECK-LABEL: constrained_vector_sitofp_v4f32_v4i32:6871; CHECK: # %bb.0: # %entry6872; CHECK-NEXT: cvtdq2ps %xmm0, %xmm06873; CHECK-NEXT: retq6874;6875; AVX-LABEL: constrained_vector_sitofp_v4f32_v4i32:6876; AVX: # %bb.0: # %entry6877; AVX-NEXT: vcvtdq2ps %xmm0, %xmm06878; AVX-NEXT: retq6879entry:6880 %result = call <4 x float>6881 @llvm.experimental.constrained.sitofp.v4f32.v4i32(<4 x i32> %x,6882 metadata !"round.dynamic",6883 metadata !"fpexcept.strict") #06884 ret <4 x float> %result6885}6886 6887define <4 x double> @constrained_vector_sitofp_v4f64_v4i64(<4 x i64> %x) #0 {6888; CHECK-LABEL: constrained_vector_sitofp_v4f64_v4i64:6889; CHECK: # %bb.0: # %entry6890; CHECK-NEXT: movq %xmm0, %rax6891; CHECK-NEXT: cvtsi2sd %rax, %xmm26892; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]6893; CHECK-NEXT: movq %xmm0, %rax6894; CHECK-NEXT: xorps %xmm0, %xmm06895; CHECK-NEXT: cvtsi2sd %rax, %xmm06896; CHECK-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm0[0]6897; CHECK-NEXT: movq %xmm1, %rax6898; CHECK-NEXT: cvtsi2sd %rax, %xmm36899; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]6900; CHECK-NEXT: movq %xmm0, %rax6901; CHECK-NEXT: xorps %xmm0, %xmm06902; CHECK-NEXT: cvtsi2sd %rax, %xmm06903; CHECK-NEXT: unpcklpd {{.*#+}} xmm3 = xmm3[0],xmm0[0]6904; CHECK-NEXT: movapd %xmm2, %xmm06905; CHECK-NEXT: movapd %xmm3, %xmm16906; CHECK-NEXT: retq6907;6908; AVX1-LABEL: constrained_vector_sitofp_v4f64_v4i64:6909; AVX1: # %bb.0: # %entry6910; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm16911; AVX1-NEXT: vpextrq $1, %xmm1, %rax6912; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm26913; AVX1-NEXT: vmovq %xmm1, %rax6914; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm16915; AVX1-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]6916; AVX1-NEXT: vpextrq $1, %xmm0, %rax6917; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm26918; AVX1-NEXT: vmovq %xmm0, %rax6919; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm06920; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]6921; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm06922; AVX1-NEXT: retq6923;6924; AVX512F-LABEL: constrained_vector_sitofp_v4f64_v4i64:6925; AVX512F: # %bb.0: # %entry6926; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm16927; AVX512F-NEXT: vpextrq $1, %xmm1, %rax6928; AVX512F-NEXT: vcvtsi2sd %rax, %xmm15, %xmm26929; AVX512F-NEXT: vmovq %xmm1, %rax6930; AVX512F-NEXT: vcvtsi2sd %rax, %xmm15, %xmm16931; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]6932; AVX512F-NEXT: vpextrq $1, %xmm0, %rax6933; AVX512F-NEXT: vcvtsi2sd %rax, %xmm15, %xmm26934; AVX512F-NEXT: vmovq %xmm0, %rax6935; AVX512F-NEXT: vcvtsi2sd %rax, %xmm15, %xmm06936; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]6937; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm06938; AVX512F-NEXT: retq6939;6940; AVX512DQ-LABEL: constrained_vector_sitofp_v4f64_v4i64:6941; AVX512DQ: # %bb.0: # %entry6942; AVX512DQ-NEXT: vmovaps %ymm0, %ymm06943; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm06944; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm06945; AVX512DQ-NEXT: retq6946entry:6947 %result = call <4 x double>6948 @llvm.experimental.constrained.sitofp.v4f64.v4i64(<4 x i64> %x,6949 metadata !"round.dynamic",6950 metadata !"fpexcept.strict") #06951 ret <4 x double> %result6952}6953 6954define <4 x float> @constrained_vector_sitofp_v4f32_v4i64(<4 x i64> %x) #0 {6955; CHECK-LABEL: constrained_vector_sitofp_v4f32_v4i64:6956; CHECK: # %bb.0: # %entry6957; CHECK-NEXT: movq %xmm1, %rax6958; CHECK-NEXT: cvtsi2ss %rax, %xmm26959; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]6960; CHECK-NEXT: movq %xmm1, %rax6961; CHECK-NEXT: xorps %xmm1, %xmm16962; CHECK-NEXT: cvtsi2ss %rax, %xmm16963; CHECK-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]6964; CHECK-NEXT: movq %xmm0, %rax6965; CHECK-NEXT: xorps %xmm1, %xmm16966; CHECK-NEXT: cvtsi2ss %rax, %xmm16967; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]6968; CHECK-NEXT: movq %xmm0, %rax6969; CHECK-NEXT: xorps %xmm0, %xmm06970; CHECK-NEXT: cvtsi2ss %rax, %xmm06971; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]6972; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]6973; CHECK-NEXT: movaps %xmm1, %xmm06974; CHECK-NEXT: retq6975;6976; AVX1-LABEL: constrained_vector_sitofp_v4f32_v4i64:6977; AVX1: # %bb.0: # %entry6978; AVX1-NEXT: vpextrq $1, %xmm0, %rax6979; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm16980; AVX1-NEXT: vmovq %xmm0, %rax6981; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm26982; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]6983; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm06984; AVX1-NEXT: vmovq %xmm0, %rax6985; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm26986; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3]6987; AVX1-NEXT: vpextrq $1, %xmm0, %rax6988; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm06989; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]6990; AVX1-NEXT: vzeroupper6991; AVX1-NEXT: retq6992;6993; AVX512F-LABEL: constrained_vector_sitofp_v4f32_v4i64:6994; AVX512F: # %bb.0: # %entry6995; AVX512F-NEXT: vpextrq $1, %xmm0, %rax6996; AVX512F-NEXT: vcvtsi2ss %rax, %xmm15, %xmm16997; AVX512F-NEXT: vmovq %xmm0, %rax6998; AVX512F-NEXT: vcvtsi2ss %rax, %xmm15, %xmm26999; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]7000; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm07001; AVX512F-NEXT: vmovq %xmm0, %rax7002; AVX512F-NEXT: vcvtsi2ss %rax, %xmm15, %xmm27003; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3]7004; AVX512F-NEXT: vpextrq $1, %xmm0, %rax7005; AVX512F-NEXT: vcvtsi2ss %rax, %xmm15, %xmm07006; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]7007; AVX512F-NEXT: vzeroupper7008; AVX512F-NEXT: retq7009;7010; AVX512DQ-LABEL: constrained_vector_sitofp_v4f32_v4i64:7011; AVX512DQ: # %bb.0: # %entry7012; AVX512DQ-NEXT: vmovaps %ymm0, %ymm07013; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm07014; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm07015; AVX512DQ-NEXT: vzeroupper7016; AVX512DQ-NEXT: retq7017entry:7018 %result = call <4 x float>7019 @llvm.experimental.constrained.sitofp.v4f32.v4i64(<4 x i64> %x,7020 metadata !"round.dynamic",7021 metadata !"fpexcept.strict") #07022 ret <4 x float> %result7023}7024 7025define <1 x double> @constrained_vector_uitofp_v1f64_v1i32(<1 x i32> %x) #0 {7026; CHECK-LABEL: constrained_vector_uitofp_v1f64_v1i32:7027; CHECK: # %bb.0: # %entry7028; CHECK-NEXT: movl %edi, %eax7029; CHECK-NEXT: cvtsi2sd %rax, %xmm07030; CHECK-NEXT: retq7031;7032; AVX1-LABEL: constrained_vector_uitofp_v1f64_v1i32:7033; AVX1: # %bb.0: # %entry7034; AVX1-NEXT: movl %edi, %eax7035; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm07036; AVX1-NEXT: retq7037;7038; AVX512-LABEL: constrained_vector_uitofp_v1f64_v1i32:7039; AVX512: # %bb.0: # %entry7040; AVX512-NEXT: vcvtusi2sd %edi, %xmm15, %xmm07041; AVX512-NEXT: retq7042entry:7043 %result = call <1 x double>7044 @llvm.experimental.constrained.uitofp.v1f64.v1i32(<1 x i32> %x,7045 metadata !"round.dynamic",7046 metadata !"fpexcept.strict") #07047 ret <1 x double> %result7048}7049 7050define <1 x float> @constrained_vector_uitofp_v1f32_v1i32(<1 x i32> %x) #0 {7051; CHECK-LABEL: constrained_vector_uitofp_v1f32_v1i32:7052; CHECK: # %bb.0: # %entry7053; CHECK-NEXT: movl %edi, %eax7054; CHECK-NEXT: cvtsi2ss %rax, %xmm07055; CHECK-NEXT: retq7056;7057; AVX1-LABEL: constrained_vector_uitofp_v1f32_v1i32:7058; AVX1: # %bb.0: # %entry7059; AVX1-NEXT: movl %edi, %eax7060; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm07061; AVX1-NEXT: retq7062;7063; AVX512-LABEL: constrained_vector_uitofp_v1f32_v1i32:7064; AVX512: # %bb.0: # %entry7065; AVX512-NEXT: vcvtusi2ss %edi, %xmm15, %xmm07066; AVX512-NEXT: retq7067entry:7068 %result = call <1 x float>7069 @llvm.experimental.constrained.uitofp.v1f32.v1i32(<1 x i32> %x,7070 metadata !"round.dynamic",7071 metadata !"fpexcept.strict") #07072 ret <1 x float> %result7073}7074 7075define <1 x double> @constrained_vector_uitofp_v1f64_v1i64(<1 x i64> %x) #0 {7076; CHECK-LABEL: constrained_vector_uitofp_v1f64_v1i64:7077; CHECK: # %bb.0: # %entry7078; CHECK-NEXT: movq %rdi, %rax7079; CHECK-NEXT: shrq %rax7080; CHECK-NEXT: movl %edi, %ecx7081; CHECK-NEXT: andl $1, %ecx7082; CHECK-NEXT: orq %rax, %rcx7083; CHECK-NEXT: testq %rdi, %rdi7084; CHECK-NEXT: cmovnsq %rdi, %rcx7085; CHECK-NEXT: cvtsi2sd %rcx, %xmm07086; CHECK-NEXT: jns .LBB175_27087; CHECK-NEXT: # %bb.1:7088; CHECK-NEXT: addsd %xmm0, %xmm07089; CHECK-NEXT: .LBB175_2: # %entry7090; CHECK-NEXT: retq7091;7092; AVX1-LABEL: constrained_vector_uitofp_v1f64_v1i64:7093; AVX1: # %bb.0: # %entry7094; AVX1-NEXT: movq %rdi, %rax7095; AVX1-NEXT: shrq %rax7096; AVX1-NEXT: movl %edi, %ecx7097; AVX1-NEXT: andl $1, %ecx7098; AVX1-NEXT: orq %rax, %rcx7099; AVX1-NEXT: testq %rdi, %rdi7100; AVX1-NEXT: cmovnsq %rdi, %rcx7101; AVX1-NEXT: vcvtsi2sd %rcx, %xmm15, %xmm07102; AVX1-NEXT: jns .LBB175_27103; AVX1-NEXT: # %bb.1:7104; AVX1-NEXT: vaddsd %xmm0, %xmm0, %xmm07105; AVX1-NEXT: .LBB175_2: # %entry7106; AVX1-NEXT: retq7107;7108; AVX512-LABEL: constrained_vector_uitofp_v1f64_v1i64:7109; AVX512: # %bb.0: # %entry7110; AVX512-NEXT: vcvtusi2sd %rdi, %xmm15, %xmm07111; AVX512-NEXT: retq7112entry:7113 %result = call <1 x double>7114 @llvm.experimental.constrained.uitofp.v1f64.v1i64(<1 x i64> %x,7115 metadata !"round.dynamic",7116 metadata !"fpexcept.strict") #07117 ret <1 x double> %result7118}7119 7120define <1 x float> @constrained_vector_uitofp_v1f32_v1i64(<1 x i64> %x) #0 {7121; CHECK-LABEL: constrained_vector_uitofp_v1f32_v1i64:7122; CHECK: # %bb.0: # %entry7123; CHECK-NEXT: movq %rdi, %rax7124; CHECK-NEXT: shrq %rax7125; CHECK-NEXT: movl %edi, %ecx7126; CHECK-NEXT: andl $1, %ecx7127; CHECK-NEXT: orq %rax, %rcx7128; CHECK-NEXT: testq %rdi, %rdi7129; CHECK-NEXT: cmovnsq %rdi, %rcx7130; CHECK-NEXT: cvtsi2ss %rcx, %xmm07131; CHECK-NEXT: jns .LBB176_27132; CHECK-NEXT: # %bb.1:7133; CHECK-NEXT: addss %xmm0, %xmm07134; CHECK-NEXT: .LBB176_2: # %entry7135; CHECK-NEXT: retq7136;7137; AVX1-LABEL: constrained_vector_uitofp_v1f32_v1i64:7138; AVX1: # %bb.0: # %entry7139; AVX1-NEXT: movq %rdi, %rax7140; AVX1-NEXT: shrq %rax7141; AVX1-NEXT: movl %edi, %ecx7142; AVX1-NEXT: andl $1, %ecx7143; AVX1-NEXT: orq %rax, %rcx7144; AVX1-NEXT: testq %rdi, %rdi7145; AVX1-NEXT: cmovnsq %rdi, %rcx7146; AVX1-NEXT: vcvtsi2ss %rcx, %xmm15, %xmm07147; AVX1-NEXT: jns .LBB176_27148; AVX1-NEXT: # %bb.1:7149; AVX1-NEXT: vaddss %xmm0, %xmm0, %xmm07150; AVX1-NEXT: .LBB176_2: # %entry7151; AVX1-NEXT: retq7152;7153; AVX512-LABEL: constrained_vector_uitofp_v1f32_v1i64:7154; AVX512: # %bb.0: # %entry7155; AVX512-NEXT: vcvtusi2ss %rdi, %xmm15, %xmm07156; AVX512-NEXT: retq7157entry:7158 %result = call <1 x float>7159 @llvm.experimental.constrained.uitofp.v1f32.v1i64(<1 x i64> %x,7160 metadata !"round.dynamic",7161 metadata !"fpexcept.strict") #07162 ret <1 x float> %result7163}7164 7165define <2 x double> @constrained_vector_uitofp_v2f64_v2i32(<2 x i32> %x) #0 {7166; CHECK-LABEL: constrained_vector_uitofp_v2f64_v2i32:7167; CHECK: # %bb.0: # %entry7168; CHECK-NEXT: xorpd %xmm1, %xmm17169; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]7170; CHECK-NEXT: movapd {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15]7171; CHECK-NEXT: orpd %xmm1, %xmm07172; CHECK-NEXT: subpd %xmm1, %xmm07173; CHECK-NEXT: retq7174;7175; AVX1-LABEL: constrained_vector_uitofp_v2f64_v2i32:7176; AVX1: # %bb.0: # %entry7177; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero7178; AVX1-NEXT: vmovddup {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15]7179; AVX1-NEXT: # xmm1 = mem[0,0]7180; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm07181; AVX1-NEXT: vsubpd %xmm1, %xmm0, %xmm07182; AVX1-NEXT: retq7183;7184; AVX512-LABEL: constrained_vector_uitofp_v2f64_v2i32:7185; AVX512: # %bb.0: # %entry7186; AVX512-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero7187; AVX512-NEXT: vcvtudq2pd %ymm0, %zmm07188; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm07189; AVX512-NEXT: vzeroupper7190; AVX512-NEXT: retq7191entry:7192 %result = call <2 x double>7193 @llvm.experimental.constrained.uitofp.v2f64.v2i32(<2 x i32> %x,7194 metadata !"round.dynamic",7195 metadata !"fpexcept.strict") #07196 ret <2 x double> %result7197}7198 7199define <2 x float> @constrained_vector_uitofp_v2f32_v2i32(<2 x i32> %x) #0 {7200; CHECK-LABEL: constrained_vector_uitofp_v2f32_v2i32:7201; CHECK: # %bb.0: # %entry7202; CHECK-NEXT: xorpd %xmm1, %xmm17203; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]7204; CHECK-NEXT: movapd {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15]7205; CHECK-NEXT: orpd %xmm1, %xmm07206; CHECK-NEXT: subpd %xmm1, %xmm07207; CHECK-NEXT: cvtpd2ps %xmm0, %xmm07208; CHECK-NEXT: retq7209;7210; AVX1-LABEL: constrained_vector_uitofp_v2f32_v2i32:7211; AVX1: # %bb.0: # %entry7212; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero7213; AVX1-NEXT: vmovddup {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15]7214; AVX1-NEXT: # xmm1 = mem[0,0]7215; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm07216; AVX1-NEXT: vsubpd %xmm1, %xmm0, %xmm07217; AVX1-NEXT: vcvtpd2ps %xmm0, %xmm07218; AVX1-NEXT: retq7219;7220; AVX512-LABEL: constrained_vector_uitofp_v2f32_v2i32:7221; AVX512: # %bb.0: # %entry7222; AVX512-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero7223; AVX512-NEXT: vcvtudq2ps %zmm0, %zmm07224; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm07225; AVX512-NEXT: vzeroupper7226; AVX512-NEXT: retq7227entry:7228 %result = call <2 x float>7229 @llvm.experimental.constrained.uitofp.v2f32.v2i32(<2 x i32> %x,7230 metadata !"round.dynamic",7231 metadata !"fpexcept.strict") #07232 ret <2 x float> %result7233}7234 7235define <2 x double> @constrained_vector_uitofp_v2f64_v2i64(<2 x i64> %x) #0 {7236; CHECK-LABEL: constrained_vector_uitofp_v2f64_v2i64:7237; CHECK: # %bb.0: # %entry7238; CHECK-NEXT: movdqa %xmm0, %xmm17239; CHECK-NEXT: movq %xmm0, %rax7240; CHECK-NEXT: movq %rax, %rcx7241; CHECK-NEXT: shrq %rcx7242; CHECK-NEXT: movl %eax, %edx7243; CHECK-NEXT: andl $1, %edx7244; CHECK-NEXT: orq %rcx, %rdx7245; CHECK-NEXT: testq %rax, %rax7246; CHECK-NEXT: cmovnsq %rax, %rdx7247; CHECK-NEXT: xorps %xmm0, %xmm07248; CHECK-NEXT: cvtsi2sd %rdx, %xmm07249; CHECK-NEXT: jns .LBB179_27250; CHECK-NEXT: # %bb.1:7251; CHECK-NEXT: addsd %xmm0, %xmm07252; CHECK-NEXT: .LBB179_2: # %entry7253; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]7254; CHECK-NEXT: movq %xmm1, %rax7255; CHECK-NEXT: movq %rax, %rcx7256; CHECK-NEXT: shrq %rcx7257; CHECK-NEXT: movl %eax, %edx7258; CHECK-NEXT: andl $1, %edx7259; CHECK-NEXT: orq %rcx, %rdx7260; CHECK-NEXT: testq %rax, %rax7261; CHECK-NEXT: cmovnsq %rax, %rdx7262; CHECK-NEXT: xorps %xmm1, %xmm17263; CHECK-NEXT: cvtsi2sd %rdx, %xmm17264; CHECK-NEXT: jns .LBB179_47265; CHECK-NEXT: # %bb.3:7266; CHECK-NEXT: addsd %xmm1, %xmm17267; CHECK-NEXT: .LBB179_4: # %entry7268; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]7269; CHECK-NEXT: retq7270;7271; AVX1-LABEL: constrained_vector_uitofp_v2f64_v2i64:7272; AVX1: # %bb.0: # %entry7273; AVX1-NEXT: vpextrq $1, %xmm0, %rax7274; AVX1-NEXT: movq %rax, %rcx7275; AVX1-NEXT: shrq %rcx7276; AVX1-NEXT: movl %eax, %edx7277; AVX1-NEXT: andl $1, %edx7278; AVX1-NEXT: orq %rcx, %rdx7279; AVX1-NEXT: testq %rax, %rax7280; AVX1-NEXT: cmovnsq %rax, %rdx7281; AVX1-NEXT: vcvtsi2sd %rdx, %xmm15, %xmm17282; AVX1-NEXT: jns .LBB179_27283; AVX1-NEXT: # %bb.1:7284; AVX1-NEXT: vaddsd %xmm1, %xmm1, %xmm17285; AVX1-NEXT: .LBB179_2: # %entry7286; AVX1-NEXT: vmovq %xmm0, %rax7287; AVX1-NEXT: movq %rax, %rcx7288; AVX1-NEXT: shrq %rcx7289; AVX1-NEXT: movl %eax, %edx7290; AVX1-NEXT: andl $1, %edx7291; AVX1-NEXT: orq %rcx, %rdx7292; AVX1-NEXT: testq %rax, %rax7293; AVX1-NEXT: cmovnsq %rax, %rdx7294; AVX1-NEXT: vcvtsi2sd %rdx, %xmm15, %xmm07295; AVX1-NEXT: jns .LBB179_47296; AVX1-NEXT: # %bb.3:7297; AVX1-NEXT: vaddsd %xmm0, %xmm0, %xmm07298; AVX1-NEXT: .LBB179_4: # %entry7299; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]7300; AVX1-NEXT: retq7301;7302; AVX512F-LABEL: constrained_vector_uitofp_v2f64_v2i64:7303; AVX512F: # %bb.0: # %entry7304; AVX512F-NEXT: vpextrq $1, %xmm0, %rax7305; AVX512F-NEXT: vcvtusi2sd %rax, %xmm15, %xmm17306; AVX512F-NEXT: vmovq %xmm0, %rax7307; AVX512F-NEXT: vcvtusi2sd %rax, %xmm15, %xmm07308; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]7309; AVX512F-NEXT: retq7310;7311; AVX512DQ-LABEL: constrained_vector_uitofp_v2f64_v2i64:7312; AVX512DQ: # %bb.0: # %entry7313; AVX512DQ-NEXT: vmovaps %xmm0, %xmm07314; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm07315; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm07316; AVX512DQ-NEXT: vzeroupper7317; AVX512DQ-NEXT: retq7318entry:7319 %result = call <2 x double>7320 @llvm.experimental.constrained.uitofp.v2f64.v2i64(<2 x i64> %x,7321 metadata !"round.dynamic",7322 metadata !"fpexcept.strict") #07323 ret <2 x double> %result7324}7325 7326define <2 x float> @constrained_vector_uitofp_v2f32_v2i64(<2 x i64> %x) #0 {7327; CHECK-LABEL: constrained_vector_uitofp_v2f32_v2i64:7328; CHECK: # %bb.0: # %entry7329; CHECK-NEXT: movdqa %xmm0, %xmm17330; CHECK-NEXT: movq %xmm0, %rax7331; CHECK-NEXT: movq %rax, %rcx7332; CHECK-NEXT: shrq %rcx7333; CHECK-NEXT: movl %eax, %edx7334; CHECK-NEXT: andl $1, %edx7335; CHECK-NEXT: orq %rcx, %rdx7336; CHECK-NEXT: testq %rax, %rax7337; CHECK-NEXT: cmovnsq %rax, %rdx7338; CHECK-NEXT: xorps %xmm0, %xmm07339; CHECK-NEXT: cvtsi2ss %rdx, %xmm07340; CHECK-NEXT: jns .LBB180_27341; CHECK-NEXT: # %bb.1:7342; CHECK-NEXT: addss %xmm0, %xmm07343; CHECK-NEXT: .LBB180_2: # %entry7344; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]7345; CHECK-NEXT: movq %xmm1, %rax7346; CHECK-NEXT: movq %rax, %rcx7347; CHECK-NEXT: shrq %rcx7348; CHECK-NEXT: movl %eax, %edx7349; CHECK-NEXT: andl $1, %edx7350; CHECK-NEXT: orq %rcx, %rdx7351; CHECK-NEXT: testq %rax, %rax7352; CHECK-NEXT: cmovnsq %rax, %rdx7353; CHECK-NEXT: xorps %xmm1, %xmm17354; CHECK-NEXT: cvtsi2ss %rdx, %xmm17355; CHECK-NEXT: jns .LBB180_47356; CHECK-NEXT: # %bb.3:7357; CHECK-NEXT: addss %xmm1, %xmm17358; CHECK-NEXT: .LBB180_4: # %entry7359; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]7360; CHECK-NEXT: retq7361;7362; AVX1-LABEL: constrained_vector_uitofp_v2f32_v2i64:7363; AVX1: # %bb.0: # %entry7364; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm17365; AVX1-NEXT: vpsrlq $1, %xmm0, %xmm27366; AVX1-NEXT: vpor %xmm1, %xmm2, %xmm17367; AVX1-NEXT: vblendvpd %xmm0, %xmm1, %xmm0, %xmm17368; AVX1-NEXT: vpextrq $1, %xmm1, %rax7369; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm27370; AVX1-NEXT: vmovq %xmm1, %rax7371; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm17372; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],zero,zero7373; AVX1-NEXT: vaddps %xmm1, %xmm1, %xmm27374; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm37375; AVX1-NEXT: vpcmpgtq %xmm0, %xmm3, %xmm07376; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]7377; AVX1-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm07378; AVX1-NEXT: retq7379;7380; AVX512-LABEL: constrained_vector_uitofp_v2f32_v2i64:7381; AVX512: # %bb.0: # %entry7382; AVX512-NEXT: vpextrq $1, %xmm0, %rax7383; AVX512-NEXT: vcvtusi2ss %rax, %xmm15, %xmm17384; AVX512-NEXT: vmovq %xmm0, %rax7385; AVX512-NEXT: vcvtusi2ss %rax, %xmm15, %xmm07386; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]7387; AVX512-NEXT: retq7388entry:7389 %result = call <2 x float>7390 @llvm.experimental.constrained.uitofp.v2f32.v2i64(<2 x i64> %x,7391 metadata !"round.dynamic",7392 metadata !"fpexcept.strict") #07393 ret <2 x float> %result7394}7395 7396define <3 x double> @constrained_vector_uitofp_v3f64_v3i32(<3 x i32> %x) #0 {7397; CHECK-LABEL: constrained_vector_uitofp_v3f64_v3i32:7398; CHECK: # %bb.0: # %entry7399; CHECK-NEXT: movd %xmm0, %eax7400; CHECK-NEXT: cvtsi2sd %rax, %xmm27401; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7402; CHECK-NEXT: movd %xmm1, %eax7403; CHECK-NEXT: xorps %xmm1, %xmm17404; CHECK-NEXT: cvtsi2sd %rax, %xmm17405; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]7406; CHECK-NEXT: movd %xmm0, %eax7407; CHECK-NEXT: xorps %xmm0, %xmm07408; CHECK-NEXT: cvtsi2sd %rax, %xmm07409; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)7410; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)7411; CHECK-NEXT: wait7412; CHECK-NEXT: movapd %xmm2, %xmm07413; CHECK-NEXT: retq7414;7415; AVX1-LABEL: constrained_vector_uitofp_v3f64_v3i32:7416; AVX1: # %bb.0: # %entry7417; AVX1-NEXT: vextractps $2, %xmm0, %eax7418; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm17419; AVX1-NEXT: vmovd %xmm0, %eax7420; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm27421; AVX1-NEXT: vpextrd $1, %xmm0, %eax7422; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm07423; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]7424; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07425; AVX1-NEXT: retq7426;7427; AVX512-LABEL: constrained_vector_uitofp_v3f64_v3i32:7428; AVX512: # %bb.0: # %entry7429; AVX512-NEXT: vextractps $2, %xmm0, %eax7430; AVX512-NEXT: vcvtusi2sd %eax, %xmm15, %xmm17431; AVX512-NEXT: vmovd %xmm0, %eax7432; AVX512-NEXT: vcvtusi2sd %eax, %xmm15, %xmm27433; AVX512-NEXT: vpextrd $1, %xmm0, %eax7434; AVX512-NEXT: vcvtusi2sd %eax, %xmm15, %xmm07435; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]7436; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07437; AVX512-NEXT: retq7438entry:7439 %result = call <3 x double>7440 @llvm.experimental.constrained.uitofp.v3f64.v3i32(<3 x i32> %x,7441 metadata !"round.dynamic",7442 metadata !"fpexcept.strict") #07443 ret <3 x double> %result7444}7445 7446define <3 x float> @constrained_vector_uitofp_v3f32_v3i32(<3 x i32> %x) #0 {7447; CHECK-LABEL: constrained_vector_uitofp_v3f32_v3i32:7448; CHECK: # %bb.0: # %entry7449; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]7450; CHECK-NEXT: movd %xmm1, %eax7451; CHECK-NEXT: xorps %xmm1, %xmm17452; CHECK-NEXT: cvtsi2ss %rax, %xmm17453; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]7454; CHECK-NEXT: movd %xmm2, %eax7455; CHECK-NEXT: xorps %xmm2, %xmm27456; CHECK-NEXT: cvtsi2ss %rax, %xmm27457; CHECK-NEXT: movd %xmm0, %eax7458; CHECK-NEXT: xorps %xmm0, %xmm07459; CHECK-NEXT: cvtsi2ss %rax, %xmm07460; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]7461; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]7462; CHECK-NEXT: retq7463;7464; AVX1-LABEL: constrained_vector_uitofp_v3f32_v3i32:7465; AVX1: # %bb.0: # %entry7466; AVX1-NEXT: vextractps $2, %xmm0, %eax7467; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm17468; AVX1-NEXT: vmovd %xmm0, %eax7469; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm27470; AVX1-NEXT: vpextrd $1, %xmm0, %eax7471; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm07472; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]7473; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]7474; AVX1-NEXT: retq7475;7476; AVX512-LABEL: constrained_vector_uitofp_v3f32_v3i32:7477; AVX512: # %bb.0: # %entry7478; AVX512-NEXT: vextractps $2, %xmm0, %eax7479; AVX512-NEXT: vcvtusi2ss %eax, %xmm15, %xmm17480; AVX512-NEXT: vmovd %xmm0, %eax7481; AVX512-NEXT: vcvtusi2ss %eax, %xmm15, %xmm27482; AVX512-NEXT: vpextrd $1, %xmm0, %eax7483; AVX512-NEXT: vcvtusi2ss %eax, %xmm15, %xmm07484; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]7485; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]7486; AVX512-NEXT: retq7487entry:7488 %result = call <3 x float>7489 @llvm.experimental.constrained.uitofp.v3f32.v3i32(<3 x i32> %x,7490 metadata !"round.dynamic",7491 metadata !"fpexcept.strict") #07492 ret <3 x float> %result7493}7494 7495define <3 x double> @constrained_vector_uitofp_v3f64_v3i64(<3 x i64> %x) #0 {7496; CHECK-LABEL: constrained_vector_uitofp_v3f64_v3i64:7497; CHECK: # %bb.0: # %entry7498; CHECK-NEXT: movq %rdi, %rax7499; CHECK-NEXT: shrq %rax7500; CHECK-NEXT: movl %edi, %ecx7501; CHECK-NEXT: andl $1, %ecx7502; CHECK-NEXT: orq %rax, %rcx7503; CHECK-NEXT: testq %rdi, %rdi7504; CHECK-NEXT: cmovnsq %rdi, %rcx7505; CHECK-NEXT: cvtsi2sd %rcx, %xmm07506; CHECK-NEXT: jns .LBB183_27507; CHECK-NEXT: # %bb.1:7508; CHECK-NEXT: addsd %xmm0, %xmm07509; CHECK-NEXT: .LBB183_2: # %entry7510; CHECK-NEXT: movq %rsi, %rax7511; CHECK-NEXT: shrq %rax7512; CHECK-NEXT: movl %esi, %ecx7513; CHECK-NEXT: andl $1, %ecx7514; CHECK-NEXT: orq %rax, %rcx7515; CHECK-NEXT: testq %rsi, %rsi7516; CHECK-NEXT: cmovnsq %rsi, %rcx7517; CHECK-NEXT: cvtsi2sd %rcx, %xmm17518; CHECK-NEXT: jns .LBB183_47519; CHECK-NEXT: # %bb.3:7520; CHECK-NEXT: addsd %xmm1, %xmm17521; CHECK-NEXT: .LBB183_4: # %entry7522; CHECK-NEXT: movq %rdx, %rax7523; CHECK-NEXT: shrq %rax7524; CHECK-NEXT: movl %edx, %ecx7525; CHECK-NEXT: andl $1, %ecx7526; CHECK-NEXT: orq %rax, %rcx7527; CHECK-NEXT: testq %rdx, %rdx7528; CHECK-NEXT: cmovnsq %rdx, %rcx7529; CHECK-NEXT: cvtsi2sd %rcx, %xmm27530; CHECK-NEXT: jns .LBB183_67531; CHECK-NEXT: # %bb.5:7532; CHECK-NEXT: addsd %xmm2, %xmm27533; CHECK-NEXT: .LBB183_6: # %entry7534; CHECK-NEXT: movsd %xmm2, -{{[0-9]+}}(%rsp)7535; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)7536; CHECK-NEXT: wait7537; CHECK-NEXT: retq7538;7539; AVX1-LABEL: constrained_vector_uitofp_v3f64_v3i64:7540; AVX1: # %bb.0: # %entry7541; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm17542; AVX1-NEXT: vmovq %xmm1, %rax7543; AVX1-NEXT: movq %rax, %rcx7544; AVX1-NEXT: shrq %rcx7545; AVX1-NEXT: movl %eax, %edx7546; AVX1-NEXT: andl $1, %edx7547; AVX1-NEXT: orq %rcx, %rdx7548; AVX1-NEXT: testq %rax, %rax7549; AVX1-NEXT: cmovnsq %rax, %rdx7550; AVX1-NEXT: vcvtsi2sd %rdx, %xmm15, %xmm17551; AVX1-NEXT: jns .LBB183_27552; AVX1-NEXT: # %bb.1:7553; AVX1-NEXT: vaddsd %xmm1, %xmm1, %xmm17554; AVX1-NEXT: .LBB183_2: # %entry7555; AVX1-NEXT: vmovq %xmm0, %rax7556; AVX1-NEXT: movq %rax, %rcx7557; AVX1-NEXT: shrq %rcx7558; AVX1-NEXT: movl %eax, %edx7559; AVX1-NEXT: andl $1, %edx7560; AVX1-NEXT: orq %rcx, %rdx7561; AVX1-NEXT: testq %rax, %rax7562; AVX1-NEXT: cmovnsq %rax, %rdx7563; AVX1-NEXT: vcvtsi2sd %rdx, %xmm15, %xmm27564; AVX1-NEXT: jns .LBB183_47565; AVX1-NEXT: # %bb.3:7566; AVX1-NEXT: vaddsd %xmm2, %xmm2, %xmm27567; AVX1-NEXT: .LBB183_4: # %entry7568; AVX1-NEXT: vpextrq $1, %xmm0, %rax7569; AVX1-NEXT: movq %rax, %rcx7570; AVX1-NEXT: shrq %rcx7571; AVX1-NEXT: movl %eax, %edx7572; AVX1-NEXT: andl $1, %edx7573; AVX1-NEXT: orq %rcx, %rdx7574; AVX1-NEXT: testq %rax, %rax7575; AVX1-NEXT: cmovnsq %rax, %rdx7576; AVX1-NEXT: vcvtsi2sd %rdx, %xmm15, %xmm07577; AVX1-NEXT: jns .LBB183_67578; AVX1-NEXT: # %bb.5:7579; AVX1-NEXT: vaddsd %xmm0, %xmm0, %xmm07580; AVX1-NEXT: .LBB183_6: # %entry7581; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]7582; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07583; AVX1-NEXT: retq7584;7585; AVX512-LABEL: constrained_vector_uitofp_v3f64_v3i64:7586; AVX512: # %bb.0: # %entry7587; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm17588; AVX512-NEXT: vmovq %xmm1, %rax7589; AVX512-NEXT: vcvtusi2sd %rax, %xmm15, %xmm17590; AVX512-NEXT: vmovq %xmm0, %rax7591; AVX512-NEXT: vcvtusi2sd %rax, %xmm15, %xmm27592; AVX512-NEXT: vpextrq $1, %xmm0, %rax7593; AVX512-NEXT: vcvtusi2sd %rax, %xmm15, %xmm07594; AVX512-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]7595; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07596; AVX512-NEXT: retq7597entry:7598 %result = call <3 x double>7599 @llvm.experimental.constrained.uitofp.v3f64.v3i64(<3 x i64> %x,7600 metadata !"round.dynamic",7601 metadata !"fpexcept.strict") #07602 ret <3 x double> %result7603}7604 7605define <3 x float> @constrained_vector_uitofp_v3f32_v3i64(<3 x i64> %x) #0 {7606; CHECK-LABEL: constrained_vector_uitofp_v3f32_v3i64:7607; CHECK: # %bb.0: # %entry7608; CHECK-NEXT: movq %rdx, %rax7609; CHECK-NEXT: shrq %rax7610; CHECK-NEXT: movl %edx, %ecx7611; CHECK-NEXT: andl $1, %ecx7612; CHECK-NEXT: orq %rax, %rcx7613; CHECK-NEXT: testq %rdx, %rdx7614; CHECK-NEXT: cmovnsq %rdx, %rcx7615; CHECK-NEXT: cvtsi2ss %rcx, %xmm17616; CHECK-NEXT: jns .LBB184_27617; CHECK-NEXT: # %bb.1:7618; CHECK-NEXT: addss %xmm1, %xmm17619; CHECK-NEXT: .LBB184_2: # %entry7620; CHECK-NEXT: movq %rdi, %rax7621; CHECK-NEXT: shrq %rax7622; CHECK-NEXT: movl %edi, %ecx7623; CHECK-NEXT: andl $1, %ecx7624; CHECK-NEXT: orq %rax, %rcx7625; CHECK-NEXT: testq %rdi, %rdi7626; CHECK-NEXT: cmovnsq %rdi, %rcx7627; CHECK-NEXT: cvtsi2ss %rcx, %xmm07628; CHECK-NEXT: jns .LBB184_47629; CHECK-NEXT: # %bb.3:7630; CHECK-NEXT: addss %xmm0, %xmm07631; CHECK-NEXT: .LBB184_4: # %entry7632; CHECK-NEXT: movq %rsi, %rax7633; CHECK-NEXT: shrq %rax7634; CHECK-NEXT: movl %esi, %ecx7635; CHECK-NEXT: andl $1, %ecx7636; CHECK-NEXT: orq %rax, %rcx7637; CHECK-NEXT: testq %rsi, %rsi7638; CHECK-NEXT: cmovnsq %rsi, %rcx7639; CHECK-NEXT: cvtsi2ss %rcx, %xmm27640; CHECK-NEXT: jns .LBB184_67641; CHECK-NEXT: # %bb.5:7642; CHECK-NEXT: addss %xmm2, %xmm27643; CHECK-NEXT: .LBB184_6: # %entry7644; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]7645; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]7646; CHECK-NEXT: retq7647;7648; AVX1-LABEL: constrained_vector_uitofp_v3f32_v3i64:7649; AVX1: # %bb.0: # %entry7650; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm17651; AVX1-NEXT: vmovq %xmm1, %rax7652; AVX1-NEXT: movq %rax, %rcx7653; AVX1-NEXT: shrq %rcx7654; AVX1-NEXT: movl %eax, %edx7655; AVX1-NEXT: andl $1, %edx7656; AVX1-NEXT: orq %rcx, %rdx7657; AVX1-NEXT: testq %rax, %rax7658; AVX1-NEXT: cmovnsq %rax, %rdx7659; AVX1-NEXT: vcvtsi2ss %rdx, %xmm15, %xmm17660; AVX1-NEXT: jns .LBB184_27661; AVX1-NEXT: # %bb.1:7662; AVX1-NEXT: vaddss %xmm1, %xmm1, %xmm17663; AVX1-NEXT: .LBB184_2: # %entry7664; AVX1-NEXT: vmovq %xmm0, %rax7665; AVX1-NEXT: movq %rax, %rcx7666; AVX1-NEXT: shrq %rcx7667; AVX1-NEXT: movl %eax, %edx7668; AVX1-NEXT: andl $1, %edx7669; AVX1-NEXT: orq %rcx, %rdx7670; AVX1-NEXT: testq %rax, %rax7671; AVX1-NEXT: cmovnsq %rax, %rdx7672; AVX1-NEXT: vcvtsi2ss %rdx, %xmm15, %xmm27673; AVX1-NEXT: jns .LBB184_47674; AVX1-NEXT: # %bb.3:7675; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm27676; AVX1-NEXT: .LBB184_4: # %entry7677; AVX1-NEXT: vpextrq $1, %xmm0, %rax7678; AVX1-NEXT: movq %rax, %rcx7679; AVX1-NEXT: shrq %rcx7680; AVX1-NEXT: movl %eax, %edx7681; AVX1-NEXT: andl $1, %edx7682; AVX1-NEXT: orq %rcx, %rdx7683; AVX1-NEXT: testq %rax, %rax7684; AVX1-NEXT: cmovnsq %rax, %rdx7685; AVX1-NEXT: vcvtsi2ss %rdx, %xmm15, %xmm07686; AVX1-NEXT: jns .LBB184_67687; AVX1-NEXT: # %bb.5:7688; AVX1-NEXT: vaddss %xmm0, %xmm0, %xmm07689; AVX1-NEXT: .LBB184_6: # %entry7690; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]7691; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]7692; AVX1-NEXT: vzeroupper7693; AVX1-NEXT: retq7694;7695; AVX512-LABEL: constrained_vector_uitofp_v3f32_v3i64:7696; AVX512: # %bb.0: # %entry7697; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm17698; AVX512-NEXT: vmovq %xmm1, %rax7699; AVX512-NEXT: vcvtusi2ss %rax, %xmm15, %xmm17700; AVX512-NEXT: vmovq %xmm0, %rax7701; AVX512-NEXT: vcvtusi2ss %rax, %xmm15, %xmm27702; AVX512-NEXT: vpextrq $1, %xmm0, %rax7703; AVX512-NEXT: vcvtusi2ss %rax, %xmm15, %xmm07704; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]7705; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]7706; AVX512-NEXT: vzeroupper7707; AVX512-NEXT: retq7708entry:7709 %result = call <3 x float>7710 @llvm.experimental.constrained.uitofp.v3f32.v3i64(<3 x i64> %x,7711 metadata !"round.dynamic",7712 metadata !"fpexcept.strict") #07713 ret <3 x float> %result7714}7715 7716define <4 x double> @constrained_vector_uitofp_v4f64_v4i32(<4 x i32> %x) #0 {7717; CHECK-LABEL: constrained_vector_uitofp_v4f64_v4i32:7718; CHECK: # %bb.0: # %entry7719; CHECK-NEXT: xorpd %xmm2, %xmm27720; CHECK-NEXT: movapd %xmm0, %xmm17721; CHECK-NEXT: unpckhps {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]7722; CHECK-NEXT: movapd {{.*#+}} xmm3 = [4.503599627370496E+15,4.503599627370496E+15]7723; CHECK-NEXT: orpd %xmm3, %xmm17724; CHECK-NEXT: subpd %xmm3, %xmm17725; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]7726; CHECK-NEXT: orpd %xmm3, %xmm07727; CHECK-NEXT: subpd %xmm3, %xmm07728; CHECK-NEXT: retq7729;7730; AVX1-LABEL: constrained_vector_uitofp_v4f64_v4i32:7731; AVX1: # %bb.0: # %entry7732; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm17733; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]7734; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero7735; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07736; AVX1-NEXT: vbroadcastsd {{.*#+}} ymm1 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]7737; AVX1-NEXT: vorpd %ymm1, %ymm0, %ymm07738; AVX1-NEXT: vsubpd %ymm1, %ymm0, %ymm07739; AVX1-NEXT: retq7740;7741; AVX512-LABEL: constrained_vector_uitofp_v4f64_v4i32:7742; AVX512: # %bb.0: # %entry7743; AVX512-NEXT: vmovaps %xmm0, %xmm07744; AVX512-NEXT: vcvtudq2pd %ymm0, %zmm07745; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm07746; AVX512-NEXT: retq7747entry:7748 %result = call <4 x double>7749 @llvm.experimental.constrained.uitofp.v4f64.v4i32(<4 x i32> %x,7750 metadata !"round.dynamic",7751 metadata !"fpexcept.strict") #07752 ret <4 x double> %result7753}7754 7755define <4 x float> @constrained_vector_uitofp_v4f32_v4i32(<4 x i32> %x) #0 {7756; CHECK-LABEL: constrained_vector_uitofp_v4f32_v4i32:7757; CHECK: # %bb.0: # %entry7758; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535]7759; CHECK-NEXT: pand %xmm0, %xmm17760; CHECK-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm17761; CHECK-NEXT: psrld $16, %xmm07762; CHECK-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm07763; CHECK-NEXT: subps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm07764; CHECK-NEXT: addps %xmm1, %xmm07765; CHECK-NEXT: retq7766;7767; AVX1-LABEL: constrained_vector_uitofp_v4f32_v4i32:7768; AVX1: # %bb.0: # %entry7769; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]7770; AVX1-NEXT: vpsrld $16, %xmm0, %xmm07771; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]7772; AVX1-NEXT: vsubps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm07773; AVX1-NEXT: vaddps %xmm0, %xmm1, %xmm07774; AVX1-NEXT: retq7775;7776; AVX512-LABEL: constrained_vector_uitofp_v4f32_v4i32:7777; AVX512: # %bb.0: # %entry7778; AVX512-NEXT: vmovaps %xmm0, %xmm07779; AVX512-NEXT: vcvtudq2ps %zmm0, %zmm07780; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm07781; AVX512-NEXT: vzeroupper7782; AVX512-NEXT: retq7783entry:7784 %result = call <4 x float>7785 @llvm.experimental.constrained.uitofp.v4f32.v4i32(<4 x i32> %x,7786 metadata !"round.dynamic",7787 metadata !"fpexcept.strict") #07788 ret <4 x float> %result7789}7790 7791define <4 x double> @constrained_vector_uitofp_v4f64_v4i64(<4 x i64> %x) #0 {7792; CHECK-LABEL: constrained_vector_uitofp_v4f64_v4i64:7793; CHECK: # %bb.0: # %entry7794; CHECK-NEXT: movdqa %xmm0, %xmm27795; CHECK-NEXT: movq %xmm0, %rax7796; CHECK-NEXT: movq %rax, %rcx7797; CHECK-NEXT: shrq %rcx7798; CHECK-NEXT: movl %eax, %edx7799; CHECK-NEXT: andl $1, %edx7800; CHECK-NEXT: orq %rcx, %rdx7801; CHECK-NEXT: testq %rax, %rax7802; CHECK-NEXT: cmovnsq %rax, %rdx7803; CHECK-NEXT: xorps %xmm0, %xmm07804; CHECK-NEXT: cvtsi2sd %rdx, %xmm07805; CHECK-NEXT: jns .LBB187_27806; CHECK-NEXT: # %bb.1:7807; CHECK-NEXT: addsd %xmm0, %xmm07808; CHECK-NEXT: .LBB187_2: # %entry7809; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]7810; CHECK-NEXT: movq %xmm2, %rax7811; CHECK-NEXT: movq %rax, %rcx7812; CHECK-NEXT: shrq %rcx7813; CHECK-NEXT: movl %eax, %edx7814; CHECK-NEXT: andl $1, %edx7815; CHECK-NEXT: orq %rcx, %rdx7816; CHECK-NEXT: testq %rax, %rax7817; CHECK-NEXT: cmovnsq %rax, %rdx7818; CHECK-NEXT: cvtsi2sd %rdx, %xmm37819; CHECK-NEXT: jns .LBB187_47820; CHECK-NEXT: # %bb.3:7821; CHECK-NEXT: addsd %xmm3, %xmm37822; CHECK-NEXT: .LBB187_4: # %entry7823; CHECK-NEXT: movq %xmm1, %rax7824; CHECK-NEXT: movq %rax, %rcx7825; CHECK-NEXT: shrq %rcx7826; CHECK-NEXT: movl %eax, %edx7827; CHECK-NEXT: andl $1, %edx7828; CHECK-NEXT: orq %rcx, %rdx7829; CHECK-NEXT: testq %rax, %rax7830; CHECK-NEXT: cmovnsq %rax, %rdx7831; CHECK-NEXT: xorps %xmm2, %xmm27832; CHECK-NEXT: cvtsi2sd %rdx, %xmm27833; CHECK-NEXT: jns .LBB187_67834; CHECK-NEXT: # %bb.5:7835; CHECK-NEXT: addsd %xmm2, %xmm27836; CHECK-NEXT: .LBB187_6: # %entry7837; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm3[0]7838; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]7839; CHECK-NEXT: movq %xmm1, %rax7840; CHECK-NEXT: movq %rax, %rcx7841; CHECK-NEXT: shrq %rcx7842; CHECK-NEXT: movl %eax, %edx7843; CHECK-NEXT: andl $1, %edx7844; CHECK-NEXT: orq %rcx, %rdx7845; CHECK-NEXT: testq %rax, %rax7846; CHECK-NEXT: cmovnsq %rax, %rdx7847; CHECK-NEXT: xorps %xmm1, %xmm17848; CHECK-NEXT: cvtsi2sd %rdx, %xmm17849; CHECK-NEXT: jns .LBB187_87850; CHECK-NEXT: # %bb.7:7851; CHECK-NEXT: addsd %xmm1, %xmm17852; CHECK-NEXT: .LBB187_8: # %entry7853; CHECK-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm1[0]7854; CHECK-NEXT: movapd %xmm2, %xmm17855; CHECK-NEXT: retq7856;7857; AVX1-LABEL: constrained_vector_uitofp_v4f64_v4i64:7858; AVX1: # %bb.0: # %entry7859; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm17860; AVX1-NEXT: vpextrd $2, %xmm1, %eax7861; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm27862; AVX1-NEXT: vmovd %xmm1, %eax7863; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm37864; AVX1-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm3[0],xmm2[0]7865; AVX1-NEXT: vextractps $2, %xmm0, %eax7866; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm37867; AVX1-NEXT: vmovq %xmm0, %rax7868; AVX1-NEXT: movl %eax, %eax7869; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm47870; AVX1-NEXT: vunpcklpd {{.*#+}} xmm3 = xmm4[0],xmm3[0]7871; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm27872; AVX1-NEXT: vpextrd $3, %xmm1, %eax7873; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm37874; AVX1-NEXT: vpextrd $1, %xmm1, %eax7875; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm17876; AVX1-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm3[0]7877; AVX1-NEXT: vpextrd $3, %xmm0, %eax7878; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm37879; AVX1-NEXT: vpextrd $1, %xmm0, %eax7880; AVX1-NEXT: vcvtsi2sd %rax, %xmm15, %xmm07881; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm3[0]7882; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07883; AVX1-NEXT: vmulpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm07884; AVX1-NEXT: vaddpd %ymm2, %ymm0, %ymm07885; AVX1-NEXT: retq7886;7887; AVX512F-LABEL: constrained_vector_uitofp_v4f64_v4i64:7888; AVX512F: # %bb.0: # %entry7889; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm17890; AVX512F-NEXT: vpextrq $1, %xmm1, %rax7891; AVX512F-NEXT: vcvtusi2sd %rax, %xmm15, %xmm27892; AVX512F-NEXT: vmovq %xmm1, %rax7893; AVX512F-NEXT: vcvtusi2sd %rax, %xmm15, %xmm17894; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]7895; AVX512F-NEXT: vpextrq $1, %xmm0, %rax7896; AVX512F-NEXT: vcvtusi2sd %rax, %xmm15, %xmm27897; AVX512F-NEXT: vmovq %xmm0, %rax7898; AVX512F-NEXT: vcvtusi2sd %rax, %xmm15, %xmm07899; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]7900; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm07901; AVX512F-NEXT: retq7902;7903; AVX512DQ-LABEL: constrained_vector_uitofp_v4f64_v4i64:7904; AVX512DQ: # %bb.0: # %entry7905; AVX512DQ-NEXT: vmovaps %ymm0, %ymm07906; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm07907; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm07908; AVX512DQ-NEXT: retq7909entry:7910 %result = call <4 x double>7911 @llvm.experimental.constrained.uitofp.v4f64.v4i64(<4 x i64> %x,7912 metadata !"round.dynamic",7913 metadata !"fpexcept.strict") #07914 ret <4 x double> %result7915}7916 7917define <4 x float> @constrained_vector_uitofp_v4f32_v4i64(<4 x i64> %x) #0 {7918; CHECK-LABEL: constrained_vector_uitofp_v4f32_v4i64:7919; CHECK: # %bb.0: # %entry7920; CHECK-NEXT: movq %xmm1, %rax7921; CHECK-NEXT: movq %rax, %rcx7922; CHECK-NEXT: shrq %rcx7923; CHECK-NEXT: movl %eax, %edx7924; CHECK-NEXT: andl $1, %edx7925; CHECK-NEXT: orq %rcx, %rdx7926; CHECK-NEXT: testq %rax, %rax7927; CHECK-NEXT: cmovnsq %rax, %rdx7928; CHECK-NEXT: cvtsi2ss %rdx, %xmm27929; CHECK-NEXT: jns .LBB188_27930; CHECK-NEXT: # %bb.1:7931; CHECK-NEXT: addss %xmm2, %xmm27932; CHECK-NEXT: .LBB188_2: # %entry7933; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]7934; CHECK-NEXT: movq %xmm1, %rax7935; CHECK-NEXT: movq %rax, %rcx7936; CHECK-NEXT: shrq %rcx7937; CHECK-NEXT: movl %eax, %edx7938; CHECK-NEXT: andl $1, %edx7939; CHECK-NEXT: orq %rcx, %rdx7940; CHECK-NEXT: testq %rax, %rax7941; CHECK-NEXT: cmovnsq %rax, %rdx7942; CHECK-NEXT: cvtsi2ss %rdx, %xmm37943; CHECK-NEXT: jns .LBB188_47944; CHECK-NEXT: # %bb.3:7945; CHECK-NEXT: addss %xmm3, %xmm37946; CHECK-NEXT: .LBB188_4: # %entry7947; CHECK-NEXT: movq %xmm0, %rax7948; CHECK-NEXT: movq %rax, %rcx7949; CHECK-NEXT: shrq %rcx7950; CHECK-NEXT: movl %eax, %edx7951; CHECK-NEXT: andl $1, %edx7952; CHECK-NEXT: orq %rcx, %rdx7953; CHECK-NEXT: testq %rax, %rax7954; CHECK-NEXT: cmovnsq %rax, %rdx7955; CHECK-NEXT: xorps %xmm1, %xmm17956; CHECK-NEXT: cvtsi2ss %rdx, %xmm17957; CHECK-NEXT: jns .LBB188_67958; CHECK-NEXT: # %bb.5:7959; CHECK-NEXT: addss %xmm1, %xmm17960; CHECK-NEXT: .LBB188_6: # %entry7961; CHECK-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]7962; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]7963; CHECK-NEXT: movq %xmm0, %rax7964; CHECK-NEXT: movq %rax, %rcx7965; CHECK-NEXT: shrq %rcx7966; CHECK-NEXT: movl %eax, %edx7967; CHECK-NEXT: andl $1, %edx7968; CHECK-NEXT: orq %rcx, %rdx7969; CHECK-NEXT: testq %rax, %rax7970; CHECK-NEXT: cmovnsq %rax, %rdx7971; CHECK-NEXT: xorps %xmm0, %xmm07972; CHECK-NEXT: cvtsi2ss %rdx, %xmm07973; CHECK-NEXT: jns .LBB188_87974; CHECK-NEXT: # %bb.7:7975; CHECK-NEXT: addss %xmm0, %xmm07976; CHECK-NEXT: .LBB188_8: # %entry7977; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]7978; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]7979; CHECK-NEXT: movaps %xmm1, %xmm07980; CHECK-NEXT: retq7981;7982; AVX1-LABEL: constrained_vector_uitofp_v4f32_v4i64:7983; AVX1: # %bb.0: # %entry7984; AVX1-NEXT: vpsrlq $1, %xmm0, %xmm17985; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm27986; AVX1-NEXT: vpsrlq $1, %xmm2, %xmm37987; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm17988; AVX1-NEXT: vandpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm37989; AVX1-NEXT: vorpd %ymm3, %ymm1, %ymm17990; AVX1-NEXT: vblendvpd %ymm0, %ymm1, %ymm0, %ymm17991; AVX1-NEXT: vpextrq $1, %xmm1, %rax7992; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm37993; AVX1-NEXT: vmovq %xmm1, %rax7994; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm47995; AVX1-NEXT: vinsertps {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[2,3]7996; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm17997; AVX1-NEXT: vmovq %xmm1, %rax7998; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm47999; AVX1-NEXT: vinsertps {{.*#+}} xmm3 = xmm3[0,1],xmm4[0],xmm3[3]8000; AVX1-NEXT: vpextrq $1, %xmm1, %rax8001; AVX1-NEXT: vcvtsi2ss %rax, %xmm15, %xmm18002; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm3[0,1,2],xmm1[0]8003; AVX1-NEXT: vaddps %xmm1, %xmm1, %xmm38004; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm08005; AVX1-NEXT: vblendvps %xmm0, %xmm3, %xmm1, %xmm08006; AVX1-NEXT: vzeroupper8007; AVX1-NEXT: retq8008;8009; AVX512F-LABEL: constrained_vector_uitofp_v4f32_v4i64:8010; AVX512F: # %bb.0: # %entry8011; AVX512F-NEXT: vpextrq $1, %xmm0, %rax8012; AVX512F-NEXT: vcvtusi2ss %rax, %xmm15, %xmm18013; AVX512F-NEXT: vmovq %xmm0, %rax8014; AVX512F-NEXT: vcvtusi2ss %rax, %xmm15, %xmm28015; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3]8016; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm08017; AVX512F-NEXT: vmovq %xmm0, %rax8018; AVX512F-NEXT: vcvtusi2ss %rax, %xmm15, %xmm28019; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3]8020; AVX512F-NEXT: vpextrq $1, %xmm0, %rax8021; AVX512F-NEXT: vcvtusi2ss %rax, %xmm15, %xmm08022; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]8023; AVX512F-NEXT: vzeroupper8024; AVX512F-NEXT: retq8025;8026; AVX512DQ-LABEL: constrained_vector_uitofp_v4f32_v4i64:8027; AVX512DQ: # %bb.0: # %entry8028; AVX512DQ-NEXT: vmovaps %ymm0, %ymm08029; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm08030; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm08031; AVX512DQ-NEXT: vzeroupper8032; AVX512DQ-NEXT: retq8033entry:8034 %result = call <4 x float>8035 @llvm.experimental.constrained.uitofp.v4f32.v4i64(<4 x i64> %x,8036 metadata !"round.dynamic",8037 metadata !"fpexcept.strict") #08038 ret <4 x float> %result8039}8040 8041; Simple test to make sure we don't fuse vselect+strict_fadd into a masked operation.8042define <16 x float> @vpaddd_mask_test(<16 x float> %i, <16 x float> %j, <16 x i32> %mask1) nounwind readnone strictfp {8043; CHECK-LABEL: vpaddd_mask_test:8044; CHECK: # %bb.0:8045; CHECK-NEXT: pxor %xmm10, %xmm108046; CHECK-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm88047; CHECK-NEXT: pcmpeqd %xmm10, %xmm88048; CHECK-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm98049; CHECK-NEXT: pcmpeqd %xmm10, %xmm98050; CHECK-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm118051; CHECK-NEXT: pcmpeqd %xmm10, %xmm118052; CHECK-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm108053; CHECK-NEXT: addps %xmm3, %xmm78054; CHECK-NEXT: addps %xmm2, %xmm68055; CHECK-NEXT: addps %xmm1, %xmm58056; CHECK-NEXT: addps %xmm0, %xmm48057; CHECK-NEXT: andps %xmm10, %xmm08058; CHECK-NEXT: andnps %xmm4, %xmm108059; CHECK-NEXT: orps %xmm10, %xmm08060; CHECK-NEXT: andps %xmm11, %xmm18061; CHECK-NEXT: andnps %xmm5, %xmm118062; CHECK-NEXT: orps %xmm11, %xmm18063; CHECK-NEXT: andps %xmm9, %xmm28064; CHECK-NEXT: andnps %xmm6, %xmm98065; CHECK-NEXT: orps %xmm9, %xmm28066; CHECK-NEXT: andps %xmm8, %xmm38067; CHECK-NEXT: andnps %xmm7, %xmm88068; CHECK-NEXT: orps %xmm8, %xmm38069; CHECK-NEXT: retq8070;8071; AVX1-LABEL: vpaddd_mask_test:8072; AVX1: # %bb.0:8073; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm68074; AVX1-NEXT: vpxor %xmm7, %xmm7, %xmm78075; AVX1-NEXT: vpcmpeqd %xmm7, %xmm6, %xmm68076; AVX1-NEXT: vpcmpeqd %xmm7, %xmm5, %xmm58077; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm58078; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm68079; AVX1-NEXT: vpcmpeqd %xmm7, %xmm6, %xmm68080; AVX1-NEXT: vpcmpeqd %xmm7, %xmm4, %xmm48081; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm48082; AVX1-NEXT: vaddps %ymm3, %ymm1, %ymm38083; AVX1-NEXT: vaddps %ymm2, %ymm0, %ymm28084; AVX1-NEXT: vblendvps %ymm4, %ymm0, %ymm2, %ymm08085; AVX1-NEXT: vblendvps %ymm5, %ymm1, %ymm3, %ymm18086; AVX1-NEXT: retq8087;8088; AVX512-LABEL: vpaddd_mask_test:8089; AVX512: # %bb.0:8090; AVX512-NEXT: vptestmd %zmm2, %zmm2, %k18091; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm18092; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}8093; AVX512-NEXT: retq8094 %mask = icmp ne <16 x i32> %mask1, zeroinitializer8095 %x = call <16 x float> @llvm.experimental.constrained.fadd.v16f32(<16 x float> %i, <16 x float> %j, metadata !"round.dynamic", metadata !"fpexcept.strict") #08096 %r = select <16 x i1> %mask, <16 x float> %x, <16 x float> %i8097 ret <16 x float> %r8098}8099 8100define <1 x float> @constrained_vector_tan_v1f32() #0 {8101; CHECK-LABEL: constrained_vector_tan_v1f32:8102; CHECK: # %bb.0: # %entry8103; CHECK-NEXT: pushq %rax8104; CHECK-NEXT: .cfi_def_cfa_offset 168105; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8106; CHECK-NEXT: callq tanf@PLT8107; CHECK-NEXT: popq %rax8108; CHECK-NEXT: .cfi_def_cfa_offset 88109; CHECK-NEXT: retq8110;8111; AVX-LABEL: constrained_vector_tan_v1f32:8112; AVX: # %bb.0: # %entry8113; AVX-NEXT: pushq %rax8114; AVX-NEXT: .cfi_def_cfa_offset 168115; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8116; AVX-NEXT: callq tanf@PLT8117; AVX-NEXT: popq %rax8118; AVX-NEXT: .cfi_def_cfa_offset 88119; AVX-NEXT: retq8120entry:8121 %tan = call <1 x float> @llvm.experimental.constrained.tan.v1f32(8122 <1 x float> <float 42.0>,8123 metadata !"round.dynamic",8124 metadata !"fpexcept.strict") #08125 ret <1 x float> %tan8126}8127 8128define <2 x double> @constrained_vector_tan_v2f64() #0 {8129; CHECK-LABEL: constrained_vector_tan_v2f64:8130; CHECK: # %bb.0: # %entry8131; CHECK-NEXT: subq $24, %rsp8132; CHECK-NEXT: .cfi_def_cfa_offset 328133; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8134; CHECK-NEXT: callq tan@PLT8135; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8136; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8137; CHECK-NEXT: callq tan@PLT8138; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8139; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8140; CHECK-NEXT: addq $24, %rsp8141; CHECK-NEXT: .cfi_def_cfa_offset 88142; CHECK-NEXT: retq8143;8144; AVX-LABEL: constrained_vector_tan_v2f64:8145; AVX: # %bb.0: # %entry8146; AVX-NEXT: subq $24, %rsp8147; AVX-NEXT: .cfi_def_cfa_offset 328148; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8149; AVX-NEXT: callq tan@PLT8150; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8151; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8152; AVX-NEXT: callq tan@PLT8153; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8154; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8155; AVX-NEXT: addq $24, %rsp8156; AVX-NEXT: .cfi_def_cfa_offset 88157; AVX-NEXT: retq8158entry:8159 %tan = call <2 x double> @llvm.experimental.constrained.tan.v2f64(8160 <2 x double> <double 42.0, double 42.1>,8161 metadata !"round.dynamic",8162 metadata !"fpexcept.strict") #08163 ret <2 x double> %tan8164}8165 8166define <3 x float> @constrained_vector_tan_v3f32() #0 {8167; CHECK-LABEL: constrained_vector_tan_v3f32:8168; CHECK: # %bb.0: # %entry8169; CHECK-NEXT: subq $40, %rsp8170; CHECK-NEXT: .cfi_def_cfa_offset 488171; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8172; CHECK-NEXT: callq tanf@PLT8173; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8174; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8175; CHECK-NEXT: callq tanf@PLT8176; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8177; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8178; CHECK-NEXT: callq tanf@PLT8179; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload8180; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]8181; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8182; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8183; CHECK-NEXT: movaps %xmm1, %xmm08184; CHECK-NEXT: addq $40, %rsp8185; CHECK-NEXT: .cfi_def_cfa_offset 88186; CHECK-NEXT: retq8187;8188; AVX-LABEL: constrained_vector_tan_v3f32:8189; AVX: # %bb.0: # %entry8190; AVX-NEXT: subq $40, %rsp8191; AVX-NEXT: .cfi_def_cfa_offset 488192; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8193; AVX-NEXT: callq tanf@PLT8194; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8195; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8196; AVX-NEXT: callq tanf@PLT8197; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8198; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8199; AVX-NEXT: callq tanf@PLT8200; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload8201; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]8202; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8203; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]8204; AVX-NEXT: addq $40, %rsp8205; AVX-NEXT: .cfi_def_cfa_offset 88206; AVX-NEXT: retq8207entry:8208 %tan = call <3 x float> @llvm.experimental.constrained.tan.v3f32(8209 <3 x float> <float 42.0, float 43.0, float 44.0>,8210 metadata !"round.dynamic",8211 metadata !"fpexcept.strict") #08212 ret <3 x float> %tan8213}8214 8215define <3 x double> @constrained_vector_tan_v3f64() #0 {8216; CHECK-LABEL: constrained_vector_tan_v3f64:8217; CHECK: # %bb.0: # %entry8218; CHECK-NEXT: subq $24, %rsp8219; CHECK-NEXT: .cfi_def_cfa_offset 328220; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8221; CHECK-NEXT: callq tan@PLT8222; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill8223; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8224; CHECK-NEXT: callq tan@PLT8225; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill8226; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8227; CHECK-NEXT: callq tan@PLT8228; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)8229; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)8230; CHECK-NEXT: wait8231; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload8232; CHECK-NEXT: # xmm0 = mem[0],zero8233; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload8234; CHECK-NEXT: # xmm1 = mem[0],zero8235; CHECK-NEXT: addq $24, %rsp8236; CHECK-NEXT: .cfi_def_cfa_offset 88237; CHECK-NEXT: retq8238;8239; AVX-LABEL: constrained_vector_tan_v3f64:8240; AVX: # %bb.0: # %entry8241; AVX-NEXT: subq $40, %rsp8242; AVX-NEXT: .cfi_def_cfa_offset 488243; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8244; AVX-NEXT: callq tan@PLT8245; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8246; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8247; AVX-NEXT: callq tan@PLT8248; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8249; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8250; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill8251; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8252; AVX-NEXT: vzeroupper8253; AVX-NEXT: callq tan@PLT8254; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload8255; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm08256; AVX-NEXT: addq $40, %rsp8257; AVX-NEXT: .cfi_def_cfa_offset 88258; AVX-NEXT: retq8259entry:8260 %tan = call <3 x double> @llvm.experimental.constrained.tan.v3f64(8261 <3 x double> <double 42.0, double 42.1, double 42.2>,8262 metadata !"round.dynamic",8263 metadata !"fpexcept.strict") #08264 ret <3 x double> %tan8265}8266 8267define <4 x double> @constrained_vector_tan_v4f64() #0 {8268; CHECK-LABEL: constrained_vector_tan_v4f64:8269; CHECK: # %bb.0: # %entry8270; CHECK-NEXT: subq $40, %rsp8271; CHECK-NEXT: .cfi_def_cfa_offset 488272; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8273; CHECK-NEXT: callq tan@PLT8274; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8275; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8276; CHECK-NEXT: callq tan@PLT8277; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8278; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8279; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8280; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8281; CHECK-NEXT: callq tan@PLT8282; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8283; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8284; CHECK-NEXT: callq tan@PLT8285; CHECK-NEXT: movaps %xmm0, %xmm18286; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8287; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8288; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload8289; CHECK-NEXT: addq $40, %rsp8290; CHECK-NEXT: .cfi_def_cfa_offset 88291; CHECK-NEXT: retq8292;8293; AVX-LABEL: constrained_vector_tan_v4f64:8294; AVX: # %bb.0: # %entry8295; AVX-NEXT: subq $40, %rsp8296; AVX-NEXT: .cfi_def_cfa_offset 488297; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8298; AVX-NEXT: callq tan@PLT8299; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8300; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8301; AVX-NEXT: callq tan@PLT8302; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8303; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8304; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8305; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8306; AVX-NEXT: callq tan@PLT8307; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8308; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8309; AVX-NEXT: callq tan@PLT8310; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8311; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8312; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload8313; AVX-NEXT: addq $40, %rsp8314; AVX-NEXT: .cfi_def_cfa_offset 88315; AVX-NEXT: retq8316entry:8317 %tan = call <4 x double> @llvm.experimental.constrained.tan.v4f64(8318 <4 x double> <double 42.0, double 42.1,8319 double 42.2, double 42.3>,8320 metadata !"round.dynamic",8321 metadata !"fpexcept.strict") #08322 ret <4 x double> %tan8323}8324 8325define <1 x float> @constrained_vector_acos_v1f32() #0 {8326; CHECK-LABEL: constrained_vector_acos_v1f32:8327; CHECK: # %bb.0: # %entry8328; CHECK-NEXT: pushq %rax8329; CHECK-NEXT: .cfi_def_cfa_offset 168330; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8331; CHECK-NEXT: callq acosf@PLT8332; CHECK-NEXT: popq %rax8333; CHECK-NEXT: .cfi_def_cfa_offset 88334; CHECK-NEXT: retq8335;8336; AVX-LABEL: constrained_vector_acos_v1f32:8337; AVX: # %bb.0: # %entry8338; AVX-NEXT: pushq %rax8339; AVX-NEXT: .cfi_def_cfa_offset 168340; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8341; AVX-NEXT: callq acosf@PLT8342; AVX-NEXT: popq %rax8343; AVX-NEXT: .cfi_def_cfa_offset 88344; AVX-NEXT: retq8345entry:8346 %acos = call <1 x float> @llvm.experimental.constrained.acos.v1f32(8347 <1 x float> <float 42.0>,8348 metadata !"round.dynamic",8349 metadata !"fpexcept.strict") #08350 ret <1 x float> %acos8351}8352 8353define <2 x double> @constrained_vector_acos_v2f64() #0 {8354; CHECK-LABEL: constrained_vector_acos_v2f64:8355; CHECK: # %bb.0: # %entry8356; CHECK-NEXT: subq $24, %rsp8357; CHECK-NEXT: .cfi_def_cfa_offset 328358; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8359; CHECK-NEXT: callq acos@PLT8360; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8361; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8362; CHECK-NEXT: callq acos@PLT8363; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8364; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8365; CHECK-NEXT: addq $24, %rsp8366; CHECK-NEXT: .cfi_def_cfa_offset 88367; CHECK-NEXT: retq8368;8369; AVX-LABEL: constrained_vector_acos_v2f64:8370; AVX: # %bb.0: # %entry8371; AVX-NEXT: subq $24, %rsp8372; AVX-NEXT: .cfi_def_cfa_offset 328373; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8374; AVX-NEXT: callq acos@PLT8375; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8376; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8377; AVX-NEXT: callq acos@PLT8378; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8379; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8380; AVX-NEXT: addq $24, %rsp8381; AVX-NEXT: .cfi_def_cfa_offset 88382; AVX-NEXT: retq8383entry:8384 %acos = call <2 x double> @llvm.experimental.constrained.acos.v2f64(8385 <2 x double> <double 42.0, double 42.1>,8386 metadata !"round.dynamic",8387 metadata !"fpexcept.strict") #08388 ret <2 x double> %acos8389}8390 8391define <3 x float> @constrained_vector_acos_v3f32() #0 {8392; CHECK-LABEL: constrained_vector_acos_v3f32:8393; CHECK: # %bb.0: # %entry8394; CHECK-NEXT: subq $40, %rsp8395; CHECK-NEXT: .cfi_def_cfa_offset 488396; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8397; CHECK-NEXT: callq acosf@PLT8398; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8399; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8400; CHECK-NEXT: callq acosf@PLT8401; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8402; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8403; CHECK-NEXT: callq acosf@PLT8404; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload8405; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]8406; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8407; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8408; CHECK-NEXT: movaps %xmm1, %xmm08409; CHECK-NEXT: addq $40, %rsp8410; CHECK-NEXT: .cfi_def_cfa_offset 88411; CHECK-NEXT: retq8412;8413; AVX-LABEL: constrained_vector_acos_v3f32:8414; AVX: # %bb.0: # %entry8415; AVX-NEXT: subq $40, %rsp8416; AVX-NEXT: .cfi_def_cfa_offset 488417; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8418; AVX-NEXT: callq acosf@PLT8419; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8420; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8421; AVX-NEXT: callq acosf@PLT8422; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8423; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8424; AVX-NEXT: callq acosf@PLT8425; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload8426; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]8427; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8428; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]8429; AVX-NEXT: addq $40, %rsp8430; AVX-NEXT: .cfi_def_cfa_offset 88431; AVX-NEXT: retq8432entry:8433 %acos = call <3 x float> @llvm.experimental.constrained.acos.v3f32(8434 <3 x float> <float 42.0, float 43.0, float 44.0>,8435 metadata !"round.dynamic",8436 metadata !"fpexcept.strict") #08437 ret <3 x float> %acos8438}8439 8440define <3 x double> @constrained_vector_acos_v3f64() #0 {8441; CHECK-LABEL: constrained_vector_acos_v3f64:8442; CHECK: # %bb.0: # %entry8443; CHECK-NEXT: subq $24, %rsp8444; CHECK-NEXT: .cfi_def_cfa_offset 328445; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8446; CHECK-NEXT: callq acos@PLT8447; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill8448; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8449; CHECK-NEXT: callq acos@PLT8450; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill8451; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8452; CHECK-NEXT: callq acos@PLT8453; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)8454; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)8455; CHECK-NEXT: wait8456; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload8457; CHECK-NEXT: # xmm0 = mem[0],zero8458; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload8459; CHECK-NEXT: # xmm1 = mem[0],zero8460; CHECK-NEXT: addq $24, %rsp8461; CHECK-NEXT: .cfi_def_cfa_offset 88462; CHECK-NEXT: retq8463;8464; AVX-LABEL: constrained_vector_acos_v3f64:8465; AVX: # %bb.0: # %entry8466; AVX-NEXT: subq $40, %rsp8467; AVX-NEXT: .cfi_def_cfa_offset 488468; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8469; AVX-NEXT: callq acos@PLT8470; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8471; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8472; AVX-NEXT: callq acos@PLT8473; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8474; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8475; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill8476; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8477; AVX-NEXT: vzeroupper8478; AVX-NEXT: callq acos@PLT8479; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload8480; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm08481; AVX-NEXT: addq $40, %rsp8482; AVX-NEXT: .cfi_def_cfa_offset 88483; AVX-NEXT: retq8484entry:8485 %acos = call <3 x double> @llvm.experimental.constrained.acos.v3f64(8486 <3 x double> <double 42.0, double 42.1, double 42.2>,8487 metadata !"round.dynamic",8488 metadata !"fpexcept.strict") #08489 ret <3 x double> %acos8490}8491 8492define <4 x double> @constrained_vector_acos_v4f64() #0 {8493; CHECK-LABEL: constrained_vector_acos_v4f64:8494; CHECK: # %bb.0: # %entry8495; CHECK-NEXT: subq $40, %rsp8496; CHECK-NEXT: .cfi_def_cfa_offset 488497; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8498; CHECK-NEXT: callq acos@PLT8499; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8500; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8501; CHECK-NEXT: callq acos@PLT8502; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8503; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8504; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8505; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8506; CHECK-NEXT: callq acos@PLT8507; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8508; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8509; CHECK-NEXT: callq acos@PLT8510; CHECK-NEXT: movaps %xmm0, %xmm18511; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8512; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8513; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload8514; CHECK-NEXT: addq $40, %rsp8515; CHECK-NEXT: .cfi_def_cfa_offset 88516; CHECK-NEXT: retq8517;8518; AVX-LABEL: constrained_vector_acos_v4f64:8519; AVX: # %bb.0: # %entry8520; AVX-NEXT: subq $40, %rsp8521; AVX-NEXT: .cfi_def_cfa_offset 488522; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8523; AVX-NEXT: callq acos@PLT8524; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8525; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8526; AVX-NEXT: callq acos@PLT8527; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8528; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8529; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8530; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8531; AVX-NEXT: callq acos@PLT8532; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8533; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8534; AVX-NEXT: callq acos@PLT8535; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8536; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8537; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload8538; AVX-NEXT: addq $40, %rsp8539; AVX-NEXT: .cfi_def_cfa_offset 88540; AVX-NEXT: retq8541entry:8542 %acos = call <4 x double> @llvm.experimental.constrained.acos.v4f64(8543 <4 x double> <double 42.0, double 42.1,8544 double 42.2, double 42.3>,8545 metadata !"round.dynamic",8546 metadata !"fpexcept.strict") #08547 ret <4 x double> %acos8548}8549 8550define <1 x float> @constrained_vector_asin_v1f32() #0 {8551; CHECK-LABEL: constrained_vector_asin_v1f32:8552; CHECK: # %bb.0: # %entry8553; CHECK-NEXT: pushq %rax8554; CHECK-NEXT: .cfi_def_cfa_offset 168555; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8556; CHECK-NEXT: callq asinf@PLT8557; CHECK-NEXT: popq %rax8558; CHECK-NEXT: .cfi_def_cfa_offset 88559; CHECK-NEXT: retq8560;8561; AVX-LABEL: constrained_vector_asin_v1f32:8562; AVX: # %bb.0: # %entry8563; AVX-NEXT: pushq %rax8564; AVX-NEXT: .cfi_def_cfa_offset 168565; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8566; AVX-NEXT: callq asinf@PLT8567; AVX-NEXT: popq %rax8568; AVX-NEXT: .cfi_def_cfa_offset 88569; AVX-NEXT: retq8570entry:8571 %asin = call <1 x float> @llvm.experimental.constrained.asin.v1f32(8572 <1 x float> <float 42.0>,8573 metadata !"round.dynamic",8574 metadata !"fpexcept.strict") #08575 ret <1 x float> %asin8576}8577 8578define <2 x double> @constrained_vector_asin_v2f64() #0 {8579; CHECK-LABEL: constrained_vector_asin_v2f64:8580; CHECK: # %bb.0: # %entry8581; CHECK-NEXT: subq $24, %rsp8582; CHECK-NEXT: .cfi_def_cfa_offset 328583; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8584; CHECK-NEXT: callq asin@PLT8585; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8586; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8587; CHECK-NEXT: callq asin@PLT8588; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8589; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8590; CHECK-NEXT: addq $24, %rsp8591; CHECK-NEXT: .cfi_def_cfa_offset 88592; CHECK-NEXT: retq8593;8594; AVX-LABEL: constrained_vector_asin_v2f64:8595; AVX: # %bb.0: # %entry8596; AVX-NEXT: subq $24, %rsp8597; AVX-NEXT: .cfi_def_cfa_offset 328598; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8599; AVX-NEXT: callq asin@PLT8600; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8601; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8602; AVX-NEXT: callq asin@PLT8603; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8604; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8605; AVX-NEXT: addq $24, %rsp8606; AVX-NEXT: .cfi_def_cfa_offset 88607; AVX-NEXT: retq8608entry:8609 %asin = call <2 x double> @llvm.experimental.constrained.asin.v2f64(8610 <2 x double> <double 42.0, double 42.1>,8611 metadata !"round.dynamic",8612 metadata !"fpexcept.strict") #08613 ret <2 x double> %asin8614}8615 8616define <3 x float> @constrained_vector_asin_v3f32() #0 {8617; CHECK-LABEL: constrained_vector_asin_v3f32:8618; CHECK: # %bb.0: # %entry8619; CHECK-NEXT: subq $40, %rsp8620; CHECK-NEXT: .cfi_def_cfa_offset 488621; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8622; CHECK-NEXT: callq asinf@PLT8623; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8624; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8625; CHECK-NEXT: callq asinf@PLT8626; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8627; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8628; CHECK-NEXT: callq asinf@PLT8629; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload8630; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]8631; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8632; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8633; CHECK-NEXT: movaps %xmm1, %xmm08634; CHECK-NEXT: addq $40, %rsp8635; CHECK-NEXT: .cfi_def_cfa_offset 88636; CHECK-NEXT: retq8637;8638; AVX-LABEL: constrained_vector_asin_v3f32:8639; AVX: # %bb.0: # %entry8640; AVX-NEXT: subq $40, %rsp8641; AVX-NEXT: .cfi_def_cfa_offset 488642; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8643; AVX-NEXT: callq asinf@PLT8644; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8645; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8646; AVX-NEXT: callq asinf@PLT8647; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8648; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8649; AVX-NEXT: callq asinf@PLT8650; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload8651; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]8652; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8653; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]8654; AVX-NEXT: addq $40, %rsp8655; AVX-NEXT: .cfi_def_cfa_offset 88656; AVX-NEXT: retq8657entry:8658 %asin = call <3 x float> @llvm.experimental.constrained.asin.v3f32(8659 <3 x float> <float 42.0, float 43.0, float 44.0>,8660 metadata !"round.dynamic",8661 metadata !"fpexcept.strict") #08662 ret <3 x float> %asin8663}8664 8665define <3 x double> @constrained_vector_asin_v3f64() #0 {8666; CHECK-LABEL: constrained_vector_asin_v3f64:8667; CHECK: # %bb.0: # %entry8668; CHECK-NEXT: subq $24, %rsp8669; CHECK-NEXT: .cfi_def_cfa_offset 328670; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8671; CHECK-NEXT: callq asin@PLT8672; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill8673; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8674; CHECK-NEXT: callq asin@PLT8675; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill8676; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8677; CHECK-NEXT: callq asin@PLT8678; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)8679; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)8680; CHECK-NEXT: wait8681; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload8682; CHECK-NEXT: # xmm0 = mem[0],zero8683; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload8684; CHECK-NEXT: # xmm1 = mem[0],zero8685; CHECK-NEXT: addq $24, %rsp8686; CHECK-NEXT: .cfi_def_cfa_offset 88687; CHECK-NEXT: retq8688;8689; AVX-LABEL: constrained_vector_asin_v3f64:8690; AVX: # %bb.0: # %entry8691; AVX-NEXT: subq $40, %rsp8692; AVX-NEXT: .cfi_def_cfa_offset 488693; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8694; AVX-NEXT: callq asin@PLT8695; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8696; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8697; AVX-NEXT: callq asin@PLT8698; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8699; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8700; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill8701; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8702; AVX-NEXT: vzeroupper8703; AVX-NEXT: callq asin@PLT8704; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload8705; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm08706; AVX-NEXT: addq $40, %rsp8707; AVX-NEXT: .cfi_def_cfa_offset 88708; AVX-NEXT: retq8709entry:8710 %asin = call <3 x double> @llvm.experimental.constrained.asin.v3f64(8711 <3 x double> <double 42.0, double 42.1, double 42.2>,8712 metadata !"round.dynamic",8713 metadata !"fpexcept.strict") #08714 ret <3 x double> %asin8715}8716 8717define <4 x double> @constrained_vector_asin_v4f64() #0 {8718; CHECK-LABEL: constrained_vector_asin_v4f64:8719; CHECK: # %bb.0: # %entry8720; CHECK-NEXT: subq $40, %rsp8721; CHECK-NEXT: .cfi_def_cfa_offset 488722; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8723; CHECK-NEXT: callq asin@PLT8724; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8725; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8726; CHECK-NEXT: callq asin@PLT8727; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8728; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8729; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8730; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8731; CHECK-NEXT: callq asin@PLT8732; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8733; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8734; CHECK-NEXT: callq asin@PLT8735; CHECK-NEXT: movaps %xmm0, %xmm18736; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8737; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8738; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload8739; CHECK-NEXT: addq $40, %rsp8740; CHECK-NEXT: .cfi_def_cfa_offset 88741; CHECK-NEXT: retq8742;8743; AVX-LABEL: constrained_vector_asin_v4f64:8744; AVX: # %bb.0: # %entry8745; AVX-NEXT: subq $40, %rsp8746; AVX-NEXT: .cfi_def_cfa_offset 488747; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8748; AVX-NEXT: callq asin@PLT8749; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8750; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8751; AVX-NEXT: callq asin@PLT8752; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8753; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8754; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8755; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8756; AVX-NEXT: callq asin@PLT8757; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8758; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8759; AVX-NEXT: callq asin@PLT8760; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8761; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8762; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload8763; AVX-NEXT: addq $40, %rsp8764; AVX-NEXT: .cfi_def_cfa_offset 88765; AVX-NEXT: retq8766entry:8767 %asin = call <4 x double> @llvm.experimental.constrained.asin.v4f64(8768 <4 x double> <double 42.0, double 42.1,8769 double 42.2, double 42.3>,8770 metadata !"round.dynamic",8771 metadata !"fpexcept.strict") #08772 ret <4 x double> %asin8773}8774 8775define <1 x float> @constrained_vector_atan_v1f32() #0 {8776; CHECK-LABEL: constrained_vector_atan_v1f32:8777; CHECK: # %bb.0: # %entry8778; CHECK-NEXT: pushq %rax8779; CHECK-NEXT: .cfi_def_cfa_offset 168780; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8781; CHECK-NEXT: callq atanf@PLT8782; CHECK-NEXT: popq %rax8783; CHECK-NEXT: .cfi_def_cfa_offset 88784; CHECK-NEXT: retq8785;8786; AVX-LABEL: constrained_vector_atan_v1f32:8787; AVX: # %bb.0: # %entry8788; AVX-NEXT: pushq %rax8789; AVX-NEXT: .cfi_def_cfa_offset 168790; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8791; AVX-NEXT: callq atanf@PLT8792; AVX-NEXT: popq %rax8793; AVX-NEXT: .cfi_def_cfa_offset 88794; AVX-NEXT: retq8795entry:8796 %atan = call <1 x float> @llvm.experimental.constrained.atan.v1f32(8797 <1 x float> <float 42.0>,8798 metadata !"round.dynamic",8799 metadata !"fpexcept.strict") #08800 ret <1 x float> %atan8801}8802 8803define <2 x double> @constrained_vector_atan_v2f64() #0 {8804; CHECK-LABEL: constrained_vector_atan_v2f64:8805; CHECK: # %bb.0: # %entry8806; CHECK-NEXT: subq $24, %rsp8807; CHECK-NEXT: .cfi_def_cfa_offset 328808; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8809; CHECK-NEXT: callq atan@PLT8810; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8811; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8812; CHECK-NEXT: callq atan@PLT8813; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8814; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8815; CHECK-NEXT: addq $24, %rsp8816; CHECK-NEXT: .cfi_def_cfa_offset 88817; CHECK-NEXT: retq8818;8819; AVX-LABEL: constrained_vector_atan_v2f64:8820; AVX: # %bb.0: # %entry8821; AVX-NEXT: subq $24, %rsp8822; AVX-NEXT: .cfi_def_cfa_offset 328823; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8824; AVX-NEXT: callq atan@PLT8825; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8826; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8827; AVX-NEXT: callq atan@PLT8828; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8829; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8830; AVX-NEXT: addq $24, %rsp8831; AVX-NEXT: .cfi_def_cfa_offset 88832; AVX-NEXT: retq8833entry:8834 %atan = call <2 x double> @llvm.experimental.constrained.atan.v2f64(8835 <2 x double> <double 42.0, double 42.1>,8836 metadata !"round.dynamic",8837 metadata !"fpexcept.strict") #08838 ret <2 x double> %atan8839}8840 8841define <3 x float> @constrained_vector_atan_v3f32() #0 {8842; CHECK-LABEL: constrained_vector_atan_v3f32:8843; CHECK: # %bb.0: # %entry8844; CHECK-NEXT: subq $40, %rsp8845; CHECK-NEXT: .cfi_def_cfa_offset 488846; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8847; CHECK-NEXT: callq atanf@PLT8848; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8849; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8850; CHECK-NEXT: callq atanf@PLT8851; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8852; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8853; CHECK-NEXT: callq atanf@PLT8854; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload8855; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]8856; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8857; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8858; CHECK-NEXT: movaps %xmm1, %xmm08859; CHECK-NEXT: addq $40, %rsp8860; CHECK-NEXT: .cfi_def_cfa_offset 88861; CHECK-NEXT: retq8862;8863; AVX-LABEL: constrained_vector_atan_v3f32:8864; AVX: # %bb.0: # %entry8865; AVX-NEXT: subq $40, %rsp8866; AVX-NEXT: .cfi_def_cfa_offset 488867; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]8868; AVX-NEXT: callq atanf@PLT8869; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8870; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]8871; AVX-NEXT: callq atanf@PLT8872; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8873; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]8874; AVX-NEXT: callq atanf@PLT8875; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload8876; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]8877; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8878; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]8879; AVX-NEXT: addq $40, %rsp8880; AVX-NEXT: .cfi_def_cfa_offset 88881; AVX-NEXT: retq8882entry:8883 %atan = call <3 x float> @llvm.experimental.constrained.atan.v3f32(8884 <3 x float> <float 42.0, float 43.0, float 44.0>,8885 metadata !"round.dynamic",8886 metadata !"fpexcept.strict") #08887 ret <3 x float> %atan8888}8889 8890define <3 x double> @constrained_vector_atan_v3f64() #0 {8891; CHECK-LABEL: constrained_vector_atan_v3f64:8892; CHECK: # %bb.0: # %entry8893; CHECK-NEXT: subq $24, %rsp8894; CHECK-NEXT: .cfi_def_cfa_offset 328895; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8896; CHECK-NEXT: callq atan@PLT8897; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill8898; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8899; CHECK-NEXT: callq atan@PLT8900; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill8901; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8902; CHECK-NEXT: callq atan@PLT8903; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)8904; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)8905; CHECK-NEXT: wait8906; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload8907; CHECK-NEXT: # xmm0 = mem[0],zero8908; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload8909; CHECK-NEXT: # xmm1 = mem[0],zero8910; CHECK-NEXT: addq $24, %rsp8911; CHECK-NEXT: .cfi_def_cfa_offset 88912; CHECK-NEXT: retq8913;8914; AVX-LABEL: constrained_vector_atan_v3f64:8915; AVX: # %bb.0: # %entry8916; AVX-NEXT: subq $40, %rsp8917; AVX-NEXT: .cfi_def_cfa_offset 488918; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8919; AVX-NEXT: callq atan@PLT8920; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8921; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8922; AVX-NEXT: callq atan@PLT8923; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8924; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8925; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill8926; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8927; AVX-NEXT: vzeroupper8928; AVX-NEXT: callq atan@PLT8929; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload8930; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm08931; AVX-NEXT: addq $40, %rsp8932; AVX-NEXT: .cfi_def_cfa_offset 88933; AVX-NEXT: retq8934entry:8935 %atan = call <3 x double> @llvm.experimental.constrained.atan.v3f64(8936 <3 x double> <double 42.0, double 42.1, double 42.2>,8937 metadata !"round.dynamic",8938 metadata !"fpexcept.strict") #08939 ret <3 x double> %atan8940}8941 8942define <4 x double> @constrained_vector_atan_v4f64() #0 {8943; CHECK-LABEL: constrained_vector_atan_v4f64:8944; CHECK: # %bb.0: # %entry8945; CHECK-NEXT: subq $40, %rsp8946; CHECK-NEXT: .cfi_def_cfa_offset 488947; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8948; CHECK-NEXT: callq atan@PLT8949; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8950; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8951; CHECK-NEXT: callq atan@PLT8952; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload8953; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]8954; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill8955; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8956; CHECK-NEXT: callq atan@PLT8957; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8958; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8959; CHECK-NEXT: callq atan@PLT8960; CHECK-NEXT: movaps %xmm0, %xmm18961; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload8962; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]8963; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload8964; CHECK-NEXT: addq $40, %rsp8965; CHECK-NEXT: .cfi_def_cfa_offset 88966; CHECK-NEXT: retq8967;8968; AVX-LABEL: constrained_vector_atan_v4f64:8969; AVX: # %bb.0: # %entry8970; AVX-NEXT: subq $40, %rsp8971; AVX-NEXT: .cfi_def_cfa_offset 488972; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]8973; AVX-NEXT: callq atan@PLT8974; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8975; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]8976; AVX-NEXT: callq atan@PLT8977; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload8978; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8979; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill8980; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]8981; AVX-NEXT: callq atan@PLT8982; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill8983; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]8984; AVX-NEXT: callq atan@PLT8985; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload8986; AVX-NEXT: # xmm0 = xmm0[0],mem[0]8987; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload8988; AVX-NEXT: addq $40, %rsp8989; AVX-NEXT: .cfi_def_cfa_offset 88990; AVX-NEXT: retq8991entry:8992 %atan = call <4 x double> @llvm.experimental.constrained.atan.v4f64(8993 <4 x double> <double 42.0, double 42.1,8994 double 42.2, double 42.3>,8995 metadata !"round.dynamic",8996 metadata !"fpexcept.strict") #08997 ret <4 x double> %atan8998}8999 9000define <1 x float> @constrained_vector_atan2_v1f32() #0 {9001; CHECK-LABEL: constrained_vector_atan2_v1f32:9002; CHECK: # %bb.0: # %entry9003; CHECK-NEXT: pushq %rax9004; CHECK-NEXT: .cfi_def_cfa_offset 169005; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9006; CHECK-NEXT: movss {{.*#+}} xmm1 = [2.3E+1,0.0E+0,0.0E+0,0.0E+0]9007; CHECK-NEXT: callq atan2f@PLT9008; CHECK-NEXT: popq %rax9009; CHECK-NEXT: .cfi_def_cfa_offset 89010; CHECK-NEXT: retq9011;9012; AVX-LABEL: constrained_vector_atan2_v1f32:9013; AVX: # %bb.0: # %entry9014; AVX-NEXT: pushq %rax9015; AVX-NEXT: .cfi_def_cfa_offset 169016; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9017; AVX-NEXT: vmovss {{.*#+}} xmm1 = [2.3E+1,0.0E+0,0.0E+0,0.0E+0]9018; AVX-NEXT: callq atan2f@PLT9019; AVX-NEXT: popq %rax9020; AVX-NEXT: .cfi_def_cfa_offset 89021; AVX-NEXT: retq9022entry:9023 %atan2 = call <1 x float> @llvm.experimental.constrained.atan2.v1f32(9024 <1 x float> <float 42.0>,9025 <1 x float> <float 23.0>,9026 metadata !"round.dynamic",9027 metadata !"fpexcept.strict") #09028 ret <1 x float> %atan29029}9030 9031define <2 x double> @constrained_vector_atan2_v2f64() #0 {9032; CHECK-LABEL: constrained_vector_atan2_v2f64:9033; CHECK: # %bb.0: # %entry9034; CHECK-NEXT: subq $24, %rsp9035; CHECK-NEXT: .cfi_def_cfa_offset 329036; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9037; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3100000000000001E+1,0.0E+0]9038; CHECK-NEXT: callq atan2@PLT9039; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9040; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9041; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3E+1,0.0E+0]9042; CHECK-NEXT: callq atan2@PLT9043; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9044; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9045; CHECK-NEXT: addq $24, %rsp9046; CHECK-NEXT: .cfi_def_cfa_offset 89047; CHECK-NEXT: retq9048;9049; AVX-LABEL: constrained_vector_atan2_v2f64:9050; AVX: # %bb.0: # %entry9051; AVX-NEXT: subq $24, %rsp9052; AVX-NEXT: .cfi_def_cfa_offset 329053; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9054; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3100000000000001E+1,0.0E+0]9055; AVX-NEXT: callq atan2@PLT9056; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9057; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9058; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3E+1,0.0E+0]9059; AVX-NEXT: callq atan2@PLT9060; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9061; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9062; AVX-NEXT: addq $24, %rsp9063; AVX-NEXT: .cfi_def_cfa_offset 89064; AVX-NEXT: retq9065entry:9066 %atan2 = call <2 x double> @llvm.experimental.constrained.atan2.v2f64(9067 <2 x double> <double 42.0, double 42.1>,9068 <2 x double> <double 23.0, double 23.1>,9069 metadata !"round.dynamic",9070 metadata !"fpexcept.strict") #09071 ret <2 x double> %atan29072}9073 9074define <3 x float> @constrained_vector_atan2_v3f32() #0 {9075; CHECK-LABEL: constrained_vector_atan2_v3f32:9076; CHECK: # %bb.0: # %entry9077; CHECK-NEXT: subq $40, %rsp9078; CHECK-NEXT: .cfi_def_cfa_offset 489079; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9080; CHECK-NEXT: movss {{.*#+}} xmm1 = [2.5E+1,0.0E+0,0.0E+0,0.0E+0]9081; CHECK-NEXT: callq atan2f@PLT9082; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9083; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9084; CHECK-NEXT: movss {{.*#+}} xmm1 = [2.3E+1,0.0E+0,0.0E+0,0.0E+0]9085; CHECK-NEXT: callq atan2f@PLT9086; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9087; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9088; CHECK-NEXT: movss {{.*#+}} xmm1 = [2.4E+1,0.0E+0,0.0E+0,0.0E+0]9089; CHECK-NEXT: callq atan2f@PLT9090; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload9091; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]9092; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9093; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9094; CHECK-NEXT: movaps %xmm1, %xmm09095; CHECK-NEXT: addq $40, %rsp9096; CHECK-NEXT: .cfi_def_cfa_offset 89097; CHECK-NEXT: retq9098;9099; AVX-LABEL: constrained_vector_atan2_v3f32:9100; AVX: # %bb.0: # %entry9101; AVX-NEXT: subq $40, %rsp9102; AVX-NEXT: .cfi_def_cfa_offset 489103; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9104; AVX-NEXT: vmovss {{.*#+}} xmm1 = [2.5E+1,0.0E+0,0.0E+0,0.0E+0]9105; AVX-NEXT: callq atan2f@PLT9106; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9107; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9108; AVX-NEXT: vmovss {{.*#+}} xmm1 = [2.3E+1,0.0E+0,0.0E+0,0.0E+0]9109; AVX-NEXT: callq atan2f@PLT9110; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9111; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9112; AVX-NEXT: vmovss {{.*#+}} xmm1 = [2.4E+1,0.0E+0,0.0E+0,0.0E+0]9113; AVX-NEXT: callq atan2f@PLT9114; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload9115; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]9116; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9117; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]9118; AVX-NEXT: addq $40, %rsp9119; AVX-NEXT: .cfi_def_cfa_offset 89120; AVX-NEXT: retq9121entry:9122 %atan2 = call <3 x float> @llvm.experimental.constrained.atan2.v3f32(9123 <3 x float> <float 42.0, float 43.0, float 44.0>,9124 <3 x float> <float 23.0, float 24.0, float 25.0>,9125 metadata !"round.dynamic",9126 metadata !"fpexcept.strict") #09127 ret <3 x float> %atan29128}9129 9130define <3 x double> @constrained_vector_atan2_v3f64() #0 {9131; CHECK-LABEL: constrained_vector_atan2_v3f64:9132; CHECK: # %bb.0: # %entry9133; CHECK-NEXT: subq $24, %rsp9134; CHECK-NEXT: .cfi_def_cfa_offset 329135; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9136; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3100000000000001E+1,0.0E+0]9137; CHECK-NEXT: callq atan2@PLT9138; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill9139; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9140; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3E+1,0.0E+0]9141; CHECK-NEXT: callq atan2@PLT9142; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill9143; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9144; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3199999999999999E+1,0.0E+0]9145; CHECK-NEXT: callq atan2@PLT9146; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)9147; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)9148; CHECK-NEXT: wait9149; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload9150; CHECK-NEXT: # xmm0 = mem[0],zero9151; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload9152; CHECK-NEXT: # xmm1 = mem[0],zero9153; CHECK-NEXT: addq $24, %rsp9154; CHECK-NEXT: .cfi_def_cfa_offset 89155; CHECK-NEXT: retq9156;9157; AVX-LABEL: constrained_vector_atan2_v3f64:9158; AVX: # %bb.0: # %entry9159; AVX-NEXT: subq $40, %rsp9160; AVX-NEXT: .cfi_def_cfa_offset 489161; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9162; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3100000000000001E+1,0.0E+0]9163; AVX-NEXT: callq atan2@PLT9164; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9165; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9166; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3E+1,0.0E+0]9167; AVX-NEXT: callq atan2@PLT9168; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9169; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9170; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill9171; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9172; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3199999999999999E+1,0.0E+0]9173; AVX-NEXT: vzeroupper9174; AVX-NEXT: callq atan2@PLT9175; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload9176; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm09177; AVX-NEXT: addq $40, %rsp9178; AVX-NEXT: .cfi_def_cfa_offset 89179; AVX-NEXT: retq9180entry:9181 %atan2 = call <3 x double> @llvm.experimental.constrained.atan2.v3f64(9182 <3 x double> <double 42.0, double 42.1, double 42.2>,9183 <3 x double> <double 23.0, double 23.1, double 23.2>,9184 metadata !"round.dynamic",9185 metadata !"fpexcept.strict") #09186 ret <3 x double> %atan29187}9188 9189define <4 x double> @constrained_vector_atan2_v4f64() #0 {9190; CHECK-LABEL: constrained_vector_atan2_v4f64:9191; CHECK: # %bb.0: # %entry9192; CHECK-NEXT: subq $40, %rsp9193; CHECK-NEXT: .cfi_def_cfa_offset 489194; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9195; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3100000000000001E+1,0.0E+0]9196; CHECK-NEXT: callq atan2@PLT9197; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9198; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9199; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3E+1,0.0E+0]9200; CHECK-NEXT: callq atan2@PLT9201; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9202; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9203; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9204; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9205; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3300000000000001E+1,0.0E+0]9206; CHECK-NEXT: callq atan2@PLT9207; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9208; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9209; CHECK-NEXT: movsd {{.*#+}} xmm1 = [2.3199999999999999E+1,0.0E+0]9210; CHECK-NEXT: callq atan2@PLT9211; CHECK-NEXT: movaps %xmm0, %xmm19212; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9213; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9214; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload9215; CHECK-NEXT: addq $40, %rsp9216; CHECK-NEXT: .cfi_def_cfa_offset 89217; CHECK-NEXT: retq9218;9219; AVX-LABEL: constrained_vector_atan2_v4f64:9220; AVX: # %bb.0: # %entry9221; AVX-NEXT: subq $40, %rsp9222; AVX-NEXT: .cfi_def_cfa_offset 489223; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9224; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3300000000000001E+1,0.0E+0]9225; AVX-NEXT: callq atan2@PLT9226; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9227; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9228; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3199999999999999E+1,0.0E+0]9229; AVX-NEXT: callq atan2@PLT9230; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9231; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9232; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9233; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9234; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3100000000000001E+1,0.0E+0]9235; AVX-NEXT: callq atan2@PLT9236; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9237; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9238; AVX-NEXT: vmovsd {{.*#+}} xmm1 = [2.3E+1,0.0E+0]9239; AVX-NEXT: callq atan2@PLT9240; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9241; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9242; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload9243; AVX-NEXT: addq $40, %rsp9244; AVX-NEXT: .cfi_def_cfa_offset 89245; AVX-NEXT: retq9246entry:9247 %atan2 = call <4 x double> @llvm.experimental.constrained.atan2.v4f64(9248 <4 x double> <double 42.0, double 42.1,9249 double 42.2, double 42.3>,9250 <4 x double> <double 23.0, double 23.1,9251 double 23.2, double 23.3>,9252 metadata !"round.dynamic",9253 metadata !"fpexcept.strict") #09254 ret <4 x double> %atan29255}9256 9257define <1 x float> @constrained_vector_cosh_v1f32() #0 {9258; CHECK-LABEL: constrained_vector_cosh_v1f32:9259; CHECK: # %bb.0: # %entry9260; CHECK-NEXT: pushq %rax9261; CHECK-NEXT: .cfi_def_cfa_offset 169262; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9263; CHECK-NEXT: callq coshf@PLT9264; CHECK-NEXT: popq %rax9265; CHECK-NEXT: .cfi_def_cfa_offset 89266; CHECK-NEXT: retq9267;9268; AVX-LABEL: constrained_vector_cosh_v1f32:9269; AVX: # %bb.0: # %entry9270; AVX-NEXT: pushq %rax9271; AVX-NEXT: .cfi_def_cfa_offset 169272; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9273; AVX-NEXT: callq coshf@PLT9274; AVX-NEXT: popq %rax9275; AVX-NEXT: .cfi_def_cfa_offset 89276; AVX-NEXT: retq9277entry:9278 %cosh = call <1 x float> @llvm.experimental.constrained.cosh.v1f32(9279 <1 x float> <float 42.0>,9280 metadata !"round.dynamic",9281 metadata !"fpexcept.strict") #09282 ret <1 x float> %cosh9283}9284 9285define <2 x double> @constrained_vector_cosh_v2f64() #0 {9286; CHECK-LABEL: constrained_vector_cosh_v2f64:9287; CHECK: # %bb.0: # %entry9288; CHECK-NEXT: subq $24, %rsp9289; CHECK-NEXT: .cfi_def_cfa_offset 329290; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9291; CHECK-NEXT: callq cosh@PLT9292; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9293; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9294; CHECK-NEXT: callq cosh@PLT9295; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9296; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9297; CHECK-NEXT: addq $24, %rsp9298; CHECK-NEXT: .cfi_def_cfa_offset 89299; CHECK-NEXT: retq9300;9301; AVX-LABEL: constrained_vector_cosh_v2f64:9302; AVX: # %bb.0: # %entry9303; AVX-NEXT: subq $24, %rsp9304; AVX-NEXT: .cfi_def_cfa_offset 329305; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9306; AVX-NEXT: callq cosh@PLT9307; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9308; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9309; AVX-NEXT: callq cosh@PLT9310; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9311; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9312; AVX-NEXT: addq $24, %rsp9313; AVX-NEXT: .cfi_def_cfa_offset 89314; AVX-NEXT: retq9315entry:9316 %cosh = call <2 x double> @llvm.experimental.constrained.cosh.v2f64(9317 <2 x double> <double 42.0, double 42.1>,9318 metadata !"round.dynamic",9319 metadata !"fpexcept.strict") #09320 ret <2 x double> %cosh9321}9322 9323define <3 x float> @constrained_vector_cosh_v3f32() #0 {9324; CHECK-LABEL: constrained_vector_cosh_v3f32:9325; CHECK: # %bb.0: # %entry9326; CHECK-NEXT: subq $40, %rsp9327; CHECK-NEXT: .cfi_def_cfa_offset 489328; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9329; CHECK-NEXT: callq coshf@PLT9330; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9331; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9332; CHECK-NEXT: callq coshf@PLT9333; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9334; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9335; CHECK-NEXT: callq coshf@PLT9336; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload9337; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]9338; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9339; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9340; CHECK-NEXT: movaps %xmm1, %xmm09341; CHECK-NEXT: addq $40, %rsp9342; CHECK-NEXT: .cfi_def_cfa_offset 89343; CHECK-NEXT: retq9344;9345; AVX-LABEL: constrained_vector_cosh_v3f32:9346; AVX: # %bb.0: # %entry9347; AVX-NEXT: subq $40, %rsp9348; AVX-NEXT: .cfi_def_cfa_offset 489349; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9350; AVX-NEXT: callq coshf@PLT9351; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9352; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9353; AVX-NEXT: callq coshf@PLT9354; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9355; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9356; AVX-NEXT: callq coshf@PLT9357; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload9358; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]9359; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9360; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]9361; AVX-NEXT: addq $40, %rsp9362; AVX-NEXT: .cfi_def_cfa_offset 89363; AVX-NEXT: retq9364entry:9365 %cosh = call <3 x float> @llvm.experimental.constrained.cosh.v3f32(9366 <3 x float> <float 42.0, float 43.0, float 44.0>,9367 metadata !"round.dynamic",9368 metadata !"fpexcept.strict") #09369 ret <3 x float> %cosh9370}9371 9372define <3 x double> @constrained_vector_cosh_v3f64() #0 {9373; CHECK-LABEL: constrained_vector_cosh_v3f64:9374; CHECK: # %bb.0: # %entry9375; CHECK-NEXT: subq $24, %rsp9376; CHECK-NEXT: .cfi_def_cfa_offset 329377; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9378; CHECK-NEXT: callq cosh@PLT9379; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill9380; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9381; CHECK-NEXT: callq cosh@PLT9382; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill9383; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9384; CHECK-NEXT: callq cosh@PLT9385; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)9386; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)9387; CHECK-NEXT: wait9388; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload9389; CHECK-NEXT: # xmm0 = mem[0],zero9390; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload9391; CHECK-NEXT: # xmm1 = mem[0],zero9392; CHECK-NEXT: addq $24, %rsp9393; CHECK-NEXT: .cfi_def_cfa_offset 89394; CHECK-NEXT: retq9395;9396; AVX-LABEL: constrained_vector_cosh_v3f64:9397; AVX: # %bb.0: # %entry9398; AVX-NEXT: subq $40, %rsp9399; AVX-NEXT: .cfi_def_cfa_offset 489400; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9401; AVX-NEXT: callq cosh@PLT9402; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9403; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9404; AVX-NEXT: callq cosh@PLT9405; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9406; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9407; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill9408; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9409; AVX-NEXT: vzeroupper9410; AVX-NEXT: callq cosh@PLT9411; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload9412; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm09413; AVX-NEXT: addq $40, %rsp9414; AVX-NEXT: .cfi_def_cfa_offset 89415; AVX-NEXT: retq9416entry:9417 %cosh = call <3 x double> @llvm.experimental.constrained.cosh.v3f64(9418 <3 x double> <double 42.0, double 42.1, double 42.2>,9419 metadata !"round.dynamic",9420 metadata !"fpexcept.strict") #09421 ret <3 x double> %cosh9422}9423 9424define <4 x double> @constrained_vector_cosh_v4f64() #0 {9425; CHECK-LABEL: constrained_vector_cosh_v4f64:9426; CHECK: # %bb.0: # %entry9427; CHECK-NEXT: subq $40, %rsp9428; CHECK-NEXT: .cfi_def_cfa_offset 489429; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9430; CHECK-NEXT: callq cosh@PLT9431; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9432; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9433; CHECK-NEXT: callq cosh@PLT9434; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9435; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9436; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9437; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9438; CHECK-NEXT: callq cosh@PLT9439; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9440; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9441; CHECK-NEXT: callq cosh@PLT9442; CHECK-NEXT: movaps %xmm0, %xmm19443; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9444; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9445; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload9446; CHECK-NEXT: addq $40, %rsp9447; CHECK-NEXT: .cfi_def_cfa_offset 89448; CHECK-NEXT: retq9449;9450; AVX-LABEL: constrained_vector_cosh_v4f64:9451; AVX: # %bb.0: # %entry9452; AVX-NEXT: subq $40, %rsp9453; AVX-NEXT: .cfi_def_cfa_offset 489454; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9455; AVX-NEXT: callq cosh@PLT9456; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9457; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9458; AVX-NEXT: callq cosh@PLT9459; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9460; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9461; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9462; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9463; AVX-NEXT: callq cosh@PLT9464; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9465; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9466; AVX-NEXT: callq cosh@PLT9467; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9468; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9469; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload9470; AVX-NEXT: addq $40, %rsp9471; AVX-NEXT: .cfi_def_cfa_offset 89472; AVX-NEXT: retq9473entry:9474 %cosh = call <4 x double> @llvm.experimental.constrained.cosh.v4f64(9475 <4 x double> <double 42.0, double 42.1,9476 double 42.2, double 42.3>,9477 metadata !"round.dynamic",9478 metadata !"fpexcept.strict") #09479 ret <4 x double> %cosh9480}9481 9482define <1 x float> @constrained_vector_sinh_v1f32() #0 {9483; CHECK-LABEL: constrained_vector_sinh_v1f32:9484; CHECK: # %bb.0: # %entry9485; CHECK-NEXT: pushq %rax9486; CHECK-NEXT: .cfi_def_cfa_offset 169487; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9488; CHECK-NEXT: callq sinhf@PLT9489; CHECK-NEXT: popq %rax9490; CHECK-NEXT: .cfi_def_cfa_offset 89491; CHECK-NEXT: retq9492;9493; AVX-LABEL: constrained_vector_sinh_v1f32:9494; AVX: # %bb.0: # %entry9495; AVX-NEXT: pushq %rax9496; AVX-NEXT: .cfi_def_cfa_offset 169497; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9498; AVX-NEXT: callq sinhf@PLT9499; AVX-NEXT: popq %rax9500; AVX-NEXT: .cfi_def_cfa_offset 89501; AVX-NEXT: retq9502entry:9503 %sinh = call <1 x float> @llvm.experimental.constrained.sinh.v1f32(9504 <1 x float> <float 42.0>,9505 metadata !"round.dynamic",9506 metadata !"fpexcept.strict") #09507 ret <1 x float> %sinh9508}9509 9510define <2 x double> @constrained_vector_sinh_v2f64() #0 {9511; CHECK-LABEL: constrained_vector_sinh_v2f64:9512; CHECK: # %bb.0: # %entry9513; CHECK-NEXT: subq $24, %rsp9514; CHECK-NEXT: .cfi_def_cfa_offset 329515; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9516; CHECK-NEXT: callq sinh@PLT9517; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9518; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9519; CHECK-NEXT: callq sinh@PLT9520; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9521; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9522; CHECK-NEXT: addq $24, %rsp9523; CHECK-NEXT: .cfi_def_cfa_offset 89524; CHECK-NEXT: retq9525;9526; AVX-LABEL: constrained_vector_sinh_v2f64:9527; AVX: # %bb.0: # %entry9528; AVX-NEXT: subq $24, %rsp9529; AVX-NEXT: .cfi_def_cfa_offset 329530; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9531; AVX-NEXT: callq sinh@PLT9532; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9533; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9534; AVX-NEXT: callq sinh@PLT9535; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9536; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9537; AVX-NEXT: addq $24, %rsp9538; AVX-NEXT: .cfi_def_cfa_offset 89539; AVX-NEXT: retq9540entry:9541 %sinh = call <2 x double> @llvm.experimental.constrained.sinh.v2f64(9542 <2 x double> <double 42.0, double 42.1>,9543 metadata !"round.dynamic",9544 metadata !"fpexcept.strict") #09545 ret <2 x double> %sinh9546}9547 9548define <3 x float> @constrained_vector_sinh_v3f32() #0 {9549; CHECK-LABEL: constrained_vector_sinh_v3f32:9550; CHECK: # %bb.0: # %entry9551; CHECK-NEXT: subq $40, %rsp9552; CHECK-NEXT: .cfi_def_cfa_offset 489553; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9554; CHECK-NEXT: callq sinhf@PLT9555; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9556; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9557; CHECK-NEXT: callq sinhf@PLT9558; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9559; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9560; CHECK-NEXT: callq sinhf@PLT9561; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload9562; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]9563; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9564; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9565; CHECK-NEXT: movaps %xmm1, %xmm09566; CHECK-NEXT: addq $40, %rsp9567; CHECK-NEXT: .cfi_def_cfa_offset 89568; CHECK-NEXT: retq9569;9570; AVX-LABEL: constrained_vector_sinh_v3f32:9571; AVX: # %bb.0: # %entry9572; AVX-NEXT: subq $40, %rsp9573; AVX-NEXT: .cfi_def_cfa_offset 489574; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9575; AVX-NEXT: callq sinhf@PLT9576; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9577; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9578; AVX-NEXT: callq sinhf@PLT9579; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9580; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9581; AVX-NEXT: callq sinhf@PLT9582; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload9583; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]9584; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9585; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]9586; AVX-NEXT: addq $40, %rsp9587; AVX-NEXT: .cfi_def_cfa_offset 89588; AVX-NEXT: retq9589entry:9590 %sinh = call <3 x float> @llvm.experimental.constrained.sinh.v3f32(9591 <3 x float> <float 42.0, float 43.0, float 44.0>,9592 metadata !"round.dynamic",9593 metadata !"fpexcept.strict") #09594 ret <3 x float> %sinh9595}9596 9597define <3 x double> @constrained_vector_sinh_v3f64() #0 {9598; CHECK-LABEL: constrained_vector_sinh_v3f64:9599; CHECK: # %bb.0: # %entry9600; CHECK-NEXT: subq $24, %rsp9601; CHECK-NEXT: .cfi_def_cfa_offset 329602; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9603; CHECK-NEXT: callq sinh@PLT9604; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill9605; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9606; CHECK-NEXT: callq sinh@PLT9607; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill9608; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9609; CHECK-NEXT: callq sinh@PLT9610; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)9611; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)9612; CHECK-NEXT: wait9613; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload9614; CHECK-NEXT: # xmm0 = mem[0],zero9615; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload9616; CHECK-NEXT: # xmm1 = mem[0],zero9617; CHECK-NEXT: addq $24, %rsp9618; CHECK-NEXT: .cfi_def_cfa_offset 89619; CHECK-NEXT: retq9620;9621; AVX-LABEL: constrained_vector_sinh_v3f64:9622; AVX: # %bb.0: # %entry9623; AVX-NEXT: subq $40, %rsp9624; AVX-NEXT: .cfi_def_cfa_offset 489625; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9626; AVX-NEXT: callq sinh@PLT9627; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9628; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9629; AVX-NEXT: callq sinh@PLT9630; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9631; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9632; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill9633; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9634; AVX-NEXT: vzeroupper9635; AVX-NEXT: callq sinh@PLT9636; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload9637; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm09638; AVX-NEXT: addq $40, %rsp9639; AVX-NEXT: .cfi_def_cfa_offset 89640; AVX-NEXT: retq9641entry:9642 %sinh = call <3 x double> @llvm.experimental.constrained.sinh.v3f64(9643 <3 x double> <double 42.0, double 42.1, double 42.2>,9644 metadata !"round.dynamic",9645 metadata !"fpexcept.strict") #09646 ret <3 x double> %sinh9647}9648 9649define <4 x double> @constrained_vector_sinh_v4f64() #0 {9650; CHECK-LABEL: constrained_vector_sinh_v4f64:9651; CHECK: # %bb.0: # %entry9652; CHECK-NEXT: subq $40, %rsp9653; CHECK-NEXT: .cfi_def_cfa_offset 489654; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9655; CHECK-NEXT: callq sinh@PLT9656; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9657; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9658; CHECK-NEXT: callq sinh@PLT9659; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9660; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9661; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9662; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9663; CHECK-NEXT: callq sinh@PLT9664; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9665; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9666; CHECK-NEXT: callq sinh@PLT9667; CHECK-NEXT: movaps %xmm0, %xmm19668; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9669; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9670; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload9671; CHECK-NEXT: addq $40, %rsp9672; CHECK-NEXT: .cfi_def_cfa_offset 89673; CHECK-NEXT: retq9674;9675; AVX-LABEL: constrained_vector_sinh_v4f64:9676; AVX: # %bb.0: # %entry9677; AVX-NEXT: subq $40, %rsp9678; AVX-NEXT: .cfi_def_cfa_offset 489679; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9680; AVX-NEXT: callq sinh@PLT9681; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9682; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9683; AVX-NEXT: callq sinh@PLT9684; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9685; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9686; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9687; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9688; AVX-NEXT: callq sinh@PLT9689; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9690; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9691; AVX-NEXT: callq sinh@PLT9692; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9693; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9694; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload9695; AVX-NEXT: addq $40, %rsp9696; AVX-NEXT: .cfi_def_cfa_offset 89697; AVX-NEXT: retq9698entry:9699 %sinh = call <4 x double> @llvm.experimental.constrained.sinh.v4f64(9700 <4 x double> <double 42.0, double 42.1,9701 double 42.2, double 42.3>,9702 metadata !"round.dynamic",9703 metadata !"fpexcept.strict") #09704 ret <4 x double> %sinh9705}9706 9707define <1 x float> @constrained_vector_tanh_v1f32() #0 {9708; CHECK-LABEL: constrained_vector_tanh_v1f32:9709; CHECK: # %bb.0: # %entry9710; CHECK-NEXT: pushq %rax9711; CHECK-NEXT: .cfi_def_cfa_offset 169712; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9713; CHECK-NEXT: callq tanhf@PLT9714; CHECK-NEXT: popq %rax9715; CHECK-NEXT: .cfi_def_cfa_offset 89716; CHECK-NEXT: retq9717;9718; AVX-LABEL: constrained_vector_tanh_v1f32:9719; AVX: # %bb.0: # %entry9720; AVX-NEXT: pushq %rax9721; AVX-NEXT: .cfi_def_cfa_offset 169722; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9723; AVX-NEXT: callq tanhf@PLT9724; AVX-NEXT: popq %rax9725; AVX-NEXT: .cfi_def_cfa_offset 89726; AVX-NEXT: retq9727entry:9728 %tanh = call <1 x float> @llvm.experimental.constrained.tanh.v1f32(9729 <1 x float> <float 42.0>,9730 metadata !"round.dynamic",9731 metadata !"fpexcept.strict") #09732 ret <1 x float> %tanh9733}9734 9735define <2 x double> @constrained_vector_tanh_v2f64() #0 {9736; CHECK-LABEL: constrained_vector_tanh_v2f64:9737; CHECK: # %bb.0: # %entry9738; CHECK-NEXT: subq $24, %rsp9739; CHECK-NEXT: .cfi_def_cfa_offset 329740; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9741; CHECK-NEXT: callq tanh@PLT9742; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9743; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9744; CHECK-NEXT: callq tanh@PLT9745; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9746; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9747; CHECK-NEXT: addq $24, %rsp9748; CHECK-NEXT: .cfi_def_cfa_offset 89749; CHECK-NEXT: retq9750;9751; AVX-LABEL: constrained_vector_tanh_v2f64:9752; AVX: # %bb.0: # %entry9753; AVX-NEXT: subq $24, %rsp9754; AVX-NEXT: .cfi_def_cfa_offset 329755; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9756; AVX-NEXT: callq tanh@PLT9757; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9758; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9759; AVX-NEXT: callq tanh@PLT9760; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9761; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9762; AVX-NEXT: addq $24, %rsp9763; AVX-NEXT: .cfi_def_cfa_offset 89764; AVX-NEXT: retq9765entry:9766 %tanh = call <2 x double> @llvm.experimental.constrained.tanh.v2f64(9767 <2 x double> <double 42.0, double 42.1>,9768 metadata !"round.dynamic",9769 metadata !"fpexcept.strict") #09770 ret <2 x double> %tanh9771}9772 9773define <3 x float> @constrained_vector_tanh_v3f32() #0 {9774; CHECK-LABEL: constrained_vector_tanh_v3f32:9775; CHECK: # %bb.0: # %entry9776; CHECK-NEXT: subq $40, %rsp9777; CHECK-NEXT: .cfi_def_cfa_offset 489778; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9779; CHECK-NEXT: callq tanhf@PLT9780; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9781; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9782; CHECK-NEXT: callq tanhf@PLT9783; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9784; CHECK-NEXT: movss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9785; CHECK-NEXT: callq tanhf@PLT9786; CHECK-NEXT: movaps (%rsp), %xmm1 # 16-byte Reload9787; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]9788; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9789; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9790; CHECK-NEXT: movaps %xmm1, %xmm09791; CHECK-NEXT: addq $40, %rsp9792; CHECK-NEXT: .cfi_def_cfa_offset 89793; CHECK-NEXT: retq9794;9795; AVX-LABEL: constrained_vector_tanh_v3f32:9796; AVX: # %bb.0: # %entry9797; AVX-NEXT: subq $40, %rsp9798; AVX-NEXT: .cfi_def_cfa_offset 489799; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.4E+1,0.0E+0,0.0E+0,0.0E+0]9800; AVX-NEXT: callq tanhf@PLT9801; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9802; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.2E+1,0.0E+0,0.0E+0,0.0E+0]9803; AVX-NEXT: callq tanhf@PLT9804; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9805; AVX-NEXT: vmovss {{.*#+}} xmm0 = [4.3E+1,0.0E+0,0.0E+0,0.0E+0]9806; AVX-NEXT: callq tanhf@PLT9807; AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload9808; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]9809; AVX-NEXT: vinsertps $32, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9810; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]9811; AVX-NEXT: addq $40, %rsp9812; AVX-NEXT: .cfi_def_cfa_offset 89813; AVX-NEXT: retq9814entry:9815 %tanh = call <3 x float> @llvm.experimental.constrained.tanh.v3f32(9816 <3 x float> <float 42.0, float 43.0, float 44.0>,9817 metadata !"round.dynamic",9818 metadata !"fpexcept.strict") #09819 ret <3 x float> %tanh9820}9821 9822define <3 x double> @constrained_vector_tanh_v3f64() #0 {9823; CHECK-LABEL: constrained_vector_tanh_v3f64:9824; CHECK: # %bb.0: # %entry9825; CHECK-NEXT: subq $24, %rsp9826; CHECK-NEXT: .cfi_def_cfa_offset 329827; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9828; CHECK-NEXT: callq tanh@PLT9829; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill9830; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9831; CHECK-NEXT: callq tanh@PLT9832; CHECK-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill9833; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9834; CHECK-NEXT: callq tanh@PLT9835; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)9836; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)9837; CHECK-NEXT: wait9838; CHECK-NEXT: movsd (%rsp), %xmm0 # 8-byte Reload9839; CHECK-NEXT: # xmm0 = mem[0],zero9840; CHECK-NEXT: movsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 8-byte Reload9841; CHECK-NEXT: # xmm1 = mem[0],zero9842; CHECK-NEXT: addq $24, %rsp9843; CHECK-NEXT: .cfi_def_cfa_offset 89844; CHECK-NEXT: retq9845;9846; AVX-LABEL: constrained_vector_tanh_v3f64:9847; AVX: # %bb.0: # %entry9848; AVX-NEXT: subq $40, %rsp9849; AVX-NEXT: .cfi_def_cfa_offset 489850; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9851; AVX-NEXT: callq tanh@PLT9852; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9853; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9854; AVX-NEXT: callq tanh@PLT9855; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9856; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9857; AVX-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill9858; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9859; AVX-NEXT: vzeroupper9860; AVX-NEXT: callq tanh@PLT9861; AVX-NEXT: vmovups (%rsp), %ymm1 # 32-byte Reload9862; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm09863; AVX-NEXT: addq $40, %rsp9864; AVX-NEXT: .cfi_def_cfa_offset 89865; AVX-NEXT: retq9866entry:9867 %tanh = call <3 x double> @llvm.experimental.constrained.tanh.v3f64(9868 <3 x double> <double 42.0, double 42.1, double 42.2>,9869 metadata !"round.dynamic",9870 metadata !"fpexcept.strict") #09871 ret <3 x double> %tanh9872}9873 9874define <4 x double> @constrained_vector_tanh_v4f64() #0 {9875; CHECK-LABEL: constrained_vector_tanh_v4f64:9876; CHECK: # %bb.0: # %entry9877; CHECK-NEXT: subq $40, %rsp9878; CHECK-NEXT: .cfi_def_cfa_offset 489879; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9880; CHECK-NEXT: callq tanh@PLT9881; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9882; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9883; CHECK-NEXT: callq tanh@PLT9884; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload9885; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]9886; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill9887; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9888; CHECK-NEXT: callq tanh@PLT9889; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9890; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9891; CHECK-NEXT: callq tanh@PLT9892; CHECK-NEXT: movaps %xmm0, %xmm19893; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload9894; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]9895; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload9896; CHECK-NEXT: addq $40, %rsp9897; CHECK-NEXT: .cfi_def_cfa_offset 89898; CHECK-NEXT: retq9899;9900; AVX-LABEL: constrained_vector_tanh_v4f64:9901; AVX: # %bb.0: # %entry9902; AVX-NEXT: subq $40, %rsp9903; AVX-NEXT: .cfi_def_cfa_offset 489904; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2299999999999997E+1,0.0E+0]9905; AVX-NEXT: callq tanh@PLT9906; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9907; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2200000000000003E+1,0.0E+0]9908; AVX-NEXT: callq tanh@PLT9909; AVX-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload9910; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9911; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill9912; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2100000000000001E+1,0.0E+0]9913; AVX-NEXT: callq tanh@PLT9914; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9915; AVX-NEXT: vmovsd {{.*#+}} xmm0 = [4.2E+1,0.0E+0]9916; AVX-NEXT: callq tanh@PLT9917; AVX-NEXT: vunpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload9918; AVX-NEXT: # xmm0 = xmm0[0],mem[0]9919; AVX-NEXT: vinsertf128 $1, (%rsp), %ymm0, %ymm0 # 16-byte Folded Reload9920; AVX-NEXT: addq $40, %rsp9921; AVX-NEXT: .cfi_def_cfa_offset 89922; AVX-NEXT: retq9923entry:9924 %tanh = call <4 x double> @llvm.experimental.constrained.tanh.v4f64(9925 <4 x double> <double 42.0, double 42.1,9926 double 42.2, double 42.3>,9927 metadata !"round.dynamic",9928 metadata !"fpexcept.strict") #09929 ret <4 x double> %tanh9930}9931 9932declare <16 x float> @llvm.experimental.constrained.fadd.v16f32(<16 x float>, <16 x float>, metadata, metadata)9933 9934attributes #0 = { strictfp }9935 9936; Single width declarations9937declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)9938declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)9939declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)9940declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)9941declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata)9942declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)9943declare <2 x double> @llvm.experimental.constrained.pow.v2f64(<2 x double>, <2 x double>, metadata, metadata)9944declare <2 x double> @llvm.experimental.constrained.powi.v2f64(<2 x double>, i32, metadata, metadata)9945declare <2 x double> @llvm.experimental.constrained.sin.v2f64(<2 x double>, metadata, metadata)9946declare <2 x double> @llvm.experimental.constrained.cos.v2f64(<2 x double>, metadata, metadata)9947declare <2 x double> @llvm.experimental.constrained.tan.v2f64(<2 x double>, metadata, metadata)9948declare <2 x double> @llvm.experimental.constrained.asin.v2f64(<2 x double>, metadata, metadata)9949declare <2 x double> @llvm.experimental.constrained.acos.v2f64(<2 x double>, metadata, metadata)9950declare <2 x double> @llvm.experimental.constrained.atan.v2f64(<2 x double>, metadata, metadata)9951declare <2 x double> @llvm.experimental.constrained.sinh.v2f64(<2 x double>, metadata, metadata)9952declare <2 x double> @llvm.experimental.constrained.cosh.v2f64(<2 x double>, metadata, metadata)9953declare <2 x double> @llvm.experimental.constrained.tanh.v2f64(<2 x double>, metadata, metadata)9954declare <2 x double> @llvm.experimental.constrained.exp.v2f64(<2 x double>, metadata, metadata)9955declare <2 x double> @llvm.experimental.constrained.exp2.v2f64(<2 x double>, metadata, metadata)9956declare <2 x double> @llvm.experimental.constrained.log.v2f64(<2 x double>, metadata, metadata)9957declare <2 x double> @llvm.experimental.constrained.log10.v2f64(<2 x double>, metadata, metadata)9958declare <2 x double> @llvm.experimental.constrained.log2.v2f64(<2 x double>, metadata, metadata)9959declare <2 x double> @llvm.experimental.constrained.rint.v2f64(<2 x double>, metadata, metadata)9960declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata)9961declare <2 x double> @llvm.experimental.constrained.maxnum.v2f64(<2 x double>, <2 x double>, metadata)9962declare <2 x double> @llvm.experimental.constrained.minnum.v2f64(<2 x double>, <2 x double>, metadata)9963declare <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f32(<2 x float>, metadata)9964declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float>, metadata)9965declare <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double>, metadata)9966declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double>, metadata)9967declare <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32(<2 x float>, metadata)9968declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float>, metadata)9969declare <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double>, metadata)9970declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double>, metadata)9971declare <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(<2 x double>, metadata, metadata)9972declare <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(<2 x float>, metadata)9973declare <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double>, metadata)9974declare <2 x double> @llvm.experimental.constrained.floor.v2f64(<2 x double>, metadata)9975declare <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double>, metadata)9976declare <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double>, metadata)9977declare <2 x double> @llvm.experimental.constrained.sitofp.v2f64.v2i32(<2 x i32>, metadata, metadata)9978declare <2 x float> @llvm.experimental.constrained.sitofp.v2f32.v2i32(<2 x i32>, metadata, metadata)9979declare <2 x double> @llvm.experimental.constrained.sitofp.v2f64.v2i64(<2 x i64>, metadata, metadata)9980declare <2 x float> @llvm.experimental.constrained.sitofp.v2f32.v2i64(<2 x i64>, metadata, metadata)9981declare <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i32(<2 x i32>, metadata, metadata)9982declare <2 x float> @llvm.experimental.constrained.uitofp.v2f32.v2i32(<2 x i32>, metadata, metadata)9983declare <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i64(<2 x i64>, metadata, metadata)9984declare <2 x float> @llvm.experimental.constrained.uitofp.v2f32.v2i64(<2 x i64>, metadata, metadata)9985 9986; Scalar width declarations9987declare <1 x float> @llvm.experimental.constrained.fadd.v1f32(<1 x float>, <1 x float>, metadata, metadata)9988declare <1 x float> @llvm.experimental.constrained.fsub.v1f32(<1 x float>, <1 x float>, metadata, metadata)9989declare <1 x float> @llvm.experimental.constrained.fmul.v1f32(<1 x float>, <1 x float>, metadata, metadata)9990declare <1 x float> @llvm.experimental.constrained.fdiv.v1f32(<1 x float>, <1 x float>, metadata, metadata)9991declare <1 x float> @llvm.experimental.constrained.frem.v1f32(<1 x float>, <1 x float>, metadata, metadata)9992declare <1 x float> @llvm.experimental.constrained.sqrt.v1f32(<1 x float>, metadata, metadata)9993declare <1 x float> @llvm.experimental.constrained.pow.v1f32(<1 x float>, <1 x float>, metadata, metadata)9994declare <1 x float> @llvm.experimental.constrained.powi.v1f32(<1 x float>, i32, metadata, metadata)9995declare <1 x float> @llvm.experimental.constrained.sin.v1f32(<1 x float>, metadata, metadata)9996declare <1 x float> @llvm.experimental.constrained.cos.v1f32(<1 x float>, metadata, metadata)9997declare <1 x float> @llvm.experimental.constrained.tan.v1f32(<1 x float>, metadata, metadata)9998declare <1 x float> @llvm.experimental.constrained.asin.v1f32(<1 x float>, metadata, metadata)9999declare <1 x float> @llvm.experimental.constrained.acos.v1f32(<1 x float>, metadata, metadata)10000declare <1 x float> @llvm.experimental.constrained.atan.v1f32(<1 x float>, metadata, metadata)10001declare <1 x float> @llvm.experimental.constrained.sinh.v1f32(<1 x float>, metadata, metadata)10002declare <1 x float> @llvm.experimental.constrained.cosh.v1f32(<1 x float>, metadata, metadata)10003declare <1 x float> @llvm.experimental.constrained.tanh.v1f32(<1 x float>, metadata, metadata)10004declare <1 x float> @llvm.experimental.constrained.exp.v1f32(<1 x float>, metadata, metadata)10005declare <1 x float> @llvm.experimental.constrained.exp2.v1f32(<1 x float>, metadata, metadata)10006declare <1 x float> @llvm.experimental.constrained.log.v1f32(<1 x float>, metadata, metadata)10007declare <1 x float> @llvm.experimental.constrained.log10.v1f32(<1 x float>, metadata, metadata)10008declare <1 x float> @llvm.experimental.constrained.log2.v1f32(<1 x float>, metadata, metadata)10009declare <1 x float> @llvm.experimental.constrained.rint.v1f32(<1 x float>, metadata, metadata)10010declare <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(<1 x float>, metadata, metadata)10011declare <1 x float> @llvm.experimental.constrained.maxnum.v1f32(<1 x float>, <1 x float>, metadata)10012declare <1 x float> @llvm.experimental.constrained.minnum.v1f32(<1 x float>, <1 x float>, metadata)10013declare <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f32(<1 x float>, metadata)10014declare <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f32(<1 x float>, metadata)10015declare <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f64(<1 x double>, metadata)10016declare <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(<1 x double>, metadata)10017declare <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32(<1 x float>, metadata)10018declare <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32(<1 x float>, metadata)10019declare <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64(<1 x double>, metadata)10020declare <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(<1 x double>, metadata)10021declare <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(<1 x double>, metadata, metadata)10022declare <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(<1 x float>, metadata)10023declare <1 x float> @llvm.experimental.constrained.ceil.v1f32(<1 x float>, metadata)10024declare <1 x float> @llvm.experimental.constrained.floor.v1f32(<1 x float>, metadata)10025declare <1 x float> @llvm.experimental.constrained.round.v1f32(<1 x float>, metadata)10026declare <1 x float> @llvm.experimental.constrained.trunc.v1f32(<1 x float>, metadata)10027declare <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i32(<1 x i32>, metadata, metadata)10028declare <1 x float> @llvm.experimental.constrained.sitofp.v1f32.v1i32(<1 x i32>, metadata, metadata)10029declare <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i64(<1 x i64>, metadata, metadata)10030declare <1 x float> @llvm.experimental.constrained.sitofp.v1f32.v1i64(<1 x i64>, metadata, metadata)10031declare <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i32(<1 x i32>, metadata, metadata)10032declare <1 x float> @llvm.experimental.constrained.uitofp.v1f32.v1i32(<1 x i32>, metadata, metadata)10033declare <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i64(<1 x i64>, metadata, metadata)10034declare <1 x float> @llvm.experimental.constrained.uitofp.v1f32.v1i64(<1 x i64>, metadata, metadata)10035 10036; Illegal width declarations10037declare <3 x float> @llvm.experimental.constrained.fadd.v3f32(<3 x float>, <3 x float>, metadata, metadata)10038declare <3 x double> @llvm.experimental.constrained.fadd.v3f64(<3 x double>, <3 x double>, metadata, metadata)10039declare <3 x float> @llvm.experimental.constrained.fsub.v3f32(<3 x float>, <3 x float>, metadata, metadata)10040declare <3 x double> @llvm.experimental.constrained.fsub.v3f64(<3 x double>, <3 x double>, metadata, metadata)10041declare <3 x float> @llvm.experimental.constrained.fmul.v3f32(<3 x float>, <3 x float>, metadata, metadata)10042declare <3 x double> @llvm.experimental.constrained.fmul.v3f64(<3 x double>, <3 x double>, metadata, metadata)10043declare <3 x float> @llvm.experimental.constrained.fdiv.v3f32(<3 x float>, <3 x float>, metadata, metadata)10044declare <3 x double> @llvm.experimental.constrained.fdiv.v3f64(<3 x double>, <3 x double>, metadata, metadata)10045declare <3 x float> @llvm.experimental.constrained.frem.v3f32(<3 x float>, <3 x float>, metadata, metadata)10046declare <3 x double> @llvm.experimental.constrained.frem.v3f64(<3 x double>, <3 x double>, metadata, metadata)10047declare <3 x float> @llvm.experimental.constrained.sqrt.v3f32(<3 x float>, metadata, metadata)10048declare <3 x double> @llvm.experimental.constrained.sqrt.v3f64(<3 x double>, metadata, metadata)10049declare <3 x float> @llvm.experimental.constrained.pow.v3f32(<3 x float>, <3 x float>, metadata, metadata)10050declare <3 x double> @llvm.experimental.constrained.pow.v3f64(<3 x double>, <3 x double>, metadata, metadata)10051declare <3 x float> @llvm.experimental.constrained.powi.v3f32(<3 x float>, i32, metadata, metadata)10052declare <3 x double> @llvm.experimental.constrained.powi.v3f64(<3 x double>, i32, metadata, metadata)10053declare <3 x float> @llvm.experimental.constrained.sin.v3f32(<3 x float>, metadata, metadata)10054declare <3 x double> @llvm.experimental.constrained.sin.v3f64(<3 x double>, metadata, metadata)10055declare <3 x float> @llvm.experimental.constrained.cos.v3f32(<3 x float>, metadata, metadata)10056declare <3 x double> @llvm.experimental.constrained.cos.v3f64(<3 x double>, metadata, metadata)10057declare <3 x float> @llvm.experimental.constrained.tan.v3f32(<3 x float>, metadata, metadata)10058declare <3 x double> @llvm.experimental.constrained.tan.v3f64(<3 x double>, metadata, metadata)10059declare <3 x float> @llvm.experimental.constrained.asin.v3f32(<3 x float>, metadata, metadata)10060declare <3 x double> @llvm.experimental.constrained.asin.v3f64(<3 x double>, metadata, metadata)10061declare <3 x float> @llvm.experimental.constrained.acos.v3f32(<3 x float>, metadata, metadata)10062declare <3 x double> @llvm.experimental.constrained.acos.v3f64(<3 x double>, metadata, metadata)10063declare <3 x float> @llvm.experimental.constrained.atan.v3f32(<3 x float>, metadata, metadata)10064declare <3 x double> @llvm.experimental.constrained.atan.v3f64(<3 x double>, metadata, metadata)10065declare <3 x float> @llvm.experimental.constrained.sinh.v3f32(<3 x float>, metadata, metadata)10066declare <3 x double> @llvm.experimental.constrained.sinh.v3f64(<3 x double>, metadata, metadata)10067declare <3 x float> @llvm.experimental.constrained.cosh.v3f32(<3 x float>, metadata, metadata)10068declare <3 x double> @llvm.experimental.constrained.cosh.v3f64(<3 x double>, metadata, metadata)10069declare <3 x float> @llvm.experimental.constrained.tanh.v3f32(<3 x float>, metadata, metadata)10070declare <3 x double> @llvm.experimental.constrained.tanh.v3f64(<3 x double>, metadata, metadata)10071declare <3 x float> @llvm.experimental.constrained.exp.v3f32(<3 x float>, metadata, metadata)10072declare <3 x double> @llvm.experimental.constrained.exp.v3f64(<3 x double>, metadata, metadata)10073declare <3 x float> @llvm.experimental.constrained.exp2.v3f32(<3 x float>, metadata, metadata)10074declare <3 x double> @llvm.experimental.constrained.exp2.v3f64(<3 x double>, metadata, metadata)10075declare <3 x float> @llvm.experimental.constrained.log.v3f32(<3 x float>, metadata, metadata)10076declare <3 x double> @llvm.experimental.constrained.log.v3f64(<3 x double>, metadata, metadata)10077declare <3 x float> @llvm.experimental.constrained.log10.v3f32(<3 x float>, metadata, metadata)10078declare <3 x double> @llvm.experimental.constrained.log10.v3f64(<3 x double>, metadata, metadata)10079declare <3 x float> @llvm.experimental.constrained.log2.v3f32(<3 x float>, metadata, metadata)10080declare <3 x double> @llvm.experimental.constrained.log2.v3f64(<3 x double>, metadata, metadata)10081declare <3 x float> @llvm.experimental.constrained.rint.v3f32(<3 x float>, metadata, metadata)10082declare <3 x double> @llvm.experimental.constrained.rint.v3f64(<3 x double>, metadata, metadata)10083declare <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(<3 x float>, metadata, metadata)10084declare <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(<3 x double>, metadata, metadata)10085declare <3 x float> @llvm.experimental.constrained.maxnum.v3f32(<3 x float>, <3 x float>, metadata)10086declare <3 x double> @llvm.experimental.constrained.maxnum.v3f64(<3 x double>, <3 x double>, metadata)10087declare <3 x float> @llvm.experimental.constrained.minnum.v3f32(<3 x float>, <3 x float>, metadata)10088declare <3 x double> @llvm.experimental.constrained.minnum.v3f64(<3 x double>, <3 x double>, metadata)10089declare <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32(<3 x float>, metadata)10090declare <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f32(<3 x float>, metadata)10091declare <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64(<3 x double>, metadata)10092declare <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f64(<3 x double>, metadata)10093declare <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(<3 x float>, metadata)10094declare <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f32(<3 x float>, metadata)10095declare <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(<3 x double>, metadata)10096declare <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f64(<3 x double>, metadata)10097declare <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(<3 x double>, metadata, metadata)10098declare <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(<3 x float>, metadata)10099declare <3 x float> @llvm.experimental.constrained.ceil.v3f32(<3 x float>, metadata)10100declare <3 x double> @llvm.experimental.constrained.ceil.v3f64(<3 x double>, metadata)10101declare <3 x float> @llvm.experimental.constrained.floor.v3f32(<3 x float>, metadata)10102declare <3 x double> @llvm.experimental.constrained.floor.v3f64(<3 x double>, metadata)10103declare <3 x float> @llvm.experimental.constrained.round.v3f32(<3 x float>, metadata)10104declare <3 x double> @llvm.experimental.constrained.round.v3f64(<3 x double>, metadata)10105declare <3 x float> @llvm.experimental.constrained.trunc.v3f32(<3 x float>, metadata)10106declare <3 x double> @llvm.experimental.constrained.trunc.v3f64(<3 x double>, metadata)10107declare <3 x double> @llvm.experimental.constrained.sitofp.v3f64.v3i32(<3 x i32>, metadata, metadata)10108declare <3 x float> @llvm.experimental.constrained.sitofp.v3f32.v3i32(<3 x i32>, metadata, metadata)10109declare <3 x double> @llvm.experimental.constrained.sitofp.v3f64.v3i64(<3 x i64>, metadata, metadata)10110declare <3 x float> @llvm.experimental.constrained.sitofp.v3f32.v3i64(<3 x i64>, metadata, metadata)10111declare <3 x double> @llvm.experimental.constrained.uitofp.v3f64.v3i32(<3 x i32>, metadata, metadata)10112declare <3 x float> @llvm.experimental.constrained.uitofp.v3f32.v3i32(<3 x i32>, metadata, metadata)10113declare <3 x double> @llvm.experimental.constrained.uitofp.v3f64.v3i64(<3 x i64>, metadata, metadata)10114declare <3 x float> @llvm.experimental.constrained.uitofp.v3f32.v3i64(<3 x i64>, metadata, metadata)10115 10116; Double width declarations10117declare <4 x double> @llvm.experimental.constrained.fadd.v4f64(<4 x double>, <4 x double>, metadata, metadata)10118declare <4 x double> @llvm.experimental.constrained.fsub.v4f64(<4 x double>, <4 x double>, metadata, metadata)10119declare <4 x double> @llvm.experimental.constrained.fmul.v4f64(<4 x double>, <4 x double>, metadata, metadata)10120declare <4 x double> @llvm.experimental.constrained.fdiv.v4f64(<4 x double>, <4 x double>, metadata, metadata)10121declare <4 x double> @llvm.experimental.constrained.frem.v4f64(<4 x double>, <4 x double>, metadata, metadata)10122declare <4 x double> @llvm.experimental.constrained.sqrt.v4f64(<4 x double>, metadata, metadata)10123declare <4 x double> @llvm.experimental.constrained.pow.v4f64(<4 x double>, <4 x double>, metadata, metadata)10124declare <4 x double> @llvm.experimental.constrained.powi.v4f64(<4 x double>, i32, metadata, metadata)10125declare <4 x double> @llvm.experimental.constrained.sin.v4f64(<4 x double>, metadata, metadata)10126declare <4 x double> @llvm.experimental.constrained.cos.v4f64(<4 x double>, metadata, metadata)10127declare <4 x double> @llvm.experimental.constrained.tan.v4f64(<4 x double>, metadata, metadata)10128declare <4 x double> @llvm.experimental.constrained.asin.v4f64(<4 x double>, metadata, metadata)10129declare <4 x double> @llvm.experimental.constrained.acos.v4f64(<4 x double>, metadata, metadata)10130declare <4 x double> @llvm.experimental.constrained.atan.v4f64(<4 x double>, metadata, metadata)10131declare <4 x double> @llvm.experimental.constrained.atan2.v4f64(<4 x double>, <4 x double>, metadata, metadata)10132declare <4 x double> @llvm.experimental.constrained.sinh.v4f64(<4 x double>, metadata, metadata)10133declare <4 x double> @llvm.experimental.constrained.cosh.v4f64(<4 x double>, metadata, metadata)10134declare <4 x double> @llvm.experimental.constrained.tanh.v4f64(<4 x double>, metadata, metadata)10135declare <4 x double> @llvm.experimental.constrained.exp.v4f64(<4 x double>, metadata, metadata)10136declare <4 x double> @llvm.experimental.constrained.exp2.v4f64(<4 x double>, metadata, metadata)10137declare <4 x double> @llvm.experimental.constrained.log.v4f64(<4 x double>, metadata, metadata)10138declare <4 x double> @llvm.experimental.constrained.log10.v4f64(<4 x double>, metadata, metadata)10139declare <4 x double> @llvm.experimental.constrained.log2.v4f64(<4 x double>, metadata, metadata)10140declare <4 x double> @llvm.experimental.constrained.rint.v4f64(<4 x double>, metadata, metadata)10141declare <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(<4 x double>, metadata, metadata)10142declare <4 x double> @llvm.experimental.constrained.maxnum.v4f64(<4 x double>, <4 x double>, metadata)10143declare <4 x double> @llvm.experimental.constrained.minnum.v4f64(<4 x double>, <4 x double>, metadata)10144declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float>, metadata)10145declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(<4 x float>, metadata)10146declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(<4 x double>, metadata)10147declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(<4 x double>, metadata)10148declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float>, metadata)10149declare <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(<4 x float>, metadata)10150declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(<4 x double>, metadata)10151declare <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(<4 x double>, metadata)10152declare <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(<4 x double>, metadata, metadata)10153declare <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(<4 x float>, metadata)10154declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata)10155declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata)10156declare <4 x double> @llvm.experimental.constrained.round.v4f64(<4 x double>, metadata)10157declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata)10158declare <4 x double> @llvm.experimental.constrained.sitofp.v4f64.v4i32(<4 x i32>, metadata, metadata)10159declare <4 x float> @llvm.experimental.constrained.sitofp.v4f32.v4i32(<4 x i32>, metadata, metadata)10160declare <4 x double> @llvm.experimental.constrained.sitofp.v4f64.v4i64(<4 x i64>, metadata, metadata)10161declare <4 x float> @llvm.experimental.constrained.sitofp.v4f32.v4i64(<4 x i64>, metadata, metadata)10162declare <4 x double> @llvm.experimental.constrained.uitofp.v4f64.v4i32(<4 x i32>, metadata, metadata)10163declare <4 x float> @llvm.experimental.constrained.uitofp.v4f32.v4i32(<4 x i32>, metadata, metadata)10164declare <4 x double> @llvm.experimental.constrained.uitofp.v4f64.v4i64(<4 x i64>, metadata, metadata)10165declare <4 x float> @llvm.experimental.constrained.uitofp.v4f32.v4i64(<4 x i64>, metadata, metadata)10166 10167