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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7-avx | FileCheck %s3; RUN: opt -passes=instsimplify -disable-output < %s4 5define <4 x ptr> @AGEP0(ptr %ptr) nounwind {6; CHECK-LABEL: AGEP0:7; CHECK: # %bb.0:8; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm09; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm010; CHECK-NEXT: retl11 %vecinit.i = insertelement <4 x ptr> undef, ptr %ptr, i32 012 %vecinit2.i = insertelement <4 x ptr> %vecinit.i, ptr %ptr, i32 113 %vecinit4.i = insertelement <4 x ptr> %vecinit2.i, ptr %ptr, i32 214 %vecinit6.i = insertelement <4 x ptr> %vecinit4.i, ptr %ptr, i32 315 %A2 = getelementptr i32, <4 x ptr> %vecinit6.i, <4 x i32> <i32 1, i32 2, i32 3, i32 4>16 %A3 = getelementptr i32, <4 x ptr> %A2, <4 x i32> <i32 10, i32 14, i32 19, i32 233>17 ret <4 x ptr> %A318}19 20define i32 @AGEP1(<4 x ptr> %param) nounwind {21; CHECK-LABEL: AGEP1:22; CHECK: # %bb.0:23; CHECK-NEXT: vextractps $3, %xmm0, %eax24; CHECK-NEXT: movl 16(%eax), %eax25; CHECK-NEXT: retl26 %A2 = getelementptr i32, <4 x ptr> %param, <4 x i32> <i32 1, i32 2, i32 3, i32 4>27 %k = extractelement <4 x ptr> %A2, i32 328 %v = load i32, ptr %k29 ret i32 %v30}31 32define i32 @AGEP2(<4 x ptr> %param, <4 x i32> %off) nounwind {33; CHECK-LABEL: AGEP2:34; CHECK: # %bb.0:35; CHECK-NEXT: vpslld $2, %xmm1, %xmm136; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm037; CHECK-NEXT: vpextrd $3, %xmm0, %eax38; CHECK-NEXT: movl (%eax), %eax39; CHECK-NEXT: retl40 %A2 = getelementptr i32, <4 x ptr> %param, <4 x i32> %off41 %k = extractelement <4 x ptr> %A2, i32 342 %v = load i32, ptr %k43 ret i32 %v44}45 46define <4 x ptr> @AGEP3(<4 x ptr> %param, <4 x i32> %off) nounwind {47; CHECK-LABEL: AGEP3:48; CHECK: # %bb.0:49; CHECK-NEXT: pushl %eax50; CHECK-NEXT: vpslld $2, %xmm1, %xmm151; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm052; CHECK-NEXT: movl %esp, %eax53; CHECK-NEXT: vpinsrd $3, %eax, %xmm0, %xmm054; CHECK-NEXT: popl %eax55; CHECK-NEXT: retl56 %A2 = getelementptr i32, <4 x ptr> %param, <4 x i32> %off57 %v = alloca i3258 %k = insertelement <4 x ptr> %A2, ptr %v, i32 359 ret <4 x ptr> %k60}61 62define <4 x ptr> @AGEP4(<4 x ptr> %param, <4 x i32> %off) nounwind {63; Multiply offset by two (add it to itself).64; add the base to the offset65; CHECK-LABEL: AGEP4:66; CHECK: # %bb.0:67; CHECK-NEXT: vpaddd %xmm1, %xmm1, %xmm168; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm069; CHECK-NEXT: retl70 %A = getelementptr i16, <4 x ptr> %param, <4 x i32> %off71 ret <4 x ptr> %A72}73 74define <4 x ptr> @AGEP5(<4 x ptr> %param, <4 x i8> %off) nounwind {75; CHECK-LABEL: AGEP5:76; CHECK: # %bb.0:77; CHECK-NEXT: vpmovsxbd %xmm1, %xmm178; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm079; CHECK-NEXT: retl80 %A = getelementptr i8, <4 x ptr> %param, <4 x i8> %off81 ret <4 x ptr> %A82}83 84 85; The size of each element is 1 byte. No need to multiply by element size.86define <4 x ptr> @AGEP6(<4 x ptr> %param, <4 x i32> %off) nounwind {87; CHECK-LABEL: AGEP6:88; CHECK: # %bb.0:89; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm090; CHECK-NEXT: retl91 %A = getelementptr i8, <4 x ptr> %param, <4 x i32> %off92 ret <4 x ptr> %A93}94 95define <4 x ptr> @AGEP7(<4 x ptr> %param, i32 %off) nounwind {96; CHECK-LABEL: AGEP7:97; CHECK: # %bb.0:98; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm199; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0100; CHECK-NEXT: retl101 %A = getelementptr i8, <4 x ptr> %param, i32 %off102 ret <4 x ptr> %A103}104 105define <4 x ptr> @AGEP8(ptr %param, <4 x i32> %off) nounwind {106; Multiply offset by two (add it to itself).107; add the base to the offset108; CHECK-LABEL: AGEP8:109; CHECK: # %bb.0:110; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0111; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm1112; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm0113; CHECK-NEXT: retl114 %A = getelementptr i16, ptr %param, <4 x i32> %off115 ret <4 x ptr> %A116}117 118define <64 x ptr> @AGEP9(ptr %param, <64 x i32> %off) nounwind {119; CHECK-LABEL: AGEP9:120; CHECK: # %bb.0:121; CHECK-NEXT: pushl %ebp122; CHECK-NEXT: movl %esp, %ebp123; CHECK-NEXT: andl $-32, %esp124; CHECK-NEXT: subl $160, %esp125; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm3126; CHECK-NEXT: vbroadcastss 12(%ebp), %xmm5127; CHECK-NEXT: vpaddd %xmm3, %xmm5, %xmm3128; CHECK-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill129; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0130; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0131; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0132; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill133; CHECK-NEXT: vpaddd %xmm1, %xmm1, %xmm0134; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0135; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill136; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm0137; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0138; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0139; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill140; CHECK-NEXT: vpaddd %xmm2, %xmm2, %xmm0141; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0142; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill143; CHECK-NEXT: vextractf128 $1, %ymm2, %xmm0144; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0145; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0146; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill147; CHECK-NEXT: vmovdqa 40(%ebp), %xmm0148; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0149; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0150; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill151; CHECK-NEXT: vmovdqa 56(%ebp), %xmm0152; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0153; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0154; CHECK-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill155; CHECK-NEXT: vmovdqa 72(%ebp), %xmm0156; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0157; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0158; CHECK-NEXT: vmovdqa %xmm0, (%esp) # 16-byte Spill159; CHECK-NEXT: vmovdqa 88(%ebp), %xmm0160; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0161; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm2162; CHECK-NEXT: vmovdqa 104(%ebp), %xmm0163; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0164; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm1165; CHECK-NEXT: vmovdqa 120(%ebp), %xmm0166; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0167; CHECK-NEXT: vpaddd %xmm0, %xmm5, %xmm0168; CHECK-NEXT: vmovdqa 136(%ebp), %xmm6169; CHECK-NEXT: vpaddd %xmm6, %xmm6, %xmm6170; CHECK-NEXT: vpaddd %xmm6, %xmm5, %xmm6171; CHECK-NEXT: vmovdqa 152(%ebp), %xmm7172; CHECK-NEXT: vpaddd %xmm7, %xmm7, %xmm7173; CHECK-NEXT: vpaddd %xmm7, %xmm5, %xmm7174; CHECK-NEXT: vmovdqa 168(%ebp), %xmm4175; CHECK-NEXT: vpaddd %xmm4, %xmm4, %xmm4176; CHECK-NEXT: vpaddd %xmm4, %xmm5, %xmm4177; CHECK-NEXT: vmovdqa 184(%ebp), %xmm3178; CHECK-NEXT: vpaddd %xmm3, %xmm3, %xmm3179; CHECK-NEXT: vpaddd %xmm3, %xmm5, %xmm3180; CHECK-NEXT: movl 8(%ebp), %eax181; CHECK-NEXT: vmovdqa %xmm3, 240(%eax)182; CHECK-NEXT: vmovdqa %xmm4, 224(%eax)183; CHECK-NEXT: vmovdqa %xmm7, 208(%eax)184; CHECK-NEXT: vmovdqa %xmm6, 192(%eax)185; CHECK-NEXT: vmovdqa %xmm0, 176(%eax)186; CHECK-NEXT: vmovdqa %xmm1, 160(%eax)187; CHECK-NEXT: vmovdqa %xmm2, 144(%eax)188; CHECK-NEXT: vmovaps (%esp), %xmm0 # 16-byte Reload189; CHECK-NEXT: vmovaps %xmm0, 128(%eax)190; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload191; CHECK-NEXT: vmovaps %xmm0, 112(%eax)192; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload193; CHECK-NEXT: vmovaps %xmm0, 96(%eax)194; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload195; CHECK-NEXT: vmovaps %xmm0, 80(%eax)196; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload197; CHECK-NEXT: vmovaps %xmm0, 64(%eax)198; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload199; CHECK-NEXT: vmovaps %xmm0, 48(%eax)200; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload201; CHECK-NEXT: vmovaps %xmm0, 32(%eax)202; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload203; CHECK-NEXT: vmovaps %xmm0, 16(%eax)204; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload205; CHECK-NEXT: vmovaps %xmm0, (%eax)206; CHECK-NEXT: movl %ebp, %esp207; CHECK-NEXT: popl %ebp208; CHECK-NEXT: vzeroupper209; CHECK-NEXT: retl $4210 %A = getelementptr i16, ptr %param, <64 x i32> %off211 ret <64 x ptr> %A212}213 214