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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; FIXME: crash "Do not know how to split the result of this operator!"3; SKIP: sed 's/XRINT/lrint/g' %s | llc -mtriple=i686-unknown | FileCheck %s --check-prefix=X864; SKIP: sed 's/XRINT/llrint/g' %s | llc -mtriple=i686-unknown | FileCheck %s --check-prefix=X865; RUN: sed 's/XRINT/lrint/g' %s | llc -mtriple=x86_64-unknown -mattr=avx2,f16c | FileCheck %s --check-prefix=AVX6; RUN: sed 's/XRINT/llrint/g' %s | llc -mtriple=x86_64-unknown -mattr=avx2,f16c | FileCheck %s --check-prefix=AVX7; RUN: sed 's/XRINT/lrint/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefix=FP168; RUN: sed 's/XRINT/llrint/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefix=FP169 10define <1 x i64> @llrint_v1i64_v1f16(<1 x half> %x) nounwind {11; AVX-LABEL: llrint_v1i64_v1f16:12; AVX: # %bb.0:13; AVX-NEXT: vcvtph2ps %xmm0, %xmm014; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm015; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm016; AVX-NEXT: vcvtph2ps %xmm0, %xmm017; AVX-NEXT: vcvttss2si %xmm0, %rax18; AVX-NEXT: retq19;20; FP16-LABEL: llrint_v1i64_v1f16:21; FP16: # %bb.0:22; FP16-NEXT: vcvttsh2si %xmm0, %rax23; FP16-NEXT: retq24 %a = call <1 x i64> @llvm.XRINT.v1i64.v1f16(<1 x half> %x)25 ret <1 x i64> %a26}27 28define <2 x i64> @llrint_v2i64_v2f16(<2 x half> %x) nounwind {29; AVX-LABEL: llrint_v2i64_v2f16:30; AVX: # %bb.0:31; AVX-NEXT: vcvtph2ps %xmm0, %xmm132; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm133; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm134; AVX-NEXT: vcvtph2ps %xmm1, %xmm135; AVX-NEXT: vcvttss2si %xmm1, %rax36; AVX-NEXT: vmovq %rax, %xmm137; AVX-NEXT: vpsrld $16, %xmm0, %xmm038; AVX-NEXT: vcvtph2ps %xmm0, %xmm039; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm040; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm041; AVX-NEXT: vcvtph2ps %xmm0, %xmm042; AVX-NEXT: vcvttss2si %xmm0, %rax43; AVX-NEXT: vmovq %rax, %xmm044; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]45; AVX-NEXT: retq46;47; FP16-LABEL: llrint_v2i64_v2f16:48; FP16: # %bb.0:49; FP16-NEXT: vcvtph2qq %xmm0, %xmm050; FP16-NEXT: retq51 %a = call <2 x i64> @llvm.XRINT.v2i64.v2f16(<2 x half> %x)52 ret <2 x i64> %a53}54 55define <4 x i64> @llrint_v4i64_v4f16(<4 x half> %x) nounwind {56; AVX-LABEL: llrint_v4i64_v4f16:57; AVX: # %bb.0:58; AVX-NEXT: vpsrlq $48, %xmm0, %xmm159; AVX-NEXT: vcvtph2ps %xmm1, %xmm160; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm161; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm162; AVX-NEXT: vcvtph2ps %xmm1, %xmm163; AVX-NEXT: vcvttss2si %xmm1, %rax64; AVX-NEXT: vmovq %rax, %xmm165; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]66; AVX-NEXT: vcvtph2ps %xmm2, %xmm267; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm268; AVX-NEXT: vcvtps2ph $4, %xmm2, %xmm269; AVX-NEXT: vcvtph2ps %xmm2, %xmm270; AVX-NEXT: vcvttss2si %xmm2, %rax71; AVX-NEXT: vmovq %rax, %xmm272; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]73; AVX-NEXT: vcvtph2ps %xmm0, %xmm274; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm275; AVX-NEXT: vcvtps2ph $4, %xmm2, %xmm276; AVX-NEXT: vcvtph2ps %xmm2, %xmm277; AVX-NEXT: vcvttss2si %xmm2, %rax78; AVX-NEXT: vmovq %rax, %xmm279; AVX-NEXT: vpsrld $16, %xmm0, %xmm080; AVX-NEXT: vcvtph2ps %xmm0, %xmm081; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm082; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm083; AVX-NEXT: vcvtph2ps %xmm0, %xmm084; AVX-NEXT: vcvttss2si %xmm0, %rax85; AVX-NEXT: vmovq %rax, %xmm086; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]87; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm088; AVX-NEXT: retq89;90; FP16-LABEL: llrint_v4i64_v4f16:91; FP16: # %bb.0:92; FP16-NEXT: vcvtph2qq %xmm0, %ymm093; FP16-NEXT: retq94 %a = call <4 x i64> @llvm.XRINT.v4i64.v4f16(<4 x half> %x)95 ret <4 x i64> %a96}97 98define <8 x i64> @llrint_v8i64_v8f16(<8 x half> %x) nounwind {99; AVX-LABEL: llrint_v8i64_v8f16:100; AVX: # %bb.0:101; AVX-NEXT: vpsrlq $48, %xmm0, %xmm1102; AVX-NEXT: vcvtph2ps %xmm1, %xmm1103; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1104; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm1105; AVX-NEXT: vcvtph2ps %xmm1, %xmm1106; AVX-NEXT: vcvttss2si %xmm1, %rax107; AVX-NEXT: vmovq %rax, %xmm1108; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]109; AVX-NEXT: vcvtph2ps %xmm2, %xmm2110; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2111; AVX-NEXT: vcvtps2ph $4, %xmm2, %xmm2112; AVX-NEXT: vcvtph2ps %xmm2, %xmm2113; AVX-NEXT: vcvttss2si %xmm2, %rax114; AVX-NEXT: vmovq %rax, %xmm2115; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]116; AVX-NEXT: vcvtph2ps %xmm0, %xmm2117; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2118; AVX-NEXT: vcvtps2ph $4, %xmm2, %xmm2119; AVX-NEXT: vcvtph2ps %xmm2, %xmm2120; AVX-NEXT: vcvttss2si %xmm2, %rax121; AVX-NEXT: vmovq %rax, %xmm2122; AVX-NEXT: vpsrld $16, %xmm0, %xmm3123; AVX-NEXT: vcvtph2ps %xmm3, %xmm3124; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3125; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3126; AVX-NEXT: vcvtph2ps %xmm3, %xmm3127; AVX-NEXT: vcvttss2si %xmm3, %rax128; AVX-NEXT: vmovq %rax, %xmm3129; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]130; AVX-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm2131; AVX-NEXT: vpsrldq {{.*#+}} xmm1 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero132; AVX-NEXT: vcvtph2ps %xmm1, %xmm1133; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1134; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm1135; AVX-NEXT: vcvtph2ps %xmm1, %xmm1136; AVX-NEXT: vcvttss2si %xmm1, %rax137; AVX-NEXT: vmovq %rax, %xmm1138; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]139; AVX-NEXT: vcvtph2ps %xmm3, %xmm3140; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3141; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3142; AVX-NEXT: vcvtph2ps %xmm3, %xmm3143; AVX-NEXT: vcvttss2si %xmm3, %rax144; AVX-NEXT: vmovq %rax, %xmm3145; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm3[0],xmm1[0]146; AVX-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero147; AVX-NEXT: vcvtph2ps %xmm3, %xmm3148; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3149; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3150; AVX-NEXT: vcvtph2ps %xmm3, %xmm3151; AVX-NEXT: vcvttss2si %xmm3, %rax152; AVX-NEXT: vmovq %rax, %xmm3153; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]154; AVX-NEXT: vcvtph2ps %xmm0, %xmm0155; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0156; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0157; AVX-NEXT: vcvtph2ps %xmm0, %xmm0158; AVX-NEXT: vcvttss2si %xmm0, %rax159; AVX-NEXT: vmovq %rax, %xmm0160; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]161; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1162; AVX-NEXT: vmovdqa %ymm2, %ymm0163; AVX-NEXT: retq164;165; FP16-LABEL: llrint_v8i64_v8f16:166; FP16: # %bb.0:167; FP16-NEXT: vcvtph2qq %xmm0, %zmm0168; FP16-NEXT: retq169 %a = call <8 x i64> @llvm.XRINT.v8i64.v8f16(<8 x half> %x)170 ret <8 x i64> %a171}172 173define <16 x i64> @llrint_v16i64_v16f16(<16 x half> %x) nounwind {174; AVX-LABEL: llrint_v16i64_v16f16:175; AVX: # %bb.0:176; AVX-NEXT: vmovdqa %ymm0, %ymm2177; AVX-NEXT: vpsrlq $48, %xmm2, %xmm0178; AVX-NEXT: vcvtph2ps %xmm0, %xmm0179; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0180; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0181; AVX-NEXT: vcvtph2ps %xmm0, %xmm0182; AVX-NEXT: vcvttss2si %xmm0, %rax183; AVX-NEXT: vmovq %rax, %xmm0184; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]185; AVX-NEXT: vcvtph2ps %xmm1, %xmm1186; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1187; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm1188; AVX-NEXT: vcvtph2ps %xmm1, %xmm1189; AVX-NEXT: vcvttss2si %xmm1, %rax190; AVX-NEXT: vmovq %rax, %xmm1191; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]192; AVX-NEXT: vcvtph2ps %xmm2, %xmm1193; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1194; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm1195; AVX-NEXT: vcvtph2ps %xmm1, %xmm1196; AVX-NEXT: vcvttss2si %xmm1, %rax197; AVX-NEXT: vmovq %rax, %xmm1198; AVX-NEXT: vpsrld $16, %xmm2, %xmm3199; AVX-NEXT: vcvtph2ps %xmm3, %xmm3200; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3201; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3202; AVX-NEXT: vcvtph2ps %xmm3, %xmm3203; AVX-NEXT: vcvttss2si %xmm3, %rax204; AVX-NEXT: vmovq %rax, %xmm3205; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]206; AVX-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0207; AVX-NEXT: vpsrldq {{.*#+}} xmm1 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero208; AVX-NEXT: vcvtph2ps %xmm1, %xmm1209; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1210; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm1211; AVX-NEXT: vcvtph2ps %xmm1, %xmm1212; AVX-NEXT: vcvttss2si %xmm1, %rax213; AVX-NEXT: vmovq %rax, %xmm1214; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm2[3,3,3,3]215; AVX-NEXT: vcvtph2ps %xmm3, %xmm3216; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3217; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3218; AVX-NEXT: vcvtph2ps %xmm3, %xmm3219; AVX-NEXT: vcvttss2si %xmm3, %rax220; AVX-NEXT: vmovq %rax, %xmm3221; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm3[0],xmm1[0]222; AVX-NEXT: vpsrldq {{.*#+}} xmm3 = xmm2[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero223; AVX-NEXT: vcvtph2ps %xmm3, %xmm3224; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3225; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3226; AVX-NEXT: vcvtph2ps %xmm3, %xmm3227; AVX-NEXT: vcvttss2si %xmm3, %rax228; AVX-NEXT: vmovq %rax, %xmm3229; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm2[1,0]230; AVX-NEXT: vcvtph2ps %xmm4, %xmm4231; AVX-NEXT: vroundss $4, %xmm4, %xmm4, %xmm4232; AVX-NEXT: vcvtps2ph $4, %xmm4, %xmm4233; AVX-NEXT: vcvtph2ps %xmm4, %xmm4234; AVX-NEXT: vcvttss2si %xmm4, %rax235; AVX-NEXT: vmovq %rax, %xmm4236; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]237; AVX-NEXT: vinserti128 $1, %xmm1, %ymm3, %ymm1238; AVX-NEXT: vextracti128 $1, %ymm2, %xmm3239; AVX-NEXT: vpsrlq $48, %xmm3, %xmm2240; AVX-NEXT: vcvtph2ps %xmm2, %xmm2241; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2242; AVX-NEXT: vcvtps2ph $4, %xmm2, %xmm2243; AVX-NEXT: vcvtph2ps %xmm2, %xmm2244; AVX-NEXT: vcvttss2si %xmm2, %rax245; AVX-NEXT: vmovq %rax, %xmm2246; AVX-NEXT: vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]247; AVX-NEXT: vcvtph2ps %xmm4, %xmm4248; AVX-NEXT: vroundss $4, %xmm4, %xmm4, %xmm4249; AVX-NEXT: vcvtps2ph $4, %xmm4, %xmm4250; AVX-NEXT: vcvtph2ps %xmm4, %xmm4251; AVX-NEXT: vcvttss2si %xmm4, %rax252; AVX-NEXT: vmovq %rax, %xmm4253; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm4[0],xmm2[0]254; AVX-NEXT: vcvtph2ps %xmm3, %xmm4255; AVX-NEXT: vroundss $4, %xmm4, %xmm4, %xmm4256; AVX-NEXT: vcvtps2ph $4, %xmm4, %xmm4257; AVX-NEXT: vcvtph2ps %xmm4, %xmm4258; AVX-NEXT: vcvttss2si %xmm4, %rax259; AVX-NEXT: vmovq %rax, %xmm4260; AVX-NEXT: vpsrld $16, %xmm3, %xmm5261; AVX-NEXT: vcvtph2ps %xmm5, %xmm5262; AVX-NEXT: vroundss $4, %xmm5, %xmm5, %xmm5263; AVX-NEXT: vcvtps2ph $4, %xmm5, %xmm5264; AVX-NEXT: vcvtph2ps %xmm5, %xmm5265; AVX-NEXT: vcvttss2si %xmm5, %rax266; AVX-NEXT: vmovq %rax, %xmm5267; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]268; AVX-NEXT: vinserti128 $1, %xmm2, %ymm4, %ymm2269; AVX-NEXT: vpsrldq {{.*#+}} xmm4 = xmm3[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero270; AVX-NEXT: vcvtph2ps %xmm4, %xmm4271; AVX-NEXT: vroundss $4, %xmm4, %xmm4, %xmm4272; AVX-NEXT: vcvtps2ph $4, %xmm4, %xmm4273; AVX-NEXT: vcvtph2ps %xmm4, %xmm4274; AVX-NEXT: vcvttss2si %xmm4, %rax275; AVX-NEXT: vmovq %rax, %xmm4276; AVX-NEXT: vshufps {{.*#+}} xmm5 = xmm3[3,3,3,3]277; AVX-NEXT: vcvtph2ps %xmm5, %xmm5278; AVX-NEXT: vroundss $4, %xmm5, %xmm5, %xmm5279; AVX-NEXT: vcvtps2ph $4, %xmm5, %xmm5280; AVX-NEXT: vcvtph2ps %xmm5, %xmm5281; AVX-NEXT: vcvttss2si %xmm5, %rax282; AVX-NEXT: vmovq %rax, %xmm5283; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm5[0],xmm4[0]284; AVX-NEXT: vpsrldq {{.*#+}} xmm5 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero285; AVX-NEXT: vcvtph2ps %xmm5, %xmm5286; AVX-NEXT: vroundss $4, %xmm5, %xmm5, %xmm5287; AVX-NEXT: vcvtps2ph $4, %xmm5, %xmm5288; AVX-NEXT: vcvtph2ps %xmm5, %xmm5289; AVX-NEXT: vcvttss2si %xmm5, %rax290; AVX-NEXT: vmovq %rax, %xmm5291; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]292; AVX-NEXT: vcvtph2ps %xmm3, %xmm3293; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3294; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3295; AVX-NEXT: vcvtph2ps %xmm3, %xmm3296; AVX-NEXT: vcvttss2si %xmm3, %rax297; AVX-NEXT: vmovq %rax, %xmm3298; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]299; AVX-NEXT: vinserti128 $1, %xmm4, %ymm3, %ymm3300; AVX-NEXT: retq301;302; FP16-LABEL: llrint_v16i64_v16f16:303; FP16: # %bb.0:304; FP16-NEXT: vcvtph2qq %xmm0, %zmm2305; FP16-NEXT: vextractf128 $1, %ymm0, %xmm0306; FP16-NEXT: vcvtph2qq %xmm0, %zmm1307; FP16-NEXT: vmovaps %zmm2, %zmm0308; FP16-NEXT: retq309 %a = call <16 x i64> @llvm.XRINT.v16i64.v16f16(<16 x half> %x)310 ret <16 x i64> %a311}312 313define <32 x i64> @llrint_v32i64_v32f16(<32 x half> %x) nounwind {314; AVX-LABEL: llrint_v32i64_v32f16:315; AVX: # %bb.0:316; AVX-NEXT: movq %rdi, %rax317; AVX-NEXT: vpsrldq {{.*#+}} xmm2 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero318; AVX-NEXT: vcvtph2ps %xmm2, %xmm2319; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2320; AVX-NEXT: vcvtps2ph $4, %xmm2, %xmm2321; AVX-NEXT: vcvtph2ps %xmm2, %xmm2322; AVX-NEXT: vcvttss2si %xmm2, %rcx323; AVX-NEXT: vmovq %rcx, %xmm2324; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]325; AVX-NEXT: vcvtph2ps %xmm3, %xmm3326; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3327; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3328; AVX-NEXT: vcvtph2ps %xmm3, %xmm3329; AVX-NEXT: vcvttss2si %xmm3, %rcx330; AVX-NEXT: vmovq %rcx, %xmm3331; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]332; AVX-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill333; AVX-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero334; AVX-NEXT: vcvtph2ps %xmm3, %xmm3335; AVX-NEXT: vroundss $4, %xmm3, %xmm3, %xmm3336; AVX-NEXT: vcvtps2ph $4, %xmm3, %xmm3337; AVX-NEXT: vcvtph2ps %xmm3, %xmm3338; AVX-NEXT: vcvttss2si %xmm3, %rcx339; AVX-NEXT: vmovq %rcx, %xmm3340; AVX-NEXT: vshufps {{.*#+}} xmm4 = xmm1[3,3,3,3]341; AVX-NEXT: vcvtph2ps %xmm4, %xmm4342; AVX-NEXT: vroundss $4, %xmm4, %xmm4, %xmm4343; AVX-NEXT: vcvtps2ph $4, %xmm4, %xmm4344; AVX-NEXT: vcvtph2ps %xmm4, %xmm4345; AVX-NEXT: vcvttss2si %xmm4, %rcx346; AVX-NEXT: vmovq %rcx, %xmm4347; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]348; AVX-NEXT: vcvtph2ps %xmm1, %xmm4349; AVX-NEXT: vroundss $4, %xmm4, %xmm4, %xmm4350; AVX-NEXT: vcvtps2ph $4, %xmm4, %xmm4351; AVX-NEXT: vcvtph2ps %xmm4, %xmm4352; AVX-NEXT: vcvttss2si %xmm4, %rcx353; AVX-NEXT: vmovq %rcx, %xmm4354; AVX-NEXT: vpsrld $16, %xmm1, %xmm5355; AVX-NEXT: vcvtph2ps %xmm5, %xmm5356; AVX-NEXT: vroundss $4, %xmm5, %xmm5, %xmm5357; AVX-NEXT: vcvtps2ph $4, %xmm5, %xmm5358; AVX-NEXT: vcvtph2ps %xmm5, %xmm5359; AVX-NEXT: vcvttss2si %xmm5, %rcx360; AVX-NEXT: vmovq %rcx, %xmm5361; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]362; AVX-NEXT: vpsrlq $48, %xmm1, %xmm5363; AVX-NEXT: vcvtph2ps %xmm5, %xmm5364; AVX-NEXT: vroundss $4, %xmm5, %xmm5, %xmm5365; AVX-NEXT: vcvtps2ph $4, %xmm5, %xmm5366; AVX-NEXT: vcvtph2ps %xmm5, %xmm5367; AVX-NEXT: vcvttss2si %xmm5, %rcx368; AVX-NEXT: vmovq %rcx, %xmm5369; AVX-NEXT: vmovshdup {{.*#+}} xmm6 = xmm1[1,1,3,3]370; AVX-NEXT: vcvtph2ps %xmm6, %xmm6371; AVX-NEXT: vroundss $4, %xmm6, %xmm6, %xmm6372; AVX-NEXT: vcvtps2ph $4, %xmm6, %xmm6373; AVX-NEXT: vcvtph2ps %xmm6, %xmm6374; AVX-NEXT: vcvttss2si %xmm6, %rcx375; AVX-NEXT: vmovq %rcx, %xmm6376; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm5 = xmm6[0],xmm5[0]377; AVX-NEXT: vextracti128 $1, %ymm1, %xmm8378; AVX-NEXT: vpsrldq {{.*#+}} xmm1 = xmm8[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero379; AVX-NEXT: vcvtph2ps %xmm1, %xmm1380; AVX-NEXT: vroundss $4, %xmm1, %xmm1, %xmm1381; AVX-NEXT: vcvtps2ph $4, %xmm1, %xmm1382; AVX-NEXT: vcvtph2ps %xmm1, %xmm1383; AVX-NEXT: vcvttss2si %xmm1, %rcx384; AVX-NEXT: vmovq %rcx, %xmm1385; AVX-NEXT: vshufpd {{.*#+}} xmm6 = xmm8[1,0]386; AVX-NEXT: vcvtph2ps %xmm6, %xmm6387; AVX-NEXT: vroundss $4, %xmm6, %xmm6, %xmm6388; AVX-NEXT: vcvtps2ph $4, %xmm6, %xmm6389; AVX-NEXT: vcvtph2ps %xmm6, %xmm6390; AVX-NEXT: vcvttss2si %xmm6, %rcx391; AVX-NEXT: vmovq %rcx, %xmm6392; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm6[0],xmm1[0]393; AVX-NEXT: vpsrldq {{.*#+}} xmm6 = xmm8[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero394; AVX-NEXT: vcvtph2ps %xmm6, %xmm6395; AVX-NEXT: vroundss $4, %xmm6, %xmm6, %xmm6396; AVX-NEXT: vcvtps2ph $4, %xmm6, %xmm6397; AVX-NEXT: vcvtph2ps %xmm6, %xmm6398; AVX-NEXT: vcvttss2si %xmm6, %rcx399; AVX-NEXT: vmovq %rcx, %xmm6400; AVX-NEXT: vshufps {{.*#+}} xmm7 = xmm8[3,3,3,3]401; AVX-NEXT: vcvtph2ps %xmm7, %xmm7402; AVX-NEXT: vroundss $4, %xmm7, %xmm7, %xmm7403; AVX-NEXT: vcvtps2ph $4, %xmm7, %xmm7404; AVX-NEXT: vcvtph2ps %xmm7, %xmm7405; AVX-NEXT: vcvttss2si %xmm7, %rcx406; AVX-NEXT: vmovq %rcx, %xmm7407; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm6 = xmm7[0],xmm6[0]408; AVX-NEXT: vcvtph2ps %xmm8, %xmm7409; AVX-NEXT: vroundss $4, %xmm7, %xmm7, %xmm7410; AVX-NEXT: vcvtps2ph $4, %xmm7, %xmm7411; AVX-NEXT: vcvtph2ps %xmm7, %xmm7412; AVX-NEXT: vcvttss2si %xmm7, %rcx413; AVX-NEXT: vmovq %rcx, %xmm7414; AVX-NEXT: vpsrld $16, %xmm8, %xmm9415; AVX-NEXT: vcvtph2ps %xmm9, %xmm9416; AVX-NEXT: vroundss $4, %xmm9, %xmm9, %xmm9417; AVX-NEXT: vcvtps2ph $4, %xmm9, %xmm9418; AVX-NEXT: vcvtph2ps %xmm9, %xmm9419; AVX-NEXT: vcvttss2si %xmm9, %rcx420; AVX-NEXT: vmovq %rcx, %xmm9421; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm9[0]422; AVX-NEXT: vpsrlq $48, %xmm8, %xmm9423; AVX-NEXT: vcvtph2ps %xmm9, %xmm9424; AVX-NEXT: vroundss $4, %xmm9, %xmm9, %xmm9425; AVX-NEXT: vcvtps2ph $4, %xmm9, %xmm9426; AVX-NEXT: vcvtph2ps %xmm9, %xmm9427; AVX-NEXT: vcvttss2si %xmm9, %rcx428; AVX-NEXT: vmovq %rcx, %xmm9429; AVX-NEXT: vmovshdup {{.*#+}} xmm8 = xmm8[1,1,3,3]430; AVX-NEXT: vcvtph2ps %xmm8, %xmm8431; AVX-NEXT: vroundss $4, %xmm8, %xmm8, %xmm8432; AVX-NEXT: vcvtps2ph $4, %xmm8, %xmm8433; AVX-NEXT: vcvtph2ps %xmm8, %xmm8434; AVX-NEXT: vcvttss2si %xmm8, %rcx435; AVX-NEXT: vmovq %rcx, %xmm8436; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm8 = xmm8[0],xmm9[0]437; AVX-NEXT: vpsrldq {{.*#+}} xmm9 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero438; AVX-NEXT: vcvtph2ps %xmm9, %xmm9439; AVX-NEXT: vroundss $4, %xmm9, %xmm9, %xmm9440; AVX-NEXT: vcvtps2ph $4, %xmm9, %xmm9441; AVX-NEXT: vcvtph2ps %xmm9, %xmm9442; AVX-NEXT: vcvttss2si %xmm9, %rcx443; AVX-NEXT: vmovq %rcx, %xmm9444; AVX-NEXT: vshufpd {{.*#+}} xmm10 = xmm0[1,0]445; AVX-NEXT: vcvtph2ps %xmm10, %xmm10446; AVX-NEXT: vroundss $4, %xmm10, %xmm10, %xmm10447; AVX-NEXT: vcvtps2ph $4, %xmm10, %xmm10448; AVX-NEXT: vcvtph2ps %xmm10, %xmm10449; AVX-NEXT: vcvttss2si %xmm10, %rcx450; AVX-NEXT: vmovq %rcx, %xmm10451; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm9 = xmm10[0],xmm9[0]452; AVX-NEXT: vpsrldq {{.*#+}} xmm10 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero453; AVX-NEXT: vcvtph2ps %xmm10, %xmm10454; AVX-NEXT: vroundss $4, %xmm10, %xmm10, %xmm10455; AVX-NEXT: vcvtps2ph $4, %xmm10, %xmm10456; AVX-NEXT: vcvtph2ps %xmm10, %xmm10457; AVX-NEXT: vcvttss2si %xmm10, %rcx458; AVX-NEXT: vmovq %rcx, %xmm10459; AVX-NEXT: vshufps {{.*#+}} xmm11 = xmm0[3,3,3,3]460; AVX-NEXT: vcvtph2ps %xmm11, %xmm11461; AVX-NEXT: vroundss $4, %xmm11, %xmm11, %xmm11462; AVX-NEXT: vcvtps2ph $4, %xmm11, %xmm11463; AVX-NEXT: vcvtph2ps %xmm11, %xmm11464; AVX-NEXT: vcvttss2si %xmm11, %rcx465; AVX-NEXT: vmovq %rcx, %xmm11466; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm10 = xmm11[0],xmm10[0]467; AVX-NEXT: vcvtph2ps %xmm0, %xmm11468; AVX-NEXT: vroundss $4, %xmm11, %xmm11, %xmm11469; AVX-NEXT: vcvtps2ph $4, %xmm11, %xmm11470; AVX-NEXT: vcvtph2ps %xmm11, %xmm11471; AVX-NEXT: vcvttss2si %xmm11, %rcx472; AVX-NEXT: vmovq %rcx, %xmm11473; AVX-NEXT: vpsrld $16, %xmm0, %xmm12474; AVX-NEXT: vcvtph2ps %xmm12, %xmm12475; AVX-NEXT: vroundss $4, %xmm12, %xmm12, %xmm12476; AVX-NEXT: vcvtps2ph $4, %xmm12, %xmm12477; AVX-NEXT: vcvtph2ps %xmm12, %xmm12478; AVX-NEXT: vcvttss2si %xmm12, %rcx479; AVX-NEXT: vmovq %rcx, %xmm12480; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm11 = xmm11[0],xmm12[0]481; AVX-NEXT: vpsrlq $48, %xmm0, %xmm12482; AVX-NEXT: vcvtph2ps %xmm12, %xmm12483; AVX-NEXT: vroundss $4, %xmm12, %xmm12, %xmm12484; AVX-NEXT: vcvtps2ph $4, %xmm12, %xmm12485; AVX-NEXT: vcvtph2ps %xmm12, %xmm12486; AVX-NEXT: vcvttss2si %xmm12, %rcx487; AVX-NEXT: vmovq %rcx, %xmm12488; AVX-NEXT: vmovshdup {{.*#+}} xmm13 = xmm0[1,1,3,3]489; AVX-NEXT: vcvtph2ps %xmm13, %xmm13490; AVX-NEXT: vroundss $4, %xmm13, %xmm13, %xmm13491; AVX-NEXT: vcvtps2ph $4, %xmm13, %xmm13492; AVX-NEXT: vcvtph2ps %xmm13, %xmm13493; AVX-NEXT: vcvttss2si %xmm13, %rcx494; AVX-NEXT: vmovq %rcx, %xmm13495; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm12 = xmm13[0],xmm12[0]496; AVX-NEXT: vextracti128 $1, %ymm0, %xmm0497; AVX-NEXT: vpsrldq {{.*#+}} xmm13 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero498; AVX-NEXT: vcvtph2ps %xmm13, %xmm13499; AVX-NEXT: vroundss $4, %xmm13, %xmm13, %xmm13500; AVX-NEXT: vcvtps2ph $4, %xmm13, %xmm13501; AVX-NEXT: vcvtph2ps %xmm13, %xmm13502; AVX-NEXT: vcvttss2si %xmm13, %rcx503; AVX-NEXT: vmovq %rcx, %xmm13504; AVX-NEXT: vshufpd {{.*#+}} xmm14 = xmm0[1,0]505; AVX-NEXT: vcvtph2ps %xmm14, %xmm14506; AVX-NEXT: vroundss $4, %xmm14, %xmm14, %xmm14507; AVX-NEXT: vcvtps2ph $4, %xmm14, %xmm14508; AVX-NEXT: vcvtph2ps %xmm14, %xmm14509; AVX-NEXT: vcvttss2si %xmm14, %rcx510; AVX-NEXT: vmovq %rcx, %xmm14511; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm13 = xmm14[0],xmm13[0]512; AVX-NEXT: vpsrldq {{.*#+}} xmm14 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero513; AVX-NEXT: vcvtph2ps %xmm14, %xmm14514; AVX-NEXT: vroundss $4, %xmm14, %xmm14, %xmm14515; AVX-NEXT: vcvtps2ph $4, %xmm14, %xmm14516; AVX-NEXT: vcvtph2ps %xmm14, %xmm14517; AVX-NEXT: vcvttss2si %xmm14, %rcx518; AVX-NEXT: vmovq %rcx, %xmm14519; AVX-NEXT: vshufps {{.*#+}} xmm15 = xmm0[3,3,3,3]520; AVX-NEXT: vcvtph2ps %xmm15, %xmm15521; AVX-NEXT: vroundss $4, %xmm15, %xmm15, %xmm15522; AVX-NEXT: vcvtps2ph $4, %xmm15, %xmm15523; AVX-NEXT: vcvtph2ps %xmm15, %xmm15524; AVX-NEXT: vcvttss2si %xmm15, %rcx525; AVX-NEXT: vmovq %rcx, %xmm15526; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm14 = xmm15[0],xmm14[0]527; AVX-NEXT: vcvtph2ps %xmm0, %xmm15528; AVX-NEXT: vroundss $4, %xmm15, %xmm15, %xmm15529; AVX-NEXT: vcvtps2ph $4, %xmm15, %xmm15530; AVX-NEXT: vcvtph2ps %xmm15, %xmm15531; AVX-NEXT: vcvttss2si %xmm15, %rcx532; AVX-NEXT: vpsrld $16, %xmm0, %xmm15533; AVX-NEXT: vcvtph2ps %xmm15, %xmm15534; AVX-NEXT: vroundss $4, %xmm15, %xmm15, %xmm15535; AVX-NEXT: vcvtps2ph $4, %xmm15, %xmm15536; AVX-NEXT: vcvtph2ps %xmm15, %xmm15537; AVX-NEXT: vcvttss2si %xmm15, %rdx538; AVX-NEXT: vmovq %rcx, %xmm15539; AVX-NEXT: vmovq %rdx, %xmm2540; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm15[0],xmm2[0]541; AVX-NEXT: vpsrlq $48, %xmm0, %xmm15542; AVX-NEXT: vcvtph2ps %xmm15, %xmm15543; AVX-NEXT: vroundss $4, %xmm15, %xmm15, %xmm15544; AVX-NEXT: vcvtps2ph $4, %xmm15, %xmm15545; AVX-NEXT: vcvtph2ps %xmm15, %xmm15546; AVX-NEXT: vcvttss2si %xmm15, %rcx547; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]548; AVX-NEXT: vcvtph2ps %xmm0, %xmm0549; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0550; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0551; AVX-NEXT: vcvtph2ps %xmm0, %xmm0552; AVX-NEXT: vcvttss2si %xmm0, %rdx553; AVX-NEXT: vmovq %rcx, %xmm0554; AVX-NEXT: vmovq %rdx, %xmm15555; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm15[0],xmm0[0]556; AVX-NEXT: vmovdqa %xmm0, 80(%rdi)557; AVX-NEXT: vmovdqa %xmm2, 64(%rdi)558; AVX-NEXT: vmovdqa %xmm14, 112(%rdi)559; AVX-NEXT: vmovdqa %xmm13, 96(%rdi)560; AVX-NEXT: vmovdqa %xmm12, 16(%rdi)561; AVX-NEXT: vmovdqa %xmm11, (%rdi)562; AVX-NEXT: vmovdqa %xmm10, 48(%rdi)563; AVX-NEXT: vmovdqa %xmm9, 32(%rdi)564; AVX-NEXT: vmovdqa %xmm8, 208(%rdi)565; AVX-NEXT: vmovdqa %xmm7, 192(%rdi)566; AVX-NEXT: vmovdqa %xmm6, 240(%rdi)567; AVX-NEXT: vmovdqa %xmm1, 224(%rdi)568; AVX-NEXT: vmovdqa %xmm5, 144(%rdi)569; AVX-NEXT: vmovdqa %xmm4, 128(%rdi)570; AVX-NEXT: vmovdqa %xmm3, 176(%rdi)571; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload572; AVX-NEXT: vmovaps %xmm0, 160(%rdi)573; AVX-NEXT: vzeroupper574; AVX-NEXT: retq575;576; FP16-LABEL: llrint_v32i64_v32f16:577; FP16: # %bb.0:578; FP16-NEXT: vcvtph2qq %xmm0, %zmm4579; FP16-NEXT: vextractf128 $1, %ymm0, %xmm1580; FP16-NEXT: vcvtph2qq %xmm1, %zmm1581; FP16-NEXT: vextractf64x4 $1, %zmm0, %ymm0582; FP16-NEXT: vcvtph2qq %xmm0, %zmm2583; FP16-NEXT: vextractf128 $1, %ymm0, %xmm0584; FP16-NEXT: vcvtph2qq %xmm0, %zmm3585; FP16-NEXT: vmovaps %zmm4, %zmm0586; FP16-NEXT: retq587 %a = call <32 x i64> @llvm.XRINT.v32i64.v32f16(<32 x half> %x)588 ret <32 x i64> %a589}590 591declare <1 x i64> @llvm.lrint.v1i64.v1f16(<1 x half>)592declare <2 x i64> @llvm.lrint.v2i64.v2f16(<2 x half>)593declare <4 x i64> @llvm.lrint.v4i64.v4f16(<4 x half>)594declare <8 x i64> @llvm.lrint.v8i64.v8f16(<8 x half>)595declare <16 x i64> @llvm.lrint.v16i64.v16f16(<16 x half>)596declare <32 x i64> @llvm.lrint.v32i64.v32f16(<32 x half>)597declare <1 x i64> @llvm.llrint.v1i64.v1f16(<1 x half>)598declare <2 x i64> @llvm.llrint.v2i64.v2f16(<2 x half>)599declare <4 x i64> @llvm.llrint.v4i64.v4f16(<4 x half>)600declare <8 x i64> @llvm.llrint.v8i64.v8f16(<8 x half>)601declare <16 x i64> @llvm.llrint.v16i64.v16f16(<16 x half>)602declare <32 x i64> @llvm.llrint.v32i64.v32f16(<32 x half>)603