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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2   | FileCheck %s --check-prefixes=SSE,SSE2,X86-SSE,X86-SSE23; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE4,X86-SSE,X86-SSE44; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X64-SSE,X64-SSE25; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,-slow-pmulld | FileCheck %s --check-prefixes=SSE,SSE4,X64-SSE,X64-SSE4,X64-SSE4-FAST6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SSE,SSE4,X64-SSE,X64-SSE4,X64-SSE4-SLOW7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop  | FileCheck %s --check-prefixes=X64-AVX,X64-XOP8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX29; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX,X64-AVX512DQ10 11;12; PowOf2 (uniform)13;14 15define <2 x i64> @mul_v2i64_8(<2 x i64> %a0) nounwind {16; SSE-LABEL: mul_v2i64_8:17; SSE:       # %bb.0:18; SSE-NEXT:    psllq $3, %xmm019; SSE-NEXT:    ret{{[l|q]}}20;21; X64-AVX-LABEL: mul_v2i64_8:22; X64-AVX:       # %bb.0:23; X64-AVX-NEXT:    vpsllq $3, %xmm0, %xmm024; X64-AVX-NEXT:    retq25  %1 = mul <2 x i64> %a0, <i64 8, i64 8>26  ret <2 x i64> %127}28 29define <4 x i32> @mul_v4i32_8(<4 x i32> %a0) nounwind {30; SSE-LABEL: mul_v4i32_8:31; SSE:       # %bb.0:32; SSE-NEXT:    pslld $3, %xmm033; SSE-NEXT:    ret{{[l|q]}}34;35; X64-AVX-LABEL: mul_v4i32_8:36; X64-AVX:       # %bb.0:37; X64-AVX-NEXT:    vpslld $3, %xmm0, %xmm038; X64-AVX-NEXT:    retq39  %1 = mul <4 x i32> %a0, <i32 8, i32 8, i32 8, i32 8>40  ret <4 x i32> %141}42 43define <8 x i16> @mul_v8i16_8(<8 x i16> %a0) nounwind {44; SSE-LABEL: mul_v8i16_8:45; SSE:       # %bb.0:46; SSE-NEXT:    psllw $3, %xmm047; SSE-NEXT:    ret{{[l|q]}}48;49; X64-AVX-LABEL: mul_v8i16_8:50; X64-AVX:       # %bb.0:51; X64-AVX-NEXT:    vpsllw $3, %xmm0, %xmm052; X64-AVX-NEXT:    retq53  %1 = mul <8 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>54  ret <8 x i16> %155}56 57define <16 x i8> @mul_v16i8_32(<16 x i8> %a0) nounwind {58; X86-SSE-LABEL: mul_v16i8_32:59; X86-SSE:       # %bb.0:60; X86-SSE-NEXT:    psllw $5, %xmm061; X86-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm062; X86-SSE-NEXT:    retl63;64; X64-SSE-LABEL: mul_v16i8_32:65; X64-SSE:       # %bb.0:66; X64-SSE-NEXT:    psllw $5, %xmm067; X64-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm068; X64-SSE-NEXT:    retq69;70; X64-XOP-LABEL: mul_v16i8_32:71; X64-XOP:       # %bb.0:72; X64-XOP-NEXT:    vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm073; X64-XOP-NEXT:    retq74;75; X64-AVX2-LABEL: mul_v16i8_32:76; X64-AVX2:       # %bb.0:77; X64-AVX2-NEXT:    vpsllw $5, %xmm0, %xmm078; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm079; X64-AVX2-NEXT:    retq80;81; X64-AVX512DQ-LABEL: mul_v16i8_32:82; X64-AVX512DQ:       # %bb.0:83; X64-AVX512DQ-NEXT:    vpsllw $5, %xmm0, %xmm084; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm085; X64-AVX512DQ-NEXT:    retq86  %1 = mul <16 x i8> %a0, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32>87  ret <16 x i8> %188}89 90;91; PowOf2 (non-uniform)92;93 94define <2 x i64> @mul_v2i64_32_8(<2 x i64> %a0) nounwind {95; SSE2-LABEL: mul_v2i64_32_8:96; SSE2:       # %bb.0:97; SSE2-NEXT:    movdqa %xmm0, %xmm198; SSE2-NEXT:    psllq $5, %xmm199; SSE2-NEXT:    psllq $3, %xmm0100; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]101; SSE2-NEXT:    ret{{[l|q]}}102;103; SSE4-LABEL: mul_v2i64_32_8:104; SSE4:       # %bb.0:105; SSE4-NEXT:    movdqa %xmm0, %xmm1106; SSE4-NEXT:    psllq $3, %xmm1107; SSE4-NEXT:    psllq $5, %xmm0108; SSE4-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]109; SSE4-NEXT:    ret{{[l|q]}}110;111; X64-XOP-LABEL: mul_v2i64_32_8:112; X64-XOP:       # %bb.0:113; X64-XOP-NEXT:    vpshlq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0114; X64-XOP-NEXT:    retq115;116; X64-AVX2-LABEL: mul_v2i64_32_8:117; X64-AVX2:       # %bb.0:118; X64-AVX2-NEXT:    vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0119; X64-AVX2-NEXT:    retq120;121; X64-AVX512DQ-LABEL: mul_v2i64_32_8:122; X64-AVX512DQ:       # %bb.0:123; X64-AVX512DQ-NEXT:    vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0124; X64-AVX512DQ-NEXT:    retq125  %1 = mul <2 x i64> %a0, <i64 32, i64 8>126  ret <2 x i64> %1127}128 129define <4 x i32> @mul_v4i32_1_2_4_8(<4 x i32> %a0) nounwind {130; X86-SSE2-LABEL: mul_v4i32_1_2_4_8:131; X86-SSE2:       # %bb.0:132; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]133; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [1,2,4,8]134; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]135; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [2,u,8,u]136; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]137; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]138; X86-SSE2-NEXT:    retl139;140; X86-SSE4-LABEL: mul_v4i32_1_2_4_8:141; X86-SSE4:       # %bb.0:142; X86-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [1,2,4,8]143; X86-SSE4-NEXT:    retl144;145; X64-SSE2-LABEL: mul_v4i32_1_2_4_8:146; X64-SSE2:       # %bb.0:147; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]148; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2,4,8]149; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]150; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2,u,8,u]151; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]152; X64-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]153; X64-SSE2-NEXT:    retq154;155; X64-SSE4-LABEL: mul_v4i32_1_2_4_8:156; X64-SSE4:       # %bb.0:157; X64-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2,4,8]158; X64-SSE4-NEXT:    retq159;160; X64-XOP-LABEL: mul_v4i32_1_2_4_8:161; X64-XOP:       # %bb.0:162; X64-XOP-NEXT:    vpshld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0163; X64-XOP-NEXT:    retq164;165; X64-AVX2-LABEL: mul_v4i32_1_2_4_8:166; X64-AVX2:       # %bb.0:167; X64-AVX2-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0168; X64-AVX2-NEXT:    retq169;170; X64-AVX512DQ-LABEL: mul_v4i32_1_2_4_8:171; X64-AVX512DQ:       # %bb.0:172; X64-AVX512DQ-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0173; X64-AVX512DQ-NEXT:    retq174  %1 = mul <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 8>175  ret <4 x i32> %1176}177 178define <4 x i32> @mul_v4i32_1_2_4_8_optsize(<4 x i32> %a0) nounwind optsize {179; SSE2-LABEL: mul_v4i32_1_2_4_8_optsize:180; SSE2:       # %bb.0:181; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [1,2,4,8]182; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]183; SSE2-NEXT:    pmuludq %xmm1, %xmm0184; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]185; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]186; SSE2-NEXT:    pmuludq %xmm2, %xmm1187; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]188; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]189; SSE2-NEXT:    ret{{[l|q]}}190;191; X86-SSE4-LABEL: mul_v4i32_1_2_4_8_optsize:192; X86-SSE4:       # %bb.0:193; X86-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [1,2,4,8]194; X86-SSE4-NEXT:    retl195;196; X64-SSE4-LABEL: mul_v4i32_1_2_4_8_optsize:197; X64-SSE4:       # %bb.0:198; X64-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2,4,8]199; X64-SSE4-NEXT:    retq200;201; X64-XOP-LABEL: mul_v4i32_1_2_4_8_optsize:202; X64-XOP:       # %bb.0:203; X64-XOP-NEXT:    vpshld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0204; X64-XOP-NEXT:    retq205;206; X64-AVX2-LABEL: mul_v4i32_1_2_4_8_optsize:207; X64-AVX2:       # %bb.0:208; X64-AVX2-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0209; X64-AVX2-NEXT:    retq210;211; X64-AVX512DQ-LABEL: mul_v4i32_1_2_4_8_optsize:212; X64-AVX512DQ:       # %bb.0:213; X64-AVX512DQ-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0214; X64-AVX512DQ-NEXT:    retq215  %1 = mul <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 8>216  ret <4 x i32> %1217}218 219define <8 x i16> @mul_v8i16_1_2_4_8_16_32_64_128(<8 x i16> %a0) nounwind {220; X86-SSE-LABEL: mul_v8i16_1_2_4_8_16_32_64_128:221; X86-SSE:       # %bb.0:222; X86-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [1,2,4,8,16,32,64,128]223; X86-SSE-NEXT:    retl224;225; X64-SSE-LABEL: mul_v8i16_1_2_4_8_16_32_64_128:226; X64-SSE:       # %bb.0:227; X64-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2,4,8,16,32,64,128]228; X64-SSE-NEXT:    retq229;230; X64-XOP-LABEL: mul_v8i16_1_2_4_8_16_32_64_128:231; X64-XOP:       # %bb.0:232; X64-XOP-NEXT:    vpshlw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0233; X64-XOP-NEXT:    retq234;235; X64-AVX2-LABEL: mul_v8i16_1_2_4_8_16_32_64_128:236; X64-AVX2:       # %bb.0:237; X64-AVX2-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,2,4,8,16,32,64,128]238; X64-AVX2-NEXT:    retq239;240; X64-AVX512DQ-LABEL: mul_v8i16_1_2_4_8_16_32_64_128:241; X64-AVX512DQ:       # %bb.0:242; X64-AVX512DQ-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,2,4,8,16,32,64,128]243; X64-AVX512DQ-NEXT:    retq244  %1 = mul <8 x i16> %a0, <i16 1, i16 2, i16 4, i16 8, i16 16, i16 32, i16 64, i16 128>245  ret <8 x i16> %1246}247 248define <16 x i8> @mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8(<16 x i8> %a0) nounwind {249; SSE2-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8:250; SSE2:       # %bb.0:251; SSE2-NEXT:    movdqa %xmm0, %xmm1252; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]253; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [1,u,2,u,4,u,8,u,1,u,2,u,4,u,8,u]254; SSE2-NEXT:    pmullw %xmm2, %xmm1255; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]256; SSE2-NEXT:    pand %xmm3, %xmm1257; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]258; SSE2-NEXT:    pmullw %xmm2, %xmm0259; SSE2-NEXT:    pand %xmm3, %xmm0260; SSE2-NEXT:    packuswb %xmm1, %xmm0261; SSE2-NEXT:    ret{{[l|q]}}262;263; X86-SSE4-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8:264; X86-SSE4:       # %bb.0:265; X86-SSE4-NEXT:    movdqa %xmm0, %xmm1266; X86-SSE4-NEXT:    pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [0,2,0,8,0,2,0,8,0,2,0,8,0,2,0,8]267; X86-SSE4-NEXT:    psllw $8, %xmm1268; X86-SSE4-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [1,2,4,8,1,2,4,8,1,2,4,8,1,2,4,8]269; X86-SSE4-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0270; X86-SSE4-NEXT:    por %xmm1, %xmm0271; X86-SSE4-NEXT:    retl272;273; X64-SSE4-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8:274; X64-SSE4:       # %bb.0:275; X64-SSE4-NEXT:    movdqa %xmm0, %xmm1276; X64-SSE4-NEXT:    pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [0,2,0,8,0,2,0,8,0,2,0,8,0,2,0,8]277; X64-SSE4-NEXT:    psllw $8, %xmm1278; X64-SSE4-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2,4,8,1,2,4,8,1,2,4,8,1,2,4,8]279; X64-SSE4-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0280; X64-SSE4-NEXT:    por %xmm1, %xmm0281; X64-SSE4-NEXT:    retq282;283; X64-XOP-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8:284; X64-XOP:       # %bb.0:285; X64-XOP-NEXT:    vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0286; X64-XOP-NEXT:    retq287;288; X64-AVX2-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8:289; X64-AVX2:       # %bb.0:290; X64-AVX2-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero291; X64-AVX2-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [1,2,4,8,1,2,4,8,1,2,4,8,1,2,4,8]292; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0293; X64-AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1294; X64-AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0295; X64-AVX2-NEXT:    vzeroupper296; X64-AVX2-NEXT:    retq297;298; X64-AVX512DQ-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8:299; X64-AVX512DQ:       # %bb.0:300; X64-AVX512DQ-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero301; X64-AVX512DQ-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0302; X64-AVX512DQ-NEXT:    vpmovdb %zmm0, %xmm0303; X64-AVX512DQ-NEXT:    vzeroupper304; X64-AVX512DQ-NEXT:    retq305  %1 = mul <16 x i8> %a0, <i8 1, i8 2, i8 4, i8 8, i8 1, i8 2, i8 4, i8 8, i8 1, i8 2, i8 4, i8 8, i8 1, i8 2, i8 4, i8 8>306  ret <16 x i8> %1307}308 309;310; PowOf2 + 1 (uniform)311;312 313define <2 x i64> @mul_v2i64_17(<2 x i64> %a0) nounwind {314; SSE-LABEL: mul_v2i64_17:315; SSE:       # %bb.0:316; SSE-NEXT:    movdqa %xmm0, %xmm1317; SSE-NEXT:    psllq $4, %xmm1318; SSE-NEXT:    paddq %xmm1, %xmm0319; SSE-NEXT:    ret{{[l|q]}}320;321; X64-AVX-LABEL: mul_v2i64_17:322; X64-AVX:       # %bb.0:323; X64-AVX-NEXT:    vpsllq $4, %xmm0, %xmm1324; X64-AVX-NEXT:    vpaddq %xmm0, %xmm1, %xmm0325; X64-AVX-NEXT:    retq326  %1 = mul <2 x i64> %a0, <i64 17, i64 17>327  ret <2 x i64> %1328}329 330define <4 x i32> @mul_v4i32_17(<4 x i32> %a0) nounwind {331; SSE-LABEL: mul_v4i32_17:332; SSE:       # %bb.0:333; SSE-NEXT:    movdqa %xmm0, %xmm1334; SSE-NEXT:    pslld $4, %xmm1335; SSE-NEXT:    paddd %xmm1, %xmm0336; SSE-NEXT:    ret{{[l|q]}}337;338; X64-AVX-LABEL: mul_v4i32_17:339; X64-AVX:       # %bb.0:340; X64-AVX-NEXT:    vpslld $4, %xmm0, %xmm1341; X64-AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0342; X64-AVX-NEXT:    retq343  %1 = mul <4 x i32> %a0, <i32 17, i32 17, i32 17, i32 17>344  ret <4 x i32> %1345}346 347define <8 x i16> @mul_v8i16_17(<8 x i16> %a0) nounwind {348; SSE-LABEL: mul_v8i16_17:349; SSE:       # %bb.0:350; SSE-NEXT:    movdqa %xmm0, %xmm1351; SSE-NEXT:    psllw $4, %xmm1352; SSE-NEXT:    paddw %xmm1, %xmm0353; SSE-NEXT:    ret{{[l|q]}}354;355; X64-AVX-LABEL: mul_v8i16_17:356; X64-AVX:       # %bb.0:357; X64-AVX-NEXT:    vpsllw $4, %xmm0, %xmm1358; X64-AVX-NEXT:    vpaddw %xmm1, %xmm0, %xmm0359; X64-AVX-NEXT:    retq360  %1 = mul <8 x i16> %a0, <i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17>361  ret <8 x i16> %1362}363 364define <16 x i8> @mul_v16i8_17(<16 x i8> %a0) nounwind {365; X86-SSE-LABEL: mul_v16i8_17:366; X86-SSE:       # %bb.0:367; X86-SSE-NEXT:    movdqa %xmm0, %xmm1368; X86-SSE-NEXT:    psllw $4, %xmm1369; X86-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1370; X86-SSE-NEXT:    paddb %xmm1, %xmm0371; X86-SSE-NEXT:    retl372;373; X64-SSE-LABEL: mul_v16i8_17:374; X64-SSE:       # %bb.0:375; X64-SSE-NEXT:    movdqa %xmm0, %xmm1376; X64-SSE-NEXT:    psllw $4, %xmm1377; X64-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1378; X64-SSE-NEXT:    paddb %xmm1, %xmm0379; X64-SSE-NEXT:    retq380;381; X64-XOP-LABEL: mul_v16i8_17:382; X64-XOP:       # %bb.0:383; X64-XOP-NEXT:    vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1384; X64-XOP-NEXT:    vpaddb %xmm0, %xmm1, %xmm0385; X64-XOP-NEXT:    retq386;387; X64-AVX2-LABEL: mul_v16i8_17:388; X64-AVX2:       # %bb.0:389; X64-AVX2-NEXT:    vpsllw $4, %xmm0, %xmm1390; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1391; X64-AVX2-NEXT:    vpaddb %xmm0, %xmm1, %xmm0392; X64-AVX2-NEXT:    retq393;394; X64-AVX512DQ-LABEL: mul_v16i8_17:395; X64-AVX512DQ:       # %bb.0:396; X64-AVX512DQ-NEXT:    vpsllw $4, %xmm0, %xmm1397; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm1398; X64-AVX512DQ-NEXT:    vpaddb %xmm0, %xmm1, %xmm0399; X64-AVX512DQ-NEXT:    retq400  %1 = mul <16 x i8> %a0, <i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17>401  ret <16 x i8> %1402}403 404define <4 x i64> @mul_v4i64_17(<4 x i64> %a0) nounwind {405; SSE-LABEL: mul_v4i64_17:406; SSE:       # %bb.0:407; SSE-NEXT:    movdqa %xmm0, %xmm2408; SSE-NEXT:    psllq $4, %xmm2409; SSE-NEXT:    paddq %xmm2, %xmm0410; SSE-NEXT:    movdqa %xmm1, %xmm2411; SSE-NEXT:    psllq $4, %xmm2412; SSE-NEXT:    paddq %xmm2, %xmm1413; SSE-NEXT:    ret{{[l|q]}}414;415; X64-XOP-LABEL: mul_v4i64_17:416; X64-XOP:       # %bb.0:417; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1418; X64-XOP-NEXT:    vpsllq $4, %xmm1, %xmm2419; X64-XOP-NEXT:    vpaddq %xmm1, %xmm2, %xmm1420; X64-XOP-NEXT:    vpsllq $4, %xmm0, %xmm2421; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm0422; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0423; X64-XOP-NEXT:    retq424;425; X64-AVX2-LABEL: mul_v4i64_17:426; X64-AVX2:       # %bb.0:427; X64-AVX2-NEXT:    vpsllq $4, %ymm0, %ymm1428; X64-AVX2-NEXT:    vpaddq %ymm0, %ymm1, %ymm0429; X64-AVX2-NEXT:    retq430;431; X64-AVX512DQ-LABEL: mul_v4i64_17:432; X64-AVX512DQ:       # %bb.0:433; X64-AVX512DQ-NEXT:    vpsllq $4, %ymm0, %ymm1434; X64-AVX512DQ-NEXT:    vpaddq %ymm0, %ymm1, %ymm0435; X64-AVX512DQ-NEXT:    retq436  %1 = mul <4 x i64> %a0, <i64 17, i64 17, i64 17, i64 17>437  ret <4 x i64> %1438}439 440define <8 x i32> @mul_v8i32_17(<8 x i32> %a0) nounwind {441; SSE-LABEL: mul_v8i32_17:442; SSE:       # %bb.0:443; SSE-NEXT:    movdqa %xmm0, %xmm2444; SSE-NEXT:    pslld $4, %xmm2445; SSE-NEXT:    paddd %xmm2, %xmm0446; SSE-NEXT:    movdqa %xmm1, %xmm2447; SSE-NEXT:    pslld $4, %xmm2448; SSE-NEXT:    paddd %xmm2, %xmm1449; SSE-NEXT:    ret{{[l|q]}}450;451; X64-XOP-LABEL: mul_v8i32_17:452; X64-XOP:       # %bb.0:453; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1454; X64-XOP-NEXT:    vpslld $4, %xmm1, %xmm2455; X64-XOP-NEXT:    vpaddd %xmm1, %xmm2, %xmm1456; X64-XOP-NEXT:    vpslld $4, %xmm0, %xmm2457; X64-XOP-NEXT:    vpaddd %xmm0, %xmm2, %xmm0458; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0459; X64-XOP-NEXT:    retq460;461; X64-AVX2-LABEL: mul_v8i32_17:462; X64-AVX2:       # %bb.0:463; X64-AVX2-NEXT:    vpslld $4, %ymm0, %ymm1464; X64-AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0465; X64-AVX2-NEXT:    retq466;467; X64-AVX512DQ-LABEL: mul_v8i32_17:468; X64-AVX512DQ:       # %bb.0:469; X64-AVX512DQ-NEXT:    vpslld $4, %ymm0, %ymm1470; X64-AVX512DQ-NEXT:    vpaddd %ymm1, %ymm0, %ymm0471; X64-AVX512DQ-NEXT:    retq472  %1 = mul <8 x i32> %a0, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>473  ret <8 x i32> %1474}475 476define <16 x i16> @mul_v16i16_17(<16 x i16> %a0) nounwind {477; SSE-LABEL: mul_v16i16_17:478; SSE:       # %bb.0:479; SSE-NEXT:    movdqa %xmm0, %xmm2480; SSE-NEXT:    psllw $4, %xmm2481; SSE-NEXT:    paddw %xmm2, %xmm0482; SSE-NEXT:    movdqa %xmm1, %xmm2483; SSE-NEXT:    psllw $4, %xmm2484; SSE-NEXT:    paddw %xmm2, %xmm1485; SSE-NEXT:    ret{{[l|q]}}486;487; X64-XOP-LABEL: mul_v16i16_17:488; X64-XOP:       # %bb.0:489; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1490; X64-XOP-NEXT:    vpsllw $4, %xmm1, %xmm2491; X64-XOP-NEXT:    vpaddw %xmm1, %xmm2, %xmm1492; X64-XOP-NEXT:    vpsllw $4, %xmm0, %xmm2493; X64-XOP-NEXT:    vpaddw %xmm0, %xmm2, %xmm0494; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0495; X64-XOP-NEXT:    retq496;497; X64-AVX2-LABEL: mul_v16i16_17:498; X64-AVX2:       # %bb.0:499; X64-AVX2-NEXT:    vpsllw $4, %ymm0, %ymm1500; X64-AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0501; X64-AVX2-NEXT:    retq502;503; X64-AVX512DQ-LABEL: mul_v16i16_17:504; X64-AVX512DQ:       # %bb.0:505; X64-AVX512DQ-NEXT:    vpsllw $4, %ymm0, %ymm1506; X64-AVX512DQ-NEXT:    vpaddw %ymm1, %ymm0, %ymm0507; X64-AVX512DQ-NEXT:    retq508  %1 = mul <16 x i16> %a0, <i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17>509  ret <16 x i16> %1510}511 512define <32 x i8> @mul_v32i8_17(<32 x i8> %a0) nounwind {513; SSE-LABEL: mul_v32i8_17:514; SSE:       # %bb.0:515; SSE-NEXT:    movdqa %xmm0, %xmm2516; SSE-NEXT:    psllw $4, %xmm2517; SSE-NEXT:    movdqa {{.*#+}} xmm3 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240]518; SSE-NEXT:    pand %xmm3, %xmm2519; SSE-NEXT:    paddb %xmm2, %xmm0520; SSE-NEXT:    movdqa %xmm1, %xmm2521; SSE-NEXT:    psllw $4, %xmm2522; SSE-NEXT:    pand %xmm3, %xmm2523; SSE-NEXT:    paddb %xmm2, %xmm1524; SSE-NEXT:    ret{{[l|q]}}525;526; X64-XOP-LABEL: mul_v32i8_17:527; X64-XOP:       # %bb.0:528; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1529; X64-XOP-NEXT:    vbroadcastss {{.*#+}} xmm2 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]530; X64-XOP-NEXT:    vpshlb %xmm2, %xmm1, %xmm3531; X64-XOP-NEXT:    vpaddb %xmm1, %xmm3, %xmm1532; X64-XOP-NEXT:    vpshlb %xmm2, %xmm0, %xmm2533; X64-XOP-NEXT:    vpaddb %xmm0, %xmm2, %xmm0534; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0535; X64-XOP-NEXT:    retq536;537; X64-AVX2-LABEL: mul_v32i8_17:538; X64-AVX2:       # %bb.0:539; X64-AVX2-NEXT:    vpsllw $4, %ymm0, %ymm1540; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1541; X64-AVX2-NEXT:    vpaddb %ymm0, %ymm1, %ymm0542; X64-AVX2-NEXT:    retq543;544; X64-AVX512DQ-LABEL: mul_v32i8_17:545; X64-AVX512DQ:       # %bb.0:546; X64-AVX512DQ-NEXT:    vpsllw $4, %ymm0, %ymm1547; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm1548; X64-AVX512DQ-NEXT:    vpaddb %ymm0, %ymm1, %ymm0549; X64-AVX512DQ-NEXT:    retq550  %1 = mul <32 x i8> %a0, <i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17>551  ret <32 x i8> %1552}553 554;555; -(PowOf2 + 1) (uniform)556;557 558define <2 x i64> @mul_v2i64_neg1025(<2 x i64> %a0) nounwind {559; SSE-LABEL: mul_v2i64_neg1025:560; SSE:       # %bb.0:561; SSE-NEXT:    movdqa %xmm0, %xmm1562; SSE-NEXT:    psllq $10, %xmm1563; SSE-NEXT:    paddq %xmm0, %xmm1564; SSE-NEXT:    pxor %xmm0, %xmm0565; SSE-NEXT:    psubq %xmm1, %xmm0566; SSE-NEXT:    ret{{[l|q]}}567;568; X64-AVX-LABEL: mul_v2i64_neg1025:569; X64-AVX:       # %bb.0:570; X64-AVX-NEXT:    vpsllq $10, %xmm0, %xmm1571; X64-AVX-NEXT:    vpaddq %xmm0, %xmm1, %xmm0572; X64-AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1573; X64-AVX-NEXT:    vpsubq %xmm0, %xmm1, %xmm0574; X64-AVX-NEXT:    retq575  %1 = mul <2 x i64> %a0, <i64 -1025, i64 -1025>576  ret <2 x i64> %1577}578 579define <4 x i32> @mul_v4i32_neg33(<4 x i32> %a0) nounwind {580; SSE-LABEL: mul_v4i32_neg33:581; SSE:       # %bb.0:582; SSE-NEXT:    movdqa %xmm0, %xmm1583; SSE-NEXT:    pslld $5, %xmm1584; SSE-NEXT:    paddd %xmm0, %xmm1585; SSE-NEXT:    pxor %xmm0, %xmm0586; SSE-NEXT:    psubd %xmm1, %xmm0587; SSE-NEXT:    ret{{[l|q]}}588;589; X64-AVX-LABEL: mul_v4i32_neg33:590; X64-AVX:       # %bb.0:591; X64-AVX-NEXT:    vpslld $5, %xmm0, %xmm1592; X64-AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0593; X64-AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1594; X64-AVX-NEXT:    vpsubd %xmm0, %xmm1, %xmm0595; X64-AVX-NEXT:    retq596  %1 = mul <4 x i32> %a0, <i32 -33, i32 -33, i32 -33, i32 -33>597  ret <4 x i32> %1598}599 600define <8 x i16> @mul_v8i16_neg9(<8 x i16> %a0) nounwind {601; SSE-LABEL: mul_v8i16_neg9:602; SSE:       # %bb.0:603; SSE-NEXT:    movdqa %xmm0, %xmm1604; SSE-NEXT:    psllw $3, %xmm1605; SSE-NEXT:    paddw %xmm0, %xmm1606; SSE-NEXT:    pxor %xmm0, %xmm0607; SSE-NEXT:    psubw %xmm1, %xmm0608; SSE-NEXT:    ret{{[l|q]}}609;610; X64-AVX-LABEL: mul_v8i16_neg9:611; X64-AVX:       # %bb.0:612; X64-AVX-NEXT:    vpsllw $3, %xmm0, %xmm1613; X64-AVX-NEXT:    vpaddw %xmm1, %xmm0, %xmm0614; X64-AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1615; X64-AVX-NEXT:    vpsubw %xmm0, %xmm1, %xmm0616; X64-AVX-NEXT:    retq617  %1 = mul <8 x i16> %a0, <i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9>618  ret <8 x i16> %1619}620 621define <16 x i8> @mul_v16i8_neg5(<16 x i8> %a0) nounwind {622; X86-SSE-LABEL: mul_v16i8_neg5:623; X86-SSE:       # %bb.0:624; X86-SSE-NEXT:    movdqa %xmm0, %xmm1625; X86-SSE-NEXT:    psllw $2, %xmm1626; X86-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1627; X86-SSE-NEXT:    paddb %xmm0, %xmm1628; X86-SSE-NEXT:    pxor %xmm0, %xmm0629; X86-SSE-NEXT:    psubb %xmm1, %xmm0630; X86-SSE-NEXT:    retl631;632; X64-SSE-LABEL: mul_v16i8_neg5:633; X64-SSE:       # %bb.0:634; X64-SSE-NEXT:    movdqa %xmm0, %xmm1635; X64-SSE-NEXT:    psllw $2, %xmm1636; X64-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1637; X64-SSE-NEXT:    paddb %xmm0, %xmm1638; X64-SSE-NEXT:    pxor %xmm0, %xmm0639; X64-SSE-NEXT:    psubb %xmm1, %xmm0640; X64-SSE-NEXT:    retq641;642; X64-XOP-LABEL: mul_v16i8_neg5:643; X64-XOP:       # %bb.0:644; X64-XOP-NEXT:    vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1645; X64-XOP-NEXT:    vpaddb %xmm0, %xmm1, %xmm0646; X64-XOP-NEXT:    vpxor %xmm1, %xmm1, %xmm1647; X64-XOP-NEXT:    vpsubb %xmm0, %xmm1, %xmm0648; X64-XOP-NEXT:    retq649;650; X64-AVX2-LABEL: mul_v16i8_neg5:651; X64-AVX2:       # %bb.0:652; X64-AVX2-NEXT:    vpsllw $2, %xmm0, %xmm1653; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1654; X64-AVX2-NEXT:    vpaddb %xmm0, %xmm1, %xmm0655; X64-AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1656; X64-AVX2-NEXT:    vpsubb %xmm0, %xmm1, %xmm0657; X64-AVX2-NEXT:    retq658;659; X64-AVX512DQ-LABEL: mul_v16i8_neg5:660; X64-AVX512DQ:       # %bb.0:661; X64-AVX512DQ-NEXT:    vpsllw $2, %xmm0, %xmm1662; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm1663; X64-AVX512DQ-NEXT:    vpaddb %xmm0, %xmm1, %xmm0664; X64-AVX512DQ-NEXT:    vpxor %xmm1, %xmm1, %xmm1665; X64-AVX512DQ-NEXT:    vpsubb %xmm0, %xmm1, %xmm0666; X64-AVX512DQ-NEXT:    retq667  %1 = mul <16 x i8> %a0, <i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5>668  ret <16 x i8> %1669}670 671define <4 x i64> @mul_v4i64_neg1025(<4 x i64> %a0) nounwind {672; SSE-LABEL: mul_v4i64_neg1025:673; SSE:       # %bb.0:674; SSE-NEXT:    movdqa %xmm0, %xmm3675; SSE-NEXT:    psllq $10, %xmm3676; SSE-NEXT:    paddq %xmm0, %xmm3677; SSE-NEXT:    pxor %xmm2, %xmm2678; SSE-NEXT:    pxor %xmm0, %xmm0679; SSE-NEXT:    psubq %xmm3, %xmm0680; SSE-NEXT:    movdqa %xmm1, %xmm3681; SSE-NEXT:    psllq $10, %xmm3682; SSE-NEXT:    paddq %xmm1, %xmm3683; SSE-NEXT:    psubq %xmm3, %xmm2684; SSE-NEXT:    movdqa %xmm2, %xmm1685; SSE-NEXT:    ret{{[l|q]}}686;687; X64-XOP-LABEL: mul_v4i64_neg1025:688; X64-XOP:       # %bb.0:689; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1690; X64-XOP-NEXT:    vpsllq $10, %xmm1, %xmm2691; X64-XOP-NEXT:    vpaddq %xmm1, %xmm2, %xmm1692; X64-XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2693; X64-XOP-NEXT:    vpsubq %xmm1, %xmm2, %xmm1694; X64-XOP-NEXT:    vpsllq $10, %xmm0, %xmm3695; X64-XOP-NEXT:    vpaddq %xmm0, %xmm3, %xmm0696; X64-XOP-NEXT:    vpsubq %xmm0, %xmm2, %xmm0697; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0698; X64-XOP-NEXT:    retq699;700; X64-AVX2-LABEL: mul_v4i64_neg1025:701; X64-AVX2:       # %bb.0:702; X64-AVX2-NEXT:    vpsllq $10, %ymm0, %ymm1703; X64-AVX2-NEXT:    vpaddq %ymm0, %ymm1, %ymm0704; X64-AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1705; X64-AVX2-NEXT:    vpsubq %ymm0, %ymm1, %ymm0706; X64-AVX2-NEXT:    retq707;708; X64-AVX512DQ-LABEL: mul_v4i64_neg1025:709; X64-AVX512DQ:       # %bb.0:710; X64-AVX512DQ-NEXT:    vpsllq $10, %ymm0, %ymm1711; X64-AVX512DQ-NEXT:    vpaddq %ymm0, %ymm1, %ymm0712; X64-AVX512DQ-NEXT:    vpxor %xmm1, %xmm1, %xmm1713; X64-AVX512DQ-NEXT:    vpsubq %ymm0, %ymm1, %ymm0714; X64-AVX512DQ-NEXT:    retq715  %1 = mul <4 x i64> %a0, <i64 -1025, i64 -1025, i64 -1025, i64 -1025>716  ret <4 x i64> %1717}718 719define <8 x i32> @mul_v8i32_neg33(<8 x i32> %a0) nounwind {720; SSE-LABEL: mul_v8i32_neg33:721; SSE:       # %bb.0:722; SSE-NEXT:    movdqa %xmm0, %xmm3723; SSE-NEXT:    pslld $5, %xmm3724; SSE-NEXT:    paddd %xmm0, %xmm3725; SSE-NEXT:    pxor %xmm2, %xmm2726; SSE-NEXT:    pxor %xmm0, %xmm0727; SSE-NEXT:    psubd %xmm3, %xmm0728; SSE-NEXT:    movdqa %xmm1, %xmm3729; SSE-NEXT:    pslld $5, %xmm3730; SSE-NEXT:    paddd %xmm1, %xmm3731; SSE-NEXT:    psubd %xmm3, %xmm2732; SSE-NEXT:    movdqa %xmm2, %xmm1733; SSE-NEXT:    ret{{[l|q]}}734;735; X64-XOP-LABEL: mul_v8i32_neg33:736; X64-XOP:       # %bb.0:737; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1738; X64-XOP-NEXT:    vpslld $5, %xmm1, %xmm2739; X64-XOP-NEXT:    vpaddd %xmm1, %xmm2, %xmm1740; X64-XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2741; X64-XOP-NEXT:    vpsubd %xmm1, %xmm2, %xmm1742; X64-XOP-NEXT:    vpslld $5, %xmm0, %xmm3743; X64-XOP-NEXT:    vpaddd %xmm0, %xmm3, %xmm0744; X64-XOP-NEXT:    vpsubd %xmm0, %xmm2, %xmm0745; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0746; X64-XOP-NEXT:    retq747;748; X64-AVX2-LABEL: mul_v8i32_neg33:749; X64-AVX2:       # %bb.0:750; X64-AVX2-NEXT:    vpslld $5, %ymm0, %ymm1751; X64-AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0752; X64-AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1753; X64-AVX2-NEXT:    vpsubd %ymm0, %ymm1, %ymm0754; X64-AVX2-NEXT:    retq755;756; X64-AVX512DQ-LABEL: mul_v8i32_neg33:757; X64-AVX512DQ:       # %bb.0:758; X64-AVX512DQ-NEXT:    vpslld $5, %ymm0, %ymm1759; X64-AVX512DQ-NEXT:    vpaddd %ymm1, %ymm0, %ymm0760; X64-AVX512DQ-NEXT:    vpxor %xmm1, %xmm1, %xmm1761; X64-AVX512DQ-NEXT:    vpsubd %ymm0, %ymm1, %ymm0762; X64-AVX512DQ-NEXT:    retq763  %1 = mul <8 x i32> %a0, <i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33>764  ret <8 x i32> %1765}766 767define <16 x i16> @mul_v16i16_neg9(<16 x i16> %a0) nounwind {768; SSE-LABEL: mul_v16i16_neg9:769; SSE:       # %bb.0:770; SSE-NEXT:    movdqa %xmm0, %xmm3771; SSE-NEXT:    psllw $3, %xmm3772; SSE-NEXT:    paddw %xmm0, %xmm3773; SSE-NEXT:    pxor %xmm2, %xmm2774; SSE-NEXT:    pxor %xmm0, %xmm0775; SSE-NEXT:    psubw %xmm3, %xmm0776; SSE-NEXT:    movdqa %xmm1, %xmm3777; SSE-NEXT:    psllw $3, %xmm3778; SSE-NEXT:    paddw %xmm1, %xmm3779; SSE-NEXT:    psubw %xmm3, %xmm2780; SSE-NEXT:    movdqa %xmm2, %xmm1781; SSE-NEXT:    ret{{[l|q]}}782;783; X64-XOP-LABEL: mul_v16i16_neg9:784; X64-XOP:       # %bb.0:785; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1786; X64-XOP-NEXT:    vpsllw $3, %xmm1, %xmm2787; X64-XOP-NEXT:    vpaddw %xmm1, %xmm2, %xmm1788; X64-XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2789; X64-XOP-NEXT:    vpsubw %xmm1, %xmm2, %xmm1790; X64-XOP-NEXT:    vpsllw $3, %xmm0, %xmm3791; X64-XOP-NEXT:    vpaddw %xmm0, %xmm3, %xmm0792; X64-XOP-NEXT:    vpsubw %xmm0, %xmm2, %xmm0793; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0794; X64-XOP-NEXT:    retq795;796; X64-AVX2-LABEL: mul_v16i16_neg9:797; X64-AVX2:       # %bb.0:798; X64-AVX2-NEXT:    vpsllw $3, %ymm0, %ymm1799; X64-AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0800; X64-AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1801; X64-AVX2-NEXT:    vpsubw %ymm0, %ymm1, %ymm0802; X64-AVX2-NEXT:    retq803;804; X64-AVX512DQ-LABEL: mul_v16i16_neg9:805; X64-AVX512DQ:       # %bb.0:806; X64-AVX512DQ-NEXT:    vpsllw $3, %ymm0, %ymm1807; X64-AVX512DQ-NEXT:    vpaddw %ymm1, %ymm0, %ymm0808; X64-AVX512DQ-NEXT:    vpxor %xmm1, %xmm1, %xmm1809; X64-AVX512DQ-NEXT:    vpsubw %ymm0, %ymm1, %ymm0810; X64-AVX512DQ-NEXT:    retq811  %1 = mul <16 x i16> %a0, <i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9>812  ret <16 x i16> %1813}814 815; PR47422 - check mul-shl-add sequence expands to adds.816define <16 x i16> @madd_v16i16_3(<16 x i16> %a0, <16 x i16> %a1) nounwind {817; X86-SSE-LABEL: madd_v16i16_3:818; X86-SSE:       # %bb.0:819; X86-SSE-NEXT:    pushl %ebp820; X86-SSE-NEXT:    movl %esp, %ebp821; X86-SSE-NEXT:    andl $-16, %esp822; X86-SSE-NEXT:    subl $16, %esp823; X86-SSE-NEXT:    movdqa %xmm1, %xmm3824; X86-SSE-NEXT:    paddw %xmm3, %xmm3825; X86-SSE-NEXT:    paddw %xmm3, %xmm1826; X86-SSE-NEXT:    movdqa %xmm0, %xmm3827; X86-SSE-NEXT:    paddw %xmm3, %xmm3828; X86-SSE-NEXT:    paddw %xmm2, %xmm0829; X86-SSE-NEXT:    paddw %xmm3, %xmm0830; X86-SSE-NEXT:    paddw 8(%ebp), %xmm1831; X86-SSE-NEXT:    movl %ebp, %esp832; X86-SSE-NEXT:    popl %ebp833; X86-SSE-NEXT:    retl834;835; X64-SSE-LABEL: madd_v16i16_3:836; X64-SSE:       # %bb.0:837; X64-SSE-NEXT:    movdqa %xmm1, %xmm4838; X64-SSE-NEXT:    paddw %xmm4, %xmm4839; X64-SSE-NEXT:    movdqa %xmm0, %xmm5840; X64-SSE-NEXT:    paddw %xmm5, %xmm5841; X64-SSE-NEXT:    paddw %xmm2, %xmm0842; X64-SSE-NEXT:    paddw %xmm5, %xmm0843; X64-SSE-NEXT:    paddw %xmm3, %xmm1844; X64-SSE-NEXT:    paddw %xmm4, %xmm1845; X64-SSE-NEXT:    retq846;847; X64-XOP-LABEL: madd_v16i16_3:848; X64-XOP:       # %bb.0:849; X64-XOP-NEXT:    vpaddw %xmm0, %xmm0, %xmm2850; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm3851; X64-XOP-NEXT:    vpaddw %xmm3, %xmm3, %xmm4852; X64-XOP-NEXT:    vextractf128 $1, %ymm1, %xmm5853; X64-XOP-NEXT:    vpaddw %xmm5, %xmm3, %xmm3854; X64-XOP-NEXT:    vpaddw %xmm3, %xmm4, %xmm3855; X64-XOP-NEXT:    vpaddw %xmm1, %xmm0, %xmm0856; X64-XOP-NEXT:    vpaddw %xmm0, %xmm2, %xmm0857; X64-XOP-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0858; X64-XOP-NEXT:    retq859;860; X64-AVX2-LABEL: madd_v16i16_3:861; X64-AVX2:       # %bb.0:862; X64-AVX2-NEXT:    vpaddw %ymm0, %ymm0, %ymm2863; X64-AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0864; X64-AVX2-NEXT:    vpaddw %ymm2, %ymm0, %ymm0865; X64-AVX2-NEXT:    retq866;867; X64-AVX512DQ-LABEL: madd_v16i16_3:868; X64-AVX512DQ:       # %bb.0:869; X64-AVX512DQ-NEXT:    vpaddw %ymm0, %ymm0, %ymm2870; X64-AVX512DQ-NEXT:    vpaddw %ymm1, %ymm0, %ymm0871; X64-AVX512DQ-NEXT:    vpaddw %ymm2, %ymm0, %ymm0872; X64-AVX512DQ-NEXT:    retq873  %mul = mul <16 x i16> %a0, splat (i16 3)874  %add = add <16 x i16> %mul, %a1875  ret <16 x i16> %add876}877 878define <32 x i8> @mul_v32i8_neg5(<32 x i8> %a0) nounwind {879; SSE-LABEL: mul_v32i8_neg5:880; SSE:       # %bb.0:881; SSE-NEXT:    movdqa %xmm0, %xmm3882; SSE-NEXT:    psllw $2, %xmm3883; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252]884; SSE-NEXT:    pand %xmm4, %xmm3885; SSE-NEXT:    paddb %xmm0, %xmm3886; SSE-NEXT:    pxor %xmm2, %xmm2887; SSE-NEXT:    pxor %xmm0, %xmm0888; SSE-NEXT:    psubb %xmm3, %xmm0889; SSE-NEXT:    movdqa %xmm1, %xmm3890; SSE-NEXT:    psllw $2, %xmm3891; SSE-NEXT:    pand %xmm4, %xmm3892; SSE-NEXT:    paddb %xmm1, %xmm3893; SSE-NEXT:    psubb %xmm3, %xmm2894; SSE-NEXT:    movdqa %xmm2, %xmm1895; SSE-NEXT:    ret{{[l|q]}}896;897; X64-XOP-LABEL: mul_v32i8_neg5:898; X64-XOP:       # %bb.0:899; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm1900; X64-XOP-NEXT:    vbroadcastss {{.*#+}} xmm2 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]901; X64-XOP-NEXT:    vpshlb %xmm2, %xmm1, %xmm3902; X64-XOP-NEXT:    vpaddb %xmm1, %xmm3, %xmm1903; X64-XOP-NEXT:    vpxor %xmm3, %xmm3, %xmm3904; X64-XOP-NEXT:    vpsubb %xmm1, %xmm3, %xmm1905; X64-XOP-NEXT:    vpshlb %xmm2, %xmm0, %xmm2906; X64-XOP-NEXT:    vpaddb %xmm0, %xmm2, %xmm0907; X64-XOP-NEXT:    vpsubb %xmm0, %xmm3, %xmm0908; X64-XOP-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0909; X64-XOP-NEXT:    retq910;911; X64-AVX2-LABEL: mul_v32i8_neg5:912; X64-AVX2:       # %bb.0:913; X64-AVX2-NEXT:    vpsllw $2, %ymm0, %ymm1914; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1915; X64-AVX2-NEXT:    vpaddb %ymm0, %ymm1, %ymm0916; X64-AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1917; X64-AVX2-NEXT:    vpsubb %ymm0, %ymm1, %ymm0918; X64-AVX2-NEXT:    retq919;920; X64-AVX512DQ-LABEL: mul_v32i8_neg5:921; X64-AVX512DQ:       # %bb.0:922; X64-AVX512DQ-NEXT:    vpsllw $2, %ymm0, %ymm1923; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm1924; X64-AVX512DQ-NEXT:    vpaddb %ymm0, %ymm1, %ymm0925; X64-AVX512DQ-NEXT:    vpxor %xmm1, %xmm1, %xmm1926; X64-AVX512DQ-NEXT:    vpsubb %ymm0, %ymm1, %ymm0927; X64-AVX512DQ-NEXT:    retq928  %1 = mul <32 x i8> %a0, <i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5>929  ret <32 x i8> %1930}931 932;933; PowOf2 + 1 (non-uniform)934;935 936define <2 x i64> @mul_v2i64_17_65(<2 x i64> %a0) nounwind {937; X86-SSE2-LABEL: mul_v2i64_17_65:938; X86-SSE2:       # %bb.0:939; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [17,0,65,0]940; X86-SSE2-NEXT:    movdqa %xmm0, %xmm2941; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm2942; X86-SSE2-NEXT:    psrlq $32, %xmm0943; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm0944; X86-SSE2-NEXT:    psllq $32, %xmm0945; X86-SSE2-NEXT:    paddq %xmm2, %xmm0946; X86-SSE2-NEXT:    retl947;948; SSE4-LABEL: mul_v2i64_17_65:949; SSE4:       # %bb.0:950; SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [17,65]951; SSE4-NEXT:    movdqa %xmm0, %xmm2952; SSE4-NEXT:    pmuludq %xmm1, %xmm2953; SSE4-NEXT:    psrlq $32, %xmm0954; SSE4-NEXT:    pmuludq %xmm1, %xmm0955; SSE4-NEXT:    psllq $32, %xmm0956; SSE4-NEXT:    paddq %xmm2, %xmm0957; SSE4-NEXT:    ret{{[l|q]}}958;959; X64-SSE2-LABEL: mul_v2i64_17_65:960; X64-SSE2:       # %bb.0:961; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [17,65]962; X64-SSE2-NEXT:    movdqa %xmm0, %xmm2963; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm2964; X64-SSE2-NEXT:    psrlq $32, %xmm0965; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm0966; X64-SSE2-NEXT:    psllq $32, %xmm0967; X64-SSE2-NEXT:    paddq %xmm2, %xmm0968; X64-SSE2-NEXT:    retq969;970; X64-XOP-LABEL: mul_v2i64_17_65:971; X64-XOP:       # %bb.0:972; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [17,65]973; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm2974; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm0975; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm0976; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm0977; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm0978; X64-XOP-NEXT:    retq979;980; X64-AVX2-LABEL: mul_v2i64_17_65:981; X64-AVX2:       # %bb.0:982; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [17,65]983; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm2984; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm0985; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm0986; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm0987; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm0988; X64-AVX2-NEXT:    retq989;990; X64-AVX512DQ-LABEL: mul_v2i64_17_65:991; X64-AVX512DQ:       # %bb.0:992; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [17,65]993; X64-AVX512DQ-NEXT:    retq994  %1 = mul <2 x i64> %a0, <i64 17, i64 65>995  ret <2 x i64> %1996}997 998define <4 x i32> @mul_v4i32_5_17_33_65(<4 x i32> %a0) nounwind {999; X86-SSE2-LABEL: mul_v4i32_5_17_33_65:1000; X86-SSE2:       # %bb.0:1001; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1002; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [5,17,33,65]1003; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1004; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [17,u,65,u]1005; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1006; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1007; X86-SSE2-NEXT:    retl1008;1009; X86-SSE4-LABEL: mul_v4i32_5_17_33_65:1010; X86-SSE4:       # %bb.0:1011; X86-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [5,17,33,65]1012; X86-SSE4-NEXT:    retl1013;1014; X64-SSE2-LABEL: mul_v4i32_5_17_33_65:1015; X64-SSE2:       # %bb.0:1016; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1017; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [5,17,33,65]1018; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1019; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [17,u,65,u]1020; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1021; X64-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1022; X64-SSE2-NEXT:    retq1023;1024; X64-SSE4-LABEL: mul_v4i32_5_17_33_65:1025; X64-SSE4:       # %bb.0:1026; X64-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [5,17,33,65]1027; X64-SSE4-NEXT:    retq1028;1029; X64-AVX-LABEL: mul_v4i32_5_17_33_65:1030; X64-AVX:       # %bb.0:1031; X64-AVX-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [5,17,33,65]1032; X64-AVX-NEXT:    retq1033  %1 = mul <4 x i32> %a0, <i32 5, i32 17, i32 33, i32 65>1034  ret <4 x i32> %11035}1036 1037define <8 x i16> @mul_v8i16_2_3_9_17_33_65_129_257(<8 x i16> %a0) nounwind {1038; X86-SSE-LABEL: mul_v8i16_2_3_9_17_33_65_129_257:1039; X86-SSE:       # %bb.0:1040; X86-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [2,3,9,17,33,65,129,257]1041; X86-SSE-NEXT:    retl1042;1043; X64-SSE-LABEL: mul_v8i16_2_3_9_17_33_65_129_257:1044; X64-SSE:       # %bb.0:1045; X64-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,3,9,17,33,65,129,257]1046; X64-SSE-NEXT:    retq1047;1048; X64-AVX-LABEL: mul_v8i16_2_3_9_17_33_65_129_257:1049; X64-AVX:       # %bb.0:1050; X64-AVX-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2,3,9,17,33,65,129,257]1051; X64-AVX-NEXT:    retq1052  %1 = mul <8 x i16> %a0, <i16 2, i16 3, i16 9, i16 17, i16 33, i16 65, i16 129, i16 257>1053  ret <8 x i16> %11054}1055 1056define <16 x i8> @mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3(<16 x i8> %a0) nounwind {1057; X86-SSE2-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1058; X86-SSE2:       # %bb.0:1059; X86-SSE2-NEXT:    movdqa %xmm0, %xmm11060; X86-SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]1061; X86-SSE2-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [3,u,9,u,17,u,33,u,65,u,129,u,2,u,3,u]1062; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]1063; X86-SSE2-NEXT:    pand %xmm2, %xmm11064; X86-SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]1065; X86-SSE2-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [2,u,3,u,9,u,17,u,33,u,65,u,129,u,2,u]1066; X86-SSE2-NEXT:    pand %xmm2, %xmm01067; X86-SSE2-NEXT:    packuswb %xmm1, %xmm01068; X86-SSE2-NEXT:    retl1069;1070; X86-SSE4-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1071; X86-SSE4:       # %bb.0:1072; X86-SSE4-NEXT:    movdqa %xmm0, %xmm11073; X86-SSE4-NEXT:    pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [0,3,0,17,0,65,0,2,0,9,0,33,0,129,0,3]1074; X86-SSE4-NEXT:    psllw $8, %xmm11075; X86-SSE4-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [2,3,9,17,33,65,129,2,3,9,17,33,65,129,2,3]1076; X86-SSE4-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01077; X86-SSE4-NEXT:    por %xmm1, %xmm01078; X86-SSE4-NEXT:    retl1079;1080; X64-SSE2-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1081; X64-SSE2:       # %bb.0:1082; X64-SSE2-NEXT:    movdqa %xmm0, %xmm11083; X64-SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]1084; X64-SSE2-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [3,u,9,u,17,u,33,u,65,u,129,u,2,u,3,u]1085; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]1086; X64-SSE2-NEXT:    pand %xmm2, %xmm11087; X64-SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]1088; X64-SSE2-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,u,3,u,9,u,17,u,33,u,65,u,129,u,2,u]1089; X64-SSE2-NEXT:    pand %xmm2, %xmm01090; X64-SSE2-NEXT:    packuswb %xmm1, %xmm01091; X64-SSE2-NEXT:    retq1092;1093; X64-SSE4-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1094; X64-SSE4:       # %bb.0:1095; X64-SSE4-NEXT:    movdqa %xmm0, %xmm11096; X64-SSE4-NEXT:    pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [0,3,0,17,0,65,0,2,0,9,0,33,0,129,0,3]1097; X64-SSE4-NEXT:    psllw $8, %xmm11098; X64-SSE4-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,3,9,17,33,65,129,2,3,9,17,33,65,129,2,3]1099; X64-SSE4-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01100; X64-SSE4-NEXT:    por %xmm1, %xmm01101; X64-SSE4-NEXT:    retq1102;1103; X64-XOP-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1104; X64-XOP:       # %bb.0:1105; X64-XOP-NEXT:    vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [0,3,0,17,0,65,0,2,0,9,0,33,0,129,0,3]1106; X64-XOP-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [2,3,9,17,33,65,129,2,3,9,17,33,65,129,2,3]1107; X64-XOP-NEXT:    vpperm {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2],xmm1[2],xmm0[4],xmm1[4],xmm0[6],xmm1[6],xmm0[8],xmm1[8],xmm0[10],xmm1[10],xmm0[12],xmm1[12],xmm0[14],xmm1[14]1108; X64-XOP-NEXT:    retq1109;1110; X64-AVX2-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1111; X64-AVX2:       # %bb.0:1112; X64-AVX2-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1113; X64-AVX2-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [2,3,9,17,33,65,129,2,3,9,17,33,65,129,2,3]1114; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01115; X64-AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm11116; X64-AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm01117; X64-AVX2-NEXT:    vzeroupper1118; X64-AVX2-NEXT:    retq1119;1120; X64-AVX512DQ-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3:1121; X64-AVX512DQ:       # %bb.0:1122; X64-AVX512DQ-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1123; X64-AVX512DQ-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [2,3,9,17,33,65,129,2,3,9,17,33,65,129,2,3]1124; X64-AVX512DQ-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero1125; X64-AVX512DQ-NEXT:    vpmovdb %zmm0, %xmm01126; X64-AVX512DQ-NEXT:    vzeroupper1127; X64-AVX512DQ-NEXT:    retq1128  %1 = mul <16 x i8> %a0, <i8 2, i8 3, i8 9, i8 17, i8 33, i8 65, i8 129, i8 2, i8 3, i8 9, i8 17, i8 33, i8 65, i8 129, i8 2, i8 3>1129  ret <16 x i8> %11130}1131 1132;1133; PowOf2 - 1 (uniform)1134;1135 1136define <2 x i64> @mul_v2i64_7(<2 x i64> %a0) nounwind {1137; SSE-LABEL: mul_v2i64_7:1138; SSE:       # %bb.0:1139; SSE-NEXT:    movdqa %xmm0, %xmm11140; SSE-NEXT:    psllq $3, %xmm11141; SSE-NEXT:    psubq %xmm0, %xmm11142; SSE-NEXT:    movdqa %xmm1, %xmm01143; SSE-NEXT:    ret{{[l|q]}}1144;1145; X64-AVX-LABEL: mul_v2i64_7:1146; X64-AVX:       # %bb.0:1147; X64-AVX-NEXT:    vpsllq $3, %xmm0, %xmm11148; X64-AVX-NEXT:    vpsubq %xmm0, %xmm1, %xmm01149; X64-AVX-NEXT:    retq1150  %1 = mul <2 x i64> %a0, <i64 7, i64 7>1151  ret <2 x i64> %11152}1153 1154define <4 x i32> @mul_v4i32_7(<4 x i32> %a0) nounwind {1155; SSE-LABEL: mul_v4i32_7:1156; SSE:       # %bb.0:1157; SSE-NEXT:    movdqa %xmm0, %xmm11158; SSE-NEXT:    pslld $3, %xmm11159; SSE-NEXT:    psubd %xmm0, %xmm11160; SSE-NEXT:    movdqa %xmm1, %xmm01161; SSE-NEXT:    ret{{[l|q]}}1162;1163; X64-AVX-LABEL: mul_v4i32_7:1164; X64-AVX:       # %bb.0:1165; X64-AVX-NEXT:    vpslld $3, %xmm0, %xmm11166; X64-AVX-NEXT:    vpsubd %xmm0, %xmm1, %xmm01167; X64-AVX-NEXT:    retq1168  %1 = mul <4 x i32> %a0, <i32 7, i32 7, i32 7, i32 7>1169  ret <4 x i32> %11170}1171 1172define <8 x i16> @mul_v8i16_7(<8 x i16> %a0) nounwind {1173; SSE-LABEL: mul_v8i16_7:1174; SSE:       # %bb.0:1175; SSE-NEXT:    movdqa %xmm0, %xmm11176; SSE-NEXT:    psllw $3, %xmm11177; SSE-NEXT:    psubw %xmm0, %xmm11178; SSE-NEXT:    movdqa %xmm1, %xmm01179; SSE-NEXT:    ret{{[l|q]}}1180;1181; X64-AVX-LABEL: mul_v8i16_7:1182; X64-AVX:       # %bb.0:1183; X64-AVX-NEXT:    vpsllw $3, %xmm0, %xmm11184; X64-AVX-NEXT:    vpsubw %xmm0, %xmm1, %xmm01185; X64-AVX-NEXT:    retq1186  %1 = mul <8 x i16> %a0, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>1187  ret <8 x i16> %11188}1189 1190define <16 x i8> @mul_v16i8_31(<16 x i8> %a0) nounwind {1191; X86-SSE-LABEL: mul_v16i8_31:1192; X86-SSE:       # %bb.0:1193; X86-SSE-NEXT:    movdqa %xmm0, %xmm11194; X86-SSE-NEXT:    psllw $5, %xmm11195; X86-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm11196; X86-SSE-NEXT:    psubb %xmm0, %xmm11197; X86-SSE-NEXT:    movdqa %xmm1, %xmm01198; X86-SSE-NEXT:    retl1199;1200; X64-SSE-LABEL: mul_v16i8_31:1201; X64-SSE:       # %bb.0:1202; X64-SSE-NEXT:    movdqa %xmm0, %xmm11203; X64-SSE-NEXT:    psllw $5, %xmm11204; X64-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11205; X64-SSE-NEXT:    psubb %xmm0, %xmm11206; X64-SSE-NEXT:    movdqa %xmm1, %xmm01207; X64-SSE-NEXT:    retq1208;1209; X64-XOP-LABEL: mul_v16i8_31:1210; X64-XOP:       # %bb.0:1211; X64-XOP-NEXT:    vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11212; X64-XOP-NEXT:    vpsubb %xmm0, %xmm1, %xmm01213; X64-XOP-NEXT:    retq1214;1215; X64-AVX2-LABEL: mul_v16i8_31:1216; X64-AVX2:       # %bb.0:1217; X64-AVX2-NEXT:    vpsllw $5, %xmm0, %xmm11218; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11219; X64-AVX2-NEXT:    vpsubb %xmm0, %xmm1, %xmm01220; X64-AVX2-NEXT:    retq1221;1222; X64-AVX512DQ-LABEL: mul_v16i8_31:1223; X64-AVX512DQ:       # %bb.0:1224; X64-AVX512DQ-NEXT:    vpsllw $5, %xmm0, %xmm11225; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm11226; X64-AVX512DQ-NEXT:    vpsubb %xmm0, %xmm1, %xmm01227; X64-AVX512DQ-NEXT:    retq1228  %1 = mul <16 x i8> %a0, <i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31>1229  ret <16 x i8> %11230}1231 1232;1233; -(PowOf2 - 1) (uniform)1234;1235 1236define <2 x i64> @mul_v2i64_neg7(<2 x i64> %a0) nounwind {1237; SSE-LABEL: mul_v2i64_neg7:1238; SSE:       # %bb.0:1239; SSE-NEXT:    movdqa %xmm0, %xmm11240; SSE-NEXT:    psllq $3, %xmm11241; SSE-NEXT:    psubq %xmm1, %xmm01242; SSE-NEXT:    ret{{[l|q]}}1243;1244; X64-AVX-LABEL: mul_v2i64_neg7:1245; X64-AVX:       # %bb.0:1246; X64-AVX-NEXT:    vpsllq $3, %xmm0, %xmm11247; X64-AVX-NEXT:    vpsubq %xmm1, %xmm0, %xmm01248; X64-AVX-NEXT:    retq1249  %1 = mul <2 x i64> %a0, <i64 -7, i64 -7>1250  ret <2 x i64> %11251}1252 1253define <4 x i32> @mul_v4i32_neg63(<4 x i32> %a0) nounwind {1254; SSE-LABEL: mul_v4i32_neg63:1255; SSE:       # %bb.0:1256; SSE-NEXT:    movdqa %xmm0, %xmm11257; SSE-NEXT:    pslld $6, %xmm11258; SSE-NEXT:    psubd %xmm1, %xmm01259; SSE-NEXT:    ret{{[l|q]}}1260;1261; X64-AVX-LABEL: mul_v4i32_neg63:1262; X64-AVX:       # %bb.0:1263; X64-AVX-NEXT:    vpslld $6, %xmm0, %xmm11264; X64-AVX-NEXT:    vpsubd %xmm1, %xmm0, %xmm01265; X64-AVX-NEXT:    retq1266  %1 = mul <4 x i32> %a0, <i32 -63, i32 -63, i32 -63, i32 -63>1267  ret <4 x i32> %11268}1269 1270define <8 x i16> @mul_v8i16_neg31(<8 x i16> %a0) nounwind {1271; SSE-LABEL: mul_v8i16_neg31:1272; SSE:       # %bb.0:1273; SSE-NEXT:    movdqa %xmm0, %xmm11274; SSE-NEXT:    psllw $5, %xmm11275; SSE-NEXT:    psubw %xmm1, %xmm01276; SSE-NEXT:    ret{{[l|q]}}1277;1278; X64-AVX-LABEL: mul_v8i16_neg31:1279; X64-AVX:       # %bb.0:1280; X64-AVX-NEXT:    vpsllw $5, %xmm0, %xmm11281; X64-AVX-NEXT:    vpsubw %xmm1, %xmm0, %xmm01282; X64-AVX-NEXT:    retq1283  %1 = mul <8 x i16> %a0, <i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31>1284  ret <8 x i16> %11285}1286 1287define <16 x i8> @mul_v16i8_neg15(<16 x i8> %a0) nounwind {1288; X86-SSE-LABEL: mul_v16i8_neg15:1289; X86-SSE:       # %bb.0:1290; X86-SSE-NEXT:    movdqa %xmm0, %xmm11291; X86-SSE-NEXT:    psllw $4, %xmm11292; X86-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm11293; X86-SSE-NEXT:    psubb %xmm1, %xmm01294; X86-SSE-NEXT:    retl1295;1296; X64-SSE-LABEL: mul_v16i8_neg15:1297; X64-SSE:       # %bb.0:1298; X64-SSE-NEXT:    movdqa %xmm0, %xmm11299; X64-SSE-NEXT:    psllw $4, %xmm11300; X64-SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11301; X64-SSE-NEXT:    psubb %xmm1, %xmm01302; X64-SSE-NEXT:    retq1303;1304; X64-XOP-LABEL: mul_v16i8_neg15:1305; X64-XOP:       # %bb.0:1306; X64-XOP-NEXT:    vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm11307; X64-XOP-NEXT:    vpsubb %xmm1, %xmm0, %xmm01308; X64-XOP-NEXT:    retq1309;1310; X64-AVX2-LABEL: mul_v16i8_neg15:1311; X64-AVX2:       # %bb.0:1312; X64-AVX2-NEXT:    vpsllw $4, %xmm0, %xmm11313; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11314; X64-AVX2-NEXT:    vpsubb %xmm1, %xmm0, %xmm01315; X64-AVX2-NEXT:    retq1316;1317; X64-AVX512DQ-LABEL: mul_v16i8_neg15:1318; X64-AVX512DQ:       # %bb.0:1319; X64-AVX512DQ-NEXT:    vpsllw $4, %xmm0, %xmm11320; X64-AVX512DQ-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm11321; X64-AVX512DQ-NEXT:    vpsubb %xmm1, %xmm0, %xmm01322; X64-AVX512DQ-NEXT:    retq1323  %1 = mul <16 x i8> %a0, <i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15>1324  ret <16 x i8> %11325}1326 1327;1328; PowOf2 - 1 (non-uniform)1329;1330 1331define <2 x i64> @mul_v2i64_15_63(<2 x i64> %a0) nounwind {1332; X86-SSE2-LABEL: mul_v2i64_15_63:1333; X86-SSE2:       # %bb.0:1334; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [15,0,63,0]1335; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21336; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm21337; X86-SSE2-NEXT:    psrlq $32, %xmm01338; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm01339; X86-SSE2-NEXT:    psllq $32, %xmm01340; X86-SSE2-NEXT:    paddq %xmm2, %xmm01341; X86-SSE2-NEXT:    retl1342;1343; SSE4-LABEL: mul_v2i64_15_63:1344; SSE4:       # %bb.0:1345; SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [15,63]1346; SSE4-NEXT:    movdqa %xmm0, %xmm21347; SSE4-NEXT:    pmuludq %xmm1, %xmm21348; SSE4-NEXT:    psrlq $32, %xmm01349; SSE4-NEXT:    pmuludq %xmm1, %xmm01350; SSE4-NEXT:    psllq $32, %xmm01351; SSE4-NEXT:    paddq %xmm2, %xmm01352; SSE4-NEXT:    ret{{[l|q]}}1353;1354; X64-SSE2-LABEL: mul_v2i64_15_63:1355; X64-SSE2:       # %bb.0:1356; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [15,63]1357; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21358; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21359; X64-SSE2-NEXT:    psrlq $32, %xmm01360; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm01361; X64-SSE2-NEXT:    psllq $32, %xmm01362; X64-SSE2-NEXT:    paddq %xmm2, %xmm01363; X64-SSE2-NEXT:    retq1364;1365; X64-XOP-LABEL: mul_v2i64_15_63:1366; X64-XOP:       # %bb.0:1367; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [15,63]1368; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21369; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm01370; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm01371; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01372; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01373; X64-XOP-NEXT:    retq1374;1375; X64-AVX2-LABEL: mul_v2i64_15_63:1376; X64-AVX2:       # %bb.0:1377; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [15,63]1378; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21379; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm01380; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm01381; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm01382; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm01383; X64-AVX2-NEXT:    retq1384;1385; X64-AVX512DQ-LABEL: mul_v2i64_15_63:1386; X64-AVX512DQ:       # %bb.0:1387; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [15,63]1388; X64-AVX512DQ-NEXT:    retq1389  %1 = mul <2 x i64> %a0, <i64 15, i64 63>1390  ret <2 x i64> %11391}1392 1393define <2 x i64> @mul_v2i64_neg_15_63(<2 x i64> %a0) nounwind {1394; X86-SSE2-LABEL: mul_v2i64_neg_15_63:1395; X86-SSE2:       # %bb.0:1396; X86-SSE2-NEXT:    pcmpeqd %xmm1, %xmm11397; X86-SSE2-NEXT:    pmuludq %xmm0, %xmm11398; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21399; X86-SSE2-NEXT:    psrlq $32, %xmm21400; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [4294967281,4294967295,4294967233,4294967295]1401; X86-SSE2-NEXT:    pmuludq %xmm3, %xmm21402; X86-SSE2-NEXT:    paddq %xmm1, %xmm21403; X86-SSE2-NEXT:    psllq $32, %xmm21404; X86-SSE2-NEXT:    pmuludq %xmm3, %xmm01405; X86-SSE2-NEXT:    paddq %xmm2, %xmm01406; X86-SSE2-NEXT:    retl1407;1408; X86-SSE4-LABEL: mul_v2i64_neg_15_63:1409; X86-SSE4:       # %bb.0:1410; X86-SSE4-NEXT:    pcmpeqd %xmm1, %xmm11411; X86-SSE4-NEXT:    pmuludq %xmm0, %xmm11412; X86-SSE4-NEXT:    movdqa %xmm0, %xmm21413; X86-SSE4-NEXT:    psrlq $32, %xmm21414; X86-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm3 = [18446744073709551601,18446744073709551553]1415; X86-SSE4-NEXT:    pmuludq %xmm3, %xmm21416; X86-SSE4-NEXT:    paddq %xmm1, %xmm21417; X86-SSE4-NEXT:    psllq $32, %xmm21418; X86-SSE4-NEXT:    pmuludq %xmm3, %xmm01419; X86-SSE4-NEXT:    paddq %xmm2, %xmm01420; X86-SSE4-NEXT:    retl1421;1422; X64-SSE2-LABEL: mul_v2i64_neg_15_63:1423; X64-SSE2:       # %bb.0:1424; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553]1425; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21426; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21427; X64-SSE2-NEXT:    movdqa %xmm0, %xmm31428; X64-SSE2-NEXT:    psrlq $32, %xmm31429; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm31430; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [4294967295,4294967295]1431; X64-SSE2-NEXT:    paddq %xmm3, %xmm01432; X64-SSE2-NEXT:    psllq $32, %xmm01433; X64-SSE2-NEXT:    paddq %xmm2, %xmm01434; X64-SSE2-NEXT:    retq1435;1436; X64-SSE4-LABEL: mul_v2i64_neg_15_63:1437; X64-SSE4:       # %bb.0:1438; X64-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553]1439; X64-SSE4-NEXT:    movdqa %xmm0, %xmm21440; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm21441; X64-SSE4-NEXT:    movdqa %xmm0, %xmm31442; X64-SSE4-NEXT:    psrlq $32, %xmm31443; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm31444; X64-SSE4-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [4294967295,4294967295]1445; X64-SSE4-NEXT:    paddq %xmm3, %xmm01446; X64-SSE4-NEXT:    psllq $32, %xmm01447; X64-SSE4-NEXT:    paddq %xmm2, %xmm01448; X64-SSE4-NEXT:    retq1449;1450; X64-XOP-LABEL: mul_v2i64_neg_15_63:1451; X64-XOP:       # %bb.0:1452; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553]1453; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21454; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm31455; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11456; X64-XOP-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [4294967295,4294967295]1457; X64-XOP-NEXT:    vpaddq %xmm1, %xmm0, %xmm01458; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01459; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01460; X64-XOP-NEXT:    retq1461;1462; X64-AVX2-LABEL: mul_v2i64_neg_15_63:1463; X64-AVX2:       # %bb.0:1464; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553]1465; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21466; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm31467; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11468; X64-AVX2-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [4294967295,4294967295]1469; X64-AVX2-NEXT:    vpaddq %xmm1, %xmm0, %xmm01470; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm01471; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm01472; X64-AVX2-NEXT:    retq1473;1474; X64-AVX512DQ-LABEL: mul_v2i64_neg_15_63:1475; X64-AVX512DQ:       # %bb.0:1476; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [18446744073709551601,18446744073709551553]1477; X64-AVX512DQ-NEXT:    retq1478  %1 = mul <2 x i64> %a0, <i64 -15, i64 -63>1479  ret <2 x i64> %11480}1481 1482define <2 x i64> @mul_v2i64_neg_17_65(<2 x i64> %a0) nounwind {1483; X86-SSE2-LABEL: mul_v2i64_neg_17_65:1484; X86-SSE2:       # %bb.0:1485; X86-SSE2-NEXT:    pcmpeqd %xmm1, %xmm11486; X86-SSE2-NEXT:    pmuludq %xmm0, %xmm11487; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21488; X86-SSE2-NEXT:    psrlq $32, %xmm21489; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [4294967279,4294967295,4294967231,4294967295]1490; X86-SSE2-NEXT:    pmuludq %xmm3, %xmm21491; X86-SSE2-NEXT:    paddq %xmm1, %xmm21492; X86-SSE2-NEXT:    psllq $32, %xmm21493; X86-SSE2-NEXT:    pmuludq %xmm3, %xmm01494; X86-SSE2-NEXT:    paddq %xmm2, %xmm01495; X86-SSE2-NEXT:    retl1496;1497; X86-SSE4-LABEL: mul_v2i64_neg_17_65:1498; X86-SSE4:       # %bb.0:1499; X86-SSE4-NEXT:    pcmpeqd %xmm1, %xmm11500; X86-SSE4-NEXT:    pmuludq %xmm0, %xmm11501; X86-SSE4-NEXT:    movdqa %xmm0, %xmm21502; X86-SSE4-NEXT:    psrlq $32, %xmm21503; X86-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm3 = [18446744073709551599,18446744073709551551]1504; X86-SSE4-NEXT:    pmuludq %xmm3, %xmm21505; X86-SSE4-NEXT:    paddq %xmm1, %xmm21506; X86-SSE4-NEXT:    psllq $32, %xmm21507; X86-SSE4-NEXT:    pmuludq %xmm3, %xmm01508; X86-SSE4-NEXT:    paddq %xmm2, %xmm01509; X86-SSE4-NEXT:    retl1510;1511; X64-SSE2-LABEL: mul_v2i64_neg_17_65:1512; X64-SSE2:       # %bb.0:1513; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551]1514; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21515; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21516; X64-SSE2-NEXT:    movdqa %xmm0, %xmm31517; X64-SSE2-NEXT:    psrlq $32, %xmm31518; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm31519; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [4294967295,4294967295]1520; X64-SSE2-NEXT:    paddq %xmm3, %xmm01521; X64-SSE2-NEXT:    psllq $32, %xmm01522; X64-SSE2-NEXT:    paddq %xmm2, %xmm01523; X64-SSE2-NEXT:    retq1524;1525; X64-SSE4-LABEL: mul_v2i64_neg_17_65:1526; X64-SSE4:       # %bb.0:1527; X64-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551]1528; X64-SSE4-NEXT:    movdqa %xmm0, %xmm21529; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm21530; X64-SSE4-NEXT:    movdqa %xmm0, %xmm31531; X64-SSE4-NEXT:    psrlq $32, %xmm31532; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm31533; X64-SSE4-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [4294967295,4294967295]1534; X64-SSE4-NEXT:    paddq %xmm3, %xmm01535; X64-SSE4-NEXT:    psllq $32, %xmm01536; X64-SSE4-NEXT:    paddq %xmm2, %xmm01537; X64-SSE4-NEXT:    retq1538;1539; X64-XOP-LABEL: mul_v2i64_neg_17_65:1540; X64-XOP:       # %bb.0:1541; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551]1542; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21543; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm31544; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11545; X64-XOP-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [4294967295,4294967295]1546; X64-XOP-NEXT:    vpaddq %xmm1, %xmm0, %xmm01547; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01548; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01549; X64-XOP-NEXT:    retq1550;1551; X64-AVX2-LABEL: mul_v2i64_neg_17_65:1552; X64-AVX2:       # %bb.0:1553; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551]1554; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21555; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm31556; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11557; X64-AVX2-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [4294967295,4294967295]1558; X64-AVX2-NEXT:    vpaddq %xmm1, %xmm0, %xmm01559; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm01560; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm01561; X64-AVX2-NEXT:    retq1562;1563; X64-AVX512DQ-LABEL: mul_v2i64_neg_17_65:1564; X64-AVX512DQ:       # %bb.0:1565; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [18446744073709551599,18446744073709551551]1566; X64-AVX512DQ-NEXT:    retq1567  %1 = mul <2 x i64> %a0, <i64 -17, i64 -65>1568  ret <2 x i64> %11569}1570 1571define <2 x i64> @mul_v2i64_0_1(<2 x i64> %a0) nounwind {1572; SSE2-LABEL: mul_v2i64_0_1:1573; SSE2:       # %bb.0:1574; SSE2-NEXT:    xorps %xmm1, %xmm11575; SSE2-NEXT:    unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1576; SSE2-NEXT:    movaps %xmm1, %xmm01577; SSE2-NEXT:    ret{{[l|q]}}1578;1579; SSE4-LABEL: mul_v2i64_0_1:1580; SSE4:       # %bb.0:1581; SSE4-NEXT:    xorps %xmm1, %xmm11582; SSE4-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]1583; SSE4-NEXT:    ret{{[l|q]}}1584;1585; X64-AVX-LABEL: mul_v2i64_0_1:1586; X64-AVX:       # %bb.0:1587; X64-AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm11588; X64-AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]1589; X64-AVX-NEXT:    retq1590  %1 = mul <2 x i64> %a0, <i64 0, i64 1>1591  ret <2 x i64> %11592}1593 1594define <2 x i64> @mul_v2i64_neg_0_1(<2 x i64> %a0) nounwind {1595; X86-SSE2-LABEL: mul_v2i64_neg_0_1:1596; X86-SSE2:       # %bb.0:1597; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [0,0,4294967295,4294967295]1598; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21599; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm21600; X86-SSE2-NEXT:    movdqa %xmm0, %xmm31601; X86-SSE2-NEXT:    psrlq $32, %xmm31602; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm31603; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,0,0,0,u,u,u,u,255,255,255,255,u,u,u,u]1604; X86-SSE2-NEXT:    paddq %xmm3, %xmm01605; X86-SSE2-NEXT:    psllq $32, %xmm01606; X86-SSE2-NEXT:    paddq %xmm2, %xmm01607; X86-SSE2-NEXT:    retl1608;1609; X86-SSE4-LABEL: mul_v2i64_neg_0_1:1610; X86-SSE4:       # %bb.0:1611; X86-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [0,18446744073709551615]1612; X86-SSE4-NEXT:    movdqa %xmm0, %xmm21613; X86-SSE4-NEXT:    pmuludq %xmm1, %xmm21614; X86-SSE4-NEXT:    movdqa %xmm0, %xmm31615; X86-SSE4-NEXT:    psrlq $32, %xmm31616; X86-SSE4-NEXT:    pmuludq %xmm1, %xmm31617; X86-SSE4-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,0,0,0,u,u,u,u,255,255,255,255,u,u,u,u]1618; X86-SSE4-NEXT:    paddq %xmm3, %xmm01619; X86-SSE4-NEXT:    psllq $32, %xmm01620; X86-SSE4-NEXT:    paddq %xmm2, %xmm01621; X86-SSE4-NEXT:    retl1622;1623; X64-SSE2-LABEL: mul_v2i64_neg_0_1:1624; X64-SSE2:       # %bb.0:1625; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [0,0,0,0,0,0,0,0,255,255,255,255,255,255,255,255]1626; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21627; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21628; X64-SSE2-NEXT:    movdqa %xmm0, %xmm31629; X64-SSE2-NEXT:    psrlq $32, %xmm31630; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm31631; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1632; X64-SSE2-NEXT:    paddq %xmm3, %xmm01633; X64-SSE2-NEXT:    psllq $32, %xmm01634; X64-SSE2-NEXT:    paddq %xmm2, %xmm01635; X64-SSE2-NEXT:    retq1636;1637; X64-SSE4-LABEL: mul_v2i64_neg_0_1:1638; X64-SSE4:       # %bb.0:1639; X64-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [0,18446744073709551615]1640; X64-SSE4-NEXT:    movdqa %xmm0, %xmm21641; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm21642; X64-SSE4-NEXT:    movdqa %xmm0, %xmm31643; X64-SSE4-NEXT:    psrlq $32, %xmm31644; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm31645; X64-SSE4-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1646; X64-SSE4-NEXT:    paddq %xmm3, %xmm01647; X64-SSE4-NEXT:    psllq $32, %xmm01648; X64-SSE4-NEXT:    paddq %xmm2, %xmm01649; X64-SSE4-NEXT:    retq1650;1651; X64-XOP-LABEL: mul_v2i64_neg_0_1:1652; X64-XOP:       # %bb.0:1653; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [0,18446744073709551615]1654; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21655; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm31656; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11657; X64-XOP-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1658; X64-XOP-NEXT:    vpaddq %xmm1, %xmm0, %xmm01659; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01660; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01661; X64-XOP-NEXT:    retq1662;1663; X64-AVX2-LABEL: mul_v2i64_neg_0_1:1664; X64-AVX2:       # %bb.0:1665; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [0,18446744073709551615]1666; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21667; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm31668; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11669; X64-AVX2-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1670; X64-AVX2-NEXT:    vpaddq %xmm1, %xmm0, %xmm01671; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm01672; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm01673; X64-AVX2-NEXT:    retq1674;1675; X64-AVX512DQ-LABEL: mul_v2i64_neg_0_1:1676; X64-AVX512DQ:       # %bb.0:1677; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,255,255,255,255]1678; X64-AVX512DQ-NEXT:    retq1679  %1 = mul <2 x i64> %a0, <i64 0, i64 -1>1680  ret <2 x i64> %11681}1682 1683define <2 x i64> @mul_v2i64_15_neg_63(<2 x i64> %a0) nounwind {1684; X86-SSE2-LABEL: mul_v2i64_15_neg_63:1685; X86-SSE2:       # %bb.0:1686; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [15,0,4294967233,4294967295]1687; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21688; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm21689; X86-SSE2-NEXT:    movdqa %xmm0, %xmm31690; X86-SSE2-NEXT:    psrlq $32, %xmm31691; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm31692; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,0,0,0,u,u,u,u,255,255,255,255,u,u,u,u]1693; X86-SSE2-NEXT:    paddq %xmm3, %xmm01694; X86-SSE2-NEXT:    psllq $32, %xmm01695; X86-SSE2-NEXT:    paddq %xmm2, %xmm01696; X86-SSE2-NEXT:    retl1697;1698; X86-SSE4-LABEL: mul_v2i64_15_neg_63:1699; X86-SSE4:       # %bb.0:1700; X86-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [15,18446744073709551553]1701; X86-SSE4-NEXT:    movdqa %xmm0, %xmm21702; X86-SSE4-NEXT:    pmuludq %xmm1, %xmm21703; X86-SSE4-NEXT:    movdqa %xmm0, %xmm31704; X86-SSE4-NEXT:    psrlq $32, %xmm31705; X86-SSE4-NEXT:    pmuludq %xmm1, %xmm31706; X86-SSE4-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,0,0,0,u,u,u,u,255,255,255,255,u,u,u,u]1707; X86-SSE4-NEXT:    paddq %xmm3, %xmm01708; X86-SSE4-NEXT:    psllq $32, %xmm01709; X86-SSE4-NEXT:    paddq %xmm2, %xmm01710; X86-SSE4-NEXT:    retl1711;1712; X64-SSE2-LABEL: mul_v2i64_15_neg_63:1713; X64-SSE2:       # %bb.0:1714; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [15,18446744073709551553]1715; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21716; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21717; X64-SSE2-NEXT:    movdqa %xmm0, %xmm31718; X64-SSE2-NEXT:    psrlq $32, %xmm31719; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm31720; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1721; X64-SSE2-NEXT:    paddq %xmm3, %xmm01722; X64-SSE2-NEXT:    psllq $32, %xmm01723; X64-SSE2-NEXT:    paddq %xmm2, %xmm01724; X64-SSE2-NEXT:    retq1725;1726; X64-SSE4-LABEL: mul_v2i64_15_neg_63:1727; X64-SSE4:       # %bb.0:1728; X64-SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [15,18446744073709551553]1729; X64-SSE4-NEXT:    movdqa %xmm0, %xmm21730; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm21731; X64-SSE4-NEXT:    movdqa %xmm0, %xmm31732; X64-SSE4-NEXT:    psrlq $32, %xmm31733; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm31734; X64-SSE4-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1735; X64-SSE4-NEXT:    paddq %xmm3, %xmm01736; X64-SSE4-NEXT:    psllq $32, %xmm01737; X64-SSE4-NEXT:    paddq %xmm2, %xmm01738; X64-SSE4-NEXT:    retq1739;1740; X64-XOP-LABEL: mul_v2i64_15_neg_63:1741; X64-XOP:       # %bb.0:1742; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [15,18446744073709551553]1743; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21744; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm31745; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11746; X64-XOP-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1747; X64-XOP-NEXT:    vpaddq %xmm1, %xmm0, %xmm01748; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01749; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01750; X64-XOP-NEXT:    retq1751;1752; X64-AVX2-LABEL: mul_v2i64_15_neg_63:1753; X64-AVX2:       # %bb.0:1754; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [15,18446744073709551553]1755; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21756; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm31757; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm3, %xmm11758; X64-AVX2-NEXT:    vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0]1759; X64-AVX2-NEXT:    vpaddq %xmm1, %xmm0, %xmm01760; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm01761; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm01762; X64-AVX2-NEXT:    retq1763;1764; X64-AVX512DQ-LABEL: mul_v2i64_15_neg_63:1765; X64-AVX512DQ:       # %bb.0:1766; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [15,18446744073709551553]1767; X64-AVX512DQ-NEXT:    retq1768  %1 = mul <2 x i64> %a0, <i64 15, i64 -63>1769  ret <2 x i64> %11770}1771 1772define <4 x i32> @mul_v4i32_0_15_31_7(<4 x i32> %a0) nounwind {1773; X86-SSE2-LABEL: mul_v4i32_0_15_31_7:1774; X86-SSE2:       # %bb.0:1775; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1776; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,15,31,7]1777; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1778; X86-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [15,u,7,u]1779; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1780; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1781; X86-SSE2-NEXT:    retl1782;1783; X86-SSE4-LABEL: mul_v4i32_0_15_31_7:1784; X86-SSE4:       # %bb.0:1785; X86-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,15,31,7]1786; X86-SSE4-NEXT:    retl1787;1788; X64-SSE2-LABEL: mul_v4i32_0_15_31_7:1789; X64-SSE2:       # %bb.0:1790; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]1791; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,15,31,7]1792; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1793; X64-SSE2-NEXT:    pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [15,u,7,u]1794; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]1795; X64-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1796; X64-SSE2-NEXT:    retq1797;1798; X64-SSE4-LABEL: mul_v4i32_0_15_31_7:1799; X64-SSE4:       # %bb.0:1800; X64-SSE4-NEXT:    pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,15,31,7]1801; X64-SSE4-NEXT:    retq1802;1803; X64-AVX-LABEL: mul_v4i32_0_15_31_7:1804; X64-AVX:       # %bb.0:1805; X64-AVX-NEXT:    vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,15,31,7]1806; X64-AVX-NEXT:    retq1807  %1 = mul <4 x i32> %a0, <i32 0, i32 15, i32 31, i32 7>1808  ret <4 x i32> %11809}1810 1811define <8 x i16> @mul_v8i16_0_1_7_15_31_63_127_255(<8 x i16> %a0) nounwind {1812; X86-SSE-LABEL: mul_v8i16_0_1_7_15_31_63_127_255:1813; X86-SSE:       # %bb.0:1814; X86-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,1,7,15,31,63,127,255]1815; X86-SSE-NEXT:    retl1816;1817; X64-SSE-LABEL: mul_v8i16_0_1_7_15_31_63_127_255:1818; X64-SSE:       # %bb.0:1819; X64-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,1,7,15,31,63,127,255]1820; X64-SSE-NEXT:    retq1821;1822; X64-AVX-LABEL: mul_v8i16_0_1_7_15_31_63_127_255:1823; X64-AVX:       # %bb.0:1824; X64-AVX-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,1,7,15,31,63,127,255]1825; X64-AVX-NEXT:    retq1826  %1 = mul <8 x i16> %a0, <i16 0, i16 1, i16 7, i16 15, i16 31, i16 63, i16 127, i16 255>1827  ret <8 x i16> %11828}1829 1830define <16 x i8> @mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127(<16 x i8> %a0) nounwind {1831; SSE2-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127:1832; SSE2:       # %bb.0:1833; SSE2-NEXT:    movdqa %xmm0, %xmm11834; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]1835; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [0,u,1,u,3,u,7,u,15,u,31,u,63,u,127,u]1836; SSE2-NEXT:    pmullw %xmm2, %xmm11837; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]1838; SSE2-NEXT:    pand %xmm3, %xmm11839; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]1840; SSE2-NEXT:    pmullw %xmm2, %xmm01841; SSE2-NEXT:    pand %xmm3, %xmm01842; SSE2-NEXT:    packuswb %xmm1, %xmm01843; SSE2-NEXT:    ret{{[l|q]}}1844;1845; X86-SSE4-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127:1846; X86-SSE4:       # %bb.0:1847; X86-SSE4-NEXT:    movdqa %xmm0, %xmm11848; X86-SSE4-NEXT:    pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [0,1,0,7,0,31,0,127,0,1,0,7,0,31,0,127]1849; X86-SSE4-NEXT:    psllw $8, %xmm11850; X86-SSE4-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [0,1,3,7,15,31,63,127,0,1,3,7,15,31,63,127]1851; X86-SSE4-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01852; X86-SSE4-NEXT:    por %xmm1, %xmm01853; X86-SSE4-NEXT:    retl1854;1855; X64-SSE4-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127:1856; X64-SSE4:       # %bb.0:1857; X64-SSE4-NEXT:    movdqa %xmm0, %xmm11858; X64-SSE4-NEXT:    pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [0,1,0,7,0,31,0,127,0,1,0,7,0,31,0,127]1859; X64-SSE4-NEXT:    psllw $8, %xmm11860; X64-SSE4-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,1,3,7,15,31,63,127,0,1,3,7,15,31,63,127]1861; X64-SSE4-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01862; X64-SSE4-NEXT:    por %xmm1, %xmm01863; X64-SSE4-NEXT:    retq1864;1865; X64-XOP-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127:1866; X64-XOP:       # %bb.0:1867; X64-XOP-NEXT:    vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [0,1,0,7,0,31,0,127,0,1,0,7,0,31,0,127]1868; X64-XOP-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,1,3,7,15,31,63,127,0,1,3,7,15,31,63,127]1869; X64-XOP-NEXT:    vpperm {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2],xmm1[2],xmm0[4],xmm1[4],xmm0[6],xmm1[6],xmm0[8],xmm1[8],xmm0[10],xmm1[10],xmm0[12],xmm1[12],xmm0[14],xmm1[14]1870; X64-XOP-NEXT:    retq1871;1872; X64-AVX2-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127:1873; X64-AVX2:       # %bb.0:1874; X64-AVX2-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1875; X64-AVX2-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [0,1,3,7,15,31,63,127,0,1,3,7,15,31,63,127]1876; X64-AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01877; X64-AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm11878; X64-AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm01879; X64-AVX2-NEXT:    vzeroupper1880; X64-AVX2-NEXT:    retq1881;1882; X64-AVX512DQ-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127:1883; X64-AVX512DQ:       # %bb.0:1884; X64-AVX512DQ-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1885; X64-AVX512DQ-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [0,1,3,7,15,31,63,127,0,1,3,7,15,31,63,127]1886; X64-AVX512DQ-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero1887; X64-AVX512DQ-NEXT:    vpmovdb %zmm0, %xmm01888; X64-AVX512DQ-NEXT:    vzeroupper1889; X64-AVX512DQ-NEXT:    retq1890  %1 = mul <16 x i8> %a0, <i8 0, i8 1, i8 3, i8 7, i8 15, i8 31, i8 63, i8 127, i8 0, i8 1, i8 3, i8 7, i8 15, i8 31, i8 63, i8 127>1891  ret <16 x i8> %11892}1893 1894define <2 x i64> @mul_v2i64_68_132(<2 x i64> %x) nounwind {1895; X86-SSE2-LABEL: mul_v2i64_68_132:1896; X86-SSE2:       # %bb.0:1897; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [68,0,132,0]1898; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21899; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm21900; X86-SSE2-NEXT:    psrlq $32, %xmm01901; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm01902; X86-SSE2-NEXT:    psllq $32, %xmm01903; X86-SSE2-NEXT:    paddq %xmm2, %xmm01904; X86-SSE2-NEXT:    retl1905;1906; SSE4-LABEL: mul_v2i64_68_132:1907; SSE4:       # %bb.0:1908; SSE4-NEXT:    pmovzxbq {{.*#+}} xmm1 = [68,132]1909; SSE4-NEXT:    movdqa %xmm0, %xmm21910; SSE4-NEXT:    pmuludq %xmm1, %xmm21911; SSE4-NEXT:    psrlq $32, %xmm01912; SSE4-NEXT:    pmuludq %xmm1, %xmm01913; SSE4-NEXT:    psllq $32, %xmm01914; SSE4-NEXT:    paddq %xmm2, %xmm01915; SSE4-NEXT:    ret{{[l|q]}}1916;1917; X64-SSE2-LABEL: mul_v2i64_68_132:1918; X64-SSE2:       # %bb.0:1919; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [68,132]1920; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21921; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21922; X64-SSE2-NEXT:    psrlq $32, %xmm01923; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm01924; X64-SSE2-NEXT:    psllq $32, %xmm01925; X64-SSE2-NEXT:    paddq %xmm2, %xmm01926; X64-SSE2-NEXT:    retq1927;1928; X64-XOP-LABEL: mul_v2i64_68_132:1929; X64-XOP:       # %bb.0:1930; X64-XOP-NEXT:    vpmovzxbq {{.*#+}} xmm1 = [68,132]1931; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21932; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm01933; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm01934; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01935; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01936; X64-XOP-NEXT:    retq1937;1938; X64-AVX2-LABEL: mul_v2i64_68_132:1939; X64-AVX2:       # %bb.0:1940; X64-AVX2-NEXT:    vpmovzxbq {{.*#+}} xmm1 = [68,132]1941; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21942; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm01943; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm01944; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm01945; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm01946; X64-AVX2-NEXT:    retq1947;1948; X64-AVX512DQ-LABEL: mul_v2i64_68_132:1949; X64-AVX512DQ:       # %bb.0:1950; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [68,132]1951; X64-AVX512DQ-NEXT:    retq1952  %mul = mul <2 x i64> %x, <i64 68, i64 132>1953  ret <2 x i64> %mul1954}1955 1956define <2 x i64> @mul_v2i64_60_120(<2 x i64> %x) nounwind {1957; X86-SSE2-LABEL: mul_v2i64_60_120:1958; X86-SSE2:       # %bb.0:1959; X86-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [60,0,124,0]1960; X86-SSE2-NEXT:    movdqa %xmm0, %xmm21961; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm21962; X86-SSE2-NEXT:    psrlq $32, %xmm01963; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm01964; X86-SSE2-NEXT:    psllq $32, %xmm01965; X86-SSE2-NEXT:    paddq %xmm2, %xmm01966; X86-SSE2-NEXT:    retl1967;1968; SSE4-LABEL: mul_v2i64_60_120:1969; SSE4:       # %bb.0:1970; SSE4-NEXT:    pmovsxbq {{.*#+}} xmm1 = [60,124]1971; SSE4-NEXT:    movdqa %xmm0, %xmm21972; SSE4-NEXT:    pmuludq %xmm1, %xmm21973; SSE4-NEXT:    psrlq $32, %xmm01974; SSE4-NEXT:    pmuludq %xmm1, %xmm01975; SSE4-NEXT:    psllq $32, %xmm01976; SSE4-NEXT:    paddq %xmm2, %xmm01977; SSE4-NEXT:    ret{{[l|q]}}1978;1979; X64-SSE2-LABEL: mul_v2i64_60_120:1980; X64-SSE2:       # %bb.0:1981; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [60,124]1982; X64-SSE2-NEXT:    movdqa %xmm0, %xmm21983; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm21984; X64-SSE2-NEXT:    psrlq $32, %xmm01985; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm01986; X64-SSE2-NEXT:    psllq $32, %xmm01987; X64-SSE2-NEXT:    paddq %xmm2, %xmm01988; X64-SSE2-NEXT:    retq1989;1990; X64-XOP-LABEL: mul_v2i64_60_120:1991; X64-XOP:       # %bb.0:1992; X64-XOP-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [60,124]1993; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm21994; X64-XOP-NEXT:    vpsrlq $32, %xmm0, %xmm01995; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm01996; X64-XOP-NEXT:    vpsllq $32, %xmm0, %xmm01997; X64-XOP-NEXT:    vpaddq %xmm0, %xmm2, %xmm01998; X64-XOP-NEXT:    retq1999;2000; X64-AVX2-LABEL: mul_v2i64_60_120:2001; X64-AVX2:       # %bb.0:2002; X64-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [60,124]2003; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm22004; X64-AVX2-NEXT:    vpsrlq $32, %xmm0, %xmm02005; X64-AVX2-NEXT:    vpmuludq %xmm1, %xmm0, %xmm02006; X64-AVX2-NEXT:    vpsllq $32, %xmm0, %xmm02007; X64-AVX2-NEXT:    vpaddq %xmm0, %xmm2, %xmm02008; X64-AVX2-NEXT:    retq2009;2010; X64-AVX512DQ-LABEL: mul_v2i64_60_120:2011; X64-AVX512DQ:       # %bb.0:2012; X64-AVX512DQ-NEXT:    vpmullq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [60,124]2013; X64-AVX512DQ-NEXT:    retq2014  %mul = mul <2 x i64> %x, <i64 60, i64 124>2015  ret <2 x i64> %mul2016}2017 2018; We unfortunately can't see the zext that lives in the other basic block so we2019; don't know that we only need one pmuludq to compute the full 64 bits. This2020; sort of issue is more likely to occur when there is a loop and one of the2021; multiply inputs is loop invariant.2022define <2 x i64> @mul_v2i64_zext_cross_bb(ptr %in, ptr %y) {2023; X86-SSE2-LABEL: mul_v2i64_zext_cross_bb:2024; X86-SSE2:       # %bb.0:2025; X86-SSE2-NEXT:    movl {{[0-9]+}}(%esp), %eax2026; X86-SSE2-NEXT:    movl {{[0-9]+}}(%esp), %ecx2027; X86-SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero2028; X86-SSE2-NEXT:    pxor %xmm1, %xmm12029; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]2030; X86-SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero2031; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0,0,1,1]2032; X86-SSE2-NEXT:    pmuludq %xmm1, %xmm02033; X86-SSE2-NEXT:    retl2034;2035; X86-SSE4-LABEL: mul_v2i64_zext_cross_bb:2036; X86-SSE4:       # %bb.0:2037; X86-SSE4-NEXT:    movl {{[0-9]+}}(%esp), %eax2038; X86-SSE4-NEXT:    movl {{[0-9]+}}(%esp), %ecx2039; X86-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero2040; X86-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2041; X86-SSE4-NEXT:    pmuludq %xmm1, %xmm02042; X86-SSE4-NEXT:    retl2043;2044; X64-SSE2-LABEL: mul_v2i64_zext_cross_bb:2045; X64-SSE2:       # %bb.0:2046; X64-SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero2047; X64-SSE2-NEXT:    pxor %xmm1, %xmm12048; X64-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]2049; X64-SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero2050; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,1,3]2051; X64-SSE2-NEXT:    pmuludq %xmm1, %xmm02052; X64-SSE2-NEXT:    retq2053;2054; X64-SSE4-LABEL: mul_v2i64_zext_cross_bb:2055; X64-SSE4:       # %bb.0:2056; X64-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero2057; X64-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2058; X64-SSE4-NEXT:    pmuludq %xmm1, %xmm02059; X64-SSE4-NEXT:    retq2060;2061; X64-AVX-LABEL: mul_v2i64_zext_cross_bb:2062; X64-AVX:       # %bb.0:2063; X64-AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero2064; X64-AVX-NEXT:    vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2065; X64-AVX-NEXT:    vpmuludq %xmm1, %xmm0, %xmm02066; X64-AVX-NEXT:    retq2067  %a = load <2 x i32>, ptr %in2068  %b = zext <2 x i32> %a to <2 x i64>2069  br label %foo2070 2071foo:2072  %c = load <2 x i32>, ptr %y2073  %d = zext <2 x i32> %c to <2 x i64>2074  %e = mul <2 x i64> %b, %d2075  ret <2 x i64> %e2076}2077 2078define <4 x i64> @mul_v4i64_zext_cross_bb(ptr %in, ptr %y) {2079; X86-SSE2-LABEL: mul_v4i64_zext_cross_bb:2080; X86-SSE2:       # %bb.0:2081; X86-SSE2-NEXT:    movl {{[0-9]+}}(%esp), %eax2082; X86-SSE2-NEXT:    movl {{[0-9]+}}(%esp), %ecx2083; X86-SSE2-NEXT:    movdqa (%ecx), %xmm02084; X86-SSE2-NEXT:    pxor %xmm2, %xmm22085; X86-SSE2-NEXT:    movdqa %xmm0, %xmm12086; X86-SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]2087; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]2088; X86-SSE2-NEXT:    movdqa (%eax), %xmm22089; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[2,1,3,3]2090; X86-SSE2-NEXT:    pmuludq %xmm3, %xmm12091; X86-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,1,1,3]2092; X86-SSE2-NEXT:    pmuludq %xmm2, %xmm02093; X86-SSE2-NEXT:    retl2094;2095; X86-SSE4-LABEL: mul_v4i64_zext_cross_bb:2096; X86-SSE4:       # %bb.0:2097; X86-SSE4-NEXT:    movl {{[0-9]+}}(%esp), %eax2098; X86-SSE4-NEXT:    movl {{[0-9]+}}(%esp), %ecx2099; X86-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2100; X86-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero2101; X86-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero2102; X86-SSE4-NEXT:    pmuludq %xmm2, %xmm12103; X86-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero2104; X86-SSE4-NEXT:    pmuludq %xmm2, %xmm02105; X86-SSE4-NEXT:    retl2106;2107; X64-SSE2-LABEL: mul_v4i64_zext_cross_bb:2108; X64-SSE2:       # %bb.0:2109; X64-SSE2-NEXT:    movdqa (%rdi), %xmm02110; X64-SSE2-NEXT:    pxor %xmm2, %xmm22111; X64-SSE2-NEXT:    movdqa %xmm0, %xmm12112; X64-SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]2113; X64-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]2114; X64-SSE2-NEXT:    movdqa (%rsi), %xmm22115; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[2,1,3,3]2116; X64-SSE2-NEXT:    pmuludq %xmm3, %xmm12117; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,1,1,3]2118; X64-SSE2-NEXT:    pmuludq %xmm2, %xmm02119; X64-SSE2-NEXT:    retq2120;2121; X64-SSE4-LABEL: mul_v4i64_zext_cross_bb:2122; X64-SSE4:       # %bb.0:2123; X64-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2124; X64-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero2125; X64-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero2126; X64-SSE4-NEXT:    pmuludq %xmm2, %xmm12127; X64-SSE4-NEXT:    pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero2128; X64-SSE4-NEXT:    pmuludq %xmm2, %xmm02129; X64-SSE4-NEXT:    retq2130;2131; X64-XOP-LABEL: mul_v4i64_zext_cross_bb:2132; X64-XOP:       # %bb.0:2133; X64-XOP-NEXT:    vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero2134; X64-XOP-NEXT:    vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2135; X64-XOP-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm02136; X64-XOP-NEXT:    vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero2137; X64-XOP-NEXT:    vpmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero2138; X64-XOP-NEXT:    vextractf128 $1, %ymm0, %xmm32139; X64-XOP-NEXT:    vpmuludq %xmm2, %xmm3, %xmm22140; X64-XOP-NEXT:    vpmuludq %xmm1, %xmm0, %xmm02141; X64-XOP-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm02142; X64-XOP-NEXT:    retq2143;2144; X64-AVX2-LABEL: mul_v4i64_zext_cross_bb:2145; X64-AVX2:       # %bb.0:2146; X64-AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero2147; X64-AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero2148; X64-AVX2-NEXT:    vpmuludq %ymm1, %ymm0, %ymm02149; X64-AVX2-NEXT:    retq2150;2151; X64-AVX512DQ-LABEL: mul_v4i64_zext_cross_bb:2152; X64-AVX512DQ:       # %bb.0:2153; X64-AVX512DQ-NEXT:    vpmovzxdq {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero2154; X64-AVX512DQ-NEXT:    vpmovzxdq {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero2155; X64-AVX512DQ-NEXT:    vpmuludq %ymm1, %ymm0, %ymm02156; X64-AVX512DQ-NEXT:    retq2157  %a = load <4 x i32>, ptr %in2158  %b = zext <4 x i32> %a to <4 x i64>2159  br label %foo2160 2161foo:2162  %c = load <4 x i32>, ptr %y2163  %d = zext <4 x i32> %c to <4 x i64>2164  %e = mul <4 x i64> %b, %d2165  ret <4 x i64> %e2166}2167;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2168; X64-SSE4-FAST: {{.*}}2169; X64-SSE4-SLOW: {{.*}}2170