147 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -O1 -mtriple=x86_64-unknown-unknown -o - | FileCheck %s3 4; We used to assert on widening the SMULFIX/UMULFIX/SMULFIXSAT node result,5; so primiary goal with the test is to see that we support legalization for6; such vectors.7 8declare <4 x i16> @llvm.smul.fix.v4i16(<4 x i16>, <4 x i16>, i32 immarg)9declare <4 x i16> @llvm.umul.fix.v4i16(<4 x i16>, <4 x i16>, i32 immarg)10declare <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16>, <4 x i16>, i32 immarg)11declare <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16>, <4 x i16>, i32 immarg)12 13define <4 x i16> @smulfix(<4 x i16> %a) {14; CHECK-LABEL: smulfix:15; CHECK: # %bb.0:16; CHECK-NEXT: movq {{.*#+}} xmm1 = [1,2,3,4,0,0,0,0]17; CHECK-NEXT: movdqa %xmm0, %xmm218; CHECK-NEXT: pmullw %xmm1, %xmm219; CHECK-NEXT: psrlw $15, %xmm220; CHECK-NEXT: pmulhw %xmm1, %xmm021; CHECK-NEXT: paddw %xmm0, %xmm022; CHECK-NEXT: por %xmm2, %xmm023; CHECK-NEXT: retq24 %t = call <4 x i16> @llvm.smul.fix.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)25 ret <4 x i16> %t26}27 28define <4 x i16> @umulfix(<4 x i16> %a) {29; CHECK-LABEL: umulfix:30; CHECK: # %bb.0:31; CHECK-NEXT: movq {{.*#+}} xmm1 = [1,2,3,4,0,0,0,0]32; CHECK-NEXT: movdqa %xmm0, %xmm233; CHECK-NEXT: pmullw %xmm1, %xmm234; CHECK-NEXT: psrlw $15, %xmm235; CHECK-NEXT: pmulhuw %xmm1, %xmm036; CHECK-NEXT: paddw %xmm0, %xmm037; CHECK-NEXT: por %xmm2, %xmm038; CHECK-NEXT: retq39 %t = call <4 x i16> @llvm.umul.fix.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)40 ret <4 x i16> %t41}42 43define <4 x i16> @smulfixsat(<4 x i16> %a) {44; CHECK-LABEL: smulfixsat:45; CHECK: # %bb.0:46; CHECK-NEXT: pextrw $2, %xmm0, %eax47; CHECK-NEXT: cwtl48; CHECK-NEXT: leal (%rax,%rax,2), %ecx49; CHECK-NEXT: movl %ecx, %edx50; CHECK-NEXT: shrl $16, %edx51; CHECK-NEXT: shldw $1, %cx, %dx52; CHECK-NEXT: sarl $16, %ecx53; CHECK-NEXT: cmpl $16384, %ecx # imm = 0x400054; CHECK-NEXT: movl $32767, %eax # imm = 0x7FFF55; CHECK-NEXT: cmovgel %eax, %edx56; CHECK-NEXT: cmpl $-16384, %ecx # imm = 0xC00057; CHECK-NEXT: movl $32768, %ecx # imm = 0x800058; CHECK-NEXT: cmovll %ecx, %edx59; CHECK-NEXT: pextrw $1, %xmm0, %esi60; CHECK-NEXT: leal (%rsi,%rsi), %edi61; CHECK-NEXT: movswl %si, %r8d62; CHECK-NEXT: movl %r8d, %esi63; CHECK-NEXT: shrl $16, %esi64; CHECK-NEXT: shldw $1, %di, %si65; CHECK-NEXT: sarl $16, %r8d66; CHECK-NEXT: cmpl $16384, %r8d # imm = 0x400067; CHECK-NEXT: cmovgel %eax, %esi68; CHECK-NEXT: cmpl $-16384, %r8d # imm = 0xC00069; CHECK-NEXT: cmovll %ecx, %esi70; CHECK-NEXT: movd %xmm0, %edi71; CHECK-NEXT: movswl %di, %edi72; CHECK-NEXT: movl %edi, %r8d73; CHECK-NEXT: shrl $16, %r8d74; CHECK-NEXT: shldw $1, %di, %r8w75; CHECK-NEXT: sarl $16, %edi76; CHECK-NEXT: cmpl $16384, %edi # imm = 0x400077; CHECK-NEXT: cmovgel %eax, %r8d78; CHECK-NEXT: cmpl $-16384, %edi # imm = 0xC00079; CHECK-NEXT: cmovll %ecx, %r8d80; CHECK-NEXT: movzwl %r8w, %edi81; CHECK-NEXT: movd %edi, %xmm182; CHECK-NEXT: pinsrw $1, %esi, %xmm183; CHECK-NEXT: pinsrw $2, %edx, %xmm184; CHECK-NEXT: pextrw $3, %xmm0, %edx85; CHECK-NEXT: movswl %dx, %edx86; CHECK-NEXT: leal (,%rdx,4), %esi87; CHECK-NEXT: movl %esi, %edi88; CHECK-NEXT: shrl $16, %esi89; CHECK-NEXT: shldw $1, %di, %si90; CHECK-NEXT: sarl $14, %edx91; CHECK-NEXT: cmpl $16384, %edx # imm = 0x400092; CHECK-NEXT: cmovgel %eax, %esi93; CHECK-NEXT: cmpl $-16384, %edx # imm = 0xC00094; CHECK-NEXT: cmovll %ecx, %esi95; CHECK-NEXT: pinsrw $3, %esi, %xmm196; CHECK-NEXT: movdqa %xmm1, %xmm097; CHECK-NEXT: retq98 %t = call <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)99 ret <4 x i16> %t100}101 102 103define <4 x i16> @umulfixsat(<4 x i16> %a) {104; CHECK-LABEL: umulfixsat:105; CHECK: # %bb.0:106; CHECK-NEXT: pextrw $2, %xmm0, %eax107; CHECK-NEXT: leal (%rax,%rax,2), %eax108; CHECK-NEXT: movl %eax, %edx109; CHECK-NEXT: shrl $16, %eax110; CHECK-NEXT: movl %eax, %ecx111; CHECK-NEXT: shldw $1, %dx, %cx112; CHECK-NEXT: cmpl $32768, %eax # imm = 0x8000113; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF114; CHECK-NEXT: cmovael %eax, %ecx115; CHECK-NEXT: pextrw $1, %xmm0, %edx116; CHECK-NEXT: addl %edx, %edx117; CHECK-NEXT: movl %edx, %esi118; CHECK-NEXT: shrl $16, %edx119; CHECK-NEXT: movl %edx, %edi120; CHECK-NEXT: shldw $1, %si, %di121; CHECK-NEXT: cmpl $32768, %edx # imm = 0x8000122; CHECK-NEXT: cmovael %eax, %edi123; CHECK-NEXT: movd %xmm0, %edx124; CHECK-NEXT: xorl %esi, %esi125; CHECK-NEXT: shldw $1, %dx, %si126; CHECK-NEXT: movl $32768, %edx # imm = 0x8000127; CHECK-NEXT: negl %edx128; CHECK-NEXT: cmovael %eax, %esi129; CHECK-NEXT: movzwl %si, %edx130; CHECK-NEXT: movd %edx, %xmm1131; CHECK-NEXT: pinsrw $1, %edi, %xmm1132; CHECK-NEXT: pinsrw $2, %ecx, %xmm1133; CHECK-NEXT: pextrw $3, %xmm0, %ecx134; CHECK-NEXT: shll $2, %ecx135; CHECK-NEXT: movl %ecx, %edx136; CHECK-NEXT: shrl $16, %ecx137; CHECK-NEXT: movl %ecx, %esi138; CHECK-NEXT: shldw $1, %dx, %si139; CHECK-NEXT: cmpl $32768, %ecx # imm = 0x8000140; CHECK-NEXT: cmovael %eax, %esi141; CHECK-NEXT: pinsrw $3, %esi, %xmm1142; CHECK-NEXT: movdqa %xmm1, %xmm0143; CHECK-NEXT: retq144 %t = call <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)145 ret <4 x i16> %t146}147