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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE424; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX26; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512F7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512DQBW8 9; Lower common integer comparisons such as 'isPositive' efficiently:10; https://llvm.org/bugs/show_bug.cgi?id=2670111 12define <16 x i8> @test_pcmpgtb(<16 x i8> %x) {13; SSE-LABEL: test_pcmpgtb:14; SSE: # %bb.0:15; SSE-NEXT: pcmpeqd %xmm1, %xmm116; SSE-NEXT: pcmpgtb %xmm1, %xmm017; SSE-NEXT: retq18;19; AVX-LABEL: test_pcmpgtb:20; AVX: # %bb.0:21; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm122; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm023; AVX-NEXT: retq24 %sign = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>25 %not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>26 ret <16 x i8> %not27}28 29define <8 x i16> @test_pcmpgtw(<8 x i16> %x) {30; SSE-LABEL: test_pcmpgtw:31; SSE: # %bb.0:32; SSE-NEXT: pcmpeqd %xmm1, %xmm133; SSE-NEXT: pcmpgtw %xmm1, %xmm034; SSE-NEXT: retq35;36; AVX-LABEL: test_pcmpgtw:37; AVX: # %bb.0:38; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm139; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm040; AVX-NEXT: retq41 %sign = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>42 %not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>43 ret <8 x i16> %not44}45 46define <4 x i32> @test_pcmpgtd(<4 x i32> %x) {47; SSE-LABEL: test_pcmpgtd:48; SSE: # %bb.0:49; SSE-NEXT: pcmpeqd %xmm1, %xmm150; SSE-NEXT: pcmpgtd %xmm1, %xmm051; SSE-NEXT: retq52;53; AVX-LABEL: test_pcmpgtd:54; AVX: # %bb.0:55; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm156; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm057; AVX-NEXT: retq58 %sign = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>59 %not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1>60 ret <4 x i32> %not61}62 63define <2 x i64> @test_pcmpgtq(<2 x i64> %x) {64; SSE2-LABEL: test_pcmpgtq:65; SSE2: # %bb.0:66; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]67; SSE2-NEXT: pcmpeqd %xmm1, %xmm168; SSE2-NEXT: pcmpgtd %xmm1, %xmm069; SSE2-NEXT: retq70;71; SSE42-LABEL: test_pcmpgtq:72; SSE42: # %bb.0:73; SSE42-NEXT: pcmpeqd %xmm1, %xmm174; SSE42-NEXT: pcmpgtq %xmm1, %xmm075; SSE42-NEXT: retq76;77; AVX-LABEL: test_pcmpgtq:78; AVX: # %bb.0:79; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm180; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm081; AVX-NEXT: retq82 %sign = ashr <2 x i64> %x, <i64 63, i64 63>83 %not = xor <2 x i64> %sign, <i64 -1, i64 -1>84 ret <2 x i64> %not85}86 87define <1 x i128> @test_strange_type(<1 x i128> %x) {88; CHECK-LABEL: test_strange_type:89; CHECK: # %bb.0:90; CHECK-NEXT: movq %rsi, %rax91; CHECK-NEXT: sarq $63, %rax92; CHECK-NEXT: notq %rax93; CHECK-NEXT: movq %rax, %rdx94; CHECK-NEXT: retq95 %sign = ashr <1 x i128> %x, <i128 127>96 %not = xor <1 x i128> %sign, <i128 -1>97 ret <1 x i128> %not98}99 100define <32 x i8> @test_pcmpgtb_256(<32 x i8> %x) {101; SSE-LABEL: test_pcmpgtb_256:102; SSE: # %bb.0:103; SSE-NEXT: pcmpeqd %xmm2, %xmm2104; SSE-NEXT: pcmpgtb %xmm2, %xmm0105; SSE-NEXT: pcmpgtb %xmm2, %xmm1106; SSE-NEXT: retq107;108; AVX1-LABEL: test_pcmpgtb_256:109; AVX1: # %bb.0:110; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1111; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2112; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm1113; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0114; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0115; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1116; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1117; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0118; AVX1-NEXT: retq119;120; AVX2-LABEL: test_pcmpgtb_256:121; AVX2: # %bb.0:122; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1123; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0124; AVX2-NEXT: retq125;126; AVX512-LABEL: test_pcmpgtb_256:127; AVX512: # %bb.0:128; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1129; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0130; AVX512-NEXT: retq131 %sign = ashr <32 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>132 %not = xor <32 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>133 ret <32 x i8> %not134}135 136define <16 x i16> @test_pcmpgtw_256(<16 x i16> %x) {137; SSE-LABEL: test_pcmpgtw_256:138; SSE: # %bb.0:139; SSE-NEXT: pcmpeqd %xmm2, %xmm2140; SSE-NEXT: pcmpgtw %xmm2, %xmm0141; SSE-NEXT: pcmpgtw %xmm2, %xmm1142; SSE-NEXT: retq143;144; AVX1-LABEL: test_pcmpgtw_256:145; AVX1: # %bb.0:146; AVX1-NEXT: vpsraw $15, %xmm0, %xmm1147; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0148; AVX1-NEXT: vpsraw $15, %xmm0, %xmm0149; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0150; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1151; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1152; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0153; AVX1-NEXT: retq154;155; AVX2-LABEL: test_pcmpgtw_256:156; AVX2: # %bb.0:157; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1158; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0159; AVX2-NEXT: retq160;161; AVX512-LABEL: test_pcmpgtw_256:162; AVX512: # %bb.0:163; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1164; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0165; AVX512-NEXT: retq166 %sign = ashr <16 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>167 %not = xor <16 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>168 ret <16 x i16> %not169}170 171define <8 x i32> @test_pcmpgtd_256(<8 x i32> %x) {172; SSE-LABEL: test_pcmpgtd_256:173; SSE: # %bb.0:174; SSE-NEXT: pcmpeqd %xmm2, %xmm2175; SSE-NEXT: pcmpgtd %xmm2, %xmm0176; SSE-NEXT: pcmpgtd %xmm2, %xmm1177; SSE-NEXT: retq178;179; AVX1-LABEL: test_pcmpgtd_256:180; AVX1: # %bb.0:181; AVX1-NEXT: vpsrad $31, %xmm0, %xmm1182; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0183; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0184; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0185; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1186; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1187; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0188; AVX1-NEXT: retq189;190; AVX2-LABEL: test_pcmpgtd_256:191; AVX2: # %bb.0:192; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1193; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0194; AVX2-NEXT: retq195;196; AVX512-LABEL: test_pcmpgtd_256:197; AVX512: # %bb.0:198; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1199; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0200; AVX512-NEXT: retq201 %sign = ashr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>202 %not = xor <8 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>203 ret <8 x i32> %not204}205 206define <4 x i64> @test_pcmpgtq_256(<4 x i64> %x) {207; SSE2-LABEL: test_pcmpgtq_256:208; SSE2: # %bb.0:209; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]210; SSE2-NEXT: pcmpeqd %xmm2, %xmm2211; SSE2-NEXT: pcmpgtd %xmm2, %xmm0212; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]213; SSE2-NEXT: pcmpgtd %xmm2, %xmm1214; SSE2-NEXT: retq215;216; SSE42-LABEL: test_pcmpgtq_256:217; SSE42: # %bb.0:218; SSE42-NEXT: pcmpeqd %xmm2, %xmm2219; SSE42-NEXT: pcmpgtq %xmm2, %xmm0220; SSE42-NEXT: pcmpgtq %xmm2, %xmm1221; SSE42-NEXT: retq222;223; AVX1-LABEL: test_pcmpgtq_256:224; AVX1: # %bb.0:225; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1226; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2227; AVX1-NEXT: vpcmpgtq %xmm1, %xmm2, %xmm1228; AVX1-NEXT: vpcmpgtq %xmm0, %xmm2, %xmm0229; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0230; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1231; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1232; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0233; AVX1-NEXT: retq234;235; AVX2-LABEL: test_pcmpgtq_256:236; AVX2: # %bb.0:237; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1238; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0239; AVX2-NEXT: retq240;241; AVX512-LABEL: test_pcmpgtq_256:242; AVX512: # %bb.0:243; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1244; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0245; AVX512-NEXT: retq246 %sign = ashr <4 x i64> %x, <i64 63, i64 63, i64 63, i64 63>247 %not = xor <4 x i64> %sign, <i64 -1, i64 -1, i64 -1, i64 -1>248 ret <4 x i64> %not249}250 251define <16 x i8> @cmpeq_zext_v16i8(<16 x i8> %a, <16 x i8> %b) {252; SSE-LABEL: cmpeq_zext_v16i8:253; SSE: # %bb.0:254; SSE-NEXT: pcmpeqb %xmm1, %xmm0255; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0256; SSE-NEXT: retq257;258; AVX1-LABEL: cmpeq_zext_v16i8:259; AVX1: # %bb.0:260; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0261; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0262; AVX1-NEXT: retq263;264; AVX2-LABEL: cmpeq_zext_v16i8:265; AVX2: # %bb.0:266; AVX2-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0267; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0268; AVX2-NEXT: retq269;270; AVX512-LABEL: cmpeq_zext_v16i8:271; AVX512: # %bb.0:272; AVX512-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0273; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0274; AVX512-NEXT: retq275 %cmp = icmp eq <16 x i8> %a, %b276 %zext = zext <16 x i1> %cmp to <16 x i8>277 ret <16 x i8> %zext278}279 280define <16 x i16> @cmpeq_zext_v16i16(<16 x i16> %a, <16 x i16> %b) {281; SSE-LABEL: cmpeq_zext_v16i16:282; SSE: # %bb.0:283; SSE-NEXT: pcmpeqw %xmm2, %xmm0284; SSE-NEXT: psrlw $15, %xmm0285; SSE-NEXT: pcmpeqw %xmm3, %xmm1286; SSE-NEXT: psrlw $15, %xmm1287; SSE-NEXT: retq288;289; AVX1-LABEL: cmpeq_zext_v16i16:290; AVX1: # %bb.0:291; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2292; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3293; AVX1-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2294; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0295; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0296; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0297; AVX1-NEXT: retq298;299; AVX2-LABEL: cmpeq_zext_v16i16:300; AVX2: # %bb.0:301; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0302; AVX2-NEXT: vpsrlw $15, %ymm0, %ymm0303; AVX2-NEXT: retq304;305; AVX512-LABEL: cmpeq_zext_v16i16:306; AVX512: # %bb.0:307; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0308; AVX512-NEXT: vpsrlw $15, %ymm0, %ymm0309; AVX512-NEXT: retq310 %cmp = icmp eq <16 x i16> %a, %b311 %zext = zext <16 x i1> %cmp to <16 x i16>312 ret <16 x i16> %zext313}314 315define <4 x i32> @cmpeq_zext_v4i32(<4 x i32> %a, <4 x i32> %b) {316; SSE-LABEL: cmpeq_zext_v4i32:317; SSE: # %bb.0:318; SSE-NEXT: pcmpeqd %xmm1, %xmm0319; SSE-NEXT: psrld $31, %xmm0320; SSE-NEXT: retq321;322; AVX-LABEL: cmpeq_zext_v4i32:323; AVX: # %bb.0:324; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0325; AVX-NEXT: vpsrld $31, %xmm0, %xmm0326; AVX-NEXT: retq327 %cmp = icmp eq <4 x i32> %a, %b328 %zext = zext <4 x i1> %cmp to <4 x i32>329 ret <4 x i32> %zext330}331 332define <4 x i64> @cmpeq_zext_v4i64(<4 x i64> %a, <4 x i64> %b) {333; SSE2-LABEL: cmpeq_zext_v4i64:334; SSE2: # %bb.0:335; SSE2-NEXT: pcmpeqd %xmm2, %xmm0336; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,0,3,2]337; SSE2-NEXT: pand %xmm2, %xmm0338; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1]339; SSE2-NEXT: pand %xmm2, %xmm0340; SSE2-NEXT: pcmpeqd %xmm3, %xmm1341; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]342; SSE2-NEXT: pand %xmm3, %xmm1343; SSE2-NEXT: pand %xmm2, %xmm1344; SSE2-NEXT: retq345;346; SSE42-LABEL: cmpeq_zext_v4i64:347; SSE42: # %bb.0:348; SSE42-NEXT: pcmpeqq %xmm2, %xmm0349; SSE42-NEXT: psrlq $63, %xmm0350; SSE42-NEXT: pcmpeqq %xmm3, %xmm1351; SSE42-NEXT: psrlq $63, %xmm1352; SSE42-NEXT: retq353;354; AVX1-LABEL: cmpeq_zext_v4i64:355; AVX1: # %bb.0:356; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2357; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3358; AVX1-NEXT: vpcmpeqq %xmm2, %xmm3, %xmm2359; AVX1-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0360; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0361; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0362; AVX1-NEXT: retq363;364; AVX2-LABEL: cmpeq_zext_v4i64:365; AVX2: # %bb.0:366; AVX2-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0367; AVX2-NEXT: vpsrlq $63, %ymm0, %ymm0368; AVX2-NEXT: retq369;370; AVX512-LABEL: cmpeq_zext_v4i64:371; AVX512: # %bb.0:372; AVX512-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0373; AVX512-NEXT: vpsrlq $63, %ymm0, %ymm0374; AVX512-NEXT: retq375 %cmp = icmp eq <4 x i64> %a, %b376 %zext = zext <4 x i1> %cmp to <4 x i64>377 ret <4 x i64> %zext378}379 380define <32 x i8> @cmpgt_zext_v32i8(<32 x i8> %a, <32 x i8> %b) {381; SSE-LABEL: cmpgt_zext_v32i8:382; SSE: # %bb.0:383; SSE-NEXT: pcmpgtb %xmm2, %xmm0384; SSE-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]385; SSE-NEXT: pand %xmm2, %xmm0386; SSE-NEXT: pcmpgtb %xmm3, %xmm1387; SSE-NEXT: pand %xmm2, %xmm1388; SSE-NEXT: retq389;390; AVX1-LABEL: cmpgt_zext_v32i8:391; AVX1: # %bb.0:392; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2393; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3394; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2395; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0396; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0397; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0398; AVX1-NEXT: retq399;400; AVX2-LABEL: cmpgt_zext_v32i8:401; AVX2: # %bb.0:402; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0403; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0404; AVX2-NEXT: retq405;406; AVX512-LABEL: cmpgt_zext_v32i8:407; AVX512: # %bb.0:408; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0409; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0410; AVX512-NEXT: retq411 %cmp = icmp sgt <32 x i8> %a, %b412 %zext = zext <32 x i1> %cmp to <32 x i8>413 ret <32 x i8> %zext414}415 416define <8 x i16> @cmpgt_zext_v8i16(<8 x i16> %a, <8 x i16> %b) {417; SSE-LABEL: cmpgt_zext_v8i16:418; SSE: # %bb.0:419; SSE-NEXT: pcmpgtw %xmm1, %xmm0420; SSE-NEXT: psrlw $15, %xmm0421; SSE-NEXT: retq422;423; AVX-LABEL: cmpgt_zext_v8i16:424; AVX: # %bb.0:425; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0426; AVX-NEXT: vpsrlw $15, %xmm0, %xmm0427; AVX-NEXT: retq428 %cmp = icmp sgt <8 x i16> %a, %b429 %zext = zext <8 x i1> %cmp to <8 x i16>430 ret <8 x i16> %zext431}432 433define <8 x i32> @cmpgt_zext_v8i32(<8 x i32> %a, <8 x i32> %b) {434; SSE-LABEL: cmpgt_zext_v8i32:435; SSE: # %bb.0:436; SSE-NEXT: pcmpgtd %xmm2, %xmm0437; SSE-NEXT: psrld $31, %xmm0438; SSE-NEXT: pcmpgtd %xmm3, %xmm1439; SSE-NEXT: psrld $31, %xmm1440; SSE-NEXT: retq441;442; AVX1-LABEL: cmpgt_zext_v8i32:443; AVX1: # %bb.0:444; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2445; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3446; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2447; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0448; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0449; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0450; AVX1-NEXT: retq451;452; AVX2-LABEL: cmpgt_zext_v8i32:453; AVX2: # %bb.0:454; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0455; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0456; AVX2-NEXT: retq457;458; AVX512-LABEL: cmpgt_zext_v8i32:459; AVX512: # %bb.0:460; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0461; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0462; AVX512-NEXT: retq463 %cmp = icmp sgt <8 x i32> %a, %b464 %zext = zext <8 x i1> %cmp to <8 x i32>465 ret <8 x i32> %zext466}467 468define <2 x i64> @cmpgt_zext_v2i64(<2 x i64> %a, <2 x i64> %b) {469; SSE2-LABEL: cmpgt_zext_v2i64:470; SSE2: # %bb.0:471; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]472; SSE2-NEXT: pxor %xmm2, %xmm1473; SSE2-NEXT: pxor %xmm2, %xmm0474; SSE2-NEXT: movdqa %xmm0, %xmm2475; SSE2-NEXT: pcmpgtd %xmm1, %xmm2476; SSE2-NEXT: pcmpeqd %xmm1, %xmm0477; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]478; SSE2-NEXT: pand %xmm2, %xmm1479; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]480; SSE2-NEXT: por %xmm1, %xmm0481; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0482; SSE2-NEXT: retq483;484; SSE42-LABEL: cmpgt_zext_v2i64:485; SSE42: # %bb.0:486; SSE42-NEXT: pcmpgtq %xmm1, %xmm0487; SSE42-NEXT: psrlq $63, %xmm0488; SSE42-NEXT: retq489;490; AVX-LABEL: cmpgt_zext_v2i64:491; AVX: # %bb.0:492; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0493; AVX-NEXT: vpsrlq $63, %xmm0, %xmm0494; AVX-NEXT: retq495 %cmp = icmp sgt <2 x i64> %a, %b496 %zext = zext <2 x i1> %cmp to <2 x i64>497 ret <2 x i64> %zext498}499 500; Test that we optimize a zext of a vector setcc ne zero where all bits but the501; lsb are known to be zero.502define <8 x i32> @cmpne_knownzeros_zext_v8i16_v8i32(<8 x i16> %x) {503; SSE2-LABEL: cmpne_knownzeros_zext_v8i16_v8i32:504; SSE2: # %bb.0:505; SSE2-NEXT: movdqa %xmm0, %xmm1506; SSE2-NEXT: psrlw $15, %xmm1507; SSE2-NEXT: pxor %xmm2, %xmm2508; SSE2-NEXT: movdqa %xmm1, %xmm0509; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]510; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]511; SSE2-NEXT: retq512;513; SSE42-LABEL: cmpne_knownzeros_zext_v8i16_v8i32:514; SSE42: # %bb.0:515; SSE42-NEXT: movdqa %xmm0, %xmm1516; SSE42-NEXT: psrlw $15, %xmm1517; SSE42-NEXT: pxor %xmm2, %xmm2518; SSE42-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero519; SSE42-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]520; SSE42-NEXT: retq521;522; AVX1-LABEL: cmpne_knownzeros_zext_v8i16_v8i32:523; AVX1: # %bb.0:524; AVX1-NEXT: vpsrlw $15, %xmm0, %xmm0525; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1526; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]527; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero528; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0529; AVX1-NEXT: retq530;531; AVX2-LABEL: cmpne_knownzeros_zext_v8i16_v8i32:532; AVX2: # %bb.0:533; AVX2-NEXT: vpsrlw $15, %xmm0, %xmm0534; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero535; AVX2-NEXT: retq536;537; AVX512-LABEL: cmpne_knownzeros_zext_v8i16_v8i32:538; AVX512: # %bb.0:539; AVX512-NEXT: vpsrlw $15, %xmm0, %xmm0540; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero541; AVX512-NEXT: retq542 %a = lshr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>543 %b = icmp ne <8 x i16> %a, zeroinitializer544 %c = zext <8 x i1> %b to <8 x i32>545 ret <8 x i32> %c546}547 548define <8 x i32> @cmpne_knownzeros_zext_v8i32_v8i32(<8 x i32> %x) {549; SSE-LABEL: cmpne_knownzeros_zext_v8i32_v8i32:550; SSE: # %bb.0:551; SSE-NEXT: psrld $31, %xmm0552; SSE-NEXT: psrld $31, %xmm1553; SSE-NEXT: retq554;555; AVX1-LABEL: cmpne_knownzeros_zext_v8i32_v8i32:556; AVX1: # %bb.0:557; AVX1-NEXT: vpsrld $31, %xmm0, %xmm1558; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0559; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0560; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0561; AVX1-NEXT: retq562;563; AVX2-LABEL: cmpne_knownzeros_zext_v8i32_v8i32:564; AVX2: # %bb.0:565; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0566; AVX2-NEXT: retq567;568; AVX512-LABEL: cmpne_knownzeros_zext_v8i32_v8i32:569; AVX512: # %bb.0:570; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0571; AVX512-NEXT: retq572 %a = lshr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>573 %b = icmp ne <8 x i32> %a, zeroinitializer574 %c = zext <8 x i1> %b to <8 x i32>575 ret <8 x i32> %c576}577 578define <8 x i16> @cmpne_knownzeros_zext_v8i32_v8i16(<8 x i32> %x) {579; SSE2-LABEL: cmpne_knownzeros_zext_v8i32_v8i16:580; SSE2: # %bb.0:581; SSE2-NEXT: psrld $31, %xmm1582; SSE2-NEXT: psrld $31, %xmm0583; SSE2-NEXT: packuswb %xmm1, %xmm0584; SSE2-NEXT: retq585;586; SSE42-LABEL: cmpne_knownzeros_zext_v8i32_v8i16:587; SSE42: # %bb.0:588; SSE42-NEXT: psrld $31, %xmm1589; SSE42-NEXT: psrld $31, %xmm0590; SSE42-NEXT: packusdw %xmm1, %xmm0591; SSE42-NEXT: retq592;593; AVX1-LABEL: cmpne_knownzeros_zext_v8i32_v8i16:594; AVX1: # %bb.0:595; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1596; AVX1-NEXT: vpsrld $31, %xmm1, %xmm1597; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0598; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0599; AVX1-NEXT: vzeroupper600; AVX1-NEXT: retq601;602; AVX2-LABEL: cmpne_knownzeros_zext_v8i32_v8i16:603; AVX2: # %bb.0:604; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0605; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1606; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0607; AVX2-NEXT: vzeroupper608; AVX2-NEXT: retq609;610; AVX512-LABEL: cmpne_knownzeros_zext_v8i32_v8i16:611; AVX512: # %bb.0:612; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0613; AVX512-NEXT: vpmovdw %ymm0, %xmm0614; AVX512-NEXT: vzeroupper615; AVX512-NEXT: retq616 %a = lshr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>617 %b = icmp ne <8 x i32> %a, zeroinitializer618 %c = zext <8 x i1> %b to <8 x i16>619 ret <8 x i16> %c620}621 622; PR26697623define <4 x i32> @cmpeq_one_mask_bit(<4 x i32> %mask) {624; SSE-LABEL: cmpeq_one_mask_bit:625; SSE: # %bb.0:626; SSE-NEXT: psrad $31, %xmm0627; SSE-NEXT: retq628;629; AVX-LABEL: cmpeq_one_mask_bit:630; AVX: # %bb.0:631; AVX-NEXT: vpsrad $31, %xmm0, %xmm0632; AVX-NEXT: retq633 %mask_signbit = and <4 x i32> %mask, <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>634 %mask_bool = icmp ne <4 x i32> %mask_signbit, zeroinitializer635 %mask_bool_ext = sext <4 x i1> %mask_bool to <4 x i32>636 ret <4 x i32> %mask_bool_ext637}638 639define <2 x i64> @not_signbit_mask_v2i64(<2 x i64> %x, <2 x i64> %y) {640; SSE2-LABEL: not_signbit_mask_v2i64:641; SSE2: # %bb.0:642; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]643; SSE2-NEXT: pcmpeqd %xmm2, %xmm2644; SSE2-NEXT: pcmpgtd %xmm2, %xmm0645; SSE2-NEXT: pand %xmm1, %xmm0646; SSE2-NEXT: retq647;648; SSE42-LABEL: not_signbit_mask_v2i64:649; SSE42: # %bb.0:650; SSE42-NEXT: pcmpeqd %xmm2, %xmm2651; SSE42-NEXT: pcmpgtq %xmm2, %xmm0652; SSE42-NEXT: pand %xmm1, %xmm0653; SSE42-NEXT: retq654;655; AVX1-LABEL: not_signbit_mask_v2i64:656; AVX1: # %bb.0:657; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2658; AVX1-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0659; AVX1-NEXT: vpand %xmm0, %xmm1, %xmm0660; AVX1-NEXT: retq661;662; AVX2-LABEL: not_signbit_mask_v2i64:663; AVX2: # %bb.0:664; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2665; AVX2-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0666; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0667; AVX2-NEXT: retq668;669; AVX512-LABEL: not_signbit_mask_v2i64:670; AVX512: # %bb.0:671; AVX512-NEXT: vpsraq $63, %xmm0, %xmm0672; AVX512-NEXT: vpandn %xmm1, %xmm0, %xmm0673; AVX512-NEXT: retq674 %sh = ashr <2 x i64> %x, <i64 63, i64 63>675 %not = xor <2 x i64> %sh, <i64 -1, i64 -1>676 %and = and <2 x i64> %y, %not677 ret <2 x i64> %and678}679 680define <4 x i32> @not_signbit_mask_v4i32(<4 x i32> %x, <4 x i32> %y) {681; SSE-LABEL: not_signbit_mask_v4i32:682; SSE: # %bb.0:683; SSE-NEXT: psrad $31, %xmm0684; SSE-NEXT: pandn %xmm1, %xmm0685; SSE-NEXT: retq686;687; AVX-LABEL: not_signbit_mask_v4i32:688; AVX: # %bb.0:689; AVX-NEXT: vpsrad $31, %xmm0, %xmm0690; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0691; AVX-NEXT: retq692 %sh = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>693 %not = xor <4 x i32> %sh, <i32 -1, i32 -1, i32 -1, i32 -1>694 %and = and <4 x i32> %not, %y695 ret <4 x i32> %and696}697 698define <8 x i16> @not_signbit_mask_v8i16(<8 x i16> %x, <8 x i16> %y) {699; SSE-LABEL: not_signbit_mask_v8i16:700; SSE: # %bb.0:701; SSE-NEXT: psraw $15, %xmm0702; SSE-NEXT: pandn %xmm1, %xmm0703; SSE-NEXT: retq704;705; AVX-LABEL: not_signbit_mask_v8i16:706; AVX: # %bb.0:707; AVX-NEXT: vpsraw $15, %xmm0, %xmm0708; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0709; AVX-NEXT: retq710 %sh = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>711 %not = xor <8 x i16> %sh, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>712 %and = and <8 x i16> %y, %not713 ret <8 x i16> %and714}715 716define <16 x i8> @not_signbit_mask_v16i8(<16 x i8> %x, <16 x i8> %y) {717; SSE-LABEL: not_signbit_mask_v16i8:718; SSE: # %bb.0:719; SSE-NEXT: pcmpeqd %xmm2, %xmm2720; SSE-NEXT: pcmpgtb %xmm2, %xmm0721; SSE-NEXT: pand %xmm1, %xmm0722; SSE-NEXT: retq723;724; AVX-LABEL: not_signbit_mask_v16i8:725; AVX: # %bb.0:726; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2727; AVX-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0728; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0729; AVX-NEXT: retq730 %sh = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>731 %not = xor <16 x i8> %sh, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>732 %and = and <16 x i8> %not, %y733 ret <16 x i8> %and734}735 736define <4 x i64> @not_signbit_mask_v4i64(<4 x i64> %x, <4 x i64> %y) {737; SSE2-LABEL: not_signbit_mask_v4i64:738; SSE2: # %bb.0:739; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]740; SSE2-NEXT: pcmpeqd %xmm4, %xmm4741; SSE2-NEXT: pcmpgtd %xmm4, %xmm1742; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]743; SSE2-NEXT: pcmpgtd %xmm4, %xmm0744; SSE2-NEXT: pand %xmm2, %xmm0745; SSE2-NEXT: pand %xmm3, %xmm1746; SSE2-NEXT: retq747;748; SSE42-LABEL: not_signbit_mask_v4i64:749; SSE42: # %bb.0:750; SSE42-NEXT: pcmpeqd %xmm4, %xmm4751; SSE42-NEXT: pcmpgtq %xmm4, %xmm1752; SSE42-NEXT: pcmpgtq %xmm4, %xmm0753; SSE42-NEXT: pand %xmm2, %xmm0754; SSE42-NEXT: pand %xmm3, %xmm1755; SSE42-NEXT: retq756;757; AVX1-LABEL: not_signbit_mask_v4i64:758; AVX1: # %bb.0:759; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2760; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3761; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2762; AVX1-NEXT: vpcmpgtq %xmm0, %xmm3, %xmm0763; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0764; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0765; AVX1-NEXT: retq766;767; AVX2-LABEL: not_signbit_mask_v4i64:768; AVX2: # %bb.0:769; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2770; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0771; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0772; AVX2-NEXT: retq773;774; AVX512-LABEL: not_signbit_mask_v4i64:775; AVX512: # %bb.0:776; AVX512-NEXT: vpsraq $63, %ymm0, %ymm0777; AVX512-NEXT: vpandn %ymm1, %ymm0, %ymm0778; AVX512-NEXT: retq779 %sh = ashr <4 x i64> %x, <i64 63, i64 63, i64 63, i64 63>780 %not = xor <4 x i64> %sh, <i64 -1, i64 -1, i64 -1, i64 -1>781 %and = and <4 x i64> %y, %not782 ret <4 x i64> %and783}784 785define <8 x i32> @not_signbit_mask_v8i32(<8 x i32> %x, <8 x i32> %y) {786; SSE-LABEL: not_signbit_mask_v8i32:787; SSE: # %bb.0:788; SSE-NEXT: psrad $31, %xmm0789; SSE-NEXT: pandn %xmm2, %xmm0790; SSE-NEXT: psrad $31, %xmm1791; SSE-NEXT: pandn %xmm3, %xmm1792; SSE-NEXT: retq793;794; AVX1-LABEL: not_signbit_mask_v8i32:795; AVX1: # %bb.0:796; AVX1-NEXT: vpsrad $31, %xmm0, %xmm2797; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0798; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0799; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0800; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0801; AVX1-NEXT: retq802;803; AVX2-LABEL: not_signbit_mask_v8i32:804; AVX2: # %bb.0:805; AVX2-NEXT: vpsrad $31, %ymm0, %ymm0806; AVX2-NEXT: vpandn %ymm1, %ymm0, %ymm0807; AVX2-NEXT: retq808;809; AVX512-LABEL: not_signbit_mask_v8i32:810; AVX512: # %bb.0:811; AVX512-NEXT: vpsrad $31, %ymm0, %ymm0812; AVX512-NEXT: vpandn %ymm1, %ymm0, %ymm0813; AVX512-NEXT: retq814 %sh = ashr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>815 %not = xor <8 x i32> %sh, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>816 %and = and <8 x i32> %not, %y817 ret <8 x i32> %and818}819 820define <16 x i16> @not_signbit_mask_v16i16(<16 x i16> %x, <16 x i16> %y) {821; SSE-LABEL: not_signbit_mask_v16i16:822; SSE: # %bb.0:823; SSE-NEXT: psraw $15, %xmm0824; SSE-NEXT: pandn %xmm2, %xmm0825; SSE-NEXT: psraw $15, %xmm1826; SSE-NEXT: pandn %xmm3, %xmm1827; SSE-NEXT: retq828;829; AVX1-LABEL: not_signbit_mask_v16i16:830; AVX1: # %bb.0:831; AVX1-NEXT: vpsraw $15, %xmm0, %xmm2832; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0833; AVX1-NEXT: vpsraw $15, %xmm0, %xmm0834; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0835; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0836; AVX1-NEXT: retq837;838; AVX2-LABEL: not_signbit_mask_v16i16:839; AVX2: # %bb.0:840; AVX2-NEXT: vpsraw $15, %ymm0, %ymm0841; AVX2-NEXT: vpandn %ymm1, %ymm0, %ymm0842; AVX2-NEXT: retq843;844; AVX512-LABEL: not_signbit_mask_v16i16:845; AVX512: # %bb.0:846; AVX512-NEXT: vpsraw $15, %ymm0, %ymm0847; AVX512-NEXT: vpandn %ymm1, %ymm0, %ymm0848; AVX512-NEXT: retq849 %sh = ashr <16 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>850 %not = xor <16 x i16> %sh, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>851 %and = and <16 x i16> %y, %not852 ret <16 x i16> %and853}854 855define <32 x i8> @not_signbit_mask_v32i8(<32 x i8> %x, <32 x i8> %y) {856; SSE-LABEL: not_signbit_mask_v32i8:857; SSE: # %bb.0:858; SSE-NEXT: pcmpeqd %xmm4, %xmm4859; SSE-NEXT: pcmpgtb %xmm4, %xmm1860; SSE-NEXT: pcmpgtb %xmm4, %xmm0861; SSE-NEXT: pand %xmm2, %xmm0862; SSE-NEXT: pand %xmm3, %xmm1863; SSE-NEXT: retq864;865; AVX1-LABEL: not_signbit_mask_v32i8:866; AVX1: # %bb.0:867; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2868; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3869; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2870; AVX1-NEXT: vpcmpgtb %xmm0, %xmm3, %xmm0871; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0872; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0873; AVX1-NEXT: retq874;875; AVX2-LABEL: not_signbit_mask_v32i8:876; AVX2: # %bb.0:877; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2878; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0879; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0880; AVX2-NEXT: retq881;882; AVX512-LABEL: not_signbit_mask_v32i8:883; AVX512: # %bb.0:884; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2885; AVX512-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0886; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0887; AVX512-NEXT: retq888 %sh = ashr <32 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>889 %not = xor <32 x i8> %sh, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>890 %and = and <32 x i8> %not, %y891 ret <32 x i8> %and892}893 894define <2 x i64> @ispositive_mask_v2i64(<2 x i64> %x, <2 x i64> %y) {895; SSE2-LABEL: ispositive_mask_v2i64:896; SSE2: # %bb.0:897; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]898; SSE2-NEXT: pcmpeqd %xmm2, %xmm2899; SSE2-NEXT: pcmpgtd %xmm2, %xmm0900; SSE2-NEXT: pand %xmm1, %xmm0901; SSE2-NEXT: retq902;903; SSE42-LABEL: ispositive_mask_v2i64:904; SSE42: # %bb.0:905; SSE42-NEXT: pcmpeqd %xmm2, %xmm2906; SSE42-NEXT: pcmpgtq %xmm2, %xmm0907; SSE42-NEXT: pand %xmm1, %xmm0908; SSE42-NEXT: retq909;910; AVX1-LABEL: ispositive_mask_v2i64:911; AVX1: # %bb.0:912; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2913; AVX1-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0914; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0915; AVX1-NEXT: retq916;917; AVX2-LABEL: ispositive_mask_v2i64:918; AVX2: # %bb.0:919; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2920; AVX2-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0921; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0922; AVX2-NEXT: retq923;924; AVX512-LABEL: ispositive_mask_v2i64:925; AVX512: # %bb.0:926; AVX512-NEXT: vpsraq $63, %xmm0, %xmm0927; AVX512-NEXT: vpandn %xmm1, %xmm0, %xmm0928; AVX512-NEXT: retq929 %cmp = icmp sgt <2 x i64> %x, <i64 -1, i64 -1>930 %mask = sext <2 x i1> %cmp to <2 x i64>931 %and = and <2 x i64> %mask, %y932 ret <2 x i64> %and933}934 935define <4 x i32> @is_positive_mask_v4i32(<4 x i32> %x, <4 x i32> %y) {936; SSE-LABEL: is_positive_mask_v4i32:937; SSE: # %bb.0:938; SSE-NEXT: psrad $31, %xmm0939; SSE-NEXT: pandn %xmm1, %xmm0940; SSE-NEXT: retq941;942; AVX-LABEL: is_positive_mask_v4i32:943; AVX: # %bb.0:944; AVX-NEXT: vpsrad $31, %xmm0, %xmm0945; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0946; AVX-NEXT: retq947 %cmp = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>948 %mask = sext <4 x i1> %cmp to <4 x i32>949 %and = and <4 x i32> %y, %mask950 ret <4 x i32> %and951}952 953define <8 x i16> @is_positive_mask_v8i16(<8 x i16> %x, <8 x i16> %y) {954; SSE-LABEL: is_positive_mask_v8i16:955; SSE: # %bb.0:956; SSE-NEXT: psraw $15, %xmm0957; SSE-NEXT: pandn %xmm1, %xmm0958; SSE-NEXT: retq959;960; AVX-LABEL: is_positive_mask_v8i16:961; AVX: # %bb.0:962; AVX-NEXT: vpsraw $15, %xmm0, %xmm0963; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0964; AVX-NEXT: retq965 %cmp = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>966 %mask = sext <8 x i1> %cmp to <8 x i16>967 %and = and <8 x i16> %mask, %y968 ret <8 x i16> %and969}970 971define <16 x i8> @is_positive_mask_v16i8(<16 x i8> %x, <16 x i8> %y) {972; SSE-LABEL: is_positive_mask_v16i8:973; SSE: # %bb.0:974; SSE-NEXT: pcmpeqd %xmm2, %xmm2975; SSE-NEXT: pcmpgtb %xmm2, %xmm0976; SSE-NEXT: pand %xmm1, %xmm0977; SSE-NEXT: retq978;979; AVX-LABEL: is_positive_mask_v16i8:980; AVX: # %bb.0:981; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2982; AVX-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0983; AVX-NEXT: vpand %xmm0, %xmm1, %xmm0984; AVX-NEXT: retq985 %cmp = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>986 %mask = sext <16 x i1> %cmp to <16 x i8>987 %and = and <16 x i8> %y, %mask988 ret <16 x i8> %and989}990 991define <4 x i64> @is_positive_mask_v4i64(<4 x i64> %x, <4 x i64> %y) {992; SSE2-LABEL: is_positive_mask_v4i64:993; SSE2: # %bb.0:994; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]995; SSE2-NEXT: pcmpeqd %xmm4, %xmm4996; SSE2-NEXT: pcmpgtd %xmm4, %xmm1997; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]998; SSE2-NEXT: pcmpgtd %xmm4, %xmm0999; SSE2-NEXT: pand %xmm2, %xmm01000; SSE2-NEXT: pand %xmm3, %xmm11001; SSE2-NEXT: retq1002;1003; SSE42-LABEL: is_positive_mask_v4i64:1004; SSE42: # %bb.0:1005; SSE42-NEXT: pcmpeqd %xmm4, %xmm41006; SSE42-NEXT: pcmpgtq %xmm4, %xmm11007; SSE42-NEXT: pcmpgtq %xmm4, %xmm01008; SSE42-NEXT: pand %xmm2, %xmm01009; SSE42-NEXT: pand %xmm3, %xmm11010; SSE42-NEXT: retq1011;1012; AVX1-LABEL: is_positive_mask_v4i64:1013; AVX1: # %bb.0:1014; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21015; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31016; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm21017; AVX1-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm01018; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01019; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm01020; AVX1-NEXT: retq1021;1022; AVX2-LABEL: is_positive_mask_v4i64:1023; AVX2: # %bb.0:1024; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21025; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm01026; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm01027; AVX2-NEXT: retq1028;1029; AVX512-LABEL: is_positive_mask_v4i64:1030; AVX512: # %bb.0:1031; AVX512-NEXT: vpsraq $63, %ymm0, %ymm01032; AVX512-NEXT: vpandn %ymm1, %ymm0, %ymm01033; AVX512-NEXT: retq1034 %cmp = icmp sgt <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1>1035 %mask = sext <4 x i1> %cmp to <4 x i64>1036 %and = and <4 x i64> %mask, %y1037 ret <4 x i64> %and1038}1039 1040define <8 x i32> @is_positive_mask_v8i32(<8 x i32> %x, <8 x i32> %y) {1041; SSE-LABEL: is_positive_mask_v8i32:1042; SSE: # %bb.0:1043; SSE-NEXT: psrad $31, %xmm01044; SSE-NEXT: pandn %xmm2, %xmm01045; SSE-NEXT: psrad $31, %xmm11046; SSE-NEXT: pandn %xmm3, %xmm11047; SSE-NEXT: retq1048;1049; AVX1-LABEL: is_positive_mask_v8i32:1050; AVX1: # %bb.0:1051; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21052; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31053; AVX1-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm21054; AVX1-NEXT: vpcmpgtd %xmm3, %xmm0, %xmm01055; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01056; AVX1-NEXT: vandps %ymm0, %ymm1, %ymm01057; AVX1-NEXT: retq1058;1059; AVX2-LABEL: is_positive_mask_v8i32:1060; AVX2: # %bb.0:1061; AVX2-NEXT: vpsrad $31, %ymm0, %ymm01062; AVX2-NEXT: vpandn %ymm1, %ymm0, %ymm01063; AVX2-NEXT: retq1064;1065; AVX512-LABEL: is_positive_mask_v8i32:1066; AVX512: # %bb.0:1067; AVX512-NEXT: vpsrad $31, %ymm0, %ymm01068; AVX512-NEXT: vpandn %ymm1, %ymm0, %ymm01069; AVX512-NEXT: retq1070 %cmp = icmp sgt <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>1071 %mask = sext <8 x i1> %cmp to <8 x i32>1072 %and = and <8 x i32> %y, %mask1073 ret <8 x i32> %and1074}1075 1076define <16 x i16> @is_positive_mask_v16i16(<16 x i16> %x, <16 x i16> %y) {1077; SSE-LABEL: is_positive_mask_v16i16:1078; SSE: # %bb.0:1079; SSE-NEXT: psraw $15, %xmm01080; SSE-NEXT: pandn %xmm2, %xmm01081; SSE-NEXT: psraw $15, %xmm11082; SSE-NEXT: pandn %xmm3, %xmm11083; SSE-NEXT: retq1084;1085; AVX1-LABEL: is_positive_mask_v16i16:1086; AVX1: # %bb.0:1087; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21088; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31089; AVX1-NEXT: vpcmpgtw %xmm3, %xmm2, %xmm21090; AVX1-NEXT: vpcmpgtw %xmm3, %xmm0, %xmm01091; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01092; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm01093; AVX1-NEXT: retq1094;1095; AVX2-LABEL: is_positive_mask_v16i16:1096; AVX2: # %bb.0:1097; AVX2-NEXT: vpsraw $15, %ymm0, %ymm01098; AVX2-NEXT: vpandn %ymm1, %ymm0, %ymm01099; AVX2-NEXT: retq1100;1101; AVX512-LABEL: is_positive_mask_v16i16:1102; AVX512: # %bb.0:1103; AVX512-NEXT: vpsraw $15, %ymm0, %ymm01104; AVX512-NEXT: vpandn %ymm1, %ymm0, %ymm01105; AVX512-NEXT: retq1106 %cmp = icmp sgt <16 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1107 %mask = sext <16 x i1> %cmp to <16 x i16>1108 %and = and <16 x i16> %mask, %y1109 ret <16 x i16> %and1110}1111 1112define <32 x i8> @is_positive_mask_v32i8(<32 x i8> %x, <32 x i8> %y) {1113; SSE-LABEL: is_positive_mask_v32i8:1114; SSE: # %bb.0:1115; SSE-NEXT: pcmpeqd %xmm4, %xmm41116; SSE-NEXT: pcmpgtb %xmm4, %xmm11117; SSE-NEXT: pcmpgtb %xmm4, %xmm01118; SSE-NEXT: pand %xmm2, %xmm01119; SSE-NEXT: pand %xmm3, %xmm11120; SSE-NEXT: retq1121;1122; AVX1-LABEL: is_positive_mask_v32i8:1123; AVX1: # %bb.0:1124; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21125; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31126; AVX1-NEXT: vpcmpgtb %xmm3, %xmm2, %xmm21127; AVX1-NEXT: vpcmpgtb %xmm3, %xmm0, %xmm01128; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01129; AVX1-NEXT: vandps %ymm0, %ymm1, %ymm01130; AVX1-NEXT: retq1131;1132; AVX2-LABEL: is_positive_mask_v32i8:1133; AVX2: # %bb.0:1134; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21135; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm01136; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm01137; AVX2-NEXT: retq1138;1139; AVX512-LABEL: is_positive_mask_v32i8:1140; AVX512: # %bb.0:1141; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21142; AVX512-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm01143; AVX512-NEXT: vpand %ymm0, %ymm1, %ymm01144; AVX512-NEXT: retq1145 %cmp = icmp sgt <32 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1146 %mask = sext <32 x i1> %cmp to <32 x i8>1147 %and = and <32 x i8> %y, %mask1148 ret <32 x i8> %and1149}1150 1151define <2 x i64> @ispositive_mask_load_v2i64(<2 x i64> %x, ptr %p) {1152; SSE2-LABEL: ispositive_mask_load_v2i64:1153; SSE2: # %bb.0:1154; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]1155; SSE2-NEXT: pcmpeqd %xmm1, %xmm11156; SSE2-NEXT: pcmpgtd %xmm1, %xmm01157; SSE2-NEXT: pand (%rdi), %xmm01158; SSE2-NEXT: retq1159;1160; SSE42-LABEL: ispositive_mask_load_v2i64:1161; SSE42: # %bb.0:1162; SSE42-NEXT: pcmpeqd %xmm1, %xmm11163; SSE42-NEXT: pcmpgtq %xmm1, %xmm01164; SSE42-NEXT: pand (%rdi), %xmm01165; SSE42-NEXT: retq1166;1167; AVX1-LABEL: ispositive_mask_load_v2i64:1168; AVX1: # %bb.0:1169; AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm11170; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm01171; AVX1-NEXT: vpand (%rdi), %xmm0, %xmm01172; AVX1-NEXT: retq1173;1174; AVX2-LABEL: ispositive_mask_load_v2i64:1175; AVX2: # %bb.0:1176; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm11177; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm01178; AVX2-NEXT: vpand (%rdi), %xmm0, %xmm01179; AVX2-NEXT: retq1180;1181; AVX512-LABEL: ispositive_mask_load_v2i64:1182; AVX512: # %bb.0:1183; AVX512-NEXT: vpsraq $63, %xmm0, %xmm01184; AVX512-NEXT: vpandn (%rdi), %xmm0, %xmm01185; AVX512-NEXT: retq1186 %cmp = icmp sgt <2 x i64> %x, <i64 -1, i64 -1>1187 %mask = sext <2 x i1> %cmp to <2 x i64>1188 %y = load <2 x i64>, ptr %p1189 %and = and <2 x i64> %mask, %y1190 ret <2 x i64> %and1191}1192 1193define <4 x i32> @is_positive_mask_load_v4i32(<4 x i32> %x, ptr %p) {1194; SSE-LABEL: is_positive_mask_load_v4i32:1195; SSE: # %bb.0:1196; SSE-NEXT: psrad $31, %xmm01197; SSE-NEXT: pandn (%rdi), %xmm01198; SSE-NEXT: retq1199;1200; AVX-LABEL: is_positive_mask_load_v4i32:1201; AVX: # %bb.0:1202; AVX-NEXT: vpsrad $31, %xmm0, %xmm01203; AVX-NEXT: vpandn (%rdi), %xmm0, %xmm01204; AVX-NEXT: retq1205 %cmp = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>1206 %mask = sext <4 x i1> %cmp to <4 x i32>1207 %y = load <4 x i32>, ptr %p1208 %and = and <4 x i32> %y, %mask1209 ret <4 x i32> %and1210}1211 1212define <8 x i16> @is_positive_mask_load_v8i16(<8 x i16> %x, ptr %p) {1213; SSE-LABEL: is_positive_mask_load_v8i16:1214; SSE: # %bb.0:1215; SSE-NEXT: psraw $15, %xmm01216; SSE-NEXT: pandn (%rdi), %xmm01217; SSE-NEXT: retq1218;1219; AVX-LABEL: is_positive_mask_load_v8i16:1220; AVX: # %bb.0:1221; AVX-NEXT: vpsraw $15, %xmm0, %xmm01222; AVX-NEXT: vpandn (%rdi), %xmm0, %xmm01223; AVX-NEXT: retq1224 %cmp = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1225 %mask = sext <8 x i1> %cmp to <8 x i16>1226 %y = load <8 x i16>, ptr %p1227 %and = and <8 x i16> %mask, %y1228 ret <8 x i16> %and1229}1230 1231define <16 x i8> @is_positive_mask_load_v16i8(<16 x i8> %x, ptr %p) {1232; SSE-LABEL: is_positive_mask_load_v16i8:1233; SSE: # %bb.0:1234; SSE-NEXT: pcmpeqd %xmm1, %xmm11235; SSE-NEXT: pcmpgtb %xmm1, %xmm01236; SSE-NEXT: pand (%rdi), %xmm01237; SSE-NEXT: retq1238;1239; AVX-LABEL: is_positive_mask_load_v16i8:1240; AVX: # %bb.0:1241; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm11242; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm01243; AVX-NEXT: vpand (%rdi), %xmm0, %xmm01244; AVX-NEXT: retq1245 %cmp = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1246 %mask = sext <16 x i1> %cmp to <16 x i8>1247 %y = load <16 x i8>, ptr %p1248 %and = and <16 x i8> %y, %mask1249 ret <16 x i8> %and1250}1251 1252define <4 x i64> @is_positive_mask_load_v4i64(<4 x i64> %x, ptr %p) {1253; SSE2-LABEL: is_positive_mask_load_v4i64:1254; SSE2: # %bb.0:1255; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]1256; SSE2-NEXT: pcmpeqd %xmm2, %xmm21257; SSE2-NEXT: pcmpgtd %xmm2, %xmm11258; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]1259; SSE2-NEXT: pcmpgtd %xmm2, %xmm01260; SSE2-NEXT: pand (%rdi), %xmm01261; SSE2-NEXT: pand 16(%rdi), %xmm11262; SSE2-NEXT: retq1263;1264; SSE42-LABEL: is_positive_mask_load_v4i64:1265; SSE42: # %bb.0:1266; SSE42-NEXT: pcmpeqd %xmm2, %xmm21267; SSE42-NEXT: pcmpgtq %xmm2, %xmm11268; SSE42-NEXT: pcmpgtq %xmm2, %xmm01269; SSE42-NEXT: pand (%rdi), %xmm01270; SSE42-NEXT: pand 16(%rdi), %xmm11271; SSE42-NEXT: retq1272;1273; AVX1-LABEL: is_positive_mask_load_v4i64:1274; AVX1: # %bb.0:1275; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm11276; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21277; AVX1-NEXT: vpcmpgtq %xmm2, %xmm1, %xmm11278; AVX1-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm01279; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm01280; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm01281; AVX1-NEXT: retq1282;1283; AVX2-LABEL: is_positive_mask_load_v4i64:1284; AVX2: # %bb.0:1285; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11286; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm01287; AVX2-NEXT: vpand (%rdi), %ymm0, %ymm01288; AVX2-NEXT: retq1289;1290; AVX512-LABEL: is_positive_mask_load_v4i64:1291; AVX512: # %bb.0:1292; AVX512-NEXT: vpsraq $63, %ymm0, %ymm01293; AVX512-NEXT: vpandn (%rdi), %ymm0, %ymm01294; AVX512-NEXT: retq1295 %cmp = icmp sgt <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1>1296 %mask = sext <4 x i1> %cmp to <4 x i64>1297 %y = load <4 x i64>, ptr %p1298 %and = and <4 x i64> %mask, %y1299 ret <4 x i64> %and1300}1301 1302define <8 x i32> @is_positive_mask_load_v8i32(<8 x i32> %x, ptr %p) {1303; SSE-LABEL: is_positive_mask_load_v8i32:1304; SSE: # %bb.0:1305; SSE-NEXT: psrad $31, %xmm01306; SSE-NEXT: pandn (%rdi), %xmm01307; SSE-NEXT: psrad $31, %xmm11308; SSE-NEXT: pandn 16(%rdi), %xmm11309; SSE-NEXT: retq1310;1311; AVX1-LABEL: is_positive_mask_load_v8i32:1312; AVX1: # %bb.0:1313; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm11314; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21315; AVX1-NEXT: vpcmpgtd %xmm2, %xmm1, %xmm11316; AVX1-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm01317; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm01318; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm01319; AVX1-NEXT: retq1320;1321; AVX2-LABEL: is_positive_mask_load_v8i32:1322; AVX2: # %bb.0:1323; AVX2-NEXT: vpsrad $31, %ymm0, %ymm01324; AVX2-NEXT: vpandn (%rdi), %ymm0, %ymm01325; AVX2-NEXT: retq1326;1327; AVX512-LABEL: is_positive_mask_load_v8i32:1328; AVX512: # %bb.0:1329; AVX512-NEXT: vpsrad $31, %ymm0, %ymm01330; AVX512-NEXT: vpandn (%rdi), %ymm0, %ymm01331; AVX512-NEXT: retq1332 %cmp = icmp sgt <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>1333 %mask = sext <8 x i1> %cmp to <8 x i32>1334 %y = load <8 x i32>, ptr %p1335 %and = and <8 x i32> %y, %mask1336 ret <8 x i32> %and1337}1338 1339define <16 x i16> @is_positive_mask_load_v16i16(<16 x i16> %x, ptr %p) {1340; SSE-LABEL: is_positive_mask_load_v16i16:1341; SSE: # %bb.0:1342; SSE-NEXT: psraw $15, %xmm01343; SSE-NEXT: pandn (%rdi), %xmm01344; SSE-NEXT: psraw $15, %xmm11345; SSE-NEXT: pandn 16(%rdi), %xmm11346; SSE-NEXT: retq1347;1348; AVX1-LABEL: is_positive_mask_load_v16i16:1349; AVX1: # %bb.0:1350; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm11351; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21352; AVX1-NEXT: vpcmpgtw %xmm2, %xmm1, %xmm11353; AVX1-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm01354; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm01355; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm01356; AVX1-NEXT: retq1357;1358; AVX2-LABEL: is_positive_mask_load_v16i16:1359; AVX2: # %bb.0:1360; AVX2-NEXT: vpsraw $15, %ymm0, %ymm01361; AVX2-NEXT: vpandn (%rdi), %ymm0, %ymm01362; AVX2-NEXT: retq1363;1364; AVX512-LABEL: is_positive_mask_load_v16i16:1365; AVX512: # %bb.0:1366; AVX512-NEXT: vpsraw $15, %ymm0, %ymm01367; AVX512-NEXT: vpandn (%rdi), %ymm0, %ymm01368; AVX512-NEXT: retq1369 %cmp = icmp sgt <16 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1370 %mask = sext <16 x i1> %cmp to <16 x i16>1371 %y = load <16 x i16>, ptr %p1372 %and = and <16 x i16> %mask, %y1373 ret <16 x i16> %and1374}1375 1376define <32 x i8> @is_positive_mask_load_v32i8(<32 x i8> %x, ptr %p) {1377; SSE-LABEL: is_positive_mask_load_v32i8:1378; SSE: # %bb.0:1379; SSE-NEXT: pcmpeqd %xmm2, %xmm21380; SSE-NEXT: pcmpgtb %xmm2, %xmm11381; SSE-NEXT: pcmpgtb %xmm2, %xmm01382; SSE-NEXT: pand (%rdi), %xmm01383; SSE-NEXT: pand 16(%rdi), %xmm11384; SSE-NEXT: retq1385;1386; AVX1-LABEL: is_positive_mask_load_v32i8:1387; AVX1: # %bb.0:1388; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm11389; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21390; AVX1-NEXT: vpcmpgtb %xmm2, %xmm1, %xmm11391; AVX1-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm01392; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm01393; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm01394; AVX1-NEXT: retq1395;1396; AVX2-LABEL: is_positive_mask_load_v32i8:1397; AVX2: # %bb.0:1398; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11399; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm01400; AVX2-NEXT: vpand (%rdi), %ymm0, %ymm01401; AVX2-NEXT: retq1402;1403; AVX512-LABEL: is_positive_mask_load_v32i8:1404; AVX512: # %bb.0:1405; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11406; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm01407; AVX512-NEXT: vpand (%rdi), %ymm0, %ymm01408; AVX512-NEXT: retq1409 %cmp = icmp sgt <32 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1410 %mask = sext <32 x i1> %cmp to <32 x i8>1411 %y = load <32 x i8>, ptr %p1412 %and = and <32 x i8> %y, %mask1413 ret <32 x i8> %and1414}1415 1416define <2 x i1> @ispositive_mask_v2i64_v2i1(<2 x i64> %x, <2 x i1> %y) {1417; SSE2-LABEL: ispositive_mask_v2i64_v2i1:1418; SSE2: # %bb.0:1419; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]1420; SSE2-NEXT: pcmpeqd %xmm2, %xmm21421; SSE2-NEXT: pcmpgtd %xmm2, %xmm01422; SSE2-NEXT: pand %xmm1, %xmm01423; SSE2-NEXT: retq1424;1425; SSE42-LABEL: ispositive_mask_v2i64_v2i1:1426; SSE42: # %bb.0:1427; SSE42-NEXT: pcmpeqd %xmm2, %xmm21428; SSE42-NEXT: pcmpgtq %xmm2, %xmm01429; SSE42-NEXT: pand %xmm1, %xmm01430; SSE42-NEXT: retq1431;1432; AVX1-LABEL: ispositive_mask_v2i64_v2i1:1433; AVX1: # %bb.0:1434; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21435; AVX1-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm01436; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm01437; AVX1-NEXT: retq1438;1439; AVX2-LABEL: ispositive_mask_v2i64_v2i1:1440; AVX2: # %bb.0:1441; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21442; AVX2-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm01443; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01444; AVX2-NEXT: retq1445;1446; AVX512F-LABEL: ispositive_mask_v2i64_v2i1:1447; AVX512F: # %bb.0:1448; AVX512F-NEXT: vpsllq $63, %xmm1, %xmm11449; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21450; AVX512F-NEXT: vpcmpgtq %xmm2, %xmm0, %k11451; AVX512F-NEXT: vptestmq %xmm1, %xmm1, %k1 {%k1}1452; AVX512F-NEXT: vmovdqa64 %xmm2, %xmm0 {%k1} {z}1453; AVX512F-NEXT: retq1454;1455; AVX512DQBW-LABEL: ispositive_mask_v2i64_v2i1:1456; AVX512DQBW: # %bb.0:1457; AVX512DQBW-NEXT: vpsllq $63, %xmm1, %xmm11458; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm21459; AVX512DQBW-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31460; AVX512DQBW-NEXT: vpcmpgtq %xmm3, %xmm0, %k11461; AVX512DQBW-NEXT: vpcmpgtq %xmm1, %xmm2, %k0 {%k1}1462; AVX512DQBW-NEXT: vpmovm2q %k0, %xmm01463; AVX512DQBW-NEXT: retq1464 %cmp = icmp sgt <2 x i64> %x, <i64 -1, i64 -1>1465 %and = and <2 x i1> %cmp, %y1466 ret <2 x i1> %and1467}1468 1469define <4 x i1> @is_positive_mask_v4i32_v4i1(<4 x i32> %x, <4 x i1> %y) {1470; SSE-LABEL: is_positive_mask_v4i32_v4i1:1471; SSE: # %bb.0:1472; SSE-NEXT: psrad $31, %xmm01473; SSE-NEXT: pandn %xmm1, %xmm01474; SSE-NEXT: retq1475;1476; AVX1-LABEL: is_positive_mask_v4i32_v4i1:1477; AVX1: # %bb.0:1478; AVX1-NEXT: vpsrad $31, %xmm0, %xmm01479; AVX1-NEXT: vpandn %xmm1, %xmm0, %xmm01480; AVX1-NEXT: retq1481;1482; AVX2-LABEL: is_positive_mask_v4i32_v4i1:1483; AVX2: # %bb.0:1484; AVX2-NEXT: vpsrad $31, %xmm0, %xmm01485; AVX2-NEXT: vpandn %xmm1, %xmm0, %xmm01486; AVX2-NEXT: retq1487;1488; AVX512F-LABEL: is_positive_mask_v4i32_v4i1:1489; AVX512F: # %bb.0:1490; AVX512F-NEXT: vpslld $31, %xmm1, %xmm11491; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21492; AVX512F-NEXT: vpcmpgtd %xmm2, %xmm0, %k11493; AVX512F-NEXT: vptestmd %xmm1, %xmm1, %k1 {%k1}1494; AVX512F-NEXT: vmovdqa32 %xmm2, %xmm0 {%k1} {z}1495; AVX512F-NEXT: retq1496;1497; AVX512DQBW-LABEL: is_positive_mask_v4i32_v4i1:1498; AVX512DQBW: # %bb.0:1499; AVX512DQBW-NEXT: vpslld $31, %xmm1, %xmm11500; AVX512DQBW-NEXT: vpmovd2m %xmm1, %k11501; AVX512DQBW-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm11502; AVX512DQBW-NEXT: vpcmpgtd %xmm1, %xmm0, %k0 {%k1}1503; AVX512DQBW-NEXT: vpmovm2d %k0, %xmm01504; AVX512DQBW-NEXT: retq1505 %cmp = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>1506 %and = and <4 x i1> %y, %cmp1507 ret <4 x i1> %and1508}1509 1510define <8 x i1> @is_positive_mask_v8i16_v8i1(<8 x i16> %x, <8 x i1> %y) {1511; SSE-LABEL: is_positive_mask_v8i16_v8i1:1512; SSE: # %bb.0:1513; SSE-NEXT: psraw $15, %xmm01514; SSE-NEXT: pandn %xmm1, %xmm01515; SSE-NEXT: retq1516;1517; AVX1-LABEL: is_positive_mask_v8i16_v8i1:1518; AVX1: # %bb.0:1519; AVX1-NEXT: vpsraw $15, %xmm0, %xmm01520; AVX1-NEXT: vpandn %xmm1, %xmm0, %xmm01521; AVX1-NEXT: retq1522;1523; AVX2-LABEL: is_positive_mask_v8i16_v8i1:1524; AVX2: # %bb.0:1525; AVX2-NEXT: vpsraw $15, %xmm0, %xmm01526; AVX2-NEXT: vpandn %xmm1, %xmm0, %xmm01527; AVX2-NEXT: retq1528;1529; AVX512F-LABEL: is_positive_mask_v8i16_v8i1:1530; AVX512F: # %bb.0:1531; AVX512F-NEXT: vpsraw $15, %xmm0, %xmm01532; AVX512F-NEXT: vpandn %xmm1, %xmm0, %xmm01533; AVX512F-NEXT: retq1534;1535; AVX512DQBW-LABEL: is_positive_mask_v8i16_v8i1:1536; AVX512DQBW: # %bb.0:1537; AVX512DQBW-NEXT: vpsllw $15, %xmm1, %xmm11538; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm21539; AVX512DQBW-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31540; AVX512DQBW-NEXT: vpcmpgtw %xmm3, %xmm0, %k11541; AVX512DQBW-NEXT: vpcmpgtw %xmm1, %xmm2, %k0 {%k1}1542; AVX512DQBW-NEXT: vpmovm2w %k0, %xmm01543; AVX512DQBW-NEXT: retq1544 %cmp = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1545 %and = and <8 x i1> %cmp, %y1546 ret <8 x i1> %and1547}1548 1549define <16 x i1> @is_positive_mask_v16i8_v16i1(<16 x i8> %x, <16 x i1> %y) {1550; SSE-LABEL: is_positive_mask_v16i8_v16i1:1551; SSE: # %bb.0:1552; SSE-NEXT: pcmpeqd %xmm2, %xmm21553; SSE-NEXT: pcmpgtb %xmm2, %xmm01554; SSE-NEXT: pand %xmm1, %xmm01555; SSE-NEXT: retq1556;1557; AVX1-LABEL: is_positive_mask_v16i8_v16i1:1558; AVX1: # %bb.0:1559; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21560; AVX1-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm01561; AVX1-NEXT: vpand %xmm0, %xmm1, %xmm01562; AVX1-NEXT: retq1563;1564; AVX2-LABEL: is_positive_mask_v16i8_v16i1:1565; AVX2: # %bb.0:1566; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21567; AVX2-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm01568; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm01569; AVX2-NEXT: retq1570;1571; AVX512F-LABEL: is_positive_mask_v16i8_v16i1:1572; AVX512F: # %bb.0:1573; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm21574; AVX512F-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm01575; AVX512F-NEXT: vpand %xmm0, %xmm1, %xmm01576; AVX512F-NEXT: retq1577;1578; AVX512DQBW-LABEL: is_positive_mask_v16i8_v16i1:1579; AVX512DQBW: # %bb.0:1580; AVX512DQBW-NEXT: vpsllw $7, %xmm1, %xmm11581; AVX512DQBW-NEXT: vpmovb2m %xmm1, %k11582; AVX512DQBW-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm11583; AVX512DQBW-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 {%k1}1584; AVX512DQBW-NEXT: vpmovm2b %k0, %xmm01585; AVX512DQBW-NEXT: retq1586 %cmp = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1587 %and = and <16 x i1> %y, %cmp1588 ret <16 x i1> %and1589}1590 1591define <4 x i1> @is_positive_mask_v4i64_v4i1(<4 x i64> %x, <4 x i1> %y) {1592; SSE2-LABEL: is_positive_mask_v4i64_v4i1:1593; SSE2: # %bb.0:1594; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]1595; SSE2-NEXT: psrad $31, %xmm01596; SSE2-NEXT: pandn %xmm2, %xmm01597; SSE2-NEXT: retq1598;1599; SSE42-LABEL: is_positive_mask_v4i64_v4i1:1600; SSE42: # %bb.0:1601; SSE42-NEXT: pcmpeqd %xmm3, %xmm31602; SSE42-NEXT: pcmpgtq %xmm3, %xmm11603; SSE42-NEXT: pcmpgtq %xmm3, %xmm01604; SSE42-NEXT: packssdw %xmm1, %xmm01605; SSE42-NEXT: pand %xmm2, %xmm01606; SSE42-NEXT: retq1607;1608; AVX1-LABEL: is_positive_mask_v4i64_v4i1:1609; AVX1: # %bb.0:1610; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21611; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31612; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm21613; AVX1-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm01614; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm01615; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm01616; AVX1-NEXT: vzeroupper1617; AVX1-NEXT: retq1618;1619; AVX2-LABEL: is_positive_mask_v4i64_v4i1:1620; AVX2: # %bb.0:1621; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21622; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm01623; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm21624; AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm01625; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01626; AVX2-NEXT: vzeroupper1627; AVX2-NEXT: retq1628;1629; AVX512F-LABEL: is_positive_mask_v4i64_v4i1:1630; AVX512F: # %bb.0:1631; AVX512F-NEXT: vpslld $31, %xmm1, %xmm11632; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21633; AVX512F-NEXT: vpcmpgtq %ymm2, %ymm0, %k11634; AVX512F-NEXT: vptestmd %xmm1, %xmm1, %k1 {%k1}1635; AVX512F-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm01636; AVX512F-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}1637; AVX512F-NEXT: vzeroupper1638; AVX512F-NEXT: retq1639;1640; AVX512DQBW-LABEL: is_positive_mask_v4i64_v4i1:1641; AVX512DQBW: # %bb.0:1642; AVX512DQBW-NEXT: vpslld $31, %xmm1, %xmm11643; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm21644; AVX512DQBW-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm31645; AVX512DQBW-NEXT: vpcmpgtq %ymm3, %ymm0, %k11646; AVX512DQBW-NEXT: vpcmpgtd %xmm1, %xmm2, %k0 {%k1}1647; AVX512DQBW-NEXT: vpmovm2d %k0, %xmm01648; AVX512DQBW-NEXT: vzeroupper1649; AVX512DQBW-NEXT: retq1650 %cmp = icmp sgt <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1>1651 %and = and <4 x i1> %cmp, %y1652 ret <4 x i1> %and1653}1654 1655define <8 x i1> @is_positive_mask_v8i32_v8i1(<8 x i32> %x, <8 x i1> %y) {1656; SSE-LABEL: is_positive_mask_v8i32_v8i1:1657; SSE: # %bb.0:1658; SSE-NEXT: pcmpeqd %xmm3, %xmm31659; SSE-NEXT: pcmpgtd %xmm3, %xmm11660; SSE-NEXT: pcmpgtd %xmm3, %xmm01661; SSE-NEXT: packssdw %xmm1, %xmm01662; SSE-NEXT: pand %xmm2, %xmm01663; SSE-NEXT: retq1664;1665; AVX1-LABEL: is_positive_mask_v8i32_v8i1:1666; AVX1: # %bb.0:1667; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21668; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31669; AVX1-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm21670; AVX1-NEXT: vpcmpgtd %xmm3, %xmm0, %xmm01671; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm01672; AVX1-NEXT: vpand %xmm0, %xmm1, %xmm01673; AVX1-NEXT: vzeroupper1674; AVX1-NEXT: retq1675;1676; AVX2-LABEL: is_positive_mask_v8i32_v8i1:1677; AVX2: # %bb.0:1678; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21679; AVX2-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm01680; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm21681; AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm01682; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm01683; AVX2-NEXT: vzeroupper1684; AVX2-NEXT: retq1685;1686; AVX512F-LABEL: is_positive_mask_v8i32_v8i1:1687; AVX512F: # %bb.0:1688; AVX512F-NEXT: vpmovsxwd %xmm1, %ymm11689; AVX512F-NEXT: vpslld $31, %ymm1, %ymm11690; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21691; AVX512F-NEXT: vpcmpgtd %ymm2, %ymm0, %k11692; AVX512F-NEXT: vptestmd %ymm1, %ymm1, %k1 {%k1}1693; AVX512F-NEXT: vmovdqa32 %ymm2, %ymm0 {%k1} {z}1694; AVX512F-NEXT: vpmovdw %ymm0, %xmm01695; AVX512F-NEXT: vzeroupper1696; AVX512F-NEXT: retq1697;1698; AVX512DQBW-LABEL: is_positive_mask_v8i32_v8i1:1699; AVX512DQBW: # %bb.0:1700; AVX512DQBW-NEXT: vpsllw $15, %xmm1, %xmm11701; AVX512DQBW-NEXT: vpmovw2m %xmm1, %k11702; AVX512DQBW-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11703; AVX512DQBW-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 {%k1}1704; AVX512DQBW-NEXT: vpmovm2w %k0, %xmm01705; AVX512DQBW-NEXT: vzeroupper1706; AVX512DQBW-NEXT: retq1707 %cmp = icmp sgt <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>1708 %and = and <8 x i1> %y, %cmp1709 ret <8 x i1> %and1710}1711 1712define <16 x i1> @is_positive_mask_v16i16_v16i1(<16 x i16> %x, <16 x i1> %y) {1713; SSE-LABEL: is_positive_mask_v16i16_v16i1:1714; SSE: # %bb.0:1715; SSE-NEXT: pcmpeqd %xmm3, %xmm31716; SSE-NEXT: pcmpgtw %xmm3, %xmm11717; SSE-NEXT: pcmpgtw %xmm3, %xmm01718; SSE-NEXT: packsswb %xmm1, %xmm01719; SSE-NEXT: pand %xmm2, %xmm01720; SSE-NEXT: retq1721;1722; AVX1-LABEL: is_positive_mask_v16i16_v16i1:1723; AVX1: # %bb.0:1724; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21725; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31726; AVX1-NEXT: vpcmpgtw %xmm3, %xmm2, %xmm21727; AVX1-NEXT: vpcmpgtw %xmm3, %xmm0, %xmm01728; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm01729; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm01730; AVX1-NEXT: vzeroupper1731; AVX1-NEXT: retq1732;1733; AVX2-LABEL: is_positive_mask_v16i16_v16i1:1734; AVX2: # %bb.0:1735; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21736; AVX2-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm01737; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm21738; AVX2-NEXT: vpacksswb %xmm2, %xmm0, %xmm01739; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01740; AVX2-NEXT: vzeroupper1741; AVX2-NEXT: retq1742;1743; AVX512F-LABEL: is_positive_mask_v16i16_v16i1:1744; AVX512F: # %bb.0:1745; AVX512F-NEXT: vpmovsxbd %xmm1, %zmm11746; AVX512F-NEXT: vpslld $31, %zmm1, %zmm11747; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k11748; AVX512F-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11749; AVX512F-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm01750; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm01751; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1 {%k1}1752; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -11753; AVX512F-NEXT: vpmovdb %zmm0, %xmm01754; AVX512F-NEXT: vzeroupper1755; AVX512F-NEXT: retq1756;1757; AVX512DQBW-LABEL: is_positive_mask_v16i16_v16i1:1758; AVX512DQBW: # %bb.0:1759; AVX512DQBW-NEXT: vpsllw $7, %xmm1, %xmm11760; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm21761; AVX512DQBW-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm31762; AVX512DQBW-NEXT: vpcmpgtw %ymm3, %ymm0, %k11763; AVX512DQBW-NEXT: vpcmpgtb %xmm1, %xmm2, %k0 {%k1}1764; AVX512DQBW-NEXT: vpmovm2b %k0, %xmm01765; AVX512DQBW-NEXT: vzeroupper1766; AVX512DQBW-NEXT: retq1767 %cmp = icmp sgt <16 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1768 %and = and <16 x i1> %cmp, %y1769 ret <16 x i1> %and1770}1771 1772define <32 x i1> @is_positive_mask_v32i8_v32i1(<32 x i8> %x, <32 x i1> %y) {1773; SSE2-LABEL: is_positive_mask_v32i8_v32i1:1774; SSE2: # %bb.0:1775; SSE2-NEXT: movq %rdi, %rax1776; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero1777; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1778; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]1779; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero1780; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero1781; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]1782; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1783; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero1784; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1785; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]1786; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero1787; SSE2-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero1788; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]1789; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]1790; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]1791; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero1792; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1793; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]1794; SSE2-NEXT: movd %r9d, %xmm41795; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero1796; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]1797; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1798; SSE2-NEXT: movd %r8d, %xmm21799; SSE2-NEXT: movd %ecx, %xmm31800; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]1801; SSE2-NEXT: movd %edx, %xmm61802; SSE2-NEXT: movd %esi, %xmm21803; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3],xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7]1804; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]1805; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]1806; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm5[0]1807; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1808; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero1809; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]1810; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1811; SSE2-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero1812; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3],xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]1813; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]1814; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1815; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero1816; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]1817; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1818; SSE2-NEXT: movd {{.*#+}} xmm6 = mem[0],zero,zero,zero1819; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3],xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]1820; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]1821; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]1822; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1823; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero1824; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]1825; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1826; SSE2-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero1827; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3],xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]1828; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]1829; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1830; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero1831; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]1832; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1833; SSE2-NEXT: movd {{.*#+}} xmm7 = mem[0],zero,zero,zero1834; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]1835; SSE2-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm4[0],xmm7[1],xmm4[1],xmm7[2],xmm4[2],xmm7[3],xmm4[3]1836; SSE2-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]1837; SSE2-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0]1838; SSE2-NEXT: pcmpeqd %xmm3, %xmm31839; SSE2-NEXT: pcmpgtb %xmm3, %xmm01840; SSE2-NEXT: pand %xmm2, %xmm01841; SSE2-NEXT: pcmpgtb %xmm3, %xmm11842; SSE2-NEXT: pand %xmm7, %xmm11843; SSE2-NEXT: psllw $7, %xmm11844; SSE2-NEXT: pmovmskb %xmm1, %ecx1845; SSE2-NEXT: shll $16, %ecx1846; SSE2-NEXT: psllw $7, %xmm01847; SSE2-NEXT: pmovmskb %xmm0, %edx1848; SSE2-NEXT: orl %ecx, %edx1849; SSE2-NEXT: movl %edx, (%rdi)1850; SSE2-NEXT: retq1851;1852; SSE42-LABEL: is_positive_mask_v32i8_v32i1:1853; SSE42: # %bb.0:1854; SSE42-NEXT: movq %rdi, %rax1855; SSE42-NEXT: movd %esi, %xmm21856; SSE42-NEXT: pinsrb $1, %edx, %xmm21857; SSE42-NEXT: pinsrb $2, %ecx, %xmm21858; SSE42-NEXT: pinsrb $3, %r8d, %xmm21859; SSE42-NEXT: pinsrb $4, %r9d, %xmm21860; SSE42-NEXT: pinsrb $5, {{[0-9]+}}(%rsp), %xmm21861; SSE42-NEXT: pinsrb $6, {{[0-9]+}}(%rsp), %xmm21862; SSE42-NEXT: pinsrb $7, {{[0-9]+}}(%rsp), %xmm21863; SSE42-NEXT: pinsrb $8, {{[0-9]+}}(%rsp), %xmm21864; SSE42-NEXT: pinsrb $9, {{[0-9]+}}(%rsp), %xmm21865; SSE42-NEXT: pinsrb $10, {{[0-9]+}}(%rsp), %xmm21866; SSE42-NEXT: pinsrb $11, {{[0-9]+}}(%rsp), %xmm21867; SSE42-NEXT: pinsrb $12, {{[0-9]+}}(%rsp), %xmm21868; SSE42-NEXT: pinsrb $13, {{[0-9]+}}(%rsp), %xmm21869; SSE42-NEXT: pinsrb $14, {{[0-9]+}}(%rsp), %xmm21870; SSE42-NEXT: pinsrb $15, {{[0-9]+}}(%rsp), %xmm21871; SSE42-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero1872; SSE42-NEXT: pinsrb $1, {{[0-9]+}}(%rsp), %xmm31873; SSE42-NEXT: pinsrb $2, {{[0-9]+}}(%rsp), %xmm31874; SSE42-NEXT: pinsrb $3, {{[0-9]+}}(%rsp), %xmm31875; SSE42-NEXT: pinsrb $4, {{[0-9]+}}(%rsp), %xmm31876; SSE42-NEXT: pinsrb $5, {{[0-9]+}}(%rsp), %xmm31877; SSE42-NEXT: pinsrb $6, {{[0-9]+}}(%rsp), %xmm31878; SSE42-NEXT: pinsrb $7, {{[0-9]+}}(%rsp), %xmm31879; SSE42-NEXT: pinsrb $8, {{[0-9]+}}(%rsp), %xmm31880; SSE42-NEXT: pinsrb $9, {{[0-9]+}}(%rsp), %xmm31881; SSE42-NEXT: pinsrb $10, {{[0-9]+}}(%rsp), %xmm31882; SSE42-NEXT: pinsrb $11, {{[0-9]+}}(%rsp), %xmm31883; SSE42-NEXT: pinsrb $12, {{[0-9]+}}(%rsp), %xmm31884; SSE42-NEXT: pinsrb $13, {{[0-9]+}}(%rsp), %xmm31885; SSE42-NEXT: pinsrb $14, {{[0-9]+}}(%rsp), %xmm31886; SSE42-NEXT: pinsrb $15, {{[0-9]+}}(%rsp), %xmm31887; SSE42-NEXT: pcmpeqd %xmm4, %xmm41888; SSE42-NEXT: pcmpgtb %xmm4, %xmm11889; SSE42-NEXT: pand %xmm3, %xmm11890; SSE42-NEXT: pcmpgtb %xmm4, %xmm01891; SSE42-NEXT: pand %xmm2, %xmm01892; SSE42-NEXT: psllw $7, %xmm01893; SSE42-NEXT: pmovmskb %xmm0, %ecx1894; SSE42-NEXT: psllw $7, %xmm11895; SSE42-NEXT: pmovmskb %xmm1, %edx1896; SSE42-NEXT: shll $16, %edx1897; SSE42-NEXT: orl %ecx, %edx1898; SSE42-NEXT: movl %edx, (%rdi)1899; SSE42-NEXT: retq1900;1901; AVX1-LABEL: is_positive_mask_v32i8_v32i1:1902; AVX1: # %bb.0:1903; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm21904; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm31905; AVX1-NEXT: vpcmpgtb %xmm3, %xmm2, %xmm21906; AVX1-NEXT: vpcmpgtb %xmm3, %xmm0, %xmm01907; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm01908; AVX1-NEXT: vandps %ymm0, %ymm1, %ymm01909; AVX1-NEXT: retq1910;1911; AVX2-LABEL: is_positive_mask_v32i8_v32i1:1912; AVX2: # %bb.0:1913; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21914; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm01915; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm01916; AVX2-NEXT: retq1917;1918; AVX512F-LABEL: is_positive_mask_v32i8_v32i1:1919; AVX512F: # %bb.0:1920; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm21921; AVX512F-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm01922; AVX512F-NEXT: vpand %ymm0, %ymm1, %ymm01923; AVX512F-NEXT: retq1924;1925; AVX512DQBW-LABEL: is_positive_mask_v32i8_v32i1:1926; AVX512DQBW: # %bb.0:1927; AVX512DQBW-NEXT: vpsllw $7, %ymm1, %ymm11928; AVX512DQBW-NEXT: vpmovb2m %ymm1, %k11929; AVX512DQBW-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11930; AVX512DQBW-NEXT: vpcmpgtb %ymm1, %ymm0, %k0 {%k1}1931; AVX512DQBW-NEXT: vpmovm2b %k0, %ymm01932; AVX512DQBW-NEXT: retq1933 %cmp = icmp sgt <32 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1934 %and = and <32 x i1> %y, %cmp1935 ret <32 x i1> %and1936}1937 1938define <4 x i64> @PR52504(<4 x i16> %t3) {1939; SSE2-LABEL: PR52504:1940; SSE2: # %bb.0:1941; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]1942; SSE2-NEXT: psrad $16, %xmm11943; SSE2-NEXT: pxor %xmm2, %xmm21944; SSE2-NEXT: pcmpgtd %xmm1, %xmm21945; SSE2-NEXT: movdqa %xmm1, %xmm31946; SSE2-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]1947; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]1948; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,0,1,1]1949; SSE2-NEXT: pcmpeqd %xmm4, %xmm41950; SSE2-NEXT: pcmpgtd %xmm4, %xmm01951; SSE2-NEXT: pand %xmm0, %xmm11952; SSE2-NEXT: pxor %xmm4, %xmm01953; SSE2-NEXT: por %xmm1, %xmm01954; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]1955; SSE2-NEXT: pcmpgtd %xmm4, %xmm11956; SSE2-NEXT: pand %xmm1, %xmm31957; SSE2-NEXT: pxor %xmm4, %xmm11958; SSE2-NEXT: por %xmm3, %xmm11959; SSE2-NEXT: retq1960;1961; SSE42-LABEL: PR52504:1962; SSE42: # %bb.0:1963; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]1964; SSE42-NEXT: pmovsxwq %xmm1, %xmm21965; SSE42-NEXT: pmovsxwq %xmm0, %xmm31966; SSE42-NEXT: pxor %xmm1, %xmm11967; SSE42-NEXT: pxor %xmm0, %xmm01968; SSE42-NEXT: pcmpgtq %xmm3, %xmm01969; SSE42-NEXT: por %xmm3, %xmm01970; SSE42-NEXT: pcmpgtq %xmm2, %xmm11971; SSE42-NEXT: por %xmm2, %xmm11972; SSE42-NEXT: retq1973;1974; AVX1-LABEL: PR52504:1975; AVX1: # %bb.0:1976; AVX1-NEXT: vpmovsxwq %xmm0, %xmm11977; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]1978; AVX1-NEXT: vpmovsxwq %xmm0, %xmm01979; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm21980; AVX1-NEXT: vpcmpgtq %xmm0, %xmm2, %xmm31981; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm01982; AVX1-NEXT: vpcmpgtq %xmm1, %xmm2, %xmm21983; AVX1-NEXT: vpor %xmm1, %xmm2, %xmm11984; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm01985; AVX1-NEXT: retq1986;1987; AVX2-LABEL: PR52504:1988; AVX2: # %bb.0:1989; AVX2-NEXT: vpmovsxwq %xmm0, %ymm01990; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm11991; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm11992; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm01993; AVX2-NEXT: retq1994;1995; AVX512-LABEL: PR52504:1996; AVX512: # %bb.0:1997; AVX512-NEXT: vpmovsxwq %xmm0, %ymm01998; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm11999; AVX512-NEXT: vpmaxsq %ymm1, %ymm0, %ymm02000; AVX512-NEXT: retq2001 %t14 = sext <4 x i16> %t3 to <4 x i64>2002 %t15 = icmp sgt <4 x i64> %t14, <i64 -1, i64 -1, i64 -1, i64 -1>2003 %t16 = select <4 x i1> %t15, <4 x i64> %t14, <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>2004 ret <4 x i64> %t162005}2006