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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1,AVX1-SLOW5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fast-hops | FileCheck %s --check-prefixes=AVX,AVX1,AVX1-FAST6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX27; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX5128; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX5129 10;11; vXi6412;13 14define i64 @test_v2i64_v2i32(<2 x i32> %a0) {15; SSE2-LABEL: test_v2i64_v2i32:16; SSE2: # %bb.0:17; SSE2-NEXT: xorps %xmm1, %xmm118; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]19; SSE2-NEXT: psrlq $32, %xmm020; SSE2-NEXT: paddq %xmm1, %xmm021; SSE2-NEXT: movq %xmm0, %rax22; SSE2-NEXT: retq23;24; SSE41-LABEL: test_v2i64_v2i32:25; SSE41: # %bb.0:26; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero27; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]28; SSE41-NEXT: paddq %xmm0, %xmm129; SSE41-NEXT: movq %xmm1, %rax30; SSE41-NEXT: retq31;32; AVX-LABEL: test_v2i64_v2i32:33; AVX: # %bb.0:34; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero35; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]36; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm037; AVX-NEXT: vmovq %xmm0, %rax38; AVX-NEXT: retq39 %1 = zext <2 x i32> %a0 to <2 x i64>40 %2 = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %1)41 ret i64 %242}43 44define i64 @test_v4i64_v4i16(<4 x i16> %a0) {45; SSE2-LABEL: test_v4i64_v4i16:46; SSE2: # %bb.0:47; SSE2-NEXT: pxor %xmm1, %xmm148; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]49; SSE2-NEXT: movdqa %xmm0, %xmm250; SSE2-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm1[2],xmm2[3],xmm1[3]51; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]52; SSE2-NEXT: paddq %xmm2, %xmm053; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]54; SSE2-NEXT: paddq %xmm0, %xmm155; SSE2-NEXT: movq %xmm1, %rax56; SSE2-NEXT: retq57;58; SSE41-LABEL: test_v4i64_v4i16:59; SSE41: # %bb.0:60; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero61; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]62; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero63; SSE41-NEXT: paddq %xmm1, %xmm064; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]65; SSE41-NEXT: paddq %xmm0, %xmm166; SSE41-NEXT: movq %xmm1, %rax67; SSE41-NEXT: retq68;69; AVX1-LABEL: test_v4i64_v4i16:70; AVX1: # %bb.0:71; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero72; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]73; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero74; AVX1-NEXT: vpaddq %xmm0, %xmm1, %xmm075; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]76; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm077; AVX1-NEXT: vmovq %xmm0, %rax78; AVX1-NEXT: retq79;80; AVX2-LABEL: test_v4i64_v4i16:81; AVX2: # %bb.0:82; AVX2-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero83; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm184; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm085; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]86; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm087; AVX2-NEXT: vmovq %xmm0, %rax88; AVX2-NEXT: vzeroupper89; AVX2-NEXT: retq90;91; AVX512-LABEL: test_v4i64_v4i16:92; AVX512: # %bb.0:93; AVX512-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero94; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm195; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm096; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]97; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm098; AVX512-NEXT: vmovq %xmm0, %rax99; AVX512-NEXT: vzeroupper100; AVX512-NEXT: retq101 %1 = zext <4 x i16> %a0 to <4 x i64>102 %2 = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> %1)103 ret i64 %2104}105 106define i64 @test_v8i64_v8i8(<8 x i8> %a0) {107; SSE-LABEL: test_v8i64_v8i8:108; SSE: # %bb.0:109; SSE-NEXT: pxor %xmm1, %xmm1110; SSE-NEXT: psadbw %xmm0, %xmm1111; SSE-NEXT: movq %xmm1, %rax112; SSE-NEXT: retq113;114; AVX-LABEL: test_v8i64_v8i8:115; AVX: # %bb.0:116; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1117; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0118; AVX-NEXT: vmovq %xmm0, %rax119; AVX-NEXT: retq120 %1 = zext <8 x i8> %a0 to <8 x i64>121 %2 = call i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %1)122 ret i64 %2123}124 125define i64 @test_v16i64_v16i8(<16 x i8> %a0) {126; SSE-LABEL: test_v16i64_v16i8:127; SSE: # %bb.0:128; SSE-NEXT: pxor %xmm1, %xmm1129; SSE-NEXT: psadbw %xmm0, %xmm1130; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]131; SSE-NEXT: paddq %xmm1, %xmm0132; SSE-NEXT: movq %xmm0, %rax133; SSE-NEXT: retq134;135; AVX-LABEL: test_v16i64_v16i8:136; AVX: # %bb.0:137; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1138; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0139; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]140; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0141; AVX-NEXT: vmovq %xmm0, %rax142; AVX-NEXT: retq143 %1 = zext <16 x i8> %a0 to <16 x i64>144 %2 = call i64 @llvm.vector.reduce.add.v16i64(<16 x i64> %1)145 ret i64 %2146}147 148;149; vXi32150;151 152define i32 @test_v2i32_v2i16(<2 x i16> %a0) {153; SSE2-LABEL: test_v2i32_v2i16:154; SSE2: # %bb.0:155; SSE2-NEXT: pxor %xmm1, %xmm1156; SSE2-NEXT: movdqa %xmm0, %xmm2157; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]158; SSE2-NEXT: psrld $16, %xmm0159; SSE2-NEXT: paddd %xmm2, %xmm0160; SSE2-NEXT: movd %xmm0, %eax161; SSE2-NEXT: retq162;163; SSE41-LABEL: test_v2i32_v2i16:164; SSE41: # %bb.0:165; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero166; SSE41-NEXT: psrld $16, %xmm0167; SSE41-NEXT: paddd %xmm1, %xmm0168; SSE41-NEXT: movd %xmm0, %eax169; SSE41-NEXT: retq170;171; AVX1-SLOW-LABEL: test_v2i32_v2i16:172; AVX1-SLOW: # %bb.0:173; AVX1-SLOW-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero174; AVX1-SLOW-NEXT: vpsrld $16, %xmm0, %xmm0175; AVX1-SLOW-NEXT: vpaddd %xmm0, %xmm1, %xmm0176; AVX1-SLOW-NEXT: vmovd %xmm0, %eax177; AVX1-SLOW-NEXT: retq178;179; AVX1-FAST-LABEL: test_v2i32_v2i16:180; AVX1-FAST: # %bb.0:181; AVX1-FAST-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero182; AVX1-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0183; AVX1-FAST-NEXT: vmovd %xmm0, %eax184; AVX1-FAST-NEXT: retq185;186; AVX2-LABEL: test_v2i32_v2i16:187; AVX2: # %bb.0:188; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero189; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0190; AVX2-NEXT: vpaddd %xmm0, %xmm1, %xmm0191; AVX2-NEXT: vmovd %xmm0, %eax192; AVX2-NEXT: retq193;194; AVX512-LABEL: test_v2i32_v2i16:195; AVX512: # %bb.0:196; AVX512-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero197; AVX512-NEXT: vpsrld $16, %xmm0, %xmm0198; AVX512-NEXT: vpaddd %xmm0, %xmm1, %xmm0199; AVX512-NEXT: vmovd %xmm0, %eax200; AVX512-NEXT: retq201 %1 = zext <2 x i16> %a0 to <2 x i32>202 %2 = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> %1)203 ret i32 %2204}205 206define i32 @test_v4i32(<4 x i8> %a0) {207; SSE2-LABEL: test_v4i32:208; SSE2: # %bb.0:209; SSE2-NEXT: pxor %xmm1, %xmm1210; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]211; SSE2-NEXT: psadbw %xmm1, %xmm0212; SSE2-NEXT: movd %xmm0, %eax213; SSE2-NEXT: retq214;215; SSE41-LABEL: test_v4i32:216; SSE41: # %bb.0:217; SSE41-NEXT: pxor %xmm1, %xmm1218; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]219; SSE41-NEXT: psadbw %xmm1, %xmm0220; SSE41-NEXT: movd %xmm0, %eax221; SSE41-NEXT: retq222;223; AVX1-LABEL: test_v4i32:224; AVX1: # %bb.0:225; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1226; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]227; AVX1-NEXT: vpsadbw %xmm1, %xmm0, %xmm0228; AVX1-NEXT: vmovd %xmm0, %eax229; AVX1-NEXT: retq230;231; AVX2-LABEL: test_v4i32:232; AVX2: # %bb.0:233; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1234; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]235; AVX2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0236; AVX2-NEXT: vmovd %xmm0, %eax237; AVX2-NEXT: retq238;239; AVX512-LABEL: test_v4i32:240; AVX512: # %bb.0:241; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1242; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]243; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1244; AVX512-NEXT: vpsadbw %xmm1, %xmm0, %xmm0245; AVX512-NEXT: vmovd %xmm0, %eax246; AVX512-NEXT: retq247 %1 = zext <4 x i8> %a0 to <4 x i32>248 %2 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %1)249 ret i32 %2250}251 252define i32 @test_v8i32_v8i8(<8 x i8> %a0) {253; SSE-LABEL: test_v8i32_v8i8:254; SSE: # %bb.0:255; SSE-NEXT: pxor %xmm1, %xmm1256; SSE-NEXT: psadbw %xmm0, %xmm1257; SSE-NEXT: movd %xmm1, %eax258; SSE-NEXT: retq259;260; AVX-LABEL: test_v8i32_v8i8:261; AVX: # %bb.0:262; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1263; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0264; AVX-NEXT: vmovd %xmm0, %eax265; AVX-NEXT: retq266 %1 = zext <8 x i8> %a0 to <8 x i32>267 %2 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %1)268 ret i32 %2269}270 271define i32 @test_v16i32_v16i8(<16 x i8> %a0) {272; SSE-LABEL: test_v16i32_v16i8:273; SSE: # %bb.0:274; SSE-NEXT: pxor %xmm1, %xmm1275; SSE-NEXT: psadbw %xmm0, %xmm1276; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]277; SSE-NEXT: paddq %xmm1, %xmm0278; SSE-NEXT: movd %xmm0, %eax279; SSE-NEXT: retq280;281; AVX-LABEL: test_v16i32_v16i8:282; AVX: # %bb.0:283; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1284; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0285; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]286; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0287; AVX-NEXT: vmovd %xmm0, %eax288; AVX-NEXT: retq289 %1 = zext <16 x i8> %a0 to <16 x i32>290 %2 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %1)291 ret i32 %2292}293 294define i32 @test_v32i32_v32i8(<32 x i8> %a0) {295; SSE-LABEL: test_v32i32_v32i8:296; SSE: # %bb.0:297; SSE-NEXT: pxor %xmm2, %xmm2298; SSE-NEXT: psadbw %xmm2, %xmm1299; SSE-NEXT: psadbw %xmm2, %xmm0300; SSE-NEXT: paddq %xmm1, %xmm0301; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]302; SSE-NEXT: paddq %xmm0, %xmm1303; SSE-NEXT: movd %xmm1, %eax304; SSE-NEXT: retq305;306; AVX1-LABEL: test_v32i32_v32i8:307; AVX1: # %bb.0:308; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1309; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2310; AVX1-NEXT: vpsadbw %xmm2, %xmm1, %xmm1311; AVX1-NEXT: vpsadbw %xmm2, %xmm0, %xmm0312; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0313; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]314; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0315; AVX1-NEXT: vmovd %xmm0, %eax316; AVX1-NEXT: vzeroupper317; AVX1-NEXT: retq318;319; AVX2-LABEL: test_v32i32_v32i8:320; AVX2: # %bb.0:321; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1322; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0323; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1324; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0325; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]326; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0327; AVX2-NEXT: vmovd %xmm0, %eax328; AVX2-NEXT: vzeroupper329; AVX2-NEXT: retq330;331; AVX512-LABEL: test_v32i32_v32i8:332; AVX512: # %bb.0:333; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1334; AVX512-NEXT: vpsadbw %ymm1, %ymm0, %ymm0335; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1336; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0337; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]338; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0339; AVX512-NEXT: vmovd %xmm0, %eax340; AVX512-NEXT: vzeroupper341; AVX512-NEXT: retq342 %1 = zext <32 x i8> %a0 to <32 x i32>343 %2 = call i32 @llvm.vector.reduce.add.v32i32(<32 x i32> %1)344 ret i32 %2345}346 347;348; vXi16349;350 351define i16 @test_v2i16_v2i8(<2 x i8> %a0) {352; SSE2-LABEL: test_v2i16_v2i8:353; SSE2: # %bb.0:354; SSE2-NEXT: pxor %xmm1, %xmm1355; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]356; SSE2-NEXT: movdqa %xmm0, %xmm1357; SSE2-NEXT: psrld $16, %xmm1358; SSE2-NEXT: paddw %xmm0, %xmm1359; SSE2-NEXT: movd %xmm1, %eax360; SSE2-NEXT: # kill: def $ax killed $ax killed $eax361; SSE2-NEXT: retq362;363; SSE41-LABEL: test_v2i16_v2i8:364; SSE41: # %bb.0:365; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero366; SSE41-NEXT: movdqa %xmm0, %xmm1367; SSE41-NEXT: psrld $16, %xmm1368; SSE41-NEXT: paddw %xmm0, %xmm1369; SSE41-NEXT: movd %xmm1, %eax370; SSE41-NEXT: # kill: def $ax killed $ax killed $eax371; SSE41-NEXT: retq372;373; AVX1-SLOW-LABEL: test_v2i16_v2i8:374; AVX1-SLOW: # %bb.0:375; AVX1-SLOW-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero376; AVX1-SLOW-NEXT: vpsrld $16, %xmm0, %xmm1377; AVX1-SLOW-NEXT: vpaddw %xmm1, %xmm0, %xmm0378; AVX1-SLOW-NEXT: vmovd %xmm0, %eax379; AVX1-SLOW-NEXT: # kill: def $ax killed $ax killed $eax380; AVX1-SLOW-NEXT: retq381;382; AVX1-FAST-LABEL: test_v2i16_v2i8:383; AVX1-FAST: # %bb.0:384; AVX1-FAST-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero385; AVX1-FAST-NEXT: vphaddw %xmm0, %xmm0, %xmm0386; AVX1-FAST-NEXT: vmovd %xmm0, %eax387; AVX1-FAST-NEXT: # kill: def $ax killed $ax killed $eax388; AVX1-FAST-NEXT: retq389;390; AVX2-LABEL: test_v2i16_v2i8:391; AVX2: # %bb.0:392; AVX2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero393; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1394; AVX2-NEXT: vpaddw %xmm1, %xmm0, %xmm0395; AVX2-NEXT: vmovd %xmm0, %eax396; AVX2-NEXT: # kill: def $ax killed $ax killed $eax397; AVX2-NEXT: retq398;399; AVX512-LABEL: test_v2i16_v2i8:400; AVX512: # %bb.0:401; AVX512-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero402; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1403; AVX512-NEXT: vpaddw %xmm1, %xmm0, %xmm0404; AVX512-NEXT: vmovd %xmm0, %eax405; AVX512-NEXT: # kill: def $ax killed $ax killed $eax406; AVX512-NEXT: retq407 %1 = zext <2 x i8> %a0 to <2 x i16>408 %2 = call i16 @llvm.vector.reduce.add.v2i16(<2 x i16> %1)409 ret i16 %2410}411 412define i16 @test_v4i16_v4i8(<4 x i8> %a0) {413; SSE2-LABEL: test_v4i16_v4i8:414; SSE2: # %bb.0:415; SSE2-NEXT: pxor %xmm1, %xmm1416; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]417; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]418; SSE2-NEXT: paddw %xmm0, %xmm1419; SSE2-NEXT: movdqa %xmm1, %xmm0420; SSE2-NEXT: psrld $16, %xmm0421; SSE2-NEXT: paddw %xmm1, %xmm0422; SSE2-NEXT: movd %xmm0, %eax423; SSE2-NEXT: # kill: def $ax killed $ax killed $eax424; SSE2-NEXT: retq425;426; SSE41-LABEL: test_v4i16_v4i8:427; SSE41: # %bb.0:428; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero429; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]430; SSE41-NEXT: paddw %xmm0, %xmm1431; SSE41-NEXT: movdqa %xmm1, %xmm0432; SSE41-NEXT: psrld $16, %xmm0433; SSE41-NEXT: paddw %xmm1, %xmm0434; SSE41-NEXT: movd %xmm0, %eax435; SSE41-NEXT: # kill: def $ax killed $ax killed $eax436; SSE41-NEXT: retq437;438; AVX1-SLOW-LABEL: test_v4i16_v4i8:439; AVX1-SLOW: # %bb.0:440; AVX1-SLOW-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero441; AVX1-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]442; AVX1-SLOW-NEXT: vpaddw %xmm1, %xmm0, %xmm0443; AVX1-SLOW-NEXT: vpsrld $16, %xmm0, %xmm1444; AVX1-SLOW-NEXT: vpaddw %xmm1, %xmm0, %xmm0445; AVX1-SLOW-NEXT: vmovd %xmm0, %eax446; AVX1-SLOW-NEXT: # kill: def $ax killed $ax killed $eax447; AVX1-SLOW-NEXT: retq448;449; AVX1-FAST-LABEL: test_v4i16_v4i8:450; AVX1-FAST: # %bb.0:451; AVX1-FAST-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero452; AVX1-FAST-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]453; AVX1-FAST-NEXT: vpaddw %xmm1, %xmm0, %xmm0454; AVX1-FAST-NEXT: vphaddw %xmm0, %xmm0, %xmm0455; AVX1-FAST-NEXT: vmovd %xmm0, %eax456; AVX1-FAST-NEXT: # kill: def $ax killed $ax killed $eax457; AVX1-FAST-NEXT: retq458;459; AVX2-LABEL: test_v4i16_v4i8:460; AVX2: # %bb.0:461; AVX2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero462; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]463; AVX2-NEXT: vpaddw %xmm1, %xmm0, %xmm0464; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1465; AVX2-NEXT: vpaddw %xmm1, %xmm0, %xmm0466; AVX2-NEXT: vmovd %xmm0, %eax467; AVX2-NEXT: # kill: def $ax killed $ax killed $eax468; AVX2-NEXT: retq469;470; AVX512-LABEL: test_v4i16_v4i8:471; AVX512: # %bb.0:472; AVX512-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero473; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]474; AVX512-NEXT: vpaddw %xmm1, %xmm0, %xmm0475; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1476; AVX512-NEXT: vpaddw %xmm1, %xmm0, %xmm0477; AVX512-NEXT: vmovd %xmm0, %eax478; AVX512-NEXT: # kill: def $ax killed $ax killed $eax479; AVX512-NEXT: retq480 %1 = zext <4 x i8> %a0 to <4 x i16>481 %2 = call i16 @llvm.vector.reduce.add.v4i16(<4 x i16> %1)482 ret i16 %2483 484}485 486define i16 @test_v8i16_v8i8(<8 x i8> %a0) {487; SSE-LABEL: test_v8i16_v8i8:488; SSE: # %bb.0:489; SSE-NEXT: pxor %xmm1, %xmm1490; SSE-NEXT: psadbw %xmm0, %xmm1491; SSE-NEXT: movd %xmm1, %eax492; SSE-NEXT: # kill: def $ax killed $ax killed $eax493; SSE-NEXT: retq494;495; AVX-LABEL: test_v8i16_v8i8:496; AVX: # %bb.0:497; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1498; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0499; AVX-NEXT: vmovd %xmm0, %eax500; AVX-NEXT: # kill: def $ax killed $ax killed $eax501; AVX-NEXT: retq502 %1 = zext <8 x i8> %a0 to <8 x i16>503 %2 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %1)504 ret i16 %2505}506 507define i16 @test_v16i16_v16i8(<16 x i8> %a0) {508; SSE-LABEL: test_v16i16_v16i8:509; SSE: # %bb.0:510; SSE-NEXT: pxor %xmm1, %xmm1511; SSE-NEXT: psadbw %xmm0, %xmm1512; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]513; SSE-NEXT: paddq %xmm1, %xmm0514; SSE-NEXT: movd %xmm0, %eax515; SSE-NEXT: # kill: def $ax killed $ax killed $eax516; SSE-NEXT: retq517;518; AVX-LABEL: test_v16i16_v16i8:519; AVX: # %bb.0:520; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1521; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0522; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]523; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0524; AVX-NEXT: vmovd %xmm0, %eax525; AVX-NEXT: # kill: def $ax killed $ax killed $eax526; AVX-NEXT: retq527 %1 = zext <16 x i8> %a0 to <16 x i16>528 %2 = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %1)529 ret i16 %2530}531 532define i16 @test_v32i16_v32i8(<32 x i8> %a0) {533; SSE-LABEL: test_v32i16_v32i8:534; SSE: # %bb.0:535; SSE-NEXT: pxor %xmm2, %xmm2536; SSE-NEXT: psadbw %xmm2, %xmm1537; SSE-NEXT: psadbw %xmm2, %xmm0538; SSE-NEXT: paddq %xmm1, %xmm0539; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]540; SSE-NEXT: paddq %xmm0, %xmm1541; SSE-NEXT: movd %xmm1, %eax542; SSE-NEXT: # kill: def $ax killed $ax killed $eax543; SSE-NEXT: retq544;545; AVX1-LABEL: test_v32i16_v32i8:546; AVX1: # %bb.0:547; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1548; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2549; AVX1-NEXT: vpsadbw %xmm2, %xmm1, %xmm1550; AVX1-NEXT: vpsadbw %xmm2, %xmm0, %xmm0551; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0552; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]553; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0554; AVX1-NEXT: vmovd %xmm0, %eax555; AVX1-NEXT: # kill: def $ax killed $ax killed $eax556; AVX1-NEXT: vzeroupper557; AVX1-NEXT: retq558;559; AVX2-LABEL: test_v32i16_v32i8:560; AVX2: # %bb.0:561; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1562; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0563; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1564; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0565; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]566; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0567; AVX2-NEXT: vmovd %xmm0, %eax568; AVX2-NEXT: # kill: def $ax killed $ax killed $eax569; AVX2-NEXT: vzeroupper570; AVX2-NEXT: retq571;572; AVX512-LABEL: test_v32i16_v32i8:573; AVX512: # %bb.0:574; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1575; AVX512-NEXT: vpsadbw %ymm1, %ymm0, %ymm0576; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1577; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0578; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]579; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0580; AVX512-NEXT: vmovd %xmm0, %eax581; AVX512-NEXT: # kill: def $ax killed $ax killed $eax582; AVX512-NEXT: vzeroupper583; AVX512-NEXT: retq584 %1 = zext <32 x i8> %a0 to <32 x i16>585 %2 = call i16 @llvm.vector.reduce.add.v32i16(<32 x i16> %1)586 ret i16 %2587}588 589define i16 @test_v64i16_v64i8(<64 x i8> %a0) {590; SSE-LABEL: test_v64i16_v64i8:591; SSE: # %bb.0:592; SSE-NEXT: pxor %xmm4, %xmm4593; SSE-NEXT: psadbw %xmm4, %xmm3594; SSE-NEXT: psadbw %xmm4, %xmm1595; SSE-NEXT: paddq %xmm3, %xmm1596; SSE-NEXT: psadbw %xmm4, %xmm2597; SSE-NEXT: psadbw %xmm4, %xmm0598; SSE-NEXT: paddq %xmm2, %xmm0599; SSE-NEXT: paddq %xmm1, %xmm0600; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]601; SSE-NEXT: paddq %xmm0, %xmm1602; SSE-NEXT: movd %xmm1, %eax603; SSE-NEXT: # kill: def $ax killed $ax killed $eax604; SSE-NEXT: retq605;606; AVX1-LABEL: test_v64i16_v64i8:607; AVX1: # %bb.0:608; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2609; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3610; AVX1-NEXT: vpsadbw %xmm3, %xmm2, %xmm2611; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4612; AVX1-NEXT: vpsadbw %xmm3, %xmm4, %xmm4613; AVX1-NEXT: vpaddq %xmm2, %xmm4, %xmm2614; AVX1-NEXT: vpsadbw %xmm3, %xmm1, %xmm1615; AVX1-NEXT: vpsadbw %xmm3, %xmm0, %xmm0616; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0617; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0618; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]619; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0620; AVX1-NEXT: vmovd %xmm0, %eax621; AVX1-NEXT: # kill: def $ax killed $ax killed $eax622; AVX1-NEXT: vzeroupper623; AVX1-NEXT: retq624;625; AVX2-LABEL: test_v64i16_v64i8:626; AVX2: # %bb.0:627; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2628; AVX2-NEXT: vpsadbw %ymm2, %ymm1, %ymm1629; AVX2-NEXT: vpsadbw %ymm2, %ymm0, %ymm0630; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0631; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1632; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0633; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]634; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0635; AVX2-NEXT: vmovd %xmm0, %eax636; AVX2-NEXT: # kill: def $ax killed $ax killed $eax637; AVX2-NEXT: vzeroupper638; AVX2-NEXT: retq639;640; AVX512-LABEL: test_v64i16_v64i8:641; AVX512: # %bb.0:642; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1643; AVX512-NEXT: vpsadbw %zmm1, %zmm0, %zmm0644; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1645; AVX512-NEXT: vpaddq %ymm1, %ymm0, %ymm0646; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1647; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0648; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]649; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0650; AVX512-NEXT: vmovd %xmm0, %eax651; AVX512-NEXT: # kill: def $ax killed $ax killed $eax652; AVX512-NEXT: vzeroupper653; AVX512-NEXT: retq654 %1 = zext <64 x i8> %a0 to <64 x i16>655 %2 = call i16 @llvm.vector.reduce.add.v64i16(<64 x i16> %1)656 ret i16 %2657 658}659 660declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>)661declare i64 @llvm.vector.reduce.add.v4i64(<4 x i64>)662declare i64 @llvm.vector.reduce.add.v8i64(<8 x i64>)663declare i64 @llvm.vector.reduce.add.v16i64(<16 x i64>)664 665declare i32 @llvm.vector.reduce.add.v2i32(<2 x i32>)666declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)667declare i32 @llvm.vector.reduce.add.v8i32(<8 x i32>)668declare i32 @llvm.vector.reduce.add.v16i32(<16 x i32>)669declare i32 @llvm.vector.reduce.add.v32i32(<32 x i32>)670 671declare i16 @llvm.vector.reduce.add.v2i16(<2 x i16>)672declare i16 @llvm.vector.reduce.add.v4i16(<4 x i16>)673declare i16 @llvm.vector.reduce.add.v8i16(<8 x i16>)674declare i16 @llvm.vector.reduce.add.v16i16(<16 x i16>)675declare i16 @llvm.vector.reduce.add.v32i16(<32 x i16>)676declare i16 @llvm.vector.reduce.add.v64i16(<64 x i16>)677 678declare i8 @llvm.vector.reduce.add.v2i8(<2 x i8>)679declare i8 @llvm.vector.reduce.add.v4i8(<4 x i8>)680declare i8 @llvm.vector.reduce.add.v8i8(<8 x i8>)681declare i8 @llvm.vector.reduce.add.v16i8(<16 x i8>)682declare i8 @llvm.vector.reduce.add.v32i8(<32 x i8>)683declare i8 @llvm.vector.reduce.add.v64i8(<64 x i8>)684declare i8 @llvm.vector.reduce.add.v128i8(<128 x i8>)685