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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX1-SLOW5; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx,+fast-hops | FileCheck %s --check-prefix=AVX1-FAST6; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX27; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX5128; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX5129 10;11; vXf32 (accum)12;13 14define float @test_v2f32(float %a0, <2 x float> %a1) {15; SSE2-LABEL: test_v2f32:16; SSE2: # %bb.0:17; SSE2-NEXT: movaps %xmm1, %xmm218; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]19; SSE2-NEXT: addss %xmm1, %xmm220; SSE2-NEXT: addss %xmm2, %xmm021; SSE2-NEXT: retq22;23; SSE41-LABEL: test_v2f32:24; SSE41: # %bb.0:25; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]26; SSE41-NEXT: addss %xmm1, %xmm227; SSE41-NEXT: addss %xmm2, %xmm028; SSE41-NEXT: retq29;30; AVX1-SLOW-LABEL: test_v2f32:31; AVX1-SLOW: # %bb.0:32; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]33; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm134; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm035; AVX1-SLOW-NEXT: retq36;37; AVX1-FAST-LABEL: test_v2f32:38; AVX1-FAST: # %bb.0:39; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm1, %xmm140; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm041; AVX1-FAST-NEXT: retq42;43; AVX2-LABEL: test_v2f32:44; AVX2: # %bb.0:45; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]46; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm147; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm048; AVX2-NEXT: retq49;50; AVX512-LABEL: test_v2f32:51; AVX512: # %bb.0:52; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]53; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm154; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm055; AVX512-NEXT: retq56 %1 = call fast float @llvm.vector.reduce.fadd.f32.v2f32(float %a0, <2 x float> %a1)57 ret float %158}59 60define float @test_v4f32(float %a0, <4 x float> %a1) {61; SSE2-LABEL: test_v4f32:62; SSE2: # %bb.0:63; SSE2-NEXT: movaps %xmm1, %xmm264; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]65; SSE2-NEXT: addps %xmm1, %xmm266; SSE2-NEXT: movaps %xmm2, %xmm167; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]68; SSE2-NEXT: addss %xmm2, %xmm169; SSE2-NEXT: addss %xmm1, %xmm070; SSE2-NEXT: retq71;72; SSE41-LABEL: test_v4f32:73; SSE41: # %bb.0:74; SSE41-NEXT: movaps %xmm1, %xmm275; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]76; SSE41-NEXT: addps %xmm1, %xmm277; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]78; SSE41-NEXT: addss %xmm2, %xmm179; SSE41-NEXT: addss %xmm1, %xmm080; SSE41-NEXT: retq81;82; AVX1-SLOW-LABEL: test_v4f32:83; AVX1-SLOW: # %bb.0:84; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]85; AVX1-SLOW-NEXT: vaddps %xmm2, %xmm1, %xmm186; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]87; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm188; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm089; AVX1-SLOW-NEXT: retq90;91; AVX1-FAST-LABEL: test_v4f32:92; AVX1-FAST: # %bb.0:93; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm1, %xmm194; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm1, %xmm195; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm096; AVX1-FAST-NEXT: retq97;98; AVX2-LABEL: test_v4f32:99; AVX2: # %bb.0:100; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]101; AVX2-NEXT: vaddps %xmm2, %xmm1, %xmm1102; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]103; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1104; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0105; AVX2-NEXT: retq106;107; AVX512-LABEL: test_v4f32:108; AVX512: # %bb.0:109; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]110; AVX512-NEXT: vaddps %xmm2, %xmm1, %xmm1111; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]112; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1113; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0114; AVX512-NEXT: retq115 %1 = call fast float @llvm.vector.reduce.fadd.f32.v4f32(float %a0, <4 x float> %a1)116 ret float %1117}118 119define float @test_v8f32(float %a0, <8 x float> %a1) {120; SSE2-LABEL: test_v8f32:121; SSE2: # %bb.0:122; SSE2-NEXT: addps %xmm2, %xmm1123; SSE2-NEXT: movaps %xmm1, %xmm2124; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]125; SSE2-NEXT: addps %xmm1, %xmm2126; SSE2-NEXT: movaps %xmm2, %xmm1127; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]128; SSE2-NEXT: addss %xmm2, %xmm1129; SSE2-NEXT: addss %xmm1, %xmm0130; SSE2-NEXT: retq131;132; SSE41-LABEL: test_v8f32:133; SSE41: # %bb.0:134; SSE41-NEXT: addps %xmm2, %xmm1135; SSE41-NEXT: movaps %xmm1, %xmm2136; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]137; SSE41-NEXT: addps %xmm1, %xmm2138; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]139; SSE41-NEXT: addss %xmm2, %xmm1140; SSE41-NEXT: addss %xmm1, %xmm0141; SSE41-NEXT: retq142;143; AVX1-SLOW-LABEL: test_v8f32:144; AVX1-SLOW: # %bb.0:145; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm2146; AVX1-SLOW-NEXT: vaddps %xmm2, %xmm1, %xmm1147; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]148; AVX1-SLOW-NEXT: vaddps %xmm2, %xmm1, %xmm1149; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]150; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1151; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0152; AVX1-SLOW-NEXT: vzeroupper153; AVX1-SLOW-NEXT: retq154;155; AVX1-FAST-LABEL: test_v8f32:156; AVX1-FAST: # %bb.0:157; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm2158; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm2, %xmm1159; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm1, %xmm1160; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm1, %xmm1161; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm0162; AVX1-FAST-NEXT: vzeroupper163; AVX1-FAST-NEXT: retq164;165; AVX2-LABEL: test_v8f32:166; AVX2: # %bb.0:167; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2168; AVX2-NEXT: vaddps %xmm2, %xmm1, %xmm1169; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]170; AVX2-NEXT: vaddps %xmm2, %xmm1, %xmm1171; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]172; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1173; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0174; AVX2-NEXT: vzeroupper175; AVX2-NEXT: retq176;177; AVX512-LABEL: test_v8f32:178; AVX512: # %bb.0:179; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2180; AVX512-NEXT: vaddps %xmm2, %xmm1, %xmm1181; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]182; AVX512-NEXT: vaddps %xmm2, %xmm1, %xmm1183; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]184; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1185; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0186; AVX512-NEXT: vzeroupper187; AVX512-NEXT: retq188 %1 = call fast float @llvm.vector.reduce.fadd.f32.v8f32(float %a0, <8 x float> %a1)189 ret float %1190}191 192define float @test_v16f32(float %a0, <16 x float> %a1) {193; SSE2-LABEL: test_v16f32:194; SSE2: # %bb.0:195; SSE2-NEXT: addps %xmm4, %xmm2196; SSE2-NEXT: addps %xmm3, %xmm1197; SSE2-NEXT: addps %xmm2, %xmm1198; SSE2-NEXT: movaps %xmm1, %xmm2199; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]200; SSE2-NEXT: addps %xmm1, %xmm2201; SSE2-NEXT: movaps %xmm2, %xmm1202; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]203; SSE2-NEXT: addss %xmm2, %xmm1204; SSE2-NEXT: addss %xmm1, %xmm0205; SSE2-NEXT: retq206;207; SSE41-LABEL: test_v16f32:208; SSE41: # %bb.0:209; SSE41-NEXT: addps %xmm4, %xmm2210; SSE41-NEXT: addps %xmm3, %xmm1211; SSE41-NEXT: addps %xmm2, %xmm1212; SSE41-NEXT: movaps %xmm1, %xmm2213; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]214; SSE41-NEXT: addps %xmm1, %xmm2215; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]216; SSE41-NEXT: addss %xmm2, %xmm1217; SSE41-NEXT: addss %xmm1, %xmm0218; SSE41-NEXT: retq219;220; AVX1-SLOW-LABEL: test_v16f32:221; AVX1-SLOW: # %bb.0:222; AVX1-SLOW-NEXT: vaddps %ymm2, %ymm1, %ymm1223; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm2224; AVX1-SLOW-NEXT: vaddps %xmm2, %xmm1, %xmm1225; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]226; AVX1-SLOW-NEXT: vaddps %xmm2, %xmm1, %xmm1227; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]228; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1229; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0230; AVX1-SLOW-NEXT: vzeroupper231; AVX1-SLOW-NEXT: retq232;233; AVX1-FAST-LABEL: test_v16f32:234; AVX1-FAST: # %bb.0:235; AVX1-FAST-NEXT: vaddps %ymm2, %ymm1, %ymm1236; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm2237; AVX1-FAST-NEXT: vaddps %xmm2, %xmm1, %xmm1238; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]239; AVX1-FAST-NEXT: vaddps %xmm2, %xmm1, %xmm1240; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm1, %xmm1241; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm0242; AVX1-FAST-NEXT: vzeroupper243; AVX1-FAST-NEXT: retq244;245; AVX2-LABEL: test_v16f32:246; AVX2: # %bb.0:247; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1248; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2249; AVX2-NEXT: vaddps %xmm2, %xmm1, %xmm1250; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]251; AVX2-NEXT: vaddps %xmm2, %xmm1, %xmm1252; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]253; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1254; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0255; AVX2-NEXT: vzeroupper256; AVX2-NEXT: retq257;258; AVX512-LABEL: test_v16f32:259; AVX512: # %bb.0:260; AVX512-NEXT: vextractf64x4 $1, %zmm1, %ymm2261; AVX512-NEXT: vaddps %zmm2, %zmm1, %zmm1262; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2263; AVX512-NEXT: vaddps %xmm2, %xmm1, %xmm1264; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]265; AVX512-NEXT: vaddps %xmm2, %xmm1, %xmm1266; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]267; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1268; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0269; AVX512-NEXT: vzeroupper270; AVX512-NEXT: retq271 %1 = call fast float @llvm.vector.reduce.fadd.f32.v16f32(float %a0, <16 x float> %a1)272 ret float %1273}274 275;276; vXf32 (zero)277;278 279define float @test_v2f32_zero(<2 x float> %a0) {280; SSE2-LABEL: test_v2f32_zero:281; SSE2: # %bb.0:282; SSE2-NEXT: movaps %xmm0, %xmm1283; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]284; SSE2-NEXT: addss %xmm1, %xmm0285; SSE2-NEXT: retq286;287; SSE41-LABEL: test_v2f32_zero:288; SSE41: # %bb.0:289; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]290; SSE41-NEXT: addss %xmm1, %xmm0291; SSE41-NEXT: retq292;293; AVX1-SLOW-LABEL: test_v2f32_zero:294; AVX1-SLOW: # %bb.0:295; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]296; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0297; AVX1-SLOW-NEXT: retq298;299; AVX1-FAST-LABEL: test_v2f32_zero:300; AVX1-FAST: # %bb.0:301; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0302; AVX1-FAST-NEXT: retq303;304; AVX2-LABEL: test_v2f32_zero:305; AVX2: # %bb.0:306; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]307; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0308; AVX2-NEXT: retq309;310; AVX512-LABEL: test_v2f32_zero:311; AVX512: # %bb.0:312; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]313; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0314; AVX512-NEXT: retq315 %1 = call fast float @llvm.vector.reduce.fadd.f32.v2f32(float 0.0, <2 x float> %a0)316 ret float %1317}318 319define float @test_v4f32_zero(<4 x float> %a0) {320; SSE2-LABEL: test_v4f32_zero:321; SSE2: # %bb.0:322; SSE2-NEXT: movaps %xmm0, %xmm1323; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]324; SSE2-NEXT: addps %xmm1, %xmm0325; SSE2-NEXT: movaps %xmm0, %xmm1326; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]327; SSE2-NEXT: addss %xmm1, %xmm0328; SSE2-NEXT: retq329;330; SSE41-LABEL: test_v4f32_zero:331; SSE41: # %bb.0:332; SSE41-NEXT: movaps %xmm0, %xmm1333; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]334; SSE41-NEXT: addps %xmm1, %xmm0335; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]336; SSE41-NEXT: addss %xmm1, %xmm0337; SSE41-NEXT: retq338;339; AVX1-SLOW-LABEL: test_v4f32_zero:340; AVX1-SLOW: # %bb.0:341; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]342; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0343; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]344; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0345; AVX1-SLOW-NEXT: retq346;347; AVX1-FAST-LABEL: test_v4f32_zero:348; AVX1-FAST: # %bb.0:349; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0350; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0351; AVX1-FAST-NEXT: retq352;353; AVX2-LABEL: test_v4f32_zero:354; AVX2: # %bb.0:355; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]356; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0357; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]358; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0359; AVX2-NEXT: retq360;361; AVX512-LABEL: test_v4f32_zero:362; AVX512: # %bb.0:363; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]364; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0365; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]366; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0367; AVX512-NEXT: retq368 %1 = call fast float @llvm.vector.reduce.fadd.f32.v4f32(float 0.0, <4 x float> %a0)369 ret float %1370}371 372define float @test_v8f32_zero(<8 x float> %a0) {373; SSE2-LABEL: test_v8f32_zero:374; SSE2: # %bb.0:375; SSE2-NEXT: addps %xmm1, %xmm0376; SSE2-NEXT: movaps %xmm0, %xmm1377; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]378; SSE2-NEXT: addps %xmm1, %xmm0379; SSE2-NEXT: movaps %xmm0, %xmm1380; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]381; SSE2-NEXT: addss %xmm1, %xmm0382; SSE2-NEXT: retq383;384; SSE41-LABEL: test_v8f32_zero:385; SSE41: # %bb.0:386; SSE41-NEXT: addps %xmm1, %xmm0387; SSE41-NEXT: movaps %xmm0, %xmm1388; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]389; SSE41-NEXT: addps %xmm1, %xmm0390; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]391; SSE41-NEXT: addss %xmm1, %xmm0392; SSE41-NEXT: retq393;394; AVX1-SLOW-LABEL: test_v8f32_zero:395; AVX1-SLOW: # %bb.0:396; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm1397; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0398; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]399; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0400; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]401; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0402; AVX1-SLOW-NEXT: vzeroupper403; AVX1-SLOW-NEXT: retq404;405; AVX1-FAST-LABEL: test_v8f32_zero:406; AVX1-FAST: # %bb.0:407; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1408; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm1, %xmm0409; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0410; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0411; AVX1-FAST-NEXT: vzeroupper412; AVX1-FAST-NEXT: retq413;414; AVX2-LABEL: test_v8f32_zero:415; AVX2: # %bb.0:416; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm1417; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0418; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]419; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0420; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]421; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0422; AVX2-NEXT: vzeroupper423; AVX2-NEXT: retq424;425; AVX512-LABEL: test_v8f32_zero:426; AVX512: # %bb.0:427; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1428; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0429; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]430; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0431; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]432; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0433; AVX512-NEXT: vzeroupper434; AVX512-NEXT: retq435 %1 = call fast float @llvm.vector.reduce.fadd.f32.v8f32(float 0.0, <8 x float> %a0)436 ret float %1437}438 439define float @test_v16f32_zero(<16 x float> %a0) {440; SSE2-LABEL: test_v16f32_zero:441; SSE2: # %bb.0:442; SSE2-NEXT: addps %xmm3, %xmm1443; SSE2-NEXT: addps %xmm2, %xmm0444; SSE2-NEXT: addps %xmm1, %xmm0445; SSE2-NEXT: movaps %xmm0, %xmm1446; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]447; SSE2-NEXT: addps %xmm1, %xmm0448; SSE2-NEXT: movaps %xmm0, %xmm1449; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]450; SSE2-NEXT: addss %xmm1, %xmm0451; SSE2-NEXT: retq452;453; SSE41-LABEL: test_v16f32_zero:454; SSE41: # %bb.0:455; SSE41-NEXT: addps %xmm3, %xmm1456; SSE41-NEXT: addps %xmm2, %xmm0457; SSE41-NEXT: addps %xmm1, %xmm0458; SSE41-NEXT: movaps %xmm0, %xmm1459; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]460; SSE41-NEXT: addps %xmm1, %xmm0461; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]462; SSE41-NEXT: addss %xmm1, %xmm0463; SSE41-NEXT: retq464;465; AVX1-SLOW-LABEL: test_v16f32_zero:466; AVX1-SLOW: # %bb.0:467; AVX1-SLOW-NEXT: vaddps %ymm1, %ymm0, %ymm0468; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm1469; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0470; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]471; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0472; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]473; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0474; AVX1-SLOW-NEXT: vzeroupper475; AVX1-SLOW-NEXT: retq476;477; AVX1-FAST-LABEL: test_v16f32_zero:478; AVX1-FAST: # %bb.0:479; AVX1-FAST-NEXT: vaddps %ymm1, %ymm0, %ymm0480; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1481; AVX1-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0482; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]483; AVX1-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0484; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0485; AVX1-FAST-NEXT: vzeroupper486; AVX1-FAST-NEXT: retq487;488; AVX2-LABEL: test_v16f32_zero:489; AVX2: # %bb.0:490; AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0491; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm1492; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0493; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]494; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0495; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]496; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0497; AVX2-NEXT: vzeroupper498; AVX2-NEXT: retq499;500; AVX512-LABEL: test_v16f32_zero:501; AVX512: # %bb.0:502; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1503; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0504; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1505; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0506; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]507; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0508; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]509; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0510; AVX512-NEXT: vzeroupper511; AVX512-NEXT: retq512 %1 = call fast float @llvm.vector.reduce.fadd.f32.v16f32(float 0.0, <16 x float> %a0)513 ret float %1514}515 516;517; vXf32 (undef)518;519 520define float @test_v2f32_undef(<2 x float> %a0) {521; SSE2-LABEL: test_v2f32_undef:522; SSE2: # %bb.0:523; SSE2-NEXT: movaps %xmm0, %xmm1524; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]525; SSE2-NEXT: addss %xmm1, %xmm0526; SSE2-NEXT: retq527;528; SSE41-LABEL: test_v2f32_undef:529; SSE41: # %bb.0:530; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]531; SSE41-NEXT: addss %xmm1, %xmm0532; SSE41-NEXT: retq533;534; AVX1-SLOW-LABEL: test_v2f32_undef:535; AVX1-SLOW: # %bb.0:536; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]537; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0538; AVX1-SLOW-NEXT: retq539;540; AVX1-FAST-LABEL: test_v2f32_undef:541; AVX1-FAST: # %bb.0:542; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0543; AVX1-FAST-NEXT: retq544;545; AVX2-LABEL: test_v2f32_undef:546; AVX2: # %bb.0:547; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]548; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0549; AVX2-NEXT: retq550;551; AVX512-LABEL: test_v2f32_undef:552; AVX512: # %bb.0:553; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]554; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0555; AVX512-NEXT: retq556 %1 = call fast float @llvm.vector.reduce.fadd.f32.v2f32(float 0.0, <2 x float> %a0)557 ret float %1558}559 560define float @test_v4f32_undef(<4 x float> %a0) {561; SSE2-LABEL: test_v4f32_undef:562; SSE2: # %bb.0:563; SSE2-NEXT: movaps %xmm0, %xmm1564; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]565; SSE2-NEXT: addps %xmm1, %xmm0566; SSE2-NEXT: movaps %xmm0, %xmm1567; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]568; SSE2-NEXT: addss %xmm1, %xmm0569; SSE2-NEXT: retq570;571; SSE41-LABEL: test_v4f32_undef:572; SSE41: # %bb.0:573; SSE41-NEXT: movaps %xmm0, %xmm1574; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]575; SSE41-NEXT: addps %xmm1, %xmm0576; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]577; SSE41-NEXT: addss %xmm1, %xmm0578; SSE41-NEXT: retq579;580; AVX1-SLOW-LABEL: test_v4f32_undef:581; AVX1-SLOW: # %bb.0:582; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]583; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0584; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]585; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0586; AVX1-SLOW-NEXT: retq587;588; AVX1-FAST-LABEL: test_v4f32_undef:589; AVX1-FAST: # %bb.0:590; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0591; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0592; AVX1-FAST-NEXT: retq593;594; AVX2-LABEL: test_v4f32_undef:595; AVX2: # %bb.0:596; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]597; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0598; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]599; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0600; AVX2-NEXT: retq601;602; AVX512-LABEL: test_v4f32_undef:603; AVX512: # %bb.0:604; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]605; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0606; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]607; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0608; AVX512-NEXT: retq609 %1 = call fast float @llvm.vector.reduce.fadd.f32.v4f32(float 0.0, <4 x float> %a0)610 ret float %1611}612 613define float @test_v8f32_undef(<8 x float> %a0) {614; SSE2-LABEL: test_v8f32_undef:615; SSE2: # %bb.0:616; SSE2-NEXT: addps %xmm1, %xmm0617; SSE2-NEXT: movaps %xmm0, %xmm1618; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]619; SSE2-NEXT: addps %xmm1, %xmm0620; SSE2-NEXT: movaps %xmm0, %xmm1621; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]622; SSE2-NEXT: addss %xmm1, %xmm0623; SSE2-NEXT: retq624;625; SSE41-LABEL: test_v8f32_undef:626; SSE41: # %bb.0:627; SSE41-NEXT: addps %xmm1, %xmm0628; SSE41-NEXT: movaps %xmm0, %xmm1629; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]630; SSE41-NEXT: addps %xmm1, %xmm0631; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]632; SSE41-NEXT: addss %xmm1, %xmm0633; SSE41-NEXT: retq634;635; AVX1-SLOW-LABEL: test_v8f32_undef:636; AVX1-SLOW: # %bb.0:637; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm1638; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0639; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]640; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0641; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]642; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0643; AVX1-SLOW-NEXT: vzeroupper644; AVX1-SLOW-NEXT: retq645;646; AVX1-FAST-LABEL: test_v8f32_undef:647; AVX1-FAST: # %bb.0:648; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1649; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm1, %xmm0650; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0651; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0652; AVX1-FAST-NEXT: vzeroupper653; AVX1-FAST-NEXT: retq654;655; AVX2-LABEL: test_v8f32_undef:656; AVX2: # %bb.0:657; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm1658; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0659; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]660; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0661; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]662; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0663; AVX2-NEXT: vzeroupper664; AVX2-NEXT: retq665;666; AVX512-LABEL: test_v8f32_undef:667; AVX512: # %bb.0:668; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1669; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0670; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]671; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0672; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]673; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0674; AVX512-NEXT: vzeroupper675; AVX512-NEXT: retq676 %1 = call fast float @llvm.vector.reduce.fadd.f32.v8f32(float 0.0, <8 x float> %a0)677 ret float %1678}679 680define float @test_v16f32_undef(<16 x float> %a0) {681; SSE2-LABEL: test_v16f32_undef:682; SSE2: # %bb.0:683; SSE2-NEXT: addps %xmm3, %xmm1684; SSE2-NEXT: addps %xmm2, %xmm0685; SSE2-NEXT: addps %xmm1, %xmm0686; SSE2-NEXT: movaps %xmm0, %xmm1687; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]688; SSE2-NEXT: addps %xmm1, %xmm0689; SSE2-NEXT: movaps %xmm0, %xmm1690; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]691; SSE2-NEXT: addss %xmm1, %xmm0692; SSE2-NEXT: retq693;694; SSE41-LABEL: test_v16f32_undef:695; SSE41: # %bb.0:696; SSE41-NEXT: addps %xmm3, %xmm1697; SSE41-NEXT: addps %xmm2, %xmm0698; SSE41-NEXT: addps %xmm1, %xmm0699; SSE41-NEXT: movaps %xmm0, %xmm1700; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]701; SSE41-NEXT: addps %xmm1, %xmm0702; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]703; SSE41-NEXT: addss %xmm1, %xmm0704; SSE41-NEXT: retq705;706; AVX1-SLOW-LABEL: test_v16f32_undef:707; AVX1-SLOW: # %bb.0:708; AVX1-SLOW-NEXT: vaddps %ymm1, %ymm0, %ymm0709; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm1710; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0711; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]712; AVX1-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0713; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]714; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0715; AVX1-SLOW-NEXT: vzeroupper716; AVX1-SLOW-NEXT: retq717;718; AVX1-FAST-LABEL: test_v16f32_undef:719; AVX1-FAST: # %bb.0:720; AVX1-FAST-NEXT: vaddps %ymm1, %ymm0, %ymm0721; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1722; AVX1-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0723; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]724; AVX1-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0725; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0726; AVX1-FAST-NEXT: vzeroupper727; AVX1-FAST-NEXT: retq728;729; AVX2-LABEL: test_v16f32_undef:730; AVX2: # %bb.0:731; AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0732; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm1733; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0734; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]735; AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0736; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]737; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0738; AVX2-NEXT: vzeroupper739; AVX2-NEXT: retq740;741; AVX512-LABEL: test_v16f32_undef:742; AVX512: # %bb.0:743; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1744; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0745; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1746; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0747; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]748; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0749; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]750; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0751; AVX512-NEXT: vzeroupper752; AVX512-NEXT: retq753 %1 = call fast float @llvm.vector.reduce.fadd.f32.v16f32(float 0.0, <16 x float> %a0)754 ret float %1755}756 757;758; vXf64 (accum)759;760 761define double @test_v2f64(double %a0, <2 x double> %a1) {762; SSE-LABEL: test_v2f64:763; SSE: # %bb.0:764; SSE-NEXT: movapd %xmm1, %xmm2765; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]766; SSE-NEXT: addsd %xmm1, %xmm2767; SSE-NEXT: addsd %xmm2, %xmm0768; SSE-NEXT: retq769;770; AVX1-SLOW-LABEL: test_v2f64:771; AVX1-SLOW: # %bb.0:772; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]773; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm1, %xmm1774; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm0775; AVX1-SLOW-NEXT: retq776;777; AVX1-FAST-LABEL: test_v2f64:778; AVX1-FAST: # %bb.0:779; AVX1-FAST-NEXT: vhaddpd %xmm1, %xmm1, %xmm1780; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm0781; AVX1-FAST-NEXT: retq782;783; AVX2-LABEL: test_v2f64:784; AVX2: # %bb.0:785; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]786; AVX2-NEXT: vaddsd %xmm2, %xmm1, %xmm1787; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm0788; AVX2-NEXT: retq789;790; AVX512-LABEL: test_v2f64:791; AVX512: # %bb.0:792; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]793; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm1794; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm0795; AVX512-NEXT: retq796 %1 = call fast double @llvm.vector.reduce.fadd.f64.v2f64(double %a0, <2 x double> %a1)797 ret double %1798}799 800define double @test_v4f64(double %a0, <4 x double> %a1) {801; SSE-LABEL: test_v4f64:802; SSE: # %bb.0:803; SSE-NEXT: addpd %xmm2, %xmm1804; SSE-NEXT: movapd %xmm1, %xmm2805; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]806; SSE-NEXT: addsd %xmm1, %xmm2807; SSE-NEXT: addsd %xmm2, %xmm0808; SSE-NEXT: retq809;810; AVX1-SLOW-LABEL: test_v4f64:811; AVX1-SLOW: # %bb.0:812; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm2813; AVX1-SLOW-NEXT: vaddpd %xmm2, %xmm1, %xmm1814; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]815; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm1, %xmm1816; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm0817; AVX1-SLOW-NEXT: vzeroupper818; AVX1-SLOW-NEXT: retq819;820; AVX1-FAST-LABEL: test_v4f64:821; AVX1-FAST: # %bb.0:822; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm2823; AVX1-FAST-NEXT: vhaddpd %xmm1, %xmm2, %xmm1824; AVX1-FAST-NEXT: vhaddpd %xmm1, %xmm1, %xmm1825; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm0826; AVX1-FAST-NEXT: vzeroupper827; AVX1-FAST-NEXT: retq828;829; AVX2-LABEL: test_v4f64:830; AVX2: # %bb.0:831; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2832; AVX2-NEXT: vaddpd %xmm2, %xmm1, %xmm1833; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]834; AVX2-NEXT: vaddsd %xmm2, %xmm1, %xmm1835; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm0836; AVX2-NEXT: vzeroupper837; AVX2-NEXT: retq838;839; AVX512-LABEL: test_v4f64:840; AVX512: # %bb.0:841; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2842; AVX512-NEXT: vaddpd %xmm2, %xmm1, %xmm1843; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]844; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm1845; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm0846; AVX512-NEXT: vzeroupper847; AVX512-NEXT: retq848 %1 = call fast double @llvm.vector.reduce.fadd.f64.v4f64(double %a0, <4 x double> %a1)849 ret double %1850}851 852define double @test_v8f64(double %a0, <8 x double> %a1) {853; SSE-LABEL: test_v8f64:854; SSE: # %bb.0:855; SSE-NEXT: addpd %xmm4, %xmm2856; SSE-NEXT: addpd %xmm3, %xmm1857; SSE-NEXT: addpd %xmm2, %xmm1858; SSE-NEXT: movapd %xmm1, %xmm2859; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]860; SSE-NEXT: addsd %xmm1, %xmm2861; SSE-NEXT: addsd %xmm2, %xmm0862; SSE-NEXT: retq863;864; AVX1-SLOW-LABEL: test_v8f64:865; AVX1-SLOW: # %bb.0:866; AVX1-SLOW-NEXT: vaddpd %ymm2, %ymm1, %ymm1867; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm2868; AVX1-SLOW-NEXT: vaddpd %xmm2, %xmm1, %xmm1869; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]870; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm1, %xmm1871; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm0872; AVX1-SLOW-NEXT: vzeroupper873; AVX1-SLOW-NEXT: retq874;875; AVX1-FAST-LABEL: test_v8f64:876; AVX1-FAST: # %bb.0:877; AVX1-FAST-NEXT: vaddpd %ymm2, %ymm1, %ymm1878; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm2879; AVX1-FAST-NEXT: vaddpd %xmm2, %xmm1, %xmm1880; AVX1-FAST-NEXT: vhaddpd %xmm1, %xmm1, %xmm1881; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm0882; AVX1-FAST-NEXT: vzeroupper883; AVX1-FAST-NEXT: retq884;885; AVX2-LABEL: test_v8f64:886; AVX2: # %bb.0:887; AVX2-NEXT: vaddpd %ymm2, %ymm1, %ymm1888; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2889; AVX2-NEXT: vaddpd %xmm2, %xmm1, %xmm1890; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]891; AVX2-NEXT: vaddsd %xmm2, %xmm1, %xmm1892; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm0893; AVX2-NEXT: vzeroupper894; AVX2-NEXT: retq895;896; AVX512-LABEL: test_v8f64:897; AVX512: # %bb.0:898; AVX512-NEXT: vextractf64x4 $1, %zmm1, %ymm2899; AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1900; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2901; AVX512-NEXT: vaddpd %xmm2, %xmm1, %xmm1902; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]903; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm1904; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm0905; AVX512-NEXT: vzeroupper906; AVX512-NEXT: retq907 %1 = call fast double @llvm.vector.reduce.fadd.f64.v8f64(double %a0, <8 x double> %a1)908 ret double %1909}910 911define double @test_v16f64(double %a0, <16 x double> %a1) {912; SSE-LABEL: test_v16f64:913; SSE: # %bb.0:914; SSE-NEXT: addpd %xmm6, %xmm2915; SSE-NEXT: addpd %xmm7, %xmm3916; SSE-NEXT: addpd %xmm5, %xmm1917; SSE-NEXT: addpd {{[0-9]+}}(%rsp), %xmm4918; SSE-NEXT: addpd %xmm3, %xmm1919; SSE-NEXT: addpd %xmm2, %xmm4920; SSE-NEXT: addpd %xmm1, %xmm4921; SSE-NEXT: movapd %xmm4, %xmm1922; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]923; SSE-NEXT: addsd %xmm4, %xmm1924; SSE-NEXT: addsd %xmm1, %xmm0925; SSE-NEXT: retq926;927; AVX1-SLOW-LABEL: test_v16f64:928; AVX1-SLOW: # %bb.0:929; AVX1-SLOW-NEXT: vaddpd %ymm4, %ymm2, %ymm2930; AVX1-SLOW-NEXT: vaddpd %ymm3, %ymm1, %ymm1931; AVX1-SLOW-NEXT: vaddpd %ymm2, %ymm1, %ymm1932; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm2933; AVX1-SLOW-NEXT: vaddpd %xmm2, %xmm1, %xmm1934; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]935; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm1, %xmm1936; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm0937; AVX1-SLOW-NEXT: vzeroupper938; AVX1-SLOW-NEXT: retq939;940; AVX1-FAST-LABEL: test_v16f64:941; AVX1-FAST: # %bb.0:942; AVX1-FAST-NEXT: vaddpd %ymm4, %ymm2, %ymm2943; AVX1-FAST-NEXT: vaddpd %ymm3, %ymm1, %ymm1944; AVX1-FAST-NEXT: vaddpd %ymm2, %ymm1, %ymm1945; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm2946; AVX1-FAST-NEXT: vaddpd %xmm2, %xmm1, %xmm1947; AVX1-FAST-NEXT: vhaddpd %xmm1, %xmm1, %xmm1948; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm0949; AVX1-FAST-NEXT: vzeroupper950; AVX1-FAST-NEXT: retq951;952; AVX2-LABEL: test_v16f64:953; AVX2: # %bb.0:954; AVX2-NEXT: vaddpd %ymm4, %ymm2, %ymm2955; AVX2-NEXT: vaddpd %ymm3, %ymm1, %ymm1956; AVX2-NEXT: vaddpd %ymm2, %ymm1, %ymm1957; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2958; AVX2-NEXT: vaddpd %xmm2, %xmm1, %xmm1959; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]960; AVX2-NEXT: vaddsd %xmm2, %xmm1, %xmm1961; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm0962; AVX2-NEXT: vzeroupper963; AVX2-NEXT: retq964;965; AVX512-LABEL: test_v16f64:966; AVX512: # %bb.0:967; AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1968; AVX512-NEXT: vextractf64x4 $1, %zmm1, %ymm2969; AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1970; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2971; AVX512-NEXT: vaddpd %xmm2, %xmm1, %xmm1972; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]973; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm1974; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm0975; AVX512-NEXT: vzeroupper976; AVX512-NEXT: retq977 %1 = call fast double @llvm.vector.reduce.fadd.f64.v16f64(double %a0, <16 x double> %a1)978 ret double %1979}980 981;982; vXf64 (zero)983;984 985define double @test_v2f64_zero(<2 x double> %a0) {986; SSE-LABEL: test_v2f64_zero:987; SSE: # %bb.0:988; SSE-NEXT: movapd %xmm0, %xmm1989; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]990; SSE-NEXT: addsd %xmm1, %xmm0991; SSE-NEXT: retq992;993; AVX1-SLOW-LABEL: test_v2f64_zero:994; AVX1-SLOW: # %bb.0:995; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]996; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm0997; AVX1-SLOW-NEXT: retq998;999; AVX1-FAST-LABEL: test_v2f64_zero:1000; AVX1-FAST: # %bb.0:1001; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01002; AVX1-FAST-NEXT: retq1003;1004; AVX2-LABEL: test_v2f64_zero:1005; AVX2: # %bb.0:1006; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1007; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01008; AVX2-NEXT: retq1009;1010; AVX512-LABEL: test_v2f64_zero:1011; AVX512: # %bb.0:1012; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1013; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01014; AVX512-NEXT: retq1015 %1 = call fast double @llvm.vector.reduce.fadd.f64.v2f64(double 0.0, <2 x double> %a0)1016 ret double %11017}1018 1019define double @test_v4f64_zero(<4 x double> %a0) {1020; SSE-LABEL: test_v4f64_zero:1021; SSE: # %bb.0:1022; SSE-NEXT: addpd %xmm1, %xmm01023; SSE-NEXT: movapd %xmm0, %xmm11024; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1025; SSE-NEXT: addsd %xmm1, %xmm01026; SSE-NEXT: retq1027;1028; AVX1-SLOW-LABEL: test_v4f64_zero:1029; AVX1-SLOW: # %bb.0:1030; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm11031; AVX1-SLOW-NEXT: vaddpd %xmm1, %xmm0, %xmm01032; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1033; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01034; AVX1-SLOW-NEXT: vzeroupper1035; AVX1-SLOW-NEXT: retq1036;1037; AVX1-FAST-LABEL: test_v4f64_zero:1038; AVX1-FAST: # %bb.0:1039; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm11040; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm1, %xmm01041; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01042; AVX1-FAST-NEXT: vzeroupper1043; AVX1-FAST-NEXT: retq1044;1045; AVX2-LABEL: test_v4f64_zero:1046; AVX2: # %bb.0:1047; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm11048; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm01049; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1050; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01051; AVX2-NEXT: vzeroupper1052; AVX2-NEXT: retq1053;1054; AVX512-LABEL: test_v4f64_zero:1055; AVX512: # %bb.0:1056; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm11057; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm01058; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1059; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01060; AVX512-NEXT: vzeroupper1061; AVX512-NEXT: retq1062 %1 = call fast double @llvm.vector.reduce.fadd.f64.v4f64(double 0.0, <4 x double> %a0)1063 ret double %11064}1065 1066define double @test_v8f64_zero(<8 x double> %a0) {1067; SSE-LABEL: test_v8f64_zero:1068; SSE: # %bb.0:1069; SSE-NEXT: addpd %xmm3, %xmm11070; SSE-NEXT: addpd %xmm2, %xmm01071; SSE-NEXT: addpd %xmm1, %xmm01072; SSE-NEXT: movapd %xmm0, %xmm11073; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1074; SSE-NEXT: addsd %xmm1, %xmm01075; SSE-NEXT: retq1076;1077; AVX1-SLOW-LABEL: test_v8f64_zero:1078; AVX1-SLOW: # %bb.0:1079; AVX1-SLOW-NEXT: vaddpd %ymm1, %ymm0, %ymm01080; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm11081; AVX1-SLOW-NEXT: vaddpd %xmm1, %xmm0, %xmm01082; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1083; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01084; AVX1-SLOW-NEXT: vzeroupper1085; AVX1-SLOW-NEXT: retq1086;1087; AVX1-FAST-LABEL: test_v8f64_zero:1088; AVX1-FAST: # %bb.0:1089; AVX1-FAST-NEXT: vaddpd %ymm1, %ymm0, %ymm01090; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm11091; AVX1-FAST-NEXT: vaddpd %xmm1, %xmm0, %xmm01092; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01093; AVX1-FAST-NEXT: vzeroupper1094; AVX1-FAST-NEXT: retq1095;1096; AVX2-LABEL: test_v8f64_zero:1097; AVX2: # %bb.0:1098; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm01099; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm11100; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm01101; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1102; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01103; AVX2-NEXT: vzeroupper1104; AVX2-NEXT: retq1105;1106; AVX512-LABEL: test_v8f64_zero:1107; AVX512: # %bb.0:1108; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm11109; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm01110; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm11111; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm01112; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1113; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01114; AVX512-NEXT: vzeroupper1115; AVX512-NEXT: retq1116 %1 = call fast double @llvm.vector.reduce.fadd.f64.v8f64(double 0.0, <8 x double> %a0)1117 ret double %11118}1119 1120define double @test_v16f64_zero(<16 x double> %a0) {1121; SSE-LABEL: test_v16f64_zero:1122; SSE: # %bb.0:1123; SSE-NEXT: addpd %xmm6, %xmm21124; SSE-NEXT: addpd %xmm4, %xmm01125; SSE-NEXT: addpd %xmm2, %xmm01126; SSE-NEXT: addpd %xmm7, %xmm31127; SSE-NEXT: addpd %xmm5, %xmm11128; SSE-NEXT: addpd %xmm3, %xmm11129; SSE-NEXT: addpd %xmm1, %xmm01130; SSE-NEXT: movapd %xmm0, %xmm11131; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1132; SSE-NEXT: addsd %xmm1, %xmm01133; SSE-NEXT: retq1134;1135; AVX1-SLOW-LABEL: test_v16f64_zero:1136; AVX1-SLOW: # %bb.0:1137; AVX1-SLOW-NEXT: vaddpd %ymm3, %ymm1, %ymm11138; AVX1-SLOW-NEXT: vaddpd %ymm2, %ymm0, %ymm01139; AVX1-SLOW-NEXT: vaddpd %ymm1, %ymm0, %ymm01140; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm11141; AVX1-SLOW-NEXT: vaddpd %xmm1, %xmm0, %xmm01142; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1143; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01144; AVX1-SLOW-NEXT: vzeroupper1145; AVX1-SLOW-NEXT: retq1146;1147; AVX1-FAST-LABEL: test_v16f64_zero:1148; AVX1-FAST: # %bb.0:1149; AVX1-FAST-NEXT: vaddpd %ymm3, %ymm1, %ymm11150; AVX1-FAST-NEXT: vaddpd %ymm2, %ymm0, %ymm01151; AVX1-FAST-NEXT: vaddpd %ymm1, %ymm0, %ymm01152; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm11153; AVX1-FAST-NEXT: vaddpd %xmm1, %xmm0, %xmm01154; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01155; AVX1-FAST-NEXT: vzeroupper1156; AVX1-FAST-NEXT: retq1157;1158; AVX2-LABEL: test_v16f64_zero:1159; AVX2: # %bb.0:1160; AVX2-NEXT: vaddpd %ymm3, %ymm1, %ymm11161; AVX2-NEXT: vaddpd %ymm2, %ymm0, %ymm01162; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm01163; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm11164; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm01165; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1166; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01167; AVX2-NEXT: vzeroupper1168; AVX2-NEXT: retq1169;1170; AVX512-LABEL: test_v16f64_zero:1171; AVX512: # %bb.0:1172; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm01173; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm11174; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm01175; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm11176; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm01177; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1178; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01179; AVX512-NEXT: vzeroupper1180; AVX512-NEXT: retq1181 %1 = call fast double @llvm.vector.reduce.fadd.f64.v16f64(double 0.0, <16 x double> %a0)1182 ret double %11183}1184 1185;1186; vXf64 (undef)1187;1188 1189define double @test_v2f64_undef(<2 x double> %a0) {1190; SSE-LABEL: test_v2f64_undef:1191; SSE: # %bb.0:1192; SSE-NEXT: movapd %xmm0, %xmm11193; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1194; SSE-NEXT: addsd %xmm1, %xmm01195; SSE-NEXT: retq1196;1197; AVX1-SLOW-LABEL: test_v2f64_undef:1198; AVX1-SLOW: # %bb.0:1199; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1200; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01201; AVX1-SLOW-NEXT: retq1202;1203; AVX1-FAST-LABEL: test_v2f64_undef:1204; AVX1-FAST: # %bb.0:1205; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01206; AVX1-FAST-NEXT: retq1207;1208; AVX2-LABEL: test_v2f64_undef:1209; AVX2: # %bb.0:1210; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1211; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01212; AVX2-NEXT: retq1213;1214; AVX512-LABEL: test_v2f64_undef:1215; AVX512: # %bb.0:1216; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1217; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01218; AVX512-NEXT: retq1219 %1 = call fast double @llvm.vector.reduce.fadd.f64.v2f64(double 0.0, <2 x double> %a0)1220 ret double %11221}1222 1223define double @test_v4f64_undef(<4 x double> %a0) {1224; SSE-LABEL: test_v4f64_undef:1225; SSE: # %bb.0:1226; SSE-NEXT: addpd %xmm1, %xmm01227; SSE-NEXT: movapd %xmm0, %xmm11228; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1229; SSE-NEXT: addsd %xmm1, %xmm01230; SSE-NEXT: retq1231;1232; AVX1-SLOW-LABEL: test_v4f64_undef:1233; AVX1-SLOW: # %bb.0:1234; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm11235; AVX1-SLOW-NEXT: vaddpd %xmm1, %xmm0, %xmm01236; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1237; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01238; AVX1-SLOW-NEXT: vzeroupper1239; AVX1-SLOW-NEXT: retq1240;1241; AVX1-FAST-LABEL: test_v4f64_undef:1242; AVX1-FAST: # %bb.0:1243; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm11244; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm1, %xmm01245; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01246; AVX1-FAST-NEXT: vzeroupper1247; AVX1-FAST-NEXT: retq1248;1249; AVX2-LABEL: test_v4f64_undef:1250; AVX2: # %bb.0:1251; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm11252; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm01253; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1254; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01255; AVX2-NEXT: vzeroupper1256; AVX2-NEXT: retq1257;1258; AVX512-LABEL: test_v4f64_undef:1259; AVX512: # %bb.0:1260; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm11261; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm01262; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1263; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01264; AVX512-NEXT: vzeroupper1265; AVX512-NEXT: retq1266 %1 = call fast double @llvm.vector.reduce.fadd.f64.v4f64(double 0.0, <4 x double> %a0)1267 ret double %11268}1269 1270define double @test_v8f64_undef(<8 x double> %a0) {1271; SSE-LABEL: test_v8f64_undef:1272; SSE: # %bb.0:1273; SSE-NEXT: addpd %xmm3, %xmm11274; SSE-NEXT: addpd %xmm2, %xmm01275; SSE-NEXT: addpd %xmm1, %xmm01276; SSE-NEXT: movapd %xmm0, %xmm11277; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1278; SSE-NEXT: addsd %xmm1, %xmm01279; SSE-NEXT: retq1280;1281; AVX1-SLOW-LABEL: test_v8f64_undef:1282; AVX1-SLOW: # %bb.0:1283; AVX1-SLOW-NEXT: vaddpd %ymm1, %ymm0, %ymm01284; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm11285; AVX1-SLOW-NEXT: vaddpd %xmm1, %xmm0, %xmm01286; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1287; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01288; AVX1-SLOW-NEXT: vzeroupper1289; AVX1-SLOW-NEXT: retq1290;1291; AVX1-FAST-LABEL: test_v8f64_undef:1292; AVX1-FAST: # %bb.0:1293; AVX1-FAST-NEXT: vaddpd %ymm1, %ymm0, %ymm01294; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm11295; AVX1-FAST-NEXT: vaddpd %xmm1, %xmm0, %xmm01296; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01297; AVX1-FAST-NEXT: vzeroupper1298; AVX1-FAST-NEXT: retq1299;1300; AVX2-LABEL: test_v8f64_undef:1301; AVX2: # %bb.0:1302; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm01303; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm11304; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm01305; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1306; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01307; AVX2-NEXT: vzeroupper1308; AVX2-NEXT: retq1309;1310; AVX512-LABEL: test_v8f64_undef:1311; AVX512: # %bb.0:1312; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm11313; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm01314; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm11315; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm01316; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1317; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01318; AVX512-NEXT: vzeroupper1319; AVX512-NEXT: retq1320 %1 = call fast double @llvm.vector.reduce.fadd.f64.v8f64(double 0.0, <8 x double> %a0)1321 ret double %11322}1323 1324define double @test_v16f64_undef(<16 x double> %a0) {1325; SSE-LABEL: test_v16f64_undef:1326; SSE: # %bb.0:1327; SSE-NEXT: addpd %xmm6, %xmm21328; SSE-NEXT: addpd %xmm4, %xmm01329; SSE-NEXT: addpd %xmm2, %xmm01330; SSE-NEXT: addpd %xmm7, %xmm31331; SSE-NEXT: addpd %xmm5, %xmm11332; SSE-NEXT: addpd %xmm3, %xmm11333; SSE-NEXT: addpd %xmm1, %xmm01334; SSE-NEXT: movapd %xmm0, %xmm11335; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1336; SSE-NEXT: addsd %xmm1, %xmm01337; SSE-NEXT: retq1338;1339; AVX1-SLOW-LABEL: test_v16f64_undef:1340; AVX1-SLOW: # %bb.0:1341; AVX1-SLOW-NEXT: vaddpd %ymm3, %ymm1, %ymm11342; AVX1-SLOW-NEXT: vaddpd %ymm2, %ymm0, %ymm01343; AVX1-SLOW-NEXT: vaddpd %ymm1, %ymm0, %ymm01344; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm11345; AVX1-SLOW-NEXT: vaddpd %xmm1, %xmm0, %xmm01346; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1347; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01348; AVX1-SLOW-NEXT: vzeroupper1349; AVX1-SLOW-NEXT: retq1350;1351; AVX1-FAST-LABEL: test_v16f64_undef:1352; AVX1-FAST: # %bb.0:1353; AVX1-FAST-NEXT: vaddpd %ymm3, %ymm1, %ymm11354; AVX1-FAST-NEXT: vaddpd %ymm2, %ymm0, %ymm01355; AVX1-FAST-NEXT: vaddpd %ymm1, %ymm0, %ymm01356; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm11357; AVX1-FAST-NEXT: vaddpd %xmm1, %xmm0, %xmm01358; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01359; AVX1-FAST-NEXT: vzeroupper1360; AVX1-FAST-NEXT: retq1361;1362; AVX2-LABEL: test_v16f64_undef:1363; AVX2: # %bb.0:1364; AVX2-NEXT: vaddpd %ymm3, %ymm1, %ymm11365; AVX2-NEXT: vaddpd %ymm2, %ymm0, %ymm01366; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm01367; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm11368; AVX2-NEXT: vaddpd %xmm1, %xmm0, %xmm01369; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1370; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01371; AVX2-NEXT: vzeroupper1372; AVX2-NEXT: retq1373;1374; AVX512-LABEL: test_v16f64_undef:1375; AVX512: # %bb.0:1376; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm01377; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm11378; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm01379; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm11380; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm01381; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1382; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01383; AVX512-NEXT: vzeroupper1384; AVX512-NEXT: retq1385 %1 = call fast double @llvm.vector.reduce.fadd.f64.v16f64(double 0.0, <16 x double> %a0)1386 ret double %11387}1388 1389declare float @llvm.vector.reduce.fadd.f32.v2f32(float, <2 x float>)1390declare float @llvm.vector.reduce.fadd.f32.v4f32(float, <4 x float>)1391declare float @llvm.vector.reduce.fadd.f32.v8f32(float, <8 x float>)1392declare float @llvm.vector.reduce.fadd.f32.v16f32(float, <16 x float>)1393 1394declare double @llvm.vector.reduce.fadd.f64.v2f64(double, <2 x double>)1395declare double @llvm.vector.reduce.fadd.f64.v4f64(double, <4 x double>)1396declare double @llvm.vector.reduce.fadd.f64.v8f64(double, <8 x double>)1397declare double @llvm.vector.reduce.fadd.f64.v16f64(double, <16 x double>)1398