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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1-SLOW5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fast-hops | FileCheck %s --check-prefixes=AVX,AVX1-FAST6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX27; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX5128; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX5129 10;11; vXf32 (accum)12;13 14define float @test_v2f32(float %a0, <2 x float> %a1) {15; SSE2-LABEL: test_v2f32:16; SSE2: # %bb.0:17; SSE2-NEXT: addss %xmm1, %xmm018; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]19; SSE2-NEXT: addss %xmm1, %xmm020; SSE2-NEXT: retq21;22; SSE41-LABEL: test_v2f32:23; SSE41: # %bb.0:24; SSE41-NEXT: addss %xmm1, %xmm025; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]26; SSE41-NEXT: addss %xmm1, %xmm027; SSE41-NEXT: retq28;29; AVX-LABEL: test_v2f32:30; AVX: # %bb.0:31; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm032; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]33; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm034; AVX-NEXT: retq35;36; AVX512-LABEL: test_v2f32:37; AVX512: # %bb.0:38; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm039; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]40; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm041; AVX512-NEXT: retq42 %1 = call float @llvm.vector.reduce.fadd.f32.v2f32(float %a0, <2 x float> %a1)43 ret float %144}45 46define float @test_v4f32(float %a0, <4 x float> %a1) {47; SSE2-LABEL: test_v4f32:48; SSE2: # %bb.0:49; SSE2-NEXT: addss %xmm1, %xmm050; SSE2-NEXT: movaps %xmm1, %xmm251; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]52; SSE2-NEXT: addss %xmm2, %xmm053; SSE2-NEXT: movaps %xmm1, %xmm254; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]55; SSE2-NEXT: addss %xmm2, %xmm056; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]57; SSE2-NEXT: addss %xmm1, %xmm058; SSE2-NEXT: retq59;60; SSE41-LABEL: test_v4f32:61; SSE41: # %bb.0:62; SSE41-NEXT: addss %xmm1, %xmm063; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]64; SSE41-NEXT: addss %xmm2, %xmm065; SSE41-NEXT: movaps %xmm1, %xmm266; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]67; SSE41-NEXT: addss %xmm2, %xmm068; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]69; SSE41-NEXT: addss %xmm1, %xmm070; SSE41-NEXT: retq71;72; AVX-LABEL: test_v4f32:73; AVX: # %bb.0:74; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm075; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]76; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm077; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]78; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm079; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]80; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm081; AVX-NEXT: retq82;83; AVX512-LABEL: test_v4f32:84; AVX512: # %bb.0:85; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm086; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]87; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm088; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]89; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm090; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]91; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm092; AVX512-NEXT: retq93 %1 = call float @llvm.vector.reduce.fadd.f32.v4f32(float %a0, <4 x float> %a1)94 ret float %195}96 97define float @test_v8f32(float %a0, <8 x float> %a1) {98; SSE2-LABEL: test_v8f32:99; SSE2: # %bb.0:100; SSE2-NEXT: addss %xmm1, %xmm0101; SSE2-NEXT: movaps %xmm1, %xmm3102; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[1,1]103; SSE2-NEXT: addss %xmm3, %xmm0104; SSE2-NEXT: movaps %xmm1, %xmm3105; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]106; SSE2-NEXT: addss %xmm3, %xmm0107; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]108; SSE2-NEXT: addss %xmm1, %xmm0109; SSE2-NEXT: addss %xmm2, %xmm0110; SSE2-NEXT: movaps %xmm2, %xmm1111; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]112; SSE2-NEXT: addss %xmm1, %xmm0113; SSE2-NEXT: movaps %xmm2, %xmm1114; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]115; SSE2-NEXT: addss %xmm1, %xmm0116; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]117; SSE2-NEXT: addss %xmm2, %xmm0118; SSE2-NEXT: retq119;120; SSE41-LABEL: test_v8f32:121; SSE41: # %bb.0:122; SSE41-NEXT: addss %xmm1, %xmm0123; SSE41-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]124; SSE41-NEXT: addss %xmm3, %xmm0125; SSE41-NEXT: movaps %xmm1, %xmm3126; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]127; SSE41-NEXT: addss %xmm3, %xmm0128; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]129; SSE41-NEXT: addss %xmm1, %xmm0130; SSE41-NEXT: addss %xmm2, %xmm0131; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]132; SSE41-NEXT: addss %xmm1, %xmm0133; SSE41-NEXT: movaps %xmm2, %xmm1134; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]135; SSE41-NEXT: addss %xmm1, %xmm0136; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]137; SSE41-NEXT: addss %xmm2, %xmm0138; SSE41-NEXT: retq139;140; AVX-LABEL: test_v8f32:141; AVX: # %bb.0:142; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0143; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]144; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0145; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]146; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0147; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]148; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0149; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1150; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0151; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]152; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0153; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]154; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0155; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]156; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0157; AVX-NEXT: vzeroupper158; AVX-NEXT: retq159;160; AVX512-LABEL: test_v8f32:161; AVX512: # %bb.0:162; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0163; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]164; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0165; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]166; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0167; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]168; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0169; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm1170; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0171; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]172; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0173; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]174; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0175; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]176; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0177; AVX512-NEXT: vzeroupper178; AVX512-NEXT: retq179 %1 = call float @llvm.vector.reduce.fadd.f32.v8f32(float %a0, <8 x float> %a1)180 ret float %1181}182 183define float @test_v16f32(float %a0, <16 x float> %a1) {184; SSE2-LABEL: test_v16f32:185; SSE2: # %bb.0:186; SSE2-NEXT: addss %xmm1, %xmm0187; SSE2-NEXT: movaps %xmm1, %xmm5188; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[1,1],xmm1[1,1]189; SSE2-NEXT: addss %xmm5, %xmm0190; SSE2-NEXT: movaps %xmm1, %xmm5191; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm1[1]192; SSE2-NEXT: addss %xmm5, %xmm0193; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]194; SSE2-NEXT: addss %xmm1, %xmm0195; SSE2-NEXT: addss %xmm2, %xmm0196; SSE2-NEXT: movaps %xmm2, %xmm1197; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]198; SSE2-NEXT: addss %xmm1, %xmm0199; SSE2-NEXT: movaps %xmm2, %xmm1200; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]201; SSE2-NEXT: addss %xmm1, %xmm0202; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]203; SSE2-NEXT: addss %xmm2, %xmm0204; SSE2-NEXT: addss %xmm3, %xmm0205; SSE2-NEXT: movaps %xmm3, %xmm1206; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm3[1,1]207; SSE2-NEXT: addss %xmm1, %xmm0208; SSE2-NEXT: movaps %xmm3, %xmm1209; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]210; SSE2-NEXT: addss %xmm1, %xmm0211; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]212; SSE2-NEXT: addss %xmm3, %xmm0213; SSE2-NEXT: addss %xmm4, %xmm0214; SSE2-NEXT: movaps %xmm4, %xmm1215; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm4[1,1]216; SSE2-NEXT: addss %xmm1, %xmm0217; SSE2-NEXT: movaps %xmm4, %xmm1218; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]219; SSE2-NEXT: addss %xmm1, %xmm0220; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[3,3,3,3]221; SSE2-NEXT: addss %xmm4, %xmm0222; SSE2-NEXT: retq223;224; SSE41-LABEL: test_v16f32:225; SSE41: # %bb.0:226; SSE41-NEXT: addss %xmm1, %xmm0227; SSE41-NEXT: movshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]228; SSE41-NEXT: addss %xmm5, %xmm0229; SSE41-NEXT: movaps %xmm1, %xmm5230; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm1[1]231; SSE41-NEXT: addss %xmm5, %xmm0232; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]233; SSE41-NEXT: addss %xmm1, %xmm0234; SSE41-NEXT: addss %xmm2, %xmm0235; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]236; SSE41-NEXT: addss %xmm1, %xmm0237; SSE41-NEXT: movaps %xmm2, %xmm1238; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]239; SSE41-NEXT: addss %xmm1, %xmm0240; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]241; SSE41-NEXT: addss %xmm2, %xmm0242; SSE41-NEXT: addss %xmm3, %xmm0243; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]244; SSE41-NEXT: addss %xmm1, %xmm0245; SSE41-NEXT: movaps %xmm3, %xmm1246; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]247; SSE41-NEXT: addss %xmm1, %xmm0248; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]249; SSE41-NEXT: addss %xmm3, %xmm0250; SSE41-NEXT: addss %xmm4, %xmm0251; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm4[1,1,3,3]252; SSE41-NEXT: addss %xmm1, %xmm0253; SSE41-NEXT: movaps %xmm4, %xmm1254; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]255; SSE41-NEXT: addss %xmm1, %xmm0256; SSE41-NEXT: shufps {{.*#+}} xmm4 = xmm4[3,3,3,3]257; SSE41-NEXT: addss %xmm4, %xmm0258; SSE41-NEXT: retq259;260; AVX-LABEL: test_v16f32:261; AVX: # %bb.0:262; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0263; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]264; AVX-NEXT: vaddss %xmm3, %xmm0, %xmm0265; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]266; AVX-NEXT: vaddss %xmm3, %xmm0, %xmm0267; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm1[3,3,3,3]268; AVX-NEXT: vaddss %xmm3, %xmm0, %xmm0269; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1270; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0271; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]272; AVX-NEXT: vaddss %xmm3, %xmm0, %xmm0273; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]274; AVX-NEXT: vaddss %xmm3, %xmm0, %xmm0275; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]276; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0277; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0278; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]279; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0280; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]281; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0282; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm2[3,3,3,3]283; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0284; AVX-NEXT: vextractf128 $1, %ymm2, %xmm1285; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0286; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]287; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0288; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]289; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm0290; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]291; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0292; AVX-NEXT: vzeroupper293; AVX-NEXT: retq294;295; AVX512-LABEL: test_v16f32:296; AVX512: # %bb.0:297; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0298; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]299; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0300; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]301; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0302; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]303; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0304; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2305; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0306; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]307; AVX512-NEXT: vaddss %xmm3, %xmm0, %xmm0308; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]309; AVX512-NEXT: vaddss %xmm3, %xmm0, %xmm0310; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]311; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0312; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm2313; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0314; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]315; AVX512-NEXT: vaddss %xmm3, %xmm0, %xmm0316; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]317; AVX512-NEXT: vaddss %xmm3, %xmm0, %xmm0318; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]319; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0320; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm1321; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0322; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]323; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0324; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]325; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm0326; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]327; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0328; AVX512-NEXT: vzeroupper329; AVX512-NEXT: retq330 %1 = call float @llvm.vector.reduce.fadd.f32.v16f32(float %a0, <16 x float> %a1)331 ret float %1332}333 334;335; vXf32 (zero)336;337 338define float @test_v2f32_zero(<2 x float> %a0) {339; SSE2-LABEL: test_v2f32_zero:340; SSE2: # %bb.0:341; SSE2-NEXT: movaps %xmm0, %xmm1342; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]343; SSE2-NEXT: addss %xmm1, %xmm0344; SSE2-NEXT: retq345;346; SSE41-LABEL: test_v2f32_zero:347; SSE41: # %bb.0:348; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]349; SSE41-NEXT: addss %xmm1, %xmm0350; SSE41-NEXT: retq351;352; AVX1-SLOW-LABEL: test_v2f32_zero:353; AVX1-SLOW: # %bb.0:354; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]355; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0356; AVX1-SLOW-NEXT: retq357;358; AVX1-FAST-LABEL: test_v2f32_zero:359; AVX1-FAST: # %bb.0:360; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0361; AVX1-FAST-NEXT: retq362;363; AVX2-LABEL: test_v2f32_zero:364; AVX2: # %bb.0:365; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]366; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0367; AVX2-NEXT: retq368;369; AVX512-LABEL: test_v2f32_zero:370; AVX512: # %bb.0:371; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]372; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm0373; AVX512-NEXT: retq374 %1 = call float @llvm.vector.reduce.fadd.f32.v2f32(float -0.0, <2 x float> %a0)375 ret float %1376}377 378define float @test_v4f32_zero(<4 x float> %a0) {379; SSE2-LABEL: test_v4f32_zero:380; SSE2: # %bb.0:381; SSE2-NEXT: movaps %xmm0, %xmm1382; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]383; SSE2-NEXT: addss %xmm0, %xmm1384; SSE2-NEXT: movaps %xmm0, %xmm2385; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]386; SSE2-NEXT: addss %xmm1, %xmm2387; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]388; SSE2-NEXT: addss %xmm2, %xmm0389; SSE2-NEXT: retq390;391; SSE41-LABEL: test_v4f32_zero:392; SSE41: # %bb.0:393; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]394; SSE41-NEXT: addss %xmm0, %xmm1395; SSE41-NEXT: movaps %xmm0, %xmm2396; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]397; SSE41-NEXT: addss %xmm1, %xmm2398; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]399; SSE41-NEXT: addss %xmm2, %xmm0400; SSE41-NEXT: retq401;402; AVX1-SLOW-LABEL: test_v4f32_zero:403; AVX1-SLOW: # %bb.0:404; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]405; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm1406; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]407; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1408; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]409; AVX1-SLOW-NEXT: vaddss %xmm0, %xmm1, %xmm0410; AVX1-SLOW-NEXT: retq411;412; AVX1-FAST-LABEL: test_v4f32_zero:413; AVX1-FAST: # %bb.0:414; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm1415; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]416; AVX1-FAST-NEXT: vaddss %xmm2, %xmm1, %xmm1417; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]418; AVX1-FAST-NEXT: vaddss %xmm0, %xmm1, %xmm0419; AVX1-FAST-NEXT: retq420;421; AVX2-LABEL: test_v4f32_zero:422; AVX2: # %bb.0:423; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]424; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm1425; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]426; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1427; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]428; AVX2-NEXT: vaddss %xmm0, %xmm1, %xmm0429; AVX2-NEXT: retq430;431; AVX512-LABEL: test_v4f32_zero:432; AVX512: # %bb.0:433; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]434; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm1435; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]436; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1437; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]438; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm0439; AVX512-NEXT: retq440 %1 = call float @llvm.vector.reduce.fadd.f32.v4f32(float -0.0, <4 x float> %a0)441 ret float %1442}443 444define float @test_v8f32_zero(<8 x float> %a0) {445; SSE2-LABEL: test_v8f32_zero:446; SSE2: # %bb.0:447; SSE2-NEXT: movaps %xmm0, %xmm2448; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[1,1]449; SSE2-NEXT: addss %xmm0, %xmm2450; SSE2-NEXT: movaps %xmm0, %xmm3451; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]452; SSE2-NEXT: addss %xmm2, %xmm3453; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]454; SSE2-NEXT: addss %xmm3, %xmm0455; SSE2-NEXT: addss %xmm1, %xmm0456; SSE2-NEXT: movaps %xmm1, %xmm2457; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]458; SSE2-NEXT: addss %xmm2, %xmm0459; SSE2-NEXT: movaps %xmm1, %xmm2460; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]461; SSE2-NEXT: addss %xmm2, %xmm0462; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]463; SSE2-NEXT: addss %xmm1, %xmm0464; SSE2-NEXT: retq465;466; SSE41-LABEL: test_v8f32_zero:467; SSE41: # %bb.0:468; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]469; SSE41-NEXT: addss %xmm0, %xmm2470; SSE41-NEXT: movaps %xmm0, %xmm3471; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]472; SSE41-NEXT: addss %xmm2, %xmm3473; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]474; SSE41-NEXT: addss %xmm3, %xmm0475; SSE41-NEXT: addss %xmm1, %xmm0476; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]477; SSE41-NEXT: addss %xmm2, %xmm0478; SSE41-NEXT: movaps %xmm1, %xmm2479; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]480; SSE41-NEXT: addss %xmm2, %xmm0481; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]482; SSE41-NEXT: addss %xmm1, %xmm0483; SSE41-NEXT: retq484;485; AVX1-SLOW-LABEL: test_v8f32_zero:486; AVX1-SLOW: # %bb.0:487; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]488; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm1489; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]490; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1491; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]492; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1493; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm0494; AVX1-SLOW-NEXT: vaddss %xmm0, %xmm1, %xmm1495; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]496; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1497; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]498; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm1, %xmm1499; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]500; AVX1-SLOW-NEXT: vaddss %xmm0, %xmm1, %xmm0501; AVX1-SLOW-NEXT: vzeroupper502; AVX1-SLOW-NEXT: retq503;504; AVX1-FAST-LABEL: test_v8f32_zero:505; AVX1-FAST: # %bb.0:506; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm1507; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]508; AVX1-FAST-NEXT: vaddss %xmm2, %xmm1, %xmm1509; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]510; AVX1-FAST-NEXT: vaddss %xmm2, %xmm1, %xmm1511; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm0512; AVX1-FAST-NEXT: vaddss %xmm0, %xmm1, %xmm1513; AVX1-FAST-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]514; AVX1-FAST-NEXT: vaddss %xmm2, %xmm1, %xmm1515; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]516; AVX1-FAST-NEXT: vaddss %xmm2, %xmm1, %xmm1517; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]518; AVX1-FAST-NEXT: vaddss %xmm0, %xmm1, %xmm0519; AVX1-FAST-NEXT: vzeroupper520; AVX1-FAST-NEXT: retq521;522; AVX2-LABEL: test_v8f32_zero:523; AVX2: # %bb.0:524; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]525; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm1526; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]527; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1528; AVX2-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]529; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1530; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm0531; AVX2-NEXT: vaddss %xmm0, %xmm1, %xmm1532; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]533; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1534; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]535; AVX2-NEXT: vaddss %xmm2, %xmm1, %xmm1536; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]537; AVX2-NEXT: vaddss %xmm0, %xmm1, %xmm0538; AVX2-NEXT: vzeroupper539; AVX2-NEXT: retq540;541; AVX512-LABEL: test_v8f32_zero:542; AVX512: # %bb.0:543; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]544; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm1545; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]546; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1547; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]548; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1549; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0550; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm1551; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]552; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1553; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]554; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1555; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]556; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm0557; AVX512-NEXT: vzeroupper558; AVX512-NEXT: retq559 %1 = call float @llvm.vector.reduce.fadd.f32.v8f32(float -0.0, <8 x float> %a0)560 ret float %1561}562 563define float @test_v16f32_zero(<16 x float> %a0) {564; SSE2-LABEL: test_v16f32_zero:565; SSE2: # %bb.0:566; SSE2-NEXT: movaps %xmm0, %xmm4567; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm0[1,1]568; SSE2-NEXT: addss %xmm0, %xmm4569; SSE2-NEXT: movaps %xmm0, %xmm5570; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]571; SSE2-NEXT: addss %xmm4, %xmm5572; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]573; SSE2-NEXT: addss %xmm5, %xmm0574; SSE2-NEXT: addss %xmm1, %xmm0575; SSE2-NEXT: movaps %xmm1, %xmm4576; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm1[1,1]577; SSE2-NEXT: addss %xmm4, %xmm0578; SSE2-NEXT: movaps %xmm1, %xmm4579; SSE2-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]580; SSE2-NEXT: addss %xmm4, %xmm0581; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]582; SSE2-NEXT: addss %xmm1, %xmm0583; SSE2-NEXT: addss %xmm2, %xmm0584; SSE2-NEXT: movaps %xmm2, %xmm1585; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]586; SSE2-NEXT: addss %xmm1, %xmm0587; SSE2-NEXT: movaps %xmm2, %xmm1588; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]589; SSE2-NEXT: addss %xmm1, %xmm0590; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]591; SSE2-NEXT: addss %xmm2, %xmm0592; SSE2-NEXT: addss %xmm3, %xmm0593; SSE2-NEXT: movaps %xmm3, %xmm1594; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm3[1,1]595; SSE2-NEXT: addss %xmm1, %xmm0596; SSE2-NEXT: movaps %xmm3, %xmm1597; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]598; SSE2-NEXT: addss %xmm1, %xmm0599; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]600; SSE2-NEXT: addss %xmm3, %xmm0601; SSE2-NEXT: retq602;603; SSE41-LABEL: test_v16f32_zero:604; SSE41: # %bb.0:605; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]606; SSE41-NEXT: addss %xmm0, %xmm4607; SSE41-NEXT: movaps %xmm0, %xmm5608; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]609; SSE41-NEXT: addss %xmm4, %xmm5610; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]611; SSE41-NEXT: addss %xmm5, %xmm0612; SSE41-NEXT: addss %xmm1, %xmm0613; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]614; SSE41-NEXT: addss %xmm4, %xmm0615; SSE41-NEXT: movaps %xmm1, %xmm4616; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]617; SSE41-NEXT: addss %xmm4, %xmm0618; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]619; SSE41-NEXT: addss %xmm1, %xmm0620; SSE41-NEXT: addss %xmm2, %xmm0621; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]622; SSE41-NEXT: addss %xmm1, %xmm0623; SSE41-NEXT: movaps %xmm2, %xmm1624; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]625; SSE41-NEXT: addss %xmm1, %xmm0626; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]627; SSE41-NEXT: addss %xmm2, %xmm0628; SSE41-NEXT: addss %xmm3, %xmm0629; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]630; SSE41-NEXT: addss %xmm1, %xmm0631; SSE41-NEXT: movaps %xmm3, %xmm1632; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]633; SSE41-NEXT: addss %xmm1, %xmm0634; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]635; SSE41-NEXT: addss %xmm3, %xmm0636; SSE41-NEXT: retq637;638; AVX1-SLOW-LABEL: test_v16f32_zero:639; AVX1-SLOW: # %bb.0:640; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]641; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm2642; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]643; AVX1-SLOW-NEXT: vaddss %xmm3, %xmm2, %xmm2644; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]645; AVX1-SLOW-NEXT: vaddss %xmm3, %xmm2, %xmm2646; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm0647; AVX1-SLOW-NEXT: vaddss %xmm0, %xmm2, %xmm2648; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]649; AVX1-SLOW-NEXT: vaddss %xmm3, %xmm2, %xmm2650; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]651; AVX1-SLOW-NEXT: vaddss %xmm3, %xmm2, %xmm2652; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]653; AVX1-SLOW-NEXT: vaddss %xmm0, %xmm2, %xmm0654; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0655; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]656; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm0657; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]658; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm0659; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]660; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm0661; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm1662; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0663; AVX1-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]664; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm0665; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]666; AVX1-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm0667; AVX1-SLOW-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]668; AVX1-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0669; AVX1-SLOW-NEXT: vzeroupper670; AVX1-SLOW-NEXT: retq671;672; AVX1-FAST-LABEL: test_v16f32_zero:673; AVX1-FAST: # %bb.0:674; AVX1-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm2675; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]676; AVX1-FAST-NEXT: vaddss %xmm3, %xmm2, %xmm2677; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]678; AVX1-FAST-NEXT: vaddss %xmm3, %xmm2, %xmm2679; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm0680; AVX1-FAST-NEXT: vaddss %xmm0, %xmm2, %xmm2681; AVX1-FAST-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]682; AVX1-FAST-NEXT: vaddss %xmm3, %xmm2, %xmm2683; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]684; AVX1-FAST-NEXT: vaddss %xmm3, %xmm2, %xmm2685; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]686; AVX1-FAST-NEXT: vaddss %xmm0, %xmm2, %xmm0687; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm0688; AVX1-FAST-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]689; AVX1-FAST-NEXT: vaddss %xmm2, %xmm0, %xmm0690; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]691; AVX1-FAST-NEXT: vaddss %xmm2, %xmm0, %xmm0692; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]693; AVX1-FAST-NEXT: vaddss %xmm2, %xmm0, %xmm0694; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm1695; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm0696; AVX1-FAST-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]697; AVX1-FAST-NEXT: vaddss %xmm2, %xmm0, %xmm0698; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]699; AVX1-FAST-NEXT: vaddss %xmm2, %xmm0, %xmm0700; AVX1-FAST-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]701; AVX1-FAST-NEXT: vaddss %xmm1, %xmm0, %xmm0702; AVX1-FAST-NEXT: vzeroupper703; AVX1-FAST-NEXT: retq704;705; AVX2-LABEL: test_v16f32_zero:706; AVX2: # %bb.0:707; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]708; AVX2-NEXT: vaddss %xmm2, %xmm0, %xmm2709; AVX2-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]710; AVX2-NEXT: vaddss %xmm3, %xmm2, %xmm2711; AVX2-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]712; AVX2-NEXT: vaddss %xmm3, %xmm2, %xmm2713; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm0714; AVX2-NEXT: vaddss %xmm0, %xmm2, %xmm2715; AVX2-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]716; AVX2-NEXT: vaddss %xmm3, %xmm2, %xmm2717; AVX2-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]718; AVX2-NEXT: vaddss %xmm3, %xmm2, %xmm2719; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]720; AVX2-NEXT: vaddss %xmm0, %xmm2, %xmm0721; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0722; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]723; AVX2-NEXT: vaddss %xmm2, %xmm0, %xmm0724; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]725; AVX2-NEXT: vaddss %xmm2, %xmm0, %xmm0726; AVX2-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]727; AVX2-NEXT: vaddss %xmm2, %xmm0, %xmm0728; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm1729; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0730; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]731; AVX2-NEXT: vaddss %xmm2, %xmm0, %xmm0732; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]733; AVX2-NEXT: vaddss %xmm2, %xmm0, %xmm0734; AVX2-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]735; AVX2-NEXT: vaddss %xmm1, %xmm0, %xmm0736; AVX2-NEXT: vzeroupper737; AVX2-NEXT: retq738;739; AVX512-LABEL: test_v16f32_zero:740; AVX512: # %bb.0:741; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]742; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm1743; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]744; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1745; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]746; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1747; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm2748; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1749; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]750; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm1751; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]752; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm1753; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]754; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1755; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm2756; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1757; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]758; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm1759; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]760; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm1761; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]762; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1763; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm0764; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm1765; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]766; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1767; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]768; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1769; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]770; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm0771; AVX512-NEXT: vzeroupper772; AVX512-NEXT: retq773 %1 = call float @llvm.vector.reduce.fadd.f32.v16f32(float -0.0, <16 x float> %a0)774 ret float %1775}776 777;778; vXf32 (undef)779;780 781define float @test_v2f32_undef(<2 x float> %a0) {782; SSE2-LABEL: test_v2f32_undef:783; SSE2: # %bb.0:784; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]785; SSE2-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0786; SSE2-NEXT: retq787;788; SSE41-LABEL: test_v2f32_undef:789; SSE41: # %bb.0:790; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]791; SSE41-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0792; SSE41-NEXT: retq793;794; AVX-LABEL: test_v2f32_undef:795; AVX: # %bb.0:796; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]797; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0798; AVX-NEXT: retq799;800; AVX512-LABEL: test_v2f32_undef:801; AVX512: # %bb.0:802; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]803; AVX512-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0804; AVX512-NEXT: retq805 %1 = call float @llvm.vector.reduce.fadd.f32.v2f32(float undef, <2 x float> %a0)806 ret float %1807}808 809define float @test_v4f32_undef(<4 x float> %a0) {810; SSE2-LABEL: test_v4f32_undef:811; SSE2: # %bb.0:812; SSE2-NEXT: movaps %xmm0, %xmm1813; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]814; SSE2-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1815; SSE2-NEXT: movaps %xmm0, %xmm2816; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]817; SSE2-NEXT: addss %xmm1, %xmm2818; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]819; SSE2-NEXT: addss %xmm2, %xmm0820; SSE2-NEXT: retq821;822; SSE41-LABEL: test_v4f32_undef:823; SSE41: # %bb.0:824; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]825; SSE41-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1826; SSE41-NEXT: movaps %xmm0, %xmm2827; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]828; SSE41-NEXT: addss %xmm1, %xmm2829; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]830; SSE41-NEXT: addss %xmm2, %xmm0831; SSE41-NEXT: retq832;833; AVX-LABEL: test_v4f32_undef:834; AVX: # %bb.0:835; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]836; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1837; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]838; AVX-NEXT: vaddss %xmm2, %xmm1, %xmm1839; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]840; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0841; AVX-NEXT: retq842;843; AVX512-LABEL: test_v4f32_undef:844; AVX512: # %bb.0:845; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]846; AVX512-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1847; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]848; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1849; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]850; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm0851; AVX512-NEXT: retq852 %1 = call float @llvm.vector.reduce.fadd.f32.v4f32(float undef, <4 x float> %a0)853 ret float %1854}855 856define float @test_v8f32_undef(<8 x float> %a0) {857; SSE2-LABEL: test_v8f32_undef:858; SSE2: # %bb.0:859; SSE2-NEXT: movaps %xmm0, %xmm2860; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[1,1]861; SSE2-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2862; SSE2-NEXT: movaps %xmm0, %xmm3863; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]864; SSE2-NEXT: addss %xmm2, %xmm3865; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]866; SSE2-NEXT: addss %xmm3, %xmm0867; SSE2-NEXT: addss %xmm1, %xmm0868; SSE2-NEXT: movaps %xmm1, %xmm2869; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]870; SSE2-NEXT: addss %xmm2, %xmm0871; SSE2-NEXT: movaps %xmm1, %xmm2872; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]873; SSE2-NEXT: addss %xmm2, %xmm0874; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]875; SSE2-NEXT: addss %xmm1, %xmm0876; SSE2-NEXT: retq877;878; SSE41-LABEL: test_v8f32_undef:879; SSE41: # %bb.0:880; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]881; SSE41-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2882; SSE41-NEXT: movaps %xmm0, %xmm3883; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]884; SSE41-NEXT: addss %xmm2, %xmm3885; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]886; SSE41-NEXT: addss %xmm3, %xmm0887; SSE41-NEXT: addss %xmm1, %xmm0888; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]889; SSE41-NEXT: addss %xmm2, %xmm0890; SSE41-NEXT: movaps %xmm1, %xmm2891; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]892; SSE41-NEXT: addss %xmm2, %xmm0893; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]894; SSE41-NEXT: addss %xmm1, %xmm0895; SSE41-NEXT: retq896;897; AVX-LABEL: test_v8f32_undef:898; AVX: # %bb.0:899; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]900; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1901; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]902; AVX-NEXT: vaddss %xmm2, %xmm1, %xmm1903; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]904; AVX-NEXT: vaddss %xmm2, %xmm1, %xmm1905; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0906; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm1907; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]908; AVX-NEXT: vaddss %xmm2, %xmm1, %xmm1909; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]910; AVX-NEXT: vaddss %xmm2, %xmm1, %xmm1911; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]912; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0913; AVX-NEXT: vzeroupper914; AVX-NEXT: retq915;916; AVX512-LABEL: test_v8f32_undef:917; AVX512: # %bb.0:918; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]919; AVX512-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1920; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]921; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1922; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]923; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1924; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0925; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm1926; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]927; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1928; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]929; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm1930; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]931; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm0932; AVX512-NEXT: vzeroupper933; AVX512-NEXT: retq934 %1 = call float @llvm.vector.reduce.fadd.f32.v8f32(float undef, <8 x float> %a0)935 ret float %1936}937 938define float @test_v16f32_undef(<16 x float> %a0) {939; SSE2-LABEL: test_v16f32_undef:940; SSE2: # %bb.0:941; SSE2-NEXT: movaps %xmm0, %xmm4942; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm0[1,1]943; SSE2-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4944; SSE2-NEXT: movaps %xmm0, %xmm5945; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]946; SSE2-NEXT: addss %xmm4, %xmm5947; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]948; SSE2-NEXT: addss %xmm5, %xmm0949; SSE2-NEXT: addss %xmm1, %xmm0950; SSE2-NEXT: movaps %xmm1, %xmm4951; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm1[1,1]952; SSE2-NEXT: addss %xmm4, %xmm0953; SSE2-NEXT: movaps %xmm1, %xmm4954; SSE2-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]955; SSE2-NEXT: addss %xmm4, %xmm0956; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]957; SSE2-NEXT: addss %xmm1, %xmm0958; SSE2-NEXT: addss %xmm2, %xmm0959; SSE2-NEXT: movaps %xmm2, %xmm1960; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]961; SSE2-NEXT: addss %xmm1, %xmm0962; SSE2-NEXT: movaps %xmm2, %xmm1963; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]964; SSE2-NEXT: addss %xmm1, %xmm0965; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]966; SSE2-NEXT: addss %xmm2, %xmm0967; SSE2-NEXT: addss %xmm3, %xmm0968; SSE2-NEXT: movaps %xmm3, %xmm1969; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm3[1,1]970; SSE2-NEXT: addss %xmm1, %xmm0971; SSE2-NEXT: movaps %xmm3, %xmm1972; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]973; SSE2-NEXT: addss %xmm1, %xmm0974; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]975; SSE2-NEXT: addss %xmm3, %xmm0976; SSE2-NEXT: retq977;978; SSE41-LABEL: test_v16f32_undef:979; SSE41: # %bb.0:980; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]981; SSE41-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4982; SSE41-NEXT: movaps %xmm0, %xmm5983; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]984; SSE41-NEXT: addss %xmm4, %xmm5985; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]986; SSE41-NEXT: addss %xmm5, %xmm0987; SSE41-NEXT: addss %xmm1, %xmm0988; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]989; SSE41-NEXT: addss %xmm4, %xmm0990; SSE41-NEXT: movaps %xmm1, %xmm4991; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]992; SSE41-NEXT: addss %xmm4, %xmm0993; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]994; SSE41-NEXT: addss %xmm1, %xmm0995; SSE41-NEXT: addss %xmm2, %xmm0996; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]997; SSE41-NEXT: addss %xmm1, %xmm0998; SSE41-NEXT: movaps %xmm2, %xmm1999; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]1000; SSE41-NEXT: addss %xmm1, %xmm01001; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]1002; SSE41-NEXT: addss %xmm2, %xmm01003; SSE41-NEXT: addss %xmm3, %xmm01004; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]1005; SSE41-NEXT: addss %xmm1, %xmm01006; SSE41-NEXT: movaps %xmm3, %xmm11007; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]1008; SSE41-NEXT: addss %xmm1, %xmm01009; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]1010; SSE41-NEXT: addss %xmm3, %xmm01011; SSE41-NEXT: retq1012;1013; AVX-LABEL: test_v16f32_undef:1014; AVX: # %bb.0:1015; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]1016; AVX-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm21017; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]1018; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm21019; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]1020; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm21021; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01022; AVX-NEXT: vaddss %xmm0, %xmm2, %xmm21023; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]1024; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm21025; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]1026; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm21027; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]1028; AVX-NEXT: vaddss %xmm0, %xmm2, %xmm01029; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm01030; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]1031; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm01032; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1033; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm01034; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]1035; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm01036; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11037; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm01038; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]1039; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm01040; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1041; AVX-NEXT: vaddss %xmm2, %xmm0, %xmm01042; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]1043; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm01044; AVX-NEXT: vzeroupper1045; AVX-NEXT: retq1046;1047; AVX512-LABEL: test_v16f32_undef:1048; AVX512: # %bb.0:1049; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]1050; AVX512-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11051; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1052; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11053; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]1054; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11055; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm21056; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11057; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]1058; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm11059; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]1060; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm11061; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]1062; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11063; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm21064; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11065; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]1066; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm11067; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]1068; AVX512-NEXT: vaddss %xmm3, %xmm1, %xmm11069; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]1070; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11071; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01072; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm11073; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]1074; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11075; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1076; AVX512-NEXT: vaddss %xmm2, %xmm1, %xmm11077; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]1078; AVX512-NEXT: vaddss %xmm0, %xmm1, %xmm01079; AVX512-NEXT: vzeroupper1080; AVX512-NEXT: retq1081 %1 = call float @llvm.vector.reduce.fadd.f32.v16f32(float undef, <16 x float> %a0)1082 ret float %11083}1084 1085;1086; vXf64 (accum)1087;1088 1089define double @test_v2f64(double %a0, <2 x double> %a1) {1090; SSE-LABEL: test_v2f64:1091; SSE: # %bb.0:1092; SSE-NEXT: addsd %xmm1, %xmm01093; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1094; SSE-NEXT: addsd %xmm1, %xmm01095; SSE-NEXT: retq1096;1097; AVX-LABEL: test_v2f64:1098; AVX: # %bb.0:1099; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01100; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1101; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01102; AVX-NEXT: retq1103;1104; AVX512-LABEL: test_v2f64:1105; AVX512: # %bb.0:1106; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01107; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1108; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01109; AVX512-NEXT: retq1110 %1 = call double @llvm.vector.reduce.fadd.f64.v2f64(double %a0, <2 x double> %a1)1111 ret double %11112}1113 1114define double @test_v4f64(double %a0, <4 x double> %a1) {1115; SSE-LABEL: test_v4f64:1116; SSE: # %bb.0:1117; SSE-NEXT: addsd %xmm1, %xmm01118; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1119; SSE-NEXT: addsd %xmm1, %xmm01120; SSE-NEXT: addsd %xmm2, %xmm01121; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1122; SSE-NEXT: addsd %xmm2, %xmm01123; SSE-NEXT: retq1124;1125; AVX-LABEL: test_v4f64:1126; AVX: # %bb.0:1127; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01128; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1129; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm01130; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11131; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01132; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1133; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01134; AVX-NEXT: vzeroupper1135; AVX-NEXT: retq1136;1137; AVX512-LABEL: test_v4f64:1138; AVX512: # %bb.0:1139; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01140; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1141; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01142; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm11143; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01144; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1145; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01146; AVX512-NEXT: vzeroupper1147; AVX512-NEXT: retq1148 %1 = call double @llvm.vector.reduce.fadd.f64.v4f64(double %a0, <4 x double> %a1)1149 ret double %11150}1151 1152define double @test_v8f64(double %a0, <8 x double> %a1) {1153; SSE-LABEL: test_v8f64:1154; SSE: # %bb.0:1155; SSE-NEXT: addsd %xmm1, %xmm01156; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1157; SSE-NEXT: addsd %xmm1, %xmm01158; SSE-NEXT: addsd %xmm2, %xmm01159; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1160; SSE-NEXT: addsd %xmm2, %xmm01161; SSE-NEXT: addsd %xmm3, %xmm01162; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1163; SSE-NEXT: addsd %xmm3, %xmm01164; SSE-NEXT: addsd %xmm4, %xmm01165; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1166; SSE-NEXT: addsd %xmm4, %xmm01167; SSE-NEXT: retq1168;1169; AVX-LABEL: test_v8f64:1170; AVX: # %bb.0:1171; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01172; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]1173; AVX-NEXT: vaddsd %xmm3, %xmm0, %xmm01174; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11175; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01176; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1177; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01178; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm01179; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1180; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01181; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11182; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01183; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1184; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01185; AVX-NEXT: vzeroupper1186; AVX-NEXT: retq1187;1188; AVX512-LABEL: test_v8f64:1189; AVX512: # %bb.0:1190; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01191; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1192; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01193; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm21194; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01195; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1196; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01197; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm21198; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01199; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1200; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01201; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11202; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01203; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1204; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01205; AVX512-NEXT: vzeroupper1206; AVX512-NEXT: retq1207 %1 = call double @llvm.vector.reduce.fadd.f64.v8f64(double %a0, <8 x double> %a1)1208 ret double %11209}1210 1211define double @test_v16f64(double %a0, <16 x double> %a1) {1212; SSE2-LABEL: test_v16f64:1213; SSE2: # %bb.0:1214; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm81215; SSE2-NEXT: addsd %xmm1, %xmm01216; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1217; SSE2-NEXT: addsd %xmm1, %xmm01218; SSE2-NEXT: addsd %xmm2, %xmm01219; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1220; SSE2-NEXT: addsd %xmm2, %xmm01221; SSE2-NEXT: addsd %xmm3, %xmm01222; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1223; SSE2-NEXT: addsd %xmm3, %xmm01224; SSE2-NEXT: addsd %xmm4, %xmm01225; SSE2-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1226; SSE2-NEXT: addsd %xmm4, %xmm01227; SSE2-NEXT: addsd %xmm5, %xmm01228; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1229; SSE2-NEXT: addsd %xmm5, %xmm01230; SSE2-NEXT: addsd %xmm6, %xmm01231; SSE2-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1232; SSE2-NEXT: addsd %xmm6, %xmm01233; SSE2-NEXT: addsd %xmm7, %xmm01234; SSE2-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1235; SSE2-NEXT: addsd %xmm7, %xmm01236; SSE2-NEXT: addsd %xmm8, %xmm01237; SSE2-NEXT: unpckhpd {{.*#+}} xmm8 = xmm8[1,1]1238; SSE2-NEXT: addsd %xmm8, %xmm01239; SSE2-NEXT: retq1240;1241; SSE41-LABEL: test_v16f64:1242; SSE41: # %bb.0:1243; SSE41-NEXT: addsd %xmm1, %xmm01244; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1245; SSE41-NEXT: addsd %xmm1, %xmm01246; SSE41-NEXT: addsd %xmm2, %xmm01247; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1248; SSE41-NEXT: addsd %xmm2, %xmm01249; SSE41-NEXT: addsd %xmm3, %xmm01250; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1251; SSE41-NEXT: addsd %xmm3, %xmm01252; SSE41-NEXT: addsd %xmm4, %xmm01253; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1254; SSE41-NEXT: addsd %xmm4, %xmm01255; SSE41-NEXT: addsd %xmm5, %xmm01256; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1257; SSE41-NEXT: addsd %xmm5, %xmm01258; SSE41-NEXT: addsd %xmm6, %xmm01259; SSE41-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1260; SSE41-NEXT: addsd %xmm6, %xmm01261; SSE41-NEXT: addsd %xmm7, %xmm01262; SSE41-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1263; SSE41-NEXT: addsd %xmm7, %xmm01264; SSE41-NEXT: addsd {{[0-9]+}}(%rsp), %xmm01265; SSE41-NEXT: addsd {{[0-9]+}}(%rsp), %xmm01266; SSE41-NEXT: retq1267;1268; AVX-LABEL: test_v16f64:1269; AVX: # %bb.0:1270; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01271; AVX-NEXT: vshufpd {{.*#+}} xmm5 = xmm1[1,0]1272; AVX-NEXT: vaddsd %xmm5, %xmm0, %xmm01273; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11274; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01275; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1276; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01277; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm01278; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1279; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01280; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11281; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01282; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1283; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01284; AVX-NEXT: vaddsd %xmm3, %xmm0, %xmm01285; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1286; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01287; AVX-NEXT: vextractf128 $1, %ymm3, %xmm11288; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01289; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1290; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01291; AVX-NEXT: vaddsd %xmm4, %xmm0, %xmm01292; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm4[1,0]1293; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01294; AVX-NEXT: vextractf128 $1, %ymm4, %xmm11295; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01296; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1297; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01298; AVX-NEXT: vzeroupper1299; AVX-NEXT: retq1300;1301; AVX512-LABEL: test_v16f64:1302; AVX512: # %bb.0:1303; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01304; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]1305; AVX512-NEXT: vaddsd %xmm3, %xmm0, %xmm01306; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm31307; AVX512-NEXT: vaddsd %xmm3, %xmm0, %xmm01308; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1309; AVX512-NEXT: vaddsd %xmm3, %xmm0, %xmm01310; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm31311; AVX512-NEXT: vaddsd %xmm3, %xmm0, %xmm01312; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1313; AVX512-NEXT: vaddsd %xmm3, %xmm0, %xmm01314; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11315; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01316; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1317; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01318; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01319; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1320; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01321; AVX512-NEXT: vextractf128 $1, %ymm2, %xmm11322; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01323; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1324; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01325; AVX512-NEXT: vextractf32x4 $2, %zmm2, %xmm11326; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01327; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1328; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01329; AVX512-NEXT: vextractf32x4 $3, %zmm2, %xmm11330; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01331; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1332; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01333; AVX512-NEXT: vzeroupper1334; AVX512-NEXT: retq1335 %1 = call double @llvm.vector.reduce.fadd.f64.v16f64(double %a0, <16 x double> %a1)1336 ret double %11337}1338 1339;1340; vXf64 (zero)1341;1342 1343define double @test_v2f64_zero(<2 x double> %a0) {1344; SSE-LABEL: test_v2f64_zero:1345; SSE: # %bb.0:1346; SSE-NEXT: movapd %xmm0, %xmm11347; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1348; SSE-NEXT: addsd %xmm1, %xmm01349; SSE-NEXT: retq1350;1351; AVX1-SLOW-LABEL: test_v2f64_zero:1352; AVX1-SLOW: # %bb.0:1353; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1354; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01355; AVX1-SLOW-NEXT: retq1356;1357; AVX1-FAST-LABEL: test_v2f64_zero:1358; AVX1-FAST: # %bb.0:1359; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm01360; AVX1-FAST-NEXT: retq1361;1362; AVX2-LABEL: test_v2f64_zero:1363; AVX2: # %bb.0:1364; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1365; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01366; AVX2-NEXT: retq1367;1368; AVX512-LABEL: test_v2f64_zero:1369; AVX512: # %bb.0:1370; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1371; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01372; AVX512-NEXT: retq1373 %1 = call double @llvm.vector.reduce.fadd.f64.v2f64(double -0.0, <2 x double> %a0)1374 ret double %11375}1376 1377define double @test_v4f64_zero(<4 x double> %a0) {1378; SSE-LABEL: test_v4f64_zero:1379; SSE: # %bb.0:1380; SSE-NEXT: movapd %xmm0, %xmm21381; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]1382; SSE-NEXT: addsd %xmm2, %xmm01383; SSE-NEXT: addsd %xmm1, %xmm01384; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1385; SSE-NEXT: addsd %xmm1, %xmm01386; SSE-NEXT: retq1387;1388; AVX1-SLOW-LABEL: test_v4f64_zero:1389; AVX1-SLOW: # %bb.0:1390; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1391; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm11392; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm01393; AVX1-SLOW-NEXT: vaddsd %xmm0, %xmm1, %xmm11394; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1395; AVX1-SLOW-NEXT: vaddsd %xmm0, %xmm1, %xmm01396; AVX1-SLOW-NEXT: vzeroupper1397; AVX1-SLOW-NEXT: retq1398;1399; AVX1-FAST-LABEL: test_v4f64_zero:1400; AVX1-FAST: # %bb.0:1401; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm11402; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm01403; AVX1-FAST-NEXT: vaddsd %xmm0, %xmm1, %xmm11404; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1405; AVX1-FAST-NEXT: vaddsd %xmm0, %xmm1, %xmm01406; AVX1-FAST-NEXT: vzeroupper1407; AVX1-FAST-NEXT: retq1408;1409; AVX2-LABEL: test_v4f64_zero:1410; AVX2: # %bb.0:1411; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1412; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm11413; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm01414; AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm11415; AVX2-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1416; AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm01417; AVX2-NEXT: vzeroupper1418; AVX2-NEXT: retq1419;1420; AVX512-LABEL: test_v4f64_zero:1421; AVX512: # %bb.0:1422; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1423; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm11424; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm01425; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm11426; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1427; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm01428; AVX512-NEXT: vzeroupper1429; AVX512-NEXT: retq1430 %1 = call double @llvm.vector.reduce.fadd.f64.v4f64(double -0.0, <4 x double> %a0)1431 ret double %11432}1433 1434define double @test_v8f64_zero(<8 x double> %a0) {1435; SSE-LABEL: test_v8f64_zero:1436; SSE: # %bb.0:1437; SSE-NEXT: movapd %xmm0, %xmm41438; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm0[1]1439; SSE-NEXT: addsd %xmm4, %xmm01440; SSE-NEXT: addsd %xmm1, %xmm01441; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1442; SSE-NEXT: addsd %xmm1, %xmm01443; SSE-NEXT: addsd %xmm2, %xmm01444; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1445; SSE-NEXT: addsd %xmm2, %xmm01446; SSE-NEXT: addsd %xmm3, %xmm01447; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1448; SSE-NEXT: addsd %xmm3, %xmm01449; SSE-NEXT: retq1450;1451; AVX1-SLOW-LABEL: test_v8f64_zero:1452; AVX1-SLOW: # %bb.0:1453; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1454; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm0, %xmm21455; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm01456; AVX1-SLOW-NEXT: vaddsd %xmm0, %xmm2, %xmm21457; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1458; AVX1-SLOW-NEXT: vaddsd %xmm0, %xmm2, %xmm01459; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01460; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1461; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm0, %xmm01462; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm11463; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01464; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1465; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01466; AVX1-SLOW-NEXT: vzeroupper1467; AVX1-SLOW-NEXT: retq1468;1469; AVX1-FAST-LABEL: test_v8f64_zero:1470; AVX1-FAST: # %bb.0:1471; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm21472; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm01473; AVX1-FAST-NEXT: vaddsd %xmm0, %xmm2, %xmm21474; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1475; AVX1-FAST-NEXT: vaddsd %xmm0, %xmm2, %xmm01476; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01477; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1478; AVX1-FAST-NEXT: vaddsd %xmm2, %xmm0, %xmm01479; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm11480; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01481; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1482; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01483; AVX1-FAST-NEXT: vzeroupper1484; AVX1-FAST-NEXT: retq1485;1486; AVX2-LABEL: test_v8f64_zero:1487; AVX2: # %bb.0:1488; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1489; AVX2-NEXT: vaddsd %xmm2, %xmm0, %xmm21490; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm01491; AVX2-NEXT: vaddsd %xmm0, %xmm2, %xmm21492; AVX2-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1493; AVX2-NEXT: vaddsd %xmm0, %xmm2, %xmm01494; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01495; AVX2-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1496; AVX2-NEXT: vaddsd %xmm2, %xmm0, %xmm01497; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm11498; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01499; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1500; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01501; AVX2-NEXT: vzeroupper1502; AVX2-NEXT: retq1503;1504; AVX512-LABEL: test_v8f64_zero:1505; AVX512: # %bb.0:1506; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1507; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm11508; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm21509; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11510; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1511; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11512; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm21513; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11514; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1515; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11516; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01517; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm11518; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1519; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm01520; AVX512-NEXT: vzeroupper1521; AVX512-NEXT: retq1522 %1 = call double @llvm.vector.reduce.fadd.f64.v8f64(double -0.0, <8 x double> %a0)1523 ret double %11524}1525 1526define double @test_v16f64_zero(<16 x double> %a0) {1527; SSE-LABEL: test_v16f64_zero:1528; SSE: # %bb.0:1529; SSE-NEXT: movapd %xmm0, %xmm81530; SSE-NEXT: unpckhpd {{.*#+}} xmm8 = xmm8[1],xmm0[1]1531; SSE-NEXT: addsd %xmm8, %xmm01532; SSE-NEXT: addsd %xmm1, %xmm01533; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1534; SSE-NEXT: addsd %xmm1, %xmm01535; SSE-NEXT: addsd %xmm2, %xmm01536; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1537; SSE-NEXT: addsd %xmm2, %xmm01538; SSE-NEXT: addsd %xmm3, %xmm01539; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1540; SSE-NEXT: addsd %xmm3, %xmm01541; SSE-NEXT: addsd %xmm4, %xmm01542; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1543; SSE-NEXT: addsd %xmm4, %xmm01544; SSE-NEXT: addsd %xmm5, %xmm01545; SSE-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1546; SSE-NEXT: addsd %xmm5, %xmm01547; SSE-NEXT: addsd %xmm6, %xmm01548; SSE-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1549; SSE-NEXT: addsd %xmm6, %xmm01550; SSE-NEXT: addsd %xmm7, %xmm01551; SSE-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1552; SSE-NEXT: addsd %xmm7, %xmm01553; SSE-NEXT: retq1554;1555; AVX1-SLOW-LABEL: test_v16f64_zero:1556; AVX1-SLOW: # %bb.0:1557; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1558; AVX1-SLOW-NEXT: vaddsd %xmm4, %xmm0, %xmm41559; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm01560; AVX1-SLOW-NEXT: vaddsd %xmm0, %xmm4, %xmm41561; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1562; AVX1-SLOW-NEXT: vaddsd %xmm0, %xmm4, %xmm01563; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01564; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm4 = xmm1[1,0]1565; AVX1-SLOW-NEXT: vaddsd %xmm4, %xmm0, %xmm01566; AVX1-SLOW-NEXT: vextractf128 $1, %ymm1, %xmm11567; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01568; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1569; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01570; AVX1-SLOW-NEXT: vaddsd %xmm2, %xmm0, %xmm01571; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1572; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01573; AVX1-SLOW-NEXT: vextractf128 $1, %ymm2, %xmm11574; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01575; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1576; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01577; AVX1-SLOW-NEXT: vaddsd %xmm3, %xmm0, %xmm01578; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1579; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01580; AVX1-SLOW-NEXT: vextractf128 $1, %ymm3, %xmm11581; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01582; AVX1-SLOW-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1583; AVX1-SLOW-NEXT: vaddsd %xmm1, %xmm0, %xmm01584; AVX1-SLOW-NEXT: vzeroupper1585; AVX1-SLOW-NEXT: retq1586;1587; AVX1-FAST-LABEL: test_v16f64_zero:1588; AVX1-FAST: # %bb.0:1589; AVX1-FAST-NEXT: vhaddpd %xmm0, %xmm0, %xmm41590; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm01591; AVX1-FAST-NEXT: vaddsd %xmm0, %xmm4, %xmm41592; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1593; AVX1-FAST-NEXT: vaddsd %xmm0, %xmm4, %xmm01594; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01595; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm4 = xmm1[1,0]1596; AVX1-FAST-NEXT: vaddsd %xmm4, %xmm0, %xmm01597; AVX1-FAST-NEXT: vextractf128 $1, %ymm1, %xmm11598; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01599; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1600; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01601; AVX1-FAST-NEXT: vaddsd %xmm2, %xmm0, %xmm01602; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1603; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01604; AVX1-FAST-NEXT: vextractf128 $1, %ymm2, %xmm11605; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01606; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1607; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01608; AVX1-FAST-NEXT: vaddsd %xmm3, %xmm0, %xmm01609; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1610; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01611; AVX1-FAST-NEXT: vextractf128 $1, %ymm3, %xmm11612; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01613; AVX1-FAST-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1614; AVX1-FAST-NEXT: vaddsd %xmm1, %xmm0, %xmm01615; AVX1-FAST-NEXT: vzeroupper1616; AVX1-FAST-NEXT: retq1617;1618; AVX2-LABEL: test_v16f64_zero:1619; AVX2: # %bb.0:1620; AVX2-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1621; AVX2-NEXT: vaddsd %xmm4, %xmm0, %xmm41622; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm01623; AVX2-NEXT: vaddsd %xmm0, %xmm4, %xmm41624; AVX2-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1625; AVX2-NEXT: vaddsd %xmm0, %xmm4, %xmm01626; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01627; AVX2-NEXT: vshufpd {{.*#+}} xmm4 = xmm1[1,0]1628; AVX2-NEXT: vaddsd %xmm4, %xmm0, %xmm01629; AVX2-NEXT: vextractf128 $1, %ymm1, %xmm11630; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01631; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1632; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01633; AVX2-NEXT: vaddsd %xmm2, %xmm0, %xmm01634; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1635; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01636; AVX2-NEXT: vextractf128 $1, %ymm2, %xmm11637; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01638; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1639; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01640; AVX2-NEXT: vaddsd %xmm3, %xmm0, %xmm01641; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1642; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01643; AVX2-NEXT: vextractf128 $1, %ymm3, %xmm11644; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01645; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1646; AVX2-NEXT: vaddsd %xmm1, %xmm0, %xmm01647; AVX2-NEXT: vzeroupper1648; AVX2-NEXT: retq1649;1650; AVX512-LABEL: test_v16f64_zero:1651; AVX512: # %bb.0:1652; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1653; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm21654; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm31655; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21656; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1657; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21658; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm31659; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21660; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1661; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21662; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01663; AVX512-NEXT: vaddsd %xmm0, %xmm2, %xmm21664; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1665; AVX512-NEXT: vaddsd %xmm0, %xmm2, %xmm01666; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01667; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1668; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01669; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm21670; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01671; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1672; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01673; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm21674; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01675; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1676; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01677; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11678; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01679; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1680; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01681; AVX512-NEXT: vzeroupper1682; AVX512-NEXT: retq1683 %1 = call double @llvm.vector.reduce.fadd.f64.v16f64(double -0.0, <16 x double> %a0)1684 ret double %11685}1686 1687;1688; vXf64 (undef)1689;1690 1691define double @test_v2f64_undef(<2 x double> %a0) {1692; SSE-LABEL: test_v2f64_undef:1693; SSE: # %bb.0:1694; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1695; SSE-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01696; SSE-NEXT: retq1697;1698; AVX-LABEL: test_v2f64_undef:1699; AVX: # %bb.0:1700; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1701; AVX-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01702; AVX-NEXT: retq1703;1704; AVX512-LABEL: test_v2f64_undef:1705; AVX512: # %bb.0:1706; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1707; AVX512-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01708; AVX512-NEXT: retq1709 %1 = call double @llvm.vector.reduce.fadd.f64.v2f64(double undef, <2 x double> %a0)1710 ret double %11711}1712 1713define double @test_v4f64_undef(<4 x double> %a0) {1714; SSE-LABEL: test_v4f64_undef:1715; SSE: # %bb.0:1716; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1717; SSE-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01718; SSE-NEXT: addsd %xmm1, %xmm01719; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1720; SSE-NEXT: addsd %xmm1, %xmm01721; SSE-NEXT: retq1722;1723; AVX-LABEL: test_v4f64_undef:1724; AVX: # %bb.0:1725; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1726; AVX-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11727; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01728; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm11729; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1730; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm01731; AVX-NEXT: vzeroupper1732; AVX-NEXT: retq1733;1734; AVX512-LABEL: test_v4f64_undef:1735; AVX512: # %bb.0:1736; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1737; AVX512-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11738; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm01739; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm11740; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1741; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm01742; AVX512-NEXT: vzeroupper1743; AVX512-NEXT: retq1744 %1 = call double @llvm.vector.reduce.fadd.f64.v4f64(double undef, <4 x double> %a0)1745 ret double %11746}1747 1748define double @test_v8f64_undef(<8 x double> %a0) {1749; SSE-LABEL: test_v8f64_undef:1750; SSE: # %bb.0:1751; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1752; SSE-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01753; SSE-NEXT: addsd %xmm1, %xmm01754; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1755; SSE-NEXT: addsd %xmm1, %xmm01756; SSE-NEXT: addsd %xmm2, %xmm01757; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1758; SSE-NEXT: addsd %xmm2, %xmm01759; SSE-NEXT: addsd %xmm3, %xmm01760; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1761; SSE-NEXT: addsd %xmm3, %xmm01762; SSE-NEXT: retq1763;1764; AVX-LABEL: test_v8f64_undef:1765; AVX: # %bb.0:1766; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1767; AVX-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm21768; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01769; AVX-NEXT: vaddsd %xmm0, %xmm2, %xmm21770; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1771; AVX-NEXT: vaddsd %xmm0, %xmm2, %xmm01772; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01773; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1774; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm01775; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11776; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01777; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1778; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01779; AVX-NEXT: vzeroupper1780; AVX-NEXT: retq1781;1782; AVX512-LABEL: test_v8f64_undef:1783; AVX512: # %bb.0:1784; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1785; AVX512-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11786; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm21787; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11788; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1789; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11790; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm21791; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11792; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1793; AVX512-NEXT: vaddsd %xmm2, %xmm1, %xmm11794; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01795; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm11796; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1797; AVX512-NEXT: vaddsd %xmm0, %xmm1, %xmm01798; AVX512-NEXT: vzeroupper1799; AVX512-NEXT: retq1800 %1 = call double @llvm.vector.reduce.fadd.f64.v8f64(double undef, <8 x double> %a0)1801 ret double %11802}1803 1804define double @test_v16f64_undef(<16 x double> %a0) {1805; SSE-LABEL: test_v16f64_undef:1806; SSE: # %bb.0:1807; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1808; SSE-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01809; SSE-NEXT: addsd %xmm1, %xmm01810; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1811; SSE-NEXT: addsd %xmm1, %xmm01812; SSE-NEXT: addsd %xmm2, %xmm01813; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1814; SSE-NEXT: addsd %xmm2, %xmm01815; SSE-NEXT: addsd %xmm3, %xmm01816; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1817; SSE-NEXT: addsd %xmm3, %xmm01818; SSE-NEXT: addsd %xmm4, %xmm01819; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1820; SSE-NEXT: addsd %xmm4, %xmm01821; SSE-NEXT: addsd %xmm5, %xmm01822; SSE-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1823; SSE-NEXT: addsd %xmm5, %xmm01824; SSE-NEXT: addsd %xmm6, %xmm01825; SSE-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1826; SSE-NEXT: addsd %xmm6, %xmm01827; SSE-NEXT: addsd %xmm7, %xmm01828; SSE-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1829; SSE-NEXT: addsd %xmm7, %xmm01830; SSE-NEXT: retq1831;1832; AVX-LABEL: test_v16f64_undef:1833; AVX: # %bb.0:1834; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1835; AVX-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm41836; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01837; AVX-NEXT: vaddsd %xmm0, %xmm4, %xmm41838; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1839; AVX-NEXT: vaddsd %xmm0, %xmm4, %xmm01840; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01841; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm1[1,0]1842; AVX-NEXT: vaddsd %xmm4, %xmm0, %xmm01843; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11844; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01845; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1846; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01847; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm01848; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1849; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01850; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11851; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01852; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1853; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01854; AVX-NEXT: vaddsd %xmm3, %xmm0, %xmm01855; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1856; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01857; AVX-NEXT: vextractf128 $1, %ymm3, %xmm11858; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01859; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1860; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm01861; AVX-NEXT: vzeroupper1862; AVX-NEXT: retq1863;1864; AVX512-LABEL: test_v16f64_undef:1865; AVX512: # %bb.0:1866; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1867; AVX512-NEXT: vaddsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm21868; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm31869; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21870; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1871; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21872; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm31873; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21874; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1875; AVX512-NEXT: vaddsd %xmm3, %xmm2, %xmm21876; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01877; AVX512-NEXT: vaddsd %xmm0, %xmm2, %xmm21878; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1879; AVX512-NEXT: vaddsd %xmm0, %xmm2, %xmm01880; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01881; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1882; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01883; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm21884; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01885; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1886; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01887; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm21888; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01889; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1890; AVX512-NEXT: vaddsd %xmm2, %xmm0, %xmm01891; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11892; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01893; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1894; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm01895; AVX512-NEXT: vzeroupper1896; AVX512-NEXT: retq1897 %1 = call double @llvm.vector.reduce.fadd.f64.v16f64(double undef, <16 x double> %a0)1898 ret double %11899}1900 1901define float @PR64627() {1902; SSE-LABEL: PR64627:1903; SSE: # %bb.0:1904; SSE-NEXT: movss {{.*#+}} xmm0 = [5.0E+0,0.0E+0,0.0E+0,0.0E+0]1905; SSE-NEXT: retq1906;1907; AVX-LABEL: PR64627:1908; AVX: # %bb.0:1909; AVX-NEXT: vmovss {{.*#+}} xmm0 = [5.0E+0,0.0E+0,0.0E+0,0.0E+0]1910; AVX-NEXT: retq1911;1912; AVX512-LABEL: PR64627:1913; AVX512: # %bb.0:1914; AVX512-NEXT: vmovss {{.*#+}} xmm0 = [5.0E+0,0.0E+0,0.0E+0,0.0E+0]1915; AVX512-NEXT: retq1916 %1 = bitcast i5 0 to <5 x i1>1917 %2 = select <5 x i1> %1, <5 x float> zeroinitializer, <5 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>1918 %3 = call float @llvm.vector.reduce.fadd.v5f32(float -0.0, <5 x float> %2)1919 ret float %31920}1921declare float @llvm.vector.reduce.fadd.v5f32(float, <5 x float>)1922 1923declare float @llvm.vector.reduce.fadd.f32.v2f32(float, <2 x float>)1924declare float @llvm.vector.reduce.fadd.f32.v4f32(float, <4 x float>)1925declare float @llvm.vector.reduce.fadd.f32.v8f32(float, <8 x float>)1926declare float @llvm.vector.reduce.fadd.f32.v16f32(float, <16 x float>)1927 1928declare double @llvm.vector.reduce.fadd.f64.v2f64(double, <2 x double>)1929declare double @llvm.vector.reduce.fadd.f64.v4f64(double, <4 x double>)1930declare double @llvm.vector.reduce.fadd.f64.v8f64(double, <8 x double>)1931declare double @llvm.vector.reduce.fadd.f64.v16f64(double, <16 x double>)1932