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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX5127; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX5128 9; These tests are identical to corresponding tests in the 'nnan' versions10; of the files except that they use 'fast' FMF. If things are working as11; expected, the 'nnan' codegen should be the same as 'fast'.12 13;14; vXf3215;16 17define float @test_v2f32(<2 x float> %a0) {18; SSE2-LABEL: test_v2f32:19; SSE2: # %bb.0:20; SSE2-NEXT: movaps %xmm0, %xmm121; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]22; SSE2-NEXT: minss %xmm1, %xmm023; SSE2-NEXT: retq24;25; SSE41-LABEL: test_v2f32:26; SSE41: # %bb.0:27; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]28; SSE41-NEXT: minss %xmm1, %xmm029; SSE41-NEXT: retq30;31; AVX-LABEL: test_v2f32:32; AVX: # %bb.0:33; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]34; AVX-NEXT: vminss %xmm1, %xmm0, %xmm035; AVX-NEXT: retq36;37; AVX512-LABEL: test_v2f32:38; AVX512: # %bb.0:39; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]40; AVX512-NEXT: vminss %xmm1, %xmm0, %xmm041; AVX512-NEXT: retq42 %1 = call fast float @llvm.vector.reduce.fmin.v2f32(<2 x float> %a0)43 ret float %144}45 46define float @test_v4f32(<4 x float> %a0) {47; SSE2-LABEL: test_v4f32:48; SSE2: # %bb.0:49; SSE2-NEXT: movaps %xmm0, %xmm150; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]51; SSE2-NEXT: maxps %xmm1, %xmm052; SSE2-NEXT: movaps %xmm0, %xmm153; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]54; SSE2-NEXT: maxss %xmm1, %xmm055; SSE2-NEXT: retq56;57; SSE41-LABEL: test_v4f32:58; SSE41: # %bb.0:59; SSE41-NEXT: movaps %xmm0, %xmm160; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]61; SSE41-NEXT: maxps %xmm1, %xmm062; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]63; SSE41-NEXT: maxss %xmm1, %xmm064; SSE41-NEXT: retq65;66; AVX-LABEL: test_v4f32:67; AVX: # %bb.0:68; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]69; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm070; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]71; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm072; AVX-NEXT: retq73;74; AVX512-LABEL: test_v4f32:75; AVX512: # %bb.0:76; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]77; AVX512-NEXT: vmaxps %xmm1, %xmm0, %xmm078; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]79; AVX512-NEXT: vmaxss %xmm1, %xmm0, %xmm080; AVX512-NEXT: retq81 %1 = call fast float @llvm.vector.reduce.fmax.v4f32(<4 x float> %a0)82 ret float %183}84 85define float @test_v8f32(<8 x float> %a0) {86; SSE2-LABEL: test_v8f32:87; SSE2: # %bb.0:88; SSE2-NEXT: minps %xmm1, %xmm089; SSE2-NEXT: movaps %xmm0, %xmm190; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]91; SSE2-NEXT: minps %xmm1, %xmm092; SSE2-NEXT: movaps %xmm0, %xmm193; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]94; SSE2-NEXT: minss %xmm1, %xmm095; SSE2-NEXT: retq96;97; SSE41-LABEL: test_v8f32:98; SSE41: # %bb.0:99; SSE41-NEXT: minps %xmm1, %xmm0100; SSE41-NEXT: movaps %xmm0, %xmm1101; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]102; SSE41-NEXT: minps %xmm1, %xmm0103; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]104; SSE41-NEXT: minss %xmm1, %xmm0105; SSE41-NEXT: retq106;107; AVX-LABEL: test_v8f32:108; AVX: # %bb.0:109; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1110; AVX-NEXT: vminps %xmm1, %xmm0, %xmm0111; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]112; AVX-NEXT: vminps %xmm1, %xmm0, %xmm0113; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]114; AVX-NEXT: vminss %xmm1, %xmm0, %xmm0115; AVX-NEXT: vzeroupper116; AVX-NEXT: retq117;118; AVX512-LABEL: test_v8f32:119; AVX512: # %bb.0:120; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1121; AVX512-NEXT: vminps %xmm1, %xmm0, %xmm0122; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]123; AVX512-NEXT: vminps %xmm1, %xmm0, %xmm0124; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]125; AVX512-NEXT: vminss %xmm1, %xmm0, %xmm0126; AVX512-NEXT: vzeroupper127; AVX512-NEXT: retq128 %1 = call fast float @llvm.vector.reduce.fmin.v8f32(<8 x float> %a0)129 ret float %1130}131 132define float @test_v16f32(<16 x float> %a0) {133; SSE2-LABEL: test_v16f32:134; SSE2: # %bb.0:135; SSE2-NEXT: maxps %xmm3, %xmm1136; SSE2-NEXT: maxps %xmm2, %xmm0137; SSE2-NEXT: maxps %xmm1, %xmm0138; SSE2-NEXT: movaps %xmm0, %xmm1139; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]140; SSE2-NEXT: maxps %xmm1, %xmm0141; SSE2-NEXT: movaps %xmm0, %xmm1142; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]143; SSE2-NEXT: maxss %xmm1, %xmm0144; SSE2-NEXT: retq145;146; SSE41-LABEL: test_v16f32:147; SSE41: # %bb.0:148; SSE41-NEXT: maxps %xmm3, %xmm1149; SSE41-NEXT: maxps %xmm2, %xmm0150; SSE41-NEXT: maxps %xmm1, %xmm0151; SSE41-NEXT: movaps %xmm0, %xmm1152; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]153; SSE41-NEXT: maxps %xmm1, %xmm0154; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]155; SSE41-NEXT: maxss %xmm1, %xmm0156; SSE41-NEXT: retq157;158; AVX-LABEL: test_v16f32:159; AVX: # %bb.0:160; AVX-NEXT: vmaxps %ymm1, %ymm0, %ymm0161; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1162; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm0163; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]164; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm0165; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]166; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm0167; AVX-NEXT: vzeroupper168; AVX-NEXT: retq169;170; AVX512-LABEL: test_v16f32:171; AVX512: # %bb.0:172; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1173; AVX512-NEXT: vmaxps %ymm1, %ymm0, %ymm0174; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1175; AVX512-NEXT: vmaxps %xmm1, %xmm0, %xmm0176; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]177; AVX512-NEXT: vmaxps %xmm1, %xmm0, %xmm0178; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]179; AVX512-NEXT: vmaxss %xmm1, %xmm0, %xmm0180; AVX512-NEXT: vzeroupper181; AVX512-NEXT: retq182 %1 = call fast float @llvm.vector.reduce.fmax.v16f32(<16 x float> %a0)183 ret float %1184}185 186;187; vXf64188;189 190define double @test_v2f64(<2 x double> %a0) {191; SSE-LABEL: test_v2f64:192; SSE: # %bb.0:193; SSE-NEXT: movapd %xmm0, %xmm1194; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]195; SSE-NEXT: minsd %xmm1, %xmm0196; SSE-NEXT: retq197;198; AVX-LABEL: test_v2f64:199; AVX: # %bb.0:200; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]201; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm0202; AVX-NEXT: retq203;204; AVX512-LABEL: test_v2f64:205; AVX512: # %bb.0:206; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]207; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm0208; AVX512-NEXT: retq209 %1 = call fast double @llvm.vector.reduce.fmin.v2f64(<2 x double> %a0)210 ret double %1211}212 213define double @test_v4f64(<4 x double> %a0) {214; SSE-LABEL: test_v4f64:215; SSE: # %bb.0:216; SSE-NEXT: maxpd %xmm1, %xmm0217; SSE-NEXT: movapd %xmm0, %xmm1218; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]219; SSE-NEXT: maxsd %xmm1, %xmm0220; SSE-NEXT: retq221;222; AVX-LABEL: test_v4f64:223; AVX: # %bb.0:224; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1225; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0226; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]227; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm0228; AVX-NEXT: vzeroupper229; AVX-NEXT: retq230;231; AVX512-LABEL: test_v4f64:232; AVX512: # %bb.0:233; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1234; AVX512-NEXT: vmaxpd %xmm1, %xmm0, %xmm0235; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]236; AVX512-NEXT: vmaxsd %xmm1, %xmm0, %xmm0237; AVX512-NEXT: vzeroupper238; AVX512-NEXT: retq239 %1 = call fast double @llvm.vector.reduce.fmax.v4f64(<4 x double> %a0)240 ret double %1241}242 243define double @test_v8f64(<8 x double> %a0) {244; SSE-LABEL: test_v8f64:245; SSE: # %bb.0:246; SSE-NEXT: minpd %xmm3, %xmm1247; SSE-NEXT: minpd %xmm2, %xmm0248; SSE-NEXT: minpd %xmm1, %xmm0249; SSE-NEXT: movapd %xmm0, %xmm1250; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]251; SSE-NEXT: minsd %xmm1, %xmm0252; SSE-NEXT: retq253;254; AVX-LABEL: test_v8f64:255; AVX: # %bb.0:256; AVX-NEXT: vminpd %ymm1, %ymm0, %ymm0257; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1258; AVX-NEXT: vminpd %xmm1, %xmm0, %xmm0259; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]260; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm0261; AVX-NEXT: vzeroupper262; AVX-NEXT: retq263;264; AVX512-LABEL: test_v8f64:265; AVX512: # %bb.0:266; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1267; AVX512-NEXT: vminpd %ymm1, %ymm0, %ymm0268; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1269; AVX512-NEXT: vminpd %xmm1, %xmm0, %xmm0270; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]271; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm0272; AVX512-NEXT: vzeroupper273; AVX512-NEXT: retq274 %1 = call fast double @llvm.vector.reduce.fmin.v8f64(<8 x double> %a0)275 ret double %1276}277 278define double @test_v16f64(<16 x double> %a0) {279; SSE-LABEL: test_v16f64:280; SSE: # %bb.0:281; SSE-NEXT: maxpd %xmm6, %xmm2282; SSE-NEXT: maxpd %xmm4, %xmm0283; SSE-NEXT: maxpd %xmm2, %xmm0284; SSE-NEXT: maxpd %xmm7, %xmm3285; SSE-NEXT: maxpd %xmm5, %xmm1286; SSE-NEXT: maxpd %xmm3, %xmm1287; SSE-NEXT: maxpd %xmm1, %xmm0288; SSE-NEXT: movapd %xmm0, %xmm1289; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]290; SSE-NEXT: maxsd %xmm1, %xmm0291; SSE-NEXT: retq292;293; AVX-LABEL: test_v16f64:294; AVX: # %bb.0:295; AVX-NEXT: vmaxpd %ymm3, %ymm1, %ymm1296; AVX-NEXT: vmaxpd %ymm2, %ymm0, %ymm0297; AVX-NEXT: vmaxpd %ymm1, %ymm0, %ymm0298; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1299; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0300; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]301; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm0302; AVX-NEXT: vzeroupper303; AVX-NEXT: retq304;305; AVX512-LABEL: test_v16f64:306; AVX512: # %bb.0:307; AVX512-NEXT: vmaxpd %zmm1, %zmm0, %zmm0308; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1309; AVX512-NEXT: vmaxpd %ymm1, %ymm0, %ymm0310; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1311; AVX512-NEXT: vmaxpd %xmm1, %xmm0, %xmm0312; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]313; AVX512-NEXT: vmaxsd %xmm1, %xmm0, %xmm0314; AVX512-NEXT: vzeroupper315; AVX512-NEXT: retq316 %1 = call fast double @llvm.vector.reduce.fmax.v16f64(<16 x double> %a0)317 ret double %1318}319 320declare float @llvm.vector.reduce.fmin.v2f32(<2 x float>)321declare float @llvm.vector.reduce.fmax.v4f32(<4 x float>)322declare float @llvm.vector.reduce.fmin.v8f32(<8 x float>)323declare float @llvm.vector.reduce.fmax.v16f32(<16 x float>)324 325declare double @llvm.vector.reduce.fmin.v2f64(<2 x double>)326declare double @llvm.vector.reduce.fmax.v4f64(<4 x double>)327declare double @llvm.vector.reduce.fmin.v8f64(<8 x double>)328declare double @llvm.vector.reduce.fmax.v16f64(<16 x double>)329