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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512BW7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL8 9;10; vXf3211;12 13define float @test_v1f32(<1 x float> %a0) {14; ALL-LABEL: test_v1f32:15; ALL: # %bb.0:16; ALL-NEXT: retq17 %1 = call float @llvm.vector.reduce.fmin.v1f32(<1 x float> %a0)18 ret float %119}20 21define float @test_v2f32(<2 x float> %a0) {22; SSE2-LABEL: test_v2f32:23; SSE2: # %bb.0:24; SSE2-NEXT: movaps %xmm0, %xmm225; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[1,1]26; SSE2-NEXT: movaps %xmm0, %xmm127; SSE2-NEXT: cmpunordss %xmm0, %xmm128; SSE2-NEXT: movaps %xmm1, %xmm329; SSE2-NEXT: andps %xmm2, %xmm330; SSE2-NEXT: minss %xmm0, %xmm231; SSE2-NEXT: andnps %xmm2, %xmm132; SSE2-NEXT: orps %xmm3, %xmm133; SSE2-NEXT: movaps %xmm1, %xmm034; SSE2-NEXT: retq35;36; SSE41-LABEL: test_v2f32:37; SSE41: # %bb.0:38; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]39; SSE41-NEXT: movaps %xmm2, %xmm140; SSE41-NEXT: minss %xmm0, %xmm141; SSE41-NEXT: cmpunordss %xmm0, %xmm042; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm143; SSE41-NEXT: movaps %xmm1, %xmm044; SSE41-NEXT: retq45;46; AVX-LABEL: test_v2f32:47; AVX: # %bb.0:48; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]49; AVX-NEXT: vminss %xmm0, %xmm1, %xmm250; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm051; AVX-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm052; AVX-NEXT: retq53;54; AVX512-LABEL: test_v2f32:55; AVX512: # %bb.0:56; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]57; AVX512-NEXT: vminss %xmm0, %xmm2, %xmm158; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k159; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}60; AVX512-NEXT: vmovaps %xmm1, %xmm061; AVX512-NEXT: retq62 %1 = call float @llvm.vector.reduce.fmin.v2f32(<2 x float> %a0)63 ret float %164}65 66define float @test_v4f32(<4 x float> %a0) {67; SSE2-LABEL: test_v4f32:68; SSE2: # %bb.0:69; SSE2-NEXT: movaps %xmm0, %xmm170; SSE2-NEXT: movaps %xmm0, %xmm271; SSE2-NEXT: movaps %xmm0, %xmm372; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[1,1]73; SSE2-NEXT: cmpunordss %xmm0, %xmm074; SSE2-NEXT: movaps %xmm0, %xmm475; SSE2-NEXT: andps %xmm3, %xmm476; SSE2-NEXT: minss %xmm1, %xmm377; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]78; SSE2-NEXT: movhlps {{.*#+}} xmm2 = xmm2[1,1]79; SSE2-NEXT: andnps %xmm3, %xmm080; SSE2-NEXT: orps %xmm4, %xmm081; SSE2-NEXT: movaps %xmm2, %xmm382; SSE2-NEXT: minss %xmm0, %xmm383; SSE2-NEXT: cmpunordss %xmm0, %xmm084; SSE2-NEXT: movaps %xmm0, %xmm485; SSE2-NEXT: andnps %xmm3, %xmm486; SSE2-NEXT: andps %xmm2, %xmm087; SSE2-NEXT: orps %xmm4, %xmm088; SSE2-NEXT: movaps %xmm1, %xmm289; SSE2-NEXT: minss %xmm0, %xmm290; SSE2-NEXT: cmpunordss %xmm0, %xmm091; SSE2-NEXT: movaps %xmm0, %xmm392; SSE2-NEXT: andnps %xmm2, %xmm393; SSE2-NEXT: andps %xmm1, %xmm094; SSE2-NEXT: orps %xmm3, %xmm095; SSE2-NEXT: retq96;97; SSE41-LABEL: test_v4f32:98; SSE41: # %bb.0:99; SSE41-NEXT: movaps %xmm0, %xmm3100; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3],xmm0[3,3]101; SSE41-NEXT: movaps %xmm0, %xmm4102; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm0[1]103; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]104; SSE41-NEXT: movaps %xmm2, %xmm1105; SSE41-NEXT: minss %xmm0, %xmm1106; SSE41-NEXT: cmpunordss %xmm0, %xmm0107; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm1108; SSE41-NEXT: movaps %xmm4, %xmm2109; SSE41-NEXT: minss %xmm1, %xmm2110; SSE41-NEXT: cmpunordss %xmm1, %xmm1111; SSE41-NEXT: movaps %xmm1, %xmm0112; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm2113; SSE41-NEXT: movaps %xmm3, %xmm1114; SSE41-NEXT: minss %xmm2, %xmm1115; SSE41-NEXT: cmpunordss %xmm2, %xmm2116; SSE41-NEXT: movaps %xmm2, %xmm0117; SSE41-NEXT: blendvps %xmm0, %xmm3, %xmm1118; SSE41-NEXT: movaps %xmm1, %xmm0119; SSE41-NEXT: retq120;121; AVX-LABEL: test_v4f32:122; AVX: # %bb.0:123; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]124; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]125; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]126; AVX-NEXT: vminss %xmm0, %xmm3, %xmm4127; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0128; AVX-NEXT: vblendvps %xmm0, %xmm3, %xmm4, %xmm0129; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm3130; AVX-NEXT: vminss %xmm0, %xmm2, %xmm0131; AVX-NEXT: vblendvps %xmm3, %xmm2, %xmm0, %xmm0132; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2133; AVX-NEXT: vminss %xmm0, %xmm1, %xmm0134; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0135; AVX-NEXT: retq136;137; AVX512-LABEL: test_v4f32:138; AVX512: # %bb.0:139; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]140; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]141; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]142; AVX512-NEXT: vminss %xmm0, %xmm3, %xmm4143; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1144; AVX512-NEXT: vmovss %xmm3, %xmm4, %xmm4 {%k1}145; AVX512-NEXT: vcmpunordss %xmm4, %xmm4, %k1146; AVX512-NEXT: vminss %xmm4, %xmm2, %xmm0147; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm0 {%k1}148; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1149; AVX512-NEXT: vminss %xmm0, %xmm1, %xmm0150; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}151; AVX512-NEXT: retq152 %1 = call float @llvm.vector.reduce.fmin.v4f32(<4 x float> %a0)153 ret float %1154}155 156define float @test_v8f32(<8 x float> %a0) {157; SSE2-LABEL: test_v8f32:158; SSE2: # %bb.0:159; SSE2-NEXT: movaps %xmm1, %xmm2160; SSE2-NEXT: minps %xmm0, %xmm2161; SSE2-NEXT: cmpunordps %xmm0, %xmm0162; SSE2-NEXT: andps %xmm0, %xmm1163; SSE2-NEXT: andnps %xmm2, %xmm0164; SSE2-NEXT: orps %xmm1, %xmm0165; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]166; SSE2-NEXT: movaps %xmm0, %xmm1167; SSE2-NEXT: cmpunordss %xmm0, %xmm1168; SSE2-NEXT: movaps %xmm1, %xmm3169; SSE2-NEXT: andps %xmm2, %xmm3170; SSE2-NEXT: minss %xmm0, %xmm2171; SSE2-NEXT: andnps %xmm2, %xmm1172; SSE2-NEXT: orps %xmm3, %xmm1173; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]174; SSE2-NEXT: movdqa %xmm2, %xmm3175; SSE2-NEXT: minss %xmm1, %xmm3176; SSE2-NEXT: cmpunordss %xmm1, %xmm1177; SSE2-NEXT: movaps %xmm1, %xmm4178; SSE2-NEXT: andnps %xmm3, %xmm4179; SSE2-NEXT: andps %xmm2, %xmm1180; SSE2-NEXT: orps %xmm4, %xmm1181; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]182; SSE2-NEXT: movdqa %xmm0, %xmm2183; SSE2-NEXT: minss %xmm1, %xmm2184; SSE2-NEXT: cmpunordss %xmm1, %xmm1185; SSE2-NEXT: movaps %xmm1, %xmm3186; SSE2-NEXT: andnps %xmm2, %xmm3187; SSE2-NEXT: andps %xmm0, %xmm1188; SSE2-NEXT: orps %xmm3, %xmm1189; SSE2-NEXT: movaps %xmm1, %xmm0190; SSE2-NEXT: retq191;192; SSE41-LABEL: test_v8f32:193; SSE41: # %bb.0:194; SSE41-NEXT: movaps %xmm1, %xmm3195; SSE41-NEXT: minps %xmm0, %xmm3196; SSE41-NEXT: cmpunordps %xmm0, %xmm0197; SSE41-NEXT: blendvps %xmm0, %xmm1, %xmm3198; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm3[1,1,3,3]199; SSE41-NEXT: movaps %xmm2, %xmm1200; SSE41-NEXT: minss %xmm3, %xmm1201; SSE41-NEXT: movaps %xmm3, %xmm0202; SSE41-NEXT: cmpunordss %xmm3, %xmm0203; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm1204; SSE41-NEXT: movaps %xmm3, %xmm4205; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm3[1]206; SSE41-NEXT: movaps %xmm4, %xmm2207; SSE41-NEXT: minss %xmm1, %xmm2208; SSE41-NEXT: cmpunordss %xmm1, %xmm1209; SSE41-NEXT: movaps %xmm1, %xmm0210; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm2211; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]212; SSE41-NEXT: movaps %xmm3, %xmm1213; SSE41-NEXT: minss %xmm2, %xmm1214; SSE41-NEXT: cmpunordss %xmm2, %xmm2215; SSE41-NEXT: movaps %xmm2, %xmm0216; SSE41-NEXT: blendvps %xmm0, %xmm3, %xmm1217; SSE41-NEXT: movaps %xmm1, %xmm0218; SSE41-NEXT: retq219;220; AVX-LABEL: test_v8f32:221; AVX: # %bb.0:222; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1223; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]224; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]225; AVX-NEXT: vmovshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]226; AVX-NEXT: vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]227; AVX-NEXT: vshufpd {{.*#+}} xmm6 = xmm0[1,0]228; AVX-NEXT: vmovshdup {{.*#+}} xmm7 = xmm0[1,1,3,3]229; AVX-NEXT: vminss %xmm0, %xmm7, %xmm8230; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0231; AVX-NEXT: vblendvps %xmm0, %xmm7, %xmm8, %xmm0232; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm7233; AVX-NEXT: vminss %xmm0, %xmm6, %xmm0234; AVX-NEXT: vblendvps %xmm7, %xmm6, %xmm0, %xmm0235; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm6236; AVX-NEXT: vminss %xmm0, %xmm5, %xmm0237; AVX-NEXT: vblendvps %xmm6, %xmm5, %xmm0, %xmm0238; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm5239; AVX-NEXT: vminss %xmm0, %xmm1, %xmm0240; AVX-NEXT: vblendvps %xmm5, %xmm1, %xmm0, %xmm0241; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm1242; AVX-NEXT: vminss %xmm0, %xmm4, %xmm0243; AVX-NEXT: vblendvps %xmm1, %xmm4, %xmm0, %xmm0244; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm1245; AVX-NEXT: vminss %xmm0, %xmm3, %xmm0246; AVX-NEXT: vblendvps %xmm1, %xmm3, %xmm0, %xmm0247; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm1248; AVX-NEXT: vminss %xmm0, %xmm2, %xmm0249; AVX-NEXT: vblendvps %xmm1, %xmm2, %xmm0, %xmm0250; AVX-NEXT: vzeroupper251; AVX-NEXT: retq252;253; AVX512BW-LABEL: test_v8f32:254; AVX512BW: # %bb.0:255; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm3256; AVX512BW-NEXT: vshufps {{.*#+}} xmm1 = xmm3[3,3,3,3]257; AVX512BW-NEXT: vshufpd {{.*#+}} xmm2 = xmm3[1,0]258; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]259; AVX512BW-NEXT: vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]260; AVX512BW-NEXT: vshufpd {{.*#+}} xmm6 = xmm0[1,0]261; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm7 = xmm0[1,1,3,3]262; AVX512BW-NEXT: vminss %xmm0, %xmm7, %xmm8263; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1264; AVX512BW-NEXT: vmovss %xmm7, %xmm8, %xmm8 {%k1}265; AVX512BW-NEXT: vcmpunordss %xmm8, %xmm8, %k1266; AVX512BW-NEXT: vminss %xmm8, %xmm6, %xmm0267; AVX512BW-NEXT: vmovss %xmm6, %xmm0, %xmm0 {%k1}268; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1269; AVX512BW-NEXT: vminss %xmm0, %xmm5, %xmm0270; AVX512BW-NEXT: vmovss %xmm5, %xmm0, %xmm0 {%k1}271; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1272; AVX512BW-NEXT: vminss %xmm0, %xmm3, %xmm0273; AVX512BW-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}274; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1275; AVX512BW-NEXT: vminss %xmm0, %xmm4, %xmm0276; AVX512BW-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}277; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1278; AVX512BW-NEXT: vminss %xmm0, %xmm2, %xmm0279; AVX512BW-NEXT: vmovss %xmm2, %xmm0, %xmm0 {%k1}280; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1281; AVX512BW-NEXT: vminss %xmm0, %xmm1, %xmm0282; AVX512BW-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}283; AVX512BW-NEXT: vzeroupper284; AVX512BW-NEXT: retq285;286; AVX512VL-LABEL: test_v8f32:287; AVX512VL: # %bb.0:288; AVX512VL-NEXT: vextractf128 $1, %ymm0, %xmm1289; AVX512VL-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]290; AVX512VL-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]291; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]292; AVX512VL-NEXT: vshufps {{.*#+}} xmm5 = xmm0[3,3,3,3]293; AVX512VL-NEXT: vshufpd {{.*#+}} xmm6 = xmm0[1,0]294; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm7 = xmm0[1,1,3,3]295; AVX512VL-NEXT: vminss %xmm0, %xmm7, %xmm8296; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1297; AVX512VL-NEXT: vmovss %xmm7, %xmm8, %xmm8 {%k1}298; AVX512VL-NEXT: vcmpunordss %xmm8, %xmm8, %k1299; AVX512VL-NEXT: vminss %xmm8, %xmm6, %xmm0300; AVX512VL-NEXT: vmovss %xmm6, %xmm0, %xmm0 {%k1}301; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1302; AVX512VL-NEXT: vminss %xmm0, %xmm5, %xmm0303; AVX512VL-NEXT: vmovss %xmm5, %xmm0, %xmm0 {%k1}304; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1305; AVX512VL-NEXT: vminss %xmm0, %xmm1, %xmm0306; AVX512VL-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}307; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1308; AVX512VL-NEXT: vminss %xmm0, %xmm4, %xmm0309; AVX512VL-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}310; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1311; AVX512VL-NEXT: vminss %xmm0, %xmm3, %xmm0312; AVX512VL-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}313; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1314; AVX512VL-NEXT: vminss %xmm0, %xmm2, %xmm0315; AVX512VL-NEXT: vmovss %xmm2, %xmm0, %xmm0 {%k1}316; AVX512VL-NEXT: vzeroupper317; AVX512VL-NEXT: retq318 %1 = call float @llvm.vector.reduce.fmin.v8f32(<8 x float> %a0)319 ret float %1320}321 322define float @test_v16f32(<16 x float> %a0) {323; SSE2-LABEL: test_v16f32:324; SSE2: # %bb.0:325; SSE2-NEXT: movaps %xmm2, %xmm4326; SSE2-NEXT: minps %xmm0, %xmm4327; SSE2-NEXT: cmpunordps %xmm0, %xmm0328; SSE2-NEXT: andps %xmm0, %xmm2329; SSE2-NEXT: andnps %xmm4, %xmm0330; SSE2-NEXT: orps %xmm2, %xmm0331; SSE2-NEXT: movaps %xmm3, %xmm2332; SSE2-NEXT: minps %xmm1, %xmm2333; SSE2-NEXT: cmpunordps %xmm1, %xmm1334; SSE2-NEXT: andps %xmm1, %xmm3335; SSE2-NEXT: andnps %xmm2, %xmm1336; SSE2-NEXT: orps %xmm3, %xmm1337; SSE2-NEXT: movaps %xmm1, %xmm2338; SSE2-NEXT: minps %xmm0, %xmm2339; SSE2-NEXT: cmpunordps %xmm0, %xmm0340; SSE2-NEXT: andps %xmm0, %xmm1341; SSE2-NEXT: andnps %xmm2, %xmm0342; SSE2-NEXT: orps %xmm1, %xmm0343; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]344; SSE2-NEXT: movaps %xmm0, %xmm1345; SSE2-NEXT: cmpunordss %xmm0, %xmm1346; SSE2-NEXT: movaps %xmm1, %xmm3347; SSE2-NEXT: andps %xmm2, %xmm3348; SSE2-NEXT: minss %xmm0, %xmm2349; SSE2-NEXT: andnps %xmm2, %xmm1350; SSE2-NEXT: orps %xmm3, %xmm1351; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]352; SSE2-NEXT: movdqa %xmm2, %xmm3353; SSE2-NEXT: minss %xmm1, %xmm3354; SSE2-NEXT: cmpunordss %xmm1, %xmm1355; SSE2-NEXT: movaps %xmm1, %xmm4356; SSE2-NEXT: andnps %xmm3, %xmm4357; SSE2-NEXT: andps %xmm2, %xmm1358; SSE2-NEXT: orps %xmm4, %xmm1359; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]360; SSE2-NEXT: movdqa %xmm0, %xmm2361; SSE2-NEXT: minss %xmm1, %xmm2362; SSE2-NEXT: cmpunordss %xmm1, %xmm1363; SSE2-NEXT: movaps %xmm1, %xmm3364; SSE2-NEXT: andnps %xmm2, %xmm3365; SSE2-NEXT: andps %xmm0, %xmm1366; SSE2-NEXT: orps %xmm3, %xmm1367; SSE2-NEXT: movaps %xmm1, %xmm0368; SSE2-NEXT: retq369;370; SSE41-LABEL: test_v16f32:371; SSE41: # %bb.0:372; SSE41-NEXT: movaps %xmm2, %xmm4373; SSE41-NEXT: minps %xmm0, %xmm4374; SSE41-NEXT: cmpunordps %xmm0, %xmm0375; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm4376; SSE41-NEXT: movaps %xmm3, %xmm2377; SSE41-NEXT: minps %xmm1, %xmm2378; SSE41-NEXT: cmpunordps %xmm1, %xmm1379; SSE41-NEXT: movaps %xmm1, %xmm0380; SSE41-NEXT: blendvps %xmm0, %xmm3, %xmm2381; SSE41-NEXT: movaps %xmm2, %xmm3382; SSE41-NEXT: minps %xmm4, %xmm3383; SSE41-NEXT: cmpunordps %xmm4, %xmm4384; SSE41-NEXT: movaps %xmm4, %xmm0385; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm3386; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm3[1,1,3,3]387; SSE41-NEXT: movaps %xmm2, %xmm1388; SSE41-NEXT: minss %xmm3, %xmm1389; SSE41-NEXT: movaps %xmm3, %xmm0390; SSE41-NEXT: cmpunordss %xmm3, %xmm0391; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm1392; SSE41-NEXT: movaps %xmm3, %xmm4393; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm3[1]394; SSE41-NEXT: movaps %xmm4, %xmm2395; SSE41-NEXT: minss %xmm1, %xmm2396; SSE41-NEXT: cmpunordss %xmm1, %xmm1397; SSE41-NEXT: movaps %xmm1, %xmm0398; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm2399; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]400; SSE41-NEXT: movaps %xmm3, %xmm1401; SSE41-NEXT: minss %xmm2, %xmm1402; SSE41-NEXT: cmpunordss %xmm2, %xmm2403; SSE41-NEXT: movaps %xmm2, %xmm0404; SSE41-NEXT: blendvps %xmm0, %xmm3, %xmm1405; SSE41-NEXT: movaps %xmm1, %xmm0406; SSE41-NEXT: retq407;408; AVX-LABEL: test_v16f32:409; AVX: # %bb.0:410; AVX-NEXT: vminps %ymm0, %ymm1, %ymm2411; AVX-NEXT: vcmpunordps %ymm0, %ymm0, %ymm0412; AVX-NEXT: vblendvps %ymm0, %ymm1, %ymm2, %ymm0413; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]414; AVX-NEXT: vminss %xmm0, %xmm1, %xmm2415; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm3416; AVX-NEXT: vblendvps %xmm3, %xmm1, %xmm2, %xmm1417; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2418; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]419; AVX-NEXT: vminss %xmm1, %xmm3, %xmm1420; AVX-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1421; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2422; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]423; AVX-NEXT: vminss %xmm1, %xmm3, %xmm1424; AVX-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1425; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2426; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0427; AVX-NEXT: vminss %xmm1, %xmm0, %xmm1428; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm1429; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2430; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]431; AVX-NEXT: vminss %xmm1, %xmm3, %xmm1432; AVX-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1433; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2434; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]435; AVX-NEXT: vminss %xmm1, %xmm3, %xmm1436; AVX-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1437; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2438; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]439; AVX-NEXT: vminss %xmm1, %xmm0, %xmm1440; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0441; AVX-NEXT: vzeroupper442; AVX-NEXT: retq443;444; AVX512BW-LABEL: test_v16f32:445; AVX512BW: # %bb.0:446; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1447; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]448; AVX512BW-NEXT: vminss %xmm0, %xmm2, %xmm3449; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1450; AVX512BW-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}451; AVX512BW-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]452; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1453; AVX512BW-NEXT: vminss %xmm3, %xmm2, %xmm3454; AVX512BW-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}455; AVX512BW-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]456; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1457; AVX512BW-NEXT: vminss %xmm3, %xmm2, %xmm3458; AVX512BW-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}459; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]460; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1461; AVX512BW-NEXT: vminss %xmm3, %xmm1, %xmm3462; AVX512BW-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}463; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1464; AVX512BW-NEXT: vminss %xmm3, %xmm2, %xmm3465; AVX512BW-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}466; AVX512BW-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]467; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1468; AVX512BW-NEXT: vminss %xmm3, %xmm2, %xmm3469; AVX512BW-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}470; AVX512BW-NEXT: vextractf32x4 $2, %zmm0, %xmm2471; AVX512BW-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]472; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1473; AVX512BW-NEXT: vminss %xmm3, %xmm1, %xmm3474; AVX512BW-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}475; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]476; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1477; AVX512BW-NEXT: vminss %xmm3, %xmm2, %xmm3478; AVX512BW-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}479; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1480; AVX512BW-NEXT: vminss %xmm3, %xmm1, %xmm3481; AVX512BW-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}482; AVX512BW-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]483; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1484; AVX512BW-NEXT: vminss %xmm3, %xmm1, %xmm3485; AVX512BW-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}486; AVX512BW-NEXT: vextractf32x4 $3, %zmm0, %xmm0487; AVX512BW-NEXT: vshufps {{.*#+}} xmm1 = xmm2[3,3,3,3]488; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1489; AVX512BW-NEXT: vminss %xmm3, %xmm1, %xmm2490; AVX512BW-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}491; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]492; AVX512BW-NEXT: vcmpunordss %xmm2, %xmm2, %k1493; AVX512BW-NEXT: vminss %xmm2, %xmm0, %xmm2494; AVX512BW-NEXT: vmovss %xmm0, %xmm2, %xmm2 {%k1}495; AVX512BW-NEXT: vcmpunordss %xmm2, %xmm2, %k1496; AVX512BW-NEXT: vminss %xmm2, %xmm1, %xmm2497; AVX512BW-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}498; AVX512BW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]499; AVX512BW-NEXT: vcmpunordss %xmm2, %xmm2, %k1500; AVX512BW-NEXT: vminss %xmm2, %xmm1, %xmm2501; AVX512BW-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}502; AVX512BW-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]503; AVX512BW-NEXT: vcmpunordss %xmm2, %xmm2, %k1504; AVX512BW-NEXT: vminss %xmm2, %xmm1, %xmm0505; AVX512BW-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}506; AVX512BW-NEXT: vzeroupper507; AVX512BW-NEXT: retq508;509; AVX512VL-LABEL: test_v16f32:510; AVX512VL: # %bb.0:511; AVX512VL-NEXT: vextractf32x4 $3, %zmm0, %xmm3512; AVX512VL-NEXT: vshufps {{.*#+}} xmm1 = xmm3[3,3,3,3]513; AVX512VL-NEXT: vshufpd {{.*#+}} xmm2 = xmm3[1,0]514; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]515; AVX512VL-NEXT: vextractf32x4 $2, %zmm0, %xmm6516; AVX512VL-NEXT: vshufps {{.*#+}} xmm5 = xmm6[3,3,3,3]517; AVX512VL-NEXT: vshufpd {{.*#+}} xmm7 = xmm6[1,0]518; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm8 = xmm6[1,1,3,3]519; AVX512VL-NEXT: vextractf128 $1, %ymm0, %xmm9520; AVX512VL-NEXT: vshufps {{.*#+}} xmm10 = xmm9[3,3,3,3]521; AVX512VL-NEXT: vshufpd {{.*#+}} xmm11 = xmm9[1,0]522; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm12 = xmm9[1,1,3,3]523; AVX512VL-NEXT: vshufps {{.*#+}} xmm13 = xmm0[3,3,3,3]524; AVX512VL-NEXT: vshufpd {{.*#+}} xmm14 = xmm0[1,0]525; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm15 = xmm0[1,1,3,3]526; AVX512VL-NEXT: vminss %xmm0, %xmm15, %xmm16527; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1528; AVX512VL-NEXT: vmovss %xmm15, %xmm16, %xmm16 {%k1}529; AVX512VL-NEXT: vcmpunordss %xmm16, %xmm16, %k1530; AVX512VL-NEXT: vminss %xmm16, %xmm14, %xmm0531; AVX512VL-NEXT: vmovss %xmm14, %xmm0, %xmm0 {%k1}532; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1533; AVX512VL-NEXT: vminss %xmm0, %xmm13, %xmm0534; AVX512VL-NEXT: vmovss %xmm13, %xmm0, %xmm0 {%k1}535; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1536; AVX512VL-NEXT: vminss %xmm0, %xmm9, %xmm0537; AVX512VL-NEXT: vmovss %xmm9, %xmm0, %xmm0 {%k1}538; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1539; AVX512VL-NEXT: vminss %xmm0, %xmm12, %xmm0540; AVX512VL-NEXT: vmovss %xmm12, %xmm0, %xmm0 {%k1}541; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1542; AVX512VL-NEXT: vminss %xmm0, %xmm11, %xmm0543; AVX512VL-NEXT: vmovss %xmm11, %xmm0, %xmm0 {%k1}544; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1545; AVX512VL-NEXT: vminss %xmm0, %xmm10, %xmm0546; AVX512VL-NEXT: vmovss %xmm10, %xmm0, %xmm0 {%k1}547; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1548; AVX512VL-NEXT: vminss %xmm0, %xmm6, %xmm0549; AVX512VL-NEXT: vmovss %xmm6, %xmm0, %xmm0 {%k1}550; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1551; AVX512VL-NEXT: vminss %xmm0, %xmm8, %xmm0552; AVX512VL-NEXT: vmovss %xmm8, %xmm0, %xmm0 {%k1}553; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1554; AVX512VL-NEXT: vminss %xmm0, %xmm7, %xmm0555; AVX512VL-NEXT: vmovss %xmm7, %xmm0, %xmm0 {%k1}556; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1557; AVX512VL-NEXT: vminss %xmm0, %xmm5, %xmm0558; AVX512VL-NEXT: vmovss %xmm5, %xmm0, %xmm0 {%k1}559; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1560; AVX512VL-NEXT: vminss %xmm0, %xmm3, %xmm0561; AVX512VL-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}562; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1563; AVX512VL-NEXT: vminss %xmm0, %xmm4, %xmm0564; AVX512VL-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}565; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1566; AVX512VL-NEXT: vminss %xmm0, %xmm2, %xmm0567; AVX512VL-NEXT: vmovss %xmm2, %xmm0, %xmm0 {%k1}568; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1569; AVX512VL-NEXT: vminss %xmm0, %xmm1, %xmm0570; AVX512VL-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}571; AVX512VL-NEXT: vzeroupper572; AVX512VL-NEXT: retq573 %1 = call float @llvm.vector.reduce.fmin.v16f32(<16 x float> %a0)574 ret float %1575}576 577;578; vXf64579;580 581define double @test_v2f64(<2 x double> %a0) {582; SSE2-LABEL: test_v2f64:583; SSE2: # %bb.0:584; SSE2-NEXT: movapd %xmm0, %xmm2585; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]586; SSE2-NEXT: movapd %xmm0, %xmm1587; SSE2-NEXT: cmpunordsd %xmm0, %xmm1588; SSE2-NEXT: movapd %xmm1, %xmm3589; SSE2-NEXT: andpd %xmm2, %xmm3590; SSE2-NEXT: minsd %xmm0, %xmm2591; SSE2-NEXT: andnpd %xmm2, %xmm1592; SSE2-NEXT: orpd %xmm3, %xmm1593; SSE2-NEXT: movapd %xmm1, %xmm0594; SSE2-NEXT: retq595;596; SSE41-LABEL: test_v2f64:597; SSE41: # %bb.0:598; SSE41-NEXT: movapd %xmm0, %xmm2599; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]600; SSE41-NEXT: movapd %xmm2, %xmm1601; SSE41-NEXT: minsd %xmm0, %xmm1602; SSE41-NEXT: cmpunordsd %xmm0, %xmm0603; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1604; SSE41-NEXT: movapd %xmm1, %xmm0605; SSE41-NEXT: retq606;607; AVX-LABEL: test_v2f64:608; AVX: # %bb.0:609; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]610; AVX-NEXT: vminsd %xmm0, %xmm1, %xmm2611; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm0612; AVX-NEXT: vblendvpd %xmm0, %xmm1, %xmm2, %xmm0613; AVX-NEXT: retq614;615; AVX512-LABEL: test_v2f64:616; AVX512: # %bb.0:617; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]618; AVX512-NEXT: vminsd %xmm0, %xmm2, %xmm1619; AVX512-NEXT: vcmpunordsd %xmm0, %xmm0, %k1620; AVX512-NEXT: vmovsd %xmm2, %xmm1, %xmm1 {%k1}621; AVX512-NEXT: vmovapd %xmm1, %xmm0622; AVX512-NEXT: retq623 %1 = call double @llvm.vector.reduce.fmin.v2f64(<2 x double> %a0)624 ret double %1625}626 627define double @test_v3f64(<3 x double> %a0) {628; SSE2-LABEL: test_v3f64:629; SSE2: # %bb.0:630; SSE2-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]631; SSE2-NEXT: shufpd {{.*#+}} xmm2 = xmm2[0],mem[1]632; SSE2-NEXT: movapd %xmm2, %xmm1633; SSE2-NEXT: minpd %xmm0, %xmm1634; SSE2-NEXT: cmpunordpd %xmm0, %xmm0635; SSE2-NEXT: andpd %xmm0, %xmm2636; SSE2-NEXT: andnpd %xmm1, %xmm0637; SSE2-NEXT: orpd %xmm2, %xmm0638; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]639; SSE2-NEXT: movapd %xmm0, %xmm1640; SSE2-NEXT: cmpunordsd %xmm0, %xmm1641; SSE2-NEXT: movapd %xmm1, %xmm3642; SSE2-NEXT: andpd %xmm2, %xmm3643; SSE2-NEXT: minsd %xmm0, %xmm2644; SSE2-NEXT: andnpd %xmm2, %xmm1645; SSE2-NEXT: orpd %xmm3, %xmm1646; SSE2-NEXT: movapd %xmm1, %xmm0647; SSE2-NEXT: retq648;649; SSE41-LABEL: test_v3f64:650; SSE41: # %bb.0:651; SSE41-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]652; SSE41-NEXT: blendpd {{.*#+}} xmm2 = xmm2[0],mem[1]653; SSE41-NEXT: movapd %xmm2, %xmm1654; SSE41-NEXT: minpd %xmm0, %xmm1655; SSE41-NEXT: cmpunordpd %xmm0, %xmm0656; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1657; SSE41-NEXT: movapd %xmm1, %xmm3658; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]659; SSE41-NEXT: movapd %xmm3, %xmm2660; SSE41-NEXT: minsd %xmm1, %xmm2661; SSE41-NEXT: cmpunordsd %xmm1, %xmm1662; SSE41-NEXT: movapd %xmm1, %xmm0663; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm2664; SSE41-NEXT: movapd %xmm2, %xmm0665; SSE41-NEXT: retq666;667; AVX-LABEL: test_v3f64:668; AVX: # %bb.0:669; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]670; AVX-NEXT: vminsd %xmm0, %xmm1, %xmm2671; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm3672; AVX-NEXT: vblendvpd %xmm3, %xmm1, %xmm2, %xmm1673; AVX-NEXT: vcmpunordsd %xmm1, %xmm1, %xmm2674; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0675; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm1676; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0677; AVX-NEXT: vzeroupper678; AVX-NEXT: retq679;680; AVX512-LABEL: test_v3f64:681; AVX512: # %bb.0:682; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]683; AVX512-NEXT: vminsd %xmm0, %xmm1, %xmm2684; AVX512-NEXT: vcmpunordsd %xmm0, %xmm0, %k1685; AVX512-NEXT: vmovsd %xmm1, %xmm2, %xmm2 {%k1}686; AVX512-NEXT: vcmpunordsd %xmm2, %xmm2, %k1687; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1688; AVX512-NEXT: vminsd %xmm2, %xmm1, %xmm0689; AVX512-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}690; AVX512-NEXT: vzeroupper691; AVX512-NEXT: retq692 %1 = call double @llvm.vector.reduce.fmin.v3f64(<3 x double> %a0)693 ret double %1694}695 696define double @test_v4f64(<4 x double> %a0) {697; SSE2-LABEL: test_v4f64:698; SSE2: # %bb.0:699; SSE2-NEXT: movapd %xmm1, %xmm2700; SSE2-NEXT: minpd %xmm0, %xmm2701; SSE2-NEXT: cmpunordpd %xmm0, %xmm0702; SSE2-NEXT: andpd %xmm0, %xmm1703; SSE2-NEXT: andnpd %xmm2, %xmm0704; SSE2-NEXT: orpd %xmm1, %xmm0705; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]706; SSE2-NEXT: movapd %xmm0, %xmm1707; SSE2-NEXT: cmpunordsd %xmm0, %xmm1708; SSE2-NEXT: movapd %xmm1, %xmm3709; SSE2-NEXT: andpd %xmm2, %xmm3710; SSE2-NEXT: minsd %xmm0, %xmm2711; SSE2-NEXT: andnpd %xmm2, %xmm1712; SSE2-NEXT: orpd %xmm3, %xmm1713; SSE2-NEXT: movapd %xmm1, %xmm0714; SSE2-NEXT: retq715;716; SSE41-LABEL: test_v4f64:717; SSE41: # %bb.0:718; SSE41-NEXT: movapd %xmm1, %xmm2719; SSE41-NEXT: minpd %xmm0, %xmm2720; SSE41-NEXT: cmpunordpd %xmm0, %xmm0721; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm2722; SSE41-NEXT: movapd %xmm2, %xmm3723; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm2[1]724; SSE41-NEXT: movapd %xmm3, %xmm1725; SSE41-NEXT: minsd %xmm2, %xmm1726; SSE41-NEXT: cmpunordsd %xmm2, %xmm2727; SSE41-NEXT: movapd %xmm2, %xmm0728; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1729; SSE41-NEXT: movapd %xmm1, %xmm0730; SSE41-NEXT: retq731;732; AVX-LABEL: test_v4f64:733; AVX: # %bb.0:734; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1735; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]736; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]737; AVX-NEXT: vminsd %xmm0, %xmm3, %xmm4738; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm0739; AVX-NEXT: vblendvpd %xmm0, %xmm3, %xmm4, %xmm0740; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm3741; AVX-NEXT: vminsd %xmm0, %xmm1, %xmm0742; AVX-NEXT: vblendvpd %xmm3, %xmm1, %xmm0, %xmm0743; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm1744; AVX-NEXT: vminsd %xmm0, %xmm2, %xmm0745; AVX-NEXT: vblendvpd %xmm1, %xmm2, %xmm0, %xmm0746; AVX-NEXT: vzeroupper747; AVX-NEXT: retq748;749; AVX512-LABEL: test_v4f64:750; AVX512: # %bb.0:751; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1752; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]753; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]754; AVX512-NEXT: vminsd %xmm0, %xmm3, %xmm4755; AVX512-NEXT: vcmpunordsd %xmm0, %xmm0, %k1756; AVX512-NEXT: vmovsd %xmm3, %xmm4, %xmm4 {%k1}757; AVX512-NEXT: vcmpunordsd %xmm4, %xmm4, %k1758; AVX512-NEXT: vminsd %xmm4, %xmm1, %xmm0759; AVX512-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}760; AVX512-NEXT: vcmpunordsd %xmm0, %xmm0, %k1761; AVX512-NEXT: vminsd %xmm0, %xmm2, %xmm0762; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm0 {%k1}763; AVX512-NEXT: vzeroupper764; AVX512-NEXT: retq765 %1 = call double @llvm.vector.reduce.fmin.v4f64(<4 x double> %a0)766 ret double %1767}768 769define double @test_v8f64(<8 x double> %a0) {770; SSE2-LABEL: test_v8f64:771; SSE2: # %bb.0:772; SSE2-NEXT: movapd %xmm2, %xmm4773; SSE2-NEXT: minpd %xmm0, %xmm4774; SSE2-NEXT: cmpunordpd %xmm0, %xmm0775; SSE2-NEXT: andpd %xmm0, %xmm2776; SSE2-NEXT: andnpd %xmm4, %xmm0777; SSE2-NEXT: orpd %xmm2, %xmm0778; SSE2-NEXT: movapd %xmm3, %xmm2779; SSE2-NEXT: minpd %xmm1, %xmm2780; SSE2-NEXT: cmpunordpd %xmm1, %xmm1781; SSE2-NEXT: andpd %xmm1, %xmm3782; SSE2-NEXT: andnpd %xmm2, %xmm1783; SSE2-NEXT: orpd %xmm3, %xmm1784; SSE2-NEXT: movapd %xmm1, %xmm2785; SSE2-NEXT: minpd %xmm0, %xmm2786; SSE2-NEXT: cmpunordpd %xmm0, %xmm0787; SSE2-NEXT: andpd %xmm0, %xmm1788; SSE2-NEXT: andnpd %xmm2, %xmm0789; SSE2-NEXT: orpd %xmm1, %xmm0790; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]791; SSE2-NEXT: movapd %xmm0, %xmm1792; SSE2-NEXT: cmpunordsd %xmm0, %xmm1793; SSE2-NEXT: movapd %xmm1, %xmm3794; SSE2-NEXT: andpd %xmm2, %xmm3795; SSE2-NEXT: minsd %xmm0, %xmm2796; SSE2-NEXT: andnpd %xmm2, %xmm1797; SSE2-NEXT: orpd %xmm3, %xmm1798; SSE2-NEXT: movapd %xmm1, %xmm0799; SSE2-NEXT: retq800;801; SSE41-LABEL: test_v8f64:802; SSE41: # %bb.0:803; SSE41-NEXT: movapd %xmm2, %xmm4804; SSE41-NEXT: minpd %xmm0, %xmm4805; SSE41-NEXT: cmpunordpd %xmm0, %xmm0806; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm4807; SSE41-NEXT: movapd %xmm3, %xmm2808; SSE41-NEXT: minpd %xmm1, %xmm2809; SSE41-NEXT: cmpunordpd %xmm1, %xmm1810; SSE41-NEXT: movapd %xmm1, %xmm0811; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm2812; SSE41-NEXT: movapd %xmm2, %xmm1813; SSE41-NEXT: minpd %xmm4, %xmm1814; SSE41-NEXT: cmpunordpd %xmm4, %xmm4815; SSE41-NEXT: movapd %xmm4, %xmm0816; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1817; SSE41-NEXT: movapd %xmm1, %xmm3818; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]819; SSE41-NEXT: movapd %xmm3, %xmm2820; SSE41-NEXT: minsd %xmm1, %xmm2821; SSE41-NEXT: cmpunordsd %xmm1, %xmm1822; SSE41-NEXT: movapd %xmm1, %xmm0823; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm2824; SSE41-NEXT: movapd %xmm2, %xmm0825; SSE41-NEXT: retq826;827; AVX-LABEL: test_v8f64:828; AVX: # %bb.0:829; AVX-NEXT: vminpd %ymm0, %ymm1, %ymm2830; AVX-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm0831; AVX-NEXT: vblendvpd %ymm0, %ymm1, %ymm2, %ymm0832; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]833; AVX-NEXT: vminsd %xmm0, %xmm1, %xmm2834; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm3835; AVX-NEXT: vblendvpd %xmm3, %xmm1, %xmm2, %xmm1836; AVX-NEXT: vcmpunordsd %xmm1, %xmm1, %xmm2837; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0838; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm1839; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm1840; AVX-NEXT: vcmpunordsd %xmm1, %xmm1, %xmm2841; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]842; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm1843; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0844; AVX-NEXT: vzeroupper845; AVX-NEXT: retq846;847; AVX512BW-LABEL: test_v8f64:848; AVX512BW: # %bb.0:849; AVX512BW-NEXT: vextractf32x4 $3, %zmm0, %xmm2850; AVX512BW-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]851; AVX512BW-NEXT: vextractf32x4 $2, %zmm0, %xmm3852; AVX512BW-NEXT: vshufpd {{.*#+}} xmm4 = xmm3[1,0]853; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm5854; AVX512BW-NEXT: vshufpd {{.*#+}} xmm6 = xmm5[1,0]855; AVX512BW-NEXT: vshufpd {{.*#+}} xmm7 = xmm0[1,0]856; AVX512BW-NEXT: vminsd %xmm0, %xmm7, %xmm8857; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1858; AVX512BW-NEXT: vmovsd %xmm7, %xmm8, %xmm8 {%k1}859; AVX512BW-NEXT: vcmpunordsd %xmm8, %xmm8, %k1860; AVX512BW-NEXT: vminsd %xmm8, %xmm5, %xmm0861; AVX512BW-NEXT: vmovsd %xmm5, %xmm0, %xmm0 {%k1}862; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1863; AVX512BW-NEXT: vminsd %xmm0, %xmm6, %xmm0864; AVX512BW-NEXT: vmovsd %xmm6, %xmm0, %xmm0 {%k1}865; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1866; AVX512BW-NEXT: vminsd %xmm0, %xmm3, %xmm0867; AVX512BW-NEXT: vmovsd %xmm3, %xmm0, %xmm0 {%k1}868; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1869; AVX512BW-NEXT: vminsd %xmm0, %xmm4, %xmm0870; AVX512BW-NEXT: vmovsd %xmm4, %xmm0, %xmm0 {%k1}871; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1872; AVX512BW-NEXT: vminsd %xmm0, %xmm2, %xmm0873; AVX512BW-NEXT: vmovsd %xmm2, %xmm0, %xmm0 {%k1}874; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1875; AVX512BW-NEXT: vminsd %xmm0, %xmm1, %xmm0876; AVX512BW-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}877; AVX512BW-NEXT: vzeroupper878; AVX512BW-NEXT: retq879;880; AVX512VL-LABEL: test_v8f64:881; AVX512VL: # %bb.0:882; AVX512VL-NEXT: vextractf32x4 $3, %zmm0, %xmm1883; AVX512VL-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]884; AVX512VL-NEXT: vextractf32x4 $2, %zmm0, %xmm3885; AVX512VL-NEXT: vshufpd {{.*#+}} xmm4 = xmm3[1,0]886; AVX512VL-NEXT: vextractf128 $1, %ymm0, %xmm5887; AVX512VL-NEXT: vshufpd {{.*#+}} xmm6 = xmm5[1,0]888; AVX512VL-NEXT: vshufpd {{.*#+}} xmm7 = xmm0[1,0]889; AVX512VL-NEXT: vminsd %xmm0, %xmm7, %xmm8890; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1891; AVX512VL-NEXT: vmovsd %xmm7, %xmm8, %xmm8 {%k1}892; AVX512VL-NEXT: vcmpunordsd %xmm8, %xmm8, %k1893; AVX512VL-NEXT: vminsd %xmm8, %xmm5, %xmm0894; AVX512VL-NEXT: vmovsd %xmm5, %xmm0, %xmm0 {%k1}895; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1896; AVX512VL-NEXT: vminsd %xmm0, %xmm6, %xmm0897; AVX512VL-NEXT: vmovsd %xmm6, %xmm0, %xmm0 {%k1}898; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1899; AVX512VL-NEXT: vminsd %xmm0, %xmm3, %xmm0900; AVX512VL-NEXT: vmovsd %xmm3, %xmm0, %xmm0 {%k1}901; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1902; AVX512VL-NEXT: vminsd %xmm0, %xmm4, %xmm0903; AVX512VL-NEXT: vmovsd %xmm4, %xmm0, %xmm0 {%k1}904; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1905; AVX512VL-NEXT: vminsd %xmm0, %xmm1, %xmm0906; AVX512VL-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}907; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1908; AVX512VL-NEXT: vminsd %xmm0, %xmm2, %xmm0909; AVX512VL-NEXT: vmovsd %xmm2, %xmm0, %xmm0 {%k1}910; AVX512VL-NEXT: vzeroupper911; AVX512VL-NEXT: retq912 %1 = call double @llvm.vector.reduce.fmin.v8f64(<8 x double> %a0)913 ret double %1914}915 916define double @test_v16f64(<16 x double> %a0) {917; SSE2-LABEL: test_v16f64:918; SSE2: # %bb.0:919; SSE2-NEXT: movapd %xmm4, %xmm8920; SSE2-NEXT: minpd %xmm0, %xmm8921; SSE2-NEXT: cmpunordpd %xmm0, %xmm0922; SSE2-NEXT: andpd %xmm0, %xmm4923; SSE2-NEXT: andnpd %xmm8, %xmm0924; SSE2-NEXT: orpd %xmm4, %xmm0925; SSE2-NEXT: movapd %xmm6, %xmm4926; SSE2-NEXT: minpd %xmm2, %xmm4927; SSE2-NEXT: cmpunordpd %xmm2, %xmm2928; SSE2-NEXT: andpd %xmm2, %xmm6929; SSE2-NEXT: andnpd %xmm4, %xmm2930; SSE2-NEXT: orpd %xmm6, %xmm2931; SSE2-NEXT: movapd %xmm2, %xmm4932; SSE2-NEXT: minpd %xmm0, %xmm4933; SSE2-NEXT: cmpunordpd %xmm0, %xmm0934; SSE2-NEXT: andpd %xmm0, %xmm2935; SSE2-NEXT: andnpd %xmm4, %xmm0936; SSE2-NEXT: orpd %xmm2, %xmm0937; SSE2-NEXT: movapd %xmm5, %xmm2938; SSE2-NEXT: minpd %xmm1, %xmm2939; SSE2-NEXT: cmpunordpd %xmm1, %xmm1940; SSE2-NEXT: andpd %xmm1, %xmm5941; SSE2-NEXT: andnpd %xmm2, %xmm1942; SSE2-NEXT: orpd %xmm5, %xmm1943; SSE2-NEXT: movapd %xmm7, %xmm2944; SSE2-NEXT: minpd %xmm3, %xmm2945; SSE2-NEXT: cmpunordpd %xmm3, %xmm3946; SSE2-NEXT: andpd %xmm3, %xmm7947; SSE2-NEXT: andnpd %xmm2, %xmm3948; SSE2-NEXT: orpd %xmm7, %xmm3949; SSE2-NEXT: movapd %xmm3, %xmm2950; SSE2-NEXT: minpd %xmm1, %xmm2951; SSE2-NEXT: cmpunordpd %xmm1, %xmm1952; SSE2-NEXT: andpd %xmm1, %xmm3953; SSE2-NEXT: andnpd %xmm2, %xmm1954; SSE2-NEXT: orpd %xmm3, %xmm1955; SSE2-NEXT: movapd %xmm1, %xmm2956; SSE2-NEXT: minpd %xmm0, %xmm2957; SSE2-NEXT: cmpunordpd %xmm0, %xmm0958; SSE2-NEXT: andpd %xmm0, %xmm1959; SSE2-NEXT: andnpd %xmm2, %xmm0960; SSE2-NEXT: orpd %xmm1, %xmm0961; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]962; SSE2-NEXT: movapd %xmm0, %xmm1963; SSE2-NEXT: cmpunordsd %xmm0, %xmm1964; SSE2-NEXT: movapd %xmm1, %xmm3965; SSE2-NEXT: andpd %xmm2, %xmm3966; SSE2-NEXT: minsd %xmm0, %xmm2967; SSE2-NEXT: andnpd %xmm2, %xmm1968; SSE2-NEXT: orpd %xmm3, %xmm1969; SSE2-NEXT: movapd %xmm1, %xmm0970; SSE2-NEXT: retq971;972; SSE41-LABEL: test_v16f64:973; SSE41: # %bb.0:974; SSE41-NEXT: movapd %xmm4, %xmm8975; SSE41-NEXT: minpd %xmm0, %xmm8976; SSE41-NEXT: cmpunordpd %xmm0, %xmm0977; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm8978; SSE41-NEXT: movapd %xmm6, %xmm4979; SSE41-NEXT: minpd %xmm2, %xmm4980; SSE41-NEXT: cmpunordpd %xmm2, %xmm2981; SSE41-NEXT: movapd %xmm2, %xmm0982; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm4983; SSE41-NEXT: movapd %xmm4, %xmm2984; SSE41-NEXT: minpd %xmm8, %xmm2985; SSE41-NEXT: cmpunordpd %xmm8, %xmm8986; SSE41-NEXT: movapd %xmm8, %xmm0987; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm2988; SSE41-NEXT: movapd %xmm5, %xmm4989; SSE41-NEXT: minpd %xmm1, %xmm4990; SSE41-NEXT: cmpunordpd %xmm1, %xmm1991; SSE41-NEXT: movapd %xmm1, %xmm0992; SSE41-NEXT: blendvpd %xmm0, %xmm5, %xmm4993; SSE41-NEXT: movapd %xmm7, %xmm1994; SSE41-NEXT: minpd %xmm3, %xmm1995; SSE41-NEXT: cmpunordpd %xmm3, %xmm3996; SSE41-NEXT: movapd %xmm3, %xmm0997; SSE41-NEXT: blendvpd %xmm0, %xmm7, %xmm1998; SSE41-NEXT: movapd %xmm1, %xmm3999; SSE41-NEXT: minpd %xmm4, %xmm31000; SSE41-NEXT: cmpunordpd %xmm4, %xmm41001; SSE41-NEXT: movapd %xmm4, %xmm01002; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm31003; SSE41-NEXT: movapd %xmm3, %xmm11004; SSE41-NEXT: minpd %xmm2, %xmm11005; SSE41-NEXT: cmpunordpd %xmm2, %xmm21006; SSE41-NEXT: movapd %xmm2, %xmm01007; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm11008; SSE41-NEXT: movapd %xmm1, %xmm31009; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]1010; SSE41-NEXT: movapd %xmm3, %xmm21011; SSE41-NEXT: minsd %xmm1, %xmm21012; SSE41-NEXT: cmpunordsd %xmm1, %xmm11013; SSE41-NEXT: movapd %xmm1, %xmm01014; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm21015; SSE41-NEXT: movapd %xmm2, %xmm01016; SSE41-NEXT: retq1017;1018; AVX-LABEL: test_v16f64:1019; AVX: # %bb.0:1020; AVX-NEXT: vminpd %ymm0, %ymm2, %ymm41021; AVX-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm01022; AVX-NEXT: vblendvpd %ymm0, %ymm2, %ymm4, %ymm01023; AVX-NEXT: vminpd %ymm1, %ymm3, %ymm21024; AVX-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm11025; AVX-NEXT: vblendvpd %ymm1, %ymm3, %ymm2, %ymm11026; AVX-NEXT: vminpd %ymm0, %ymm1, %ymm21027; AVX-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm01028; AVX-NEXT: vblendvpd %ymm0, %ymm1, %ymm2, %ymm01029; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1030; AVX-NEXT: vminsd %xmm0, %xmm1, %xmm21031; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm31032; AVX-NEXT: vblendvpd %xmm3, %xmm1, %xmm2, %xmm11033; AVX-NEXT: vcmpunordsd %xmm1, %xmm1, %xmm21034; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01035; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm11036; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm11037; AVX-NEXT: vcmpunordsd %xmm1, %xmm1, %xmm21038; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1039; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm11040; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm01041; AVX-NEXT: vzeroupper1042; AVX-NEXT: retq1043;1044; AVX512-LABEL: test_v16f64:1045; AVX512: # %bb.0:1046; AVX512-NEXT: vminpd %zmm0, %zmm1, %zmm21047; AVX512-NEXT: vcmpunordpd %zmm0, %zmm0, %k11048; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1}1049; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm2[1,0]1050; AVX512-NEXT: vminsd %xmm2, %xmm0, %xmm11051; AVX512-NEXT: vcmpunordsd %xmm2, %xmm2, %k11052; AVX512-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}1053; AVX512-NEXT: vcmpunordsd %xmm1, %xmm1, %k11054; AVX512-NEXT: vextractf128 $1, %ymm2, %xmm01055; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm11056; AVX512-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}1057; AVX512-NEXT: vcmpunordsd %xmm1, %xmm1, %k11058; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1059; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm11060; AVX512-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}1061; AVX512-NEXT: vcmpunordsd %xmm1, %xmm1, %k11062; AVX512-NEXT: vextractf32x4 $2, %zmm2, %xmm01063; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm11064; AVX512-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}1065; AVX512-NEXT: vcmpunordsd %xmm1, %xmm1, %k11066; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1067; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm11068; AVX512-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}1069; AVX512-NEXT: vcmpunordsd %xmm1, %xmm1, %k11070; AVX512-NEXT: vextractf32x4 $3, %zmm2, %xmm01071; AVX512-NEXT: vminsd %xmm1, %xmm0, %xmm11072; AVX512-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}1073; AVX512-NEXT: vcmpunordsd %xmm1, %xmm1, %k11074; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1075; AVX512-NEXT: vminsd %xmm1, %xmm2, %xmm01076; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm0 {%k1}1077; AVX512-NEXT: vzeroupper1078; AVX512-NEXT: retq1079 %1 = call double @llvm.vector.reduce.fmin.v16f64(<16 x double> %a0)1080 ret double %11081}1082 1083declare float @llvm.vector.reduce.fmin.v1f32(<1 x float>)1084declare float @llvm.vector.reduce.fmin.v2f32(<2 x float>)1085declare float @llvm.vector.reduce.fmin.v4f32(<4 x float>)1086declare float @llvm.vector.reduce.fmin.v8f32(<8 x float>)1087declare float @llvm.vector.reduce.fmin.v16f32(<16 x float>)1088 1089declare double @llvm.vector.reduce.fmin.v2f64(<2 x double>)1090declare double @llvm.vector.reduce.fmin.v3f64(<3 x double>)1091declare double @llvm.vector.reduce.fmin.v4f64(<4 x double>)1092declare double @llvm.vector.reduce.fmin.v8f64(<8 x double>)1093declare double @llvm.vector.reduce.fmin.v16f64(<16 x double>)1094