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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX5; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX6; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX5127; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX5128 9;10; vXf32 (accum)11;12 13define float @test_v2f32(float %a0, <2 x float> %a1) {14; SSE2-LABEL: test_v2f32:15; SSE2: # %bb.0:16; SSE2-NEXT: movaps %xmm1, %xmm217; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]18; SSE2-NEXT: mulss %xmm1, %xmm219; SSE2-NEXT: mulss %xmm2, %xmm020; SSE2-NEXT: retq21;22; SSE41-LABEL: test_v2f32:23; SSE41: # %bb.0:24; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]25; SSE41-NEXT: mulss %xmm1, %xmm226; SSE41-NEXT: mulss %xmm2, %xmm027; SSE41-NEXT: retq28;29; AVX-LABEL: test_v2f32:30; AVX: # %bb.0:31; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]32; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm133; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm034; AVX-NEXT: retq35;36; AVX512-LABEL: test_v2f32:37; AVX512: # %bb.0:38; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]39; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm140; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm041; AVX512-NEXT: retq42 %1 = call fast float @llvm.vector.reduce.fmul.f32.v2f32(float %a0, <2 x float> %a1)43 ret float %144}45 46define float @test_v4f32(float %a0, <4 x float> %a1) {47; SSE2-LABEL: test_v4f32:48; SSE2: # %bb.0:49; SSE2-NEXT: movaps %xmm1, %xmm250; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]51; SSE2-NEXT: mulps %xmm1, %xmm252; SSE2-NEXT: movaps %xmm2, %xmm153; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]54; SSE2-NEXT: mulss %xmm2, %xmm155; SSE2-NEXT: mulss %xmm1, %xmm056; SSE2-NEXT: retq57;58; SSE41-LABEL: test_v4f32:59; SSE41: # %bb.0:60; SSE41-NEXT: movaps %xmm1, %xmm261; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]62; SSE41-NEXT: mulps %xmm1, %xmm263; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]64; SSE41-NEXT: mulss %xmm2, %xmm165; SSE41-NEXT: mulss %xmm1, %xmm066; SSE41-NEXT: retq67;68; AVX-LABEL: test_v4f32:69; AVX: # %bb.0:70; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]71; AVX-NEXT: vmulps %xmm2, %xmm1, %xmm172; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]73; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm174; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm075; AVX-NEXT: retq76;77; AVX512-LABEL: test_v4f32:78; AVX512: # %bb.0:79; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]80; AVX512-NEXT: vmulps %xmm2, %xmm1, %xmm181; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]82; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm183; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm084; AVX512-NEXT: retq85 %1 = call fast float @llvm.vector.reduce.fmul.f32.v4f32(float %a0, <4 x float> %a1)86 ret float %187}88 89define float @test_v8f32(float %a0, <8 x float> %a1) {90; SSE2-LABEL: test_v8f32:91; SSE2: # %bb.0:92; SSE2-NEXT: mulps %xmm2, %xmm193; SSE2-NEXT: movaps %xmm1, %xmm294; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]95; SSE2-NEXT: mulps %xmm1, %xmm296; SSE2-NEXT: movaps %xmm2, %xmm197; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]98; SSE2-NEXT: mulss %xmm2, %xmm199; SSE2-NEXT: mulss %xmm1, %xmm0100; SSE2-NEXT: retq101;102; SSE41-LABEL: test_v8f32:103; SSE41: # %bb.0:104; SSE41-NEXT: mulps %xmm2, %xmm1105; SSE41-NEXT: movaps %xmm1, %xmm2106; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]107; SSE41-NEXT: mulps %xmm1, %xmm2108; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]109; SSE41-NEXT: mulss %xmm2, %xmm1110; SSE41-NEXT: mulss %xmm1, %xmm0111; SSE41-NEXT: retq112;113; AVX-LABEL: test_v8f32:114; AVX: # %bb.0:115; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2116; AVX-NEXT: vmulps %xmm2, %xmm1, %xmm1117; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]118; AVX-NEXT: vmulps %xmm2, %xmm1, %xmm1119; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]120; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1121; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0122; AVX-NEXT: vzeroupper123; AVX-NEXT: retq124;125; AVX512-LABEL: test_v8f32:126; AVX512: # %bb.0:127; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2128; AVX512-NEXT: vmulps %xmm2, %xmm1, %xmm1129; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]130; AVX512-NEXT: vmulps %xmm2, %xmm1, %xmm1131; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]132; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1133; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0134; AVX512-NEXT: vzeroupper135; AVX512-NEXT: retq136 %1 = call fast float @llvm.vector.reduce.fmul.f32.v8f32(float %a0, <8 x float> %a1)137 ret float %1138}139 140define float @test_v16f32(float %a0, <16 x float> %a1) {141; SSE2-LABEL: test_v16f32:142; SSE2: # %bb.0:143; SSE2-NEXT: mulps %xmm4, %xmm2144; SSE2-NEXT: mulps %xmm3, %xmm1145; SSE2-NEXT: mulps %xmm2, %xmm1146; SSE2-NEXT: movaps %xmm1, %xmm2147; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]148; SSE2-NEXT: mulps %xmm1, %xmm2149; SSE2-NEXT: movaps %xmm2, %xmm1150; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]151; SSE2-NEXT: mulss %xmm2, %xmm1152; SSE2-NEXT: mulss %xmm1, %xmm0153; SSE2-NEXT: retq154;155; SSE41-LABEL: test_v16f32:156; SSE41: # %bb.0:157; SSE41-NEXT: mulps %xmm4, %xmm2158; SSE41-NEXT: mulps %xmm3, %xmm1159; SSE41-NEXT: mulps %xmm2, %xmm1160; SSE41-NEXT: movaps %xmm1, %xmm2161; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]162; SSE41-NEXT: mulps %xmm1, %xmm2163; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]164; SSE41-NEXT: mulss %xmm2, %xmm1165; SSE41-NEXT: mulss %xmm1, %xmm0166; SSE41-NEXT: retq167;168; AVX-LABEL: test_v16f32:169; AVX: # %bb.0:170; AVX-NEXT: vmulps %ymm2, %ymm1, %ymm1171; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2172; AVX-NEXT: vmulps %xmm2, %xmm1, %xmm1173; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]174; AVX-NEXT: vmulps %xmm2, %xmm1, %xmm1175; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]176; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1177; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0178; AVX-NEXT: vzeroupper179; AVX-NEXT: retq180;181; AVX512-LABEL: test_v16f32:182; AVX512: # %bb.0:183; AVX512-NEXT: vextractf64x4 $1, %zmm1, %ymm2184; AVX512-NEXT: vmulps %zmm2, %zmm1, %zmm1185; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2186; AVX512-NEXT: vmulps %xmm2, %xmm1, %xmm1187; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]188; AVX512-NEXT: vmulps %xmm2, %xmm1, %xmm1189; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]190; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1191; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0192; AVX512-NEXT: vzeroupper193; AVX512-NEXT: retq194 %1 = call fast float @llvm.vector.reduce.fmul.f32.v16f32(float %a0, <16 x float> %a1)195 ret float %1196}197 198;199; vXf32 (one)200;201 202define float @test_v2f32_zero(<2 x float> %a0) {203; SSE2-LABEL: test_v2f32_zero:204; SSE2: # %bb.0:205; SSE2-NEXT: movaps %xmm0, %xmm1206; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]207; SSE2-NEXT: mulss %xmm1, %xmm0208; SSE2-NEXT: retq209;210; SSE41-LABEL: test_v2f32_zero:211; SSE41: # %bb.0:212; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]213; SSE41-NEXT: mulss %xmm1, %xmm0214; SSE41-NEXT: retq215;216; AVX-LABEL: test_v2f32_zero:217; AVX: # %bb.0:218; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]219; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0220; AVX-NEXT: retq221;222; AVX512-LABEL: test_v2f32_zero:223; AVX512: # %bb.0:224; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]225; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0226; AVX512-NEXT: retq227 %1 = call fast float @llvm.vector.reduce.fmul.f32.v2f32(float 1.0, <2 x float> %a0)228 ret float %1229}230 231define float @test_v4f32_zero(<4 x float> %a0) {232; SSE2-LABEL: test_v4f32_zero:233; SSE2: # %bb.0:234; SSE2-NEXT: movaps %xmm0, %xmm1235; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]236; SSE2-NEXT: mulps %xmm1, %xmm0237; SSE2-NEXT: movaps %xmm0, %xmm1238; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]239; SSE2-NEXT: mulss %xmm1, %xmm0240; SSE2-NEXT: retq241;242; SSE41-LABEL: test_v4f32_zero:243; SSE41: # %bb.0:244; SSE41-NEXT: movaps %xmm0, %xmm1245; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]246; SSE41-NEXT: mulps %xmm1, %xmm0247; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]248; SSE41-NEXT: mulss %xmm1, %xmm0249; SSE41-NEXT: retq250;251; AVX-LABEL: test_v4f32_zero:252; AVX: # %bb.0:253; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]254; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0255; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]256; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0257; AVX-NEXT: retq258;259; AVX512-LABEL: test_v4f32_zero:260; AVX512: # %bb.0:261; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]262; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0263; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]264; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0265; AVX512-NEXT: retq266 %1 = call fast float @llvm.vector.reduce.fmul.f32.v4f32(float 1.0, <4 x float> %a0)267 ret float %1268}269 270define float @test_v8f32_zero(<8 x float> %a0) {271; SSE2-LABEL: test_v8f32_zero:272; SSE2: # %bb.0:273; SSE2-NEXT: mulps %xmm1, %xmm0274; SSE2-NEXT: movaps %xmm0, %xmm1275; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]276; SSE2-NEXT: mulps %xmm1, %xmm0277; SSE2-NEXT: movaps %xmm0, %xmm1278; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]279; SSE2-NEXT: mulss %xmm1, %xmm0280; SSE2-NEXT: retq281;282; SSE41-LABEL: test_v8f32_zero:283; SSE41: # %bb.0:284; SSE41-NEXT: mulps %xmm1, %xmm0285; SSE41-NEXT: movaps %xmm0, %xmm1286; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]287; SSE41-NEXT: mulps %xmm1, %xmm0288; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]289; SSE41-NEXT: mulss %xmm1, %xmm0290; SSE41-NEXT: retq291;292; AVX-LABEL: test_v8f32_zero:293; AVX: # %bb.0:294; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1295; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0296; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]297; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0298; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]299; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0300; AVX-NEXT: vzeroupper301; AVX-NEXT: retq302;303; AVX512-LABEL: test_v8f32_zero:304; AVX512: # %bb.0:305; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1306; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0307; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]308; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0309; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]310; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0311; AVX512-NEXT: vzeroupper312; AVX512-NEXT: retq313 %1 = call fast float @llvm.vector.reduce.fmul.f32.v8f32(float 1.0, <8 x float> %a0)314 ret float %1315}316 317define float @test_v16f32_zero(<16 x float> %a0) {318; SSE2-LABEL: test_v16f32_zero:319; SSE2: # %bb.0:320; SSE2-NEXT: mulps %xmm3, %xmm1321; SSE2-NEXT: mulps %xmm2, %xmm0322; SSE2-NEXT: mulps %xmm1, %xmm0323; SSE2-NEXT: movaps %xmm0, %xmm1324; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]325; SSE2-NEXT: mulps %xmm1, %xmm0326; SSE2-NEXT: movaps %xmm0, %xmm1327; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]328; SSE2-NEXT: mulss %xmm1, %xmm0329; SSE2-NEXT: retq330;331; SSE41-LABEL: test_v16f32_zero:332; SSE41: # %bb.0:333; SSE41-NEXT: mulps %xmm3, %xmm1334; SSE41-NEXT: mulps %xmm2, %xmm0335; SSE41-NEXT: mulps %xmm1, %xmm0336; SSE41-NEXT: movaps %xmm0, %xmm1337; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]338; SSE41-NEXT: mulps %xmm1, %xmm0339; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]340; SSE41-NEXT: mulss %xmm1, %xmm0341; SSE41-NEXT: retq342;343; AVX-LABEL: test_v16f32_zero:344; AVX: # %bb.0:345; AVX-NEXT: vmulps %ymm1, %ymm0, %ymm0346; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1347; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0348; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]349; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0350; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]351; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0352; AVX-NEXT: vzeroupper353; AVX-NEXT: retq354;355; AVX512-LABEL: test_v16f32_zero:356; AVX512: # %bb.0:357; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1358; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0359; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1360; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0361; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]362; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0363; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]364; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0365; AVX512-NEXT: vzeroupper366; AVX512-NEXT: retq367 %1 = call fast float @llvm.vector.reduce.fmul.f32.v16f32(float 1.0, <16 x float> %a0)368 ret float %1369}370 371;372; vXf32 (undef)373;374 375define float @test_v2f32_undef(<2 x float> %a0) {376; SSE2-LABEL: test_v2f32_undef:377; SSE2: # %bb.0:378; SSE2-NEXT: movaps %xmm0, %xmm1379; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]380; SSE2-NEXT: mulss %xmm1, %xmm0381; SSE2-NEXT: retq382;383; SSE41-LABEL: test_v2f32_undef:384; SSE41: # %bb.0:385; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]386; SSE41-NEXT: mulss %xmm1, %xmm0387; SSE41-NEXT: retq388;389; AVX-LABEL: test_v2f32_undef:390; AVX: # %bb.0:391; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]392; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0393; AVX-NEXT: retq394;395; AVX512-LABEL: test_v2f32_undef:396; AVX512: # %bb.0:397; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]398; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0399; AVX512-NEXT: retq400 %1 = call fast float @llvm.vector.reduce.fmul.f32.v2f32(float 1.0, <2 x float> %a0)401 ret float %1402}403 404define float @test_v4f32_undef(<4 x float> %a0) {405; SSE2-LABEL: test_v4f32_undef:406; SSE2: # %bb.0:407; SSE2-NEXT: movaps %xmm0, %xmm1408; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]409; SSE2-NEXT: mulps %xmm1, %xmm0410; SSE2-NEXT: movaps %xmm0, %xmm1411; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]412; SSE2-NEXT: mulss %xmm1, %xmm0413; SSE2-NEXT: retq414;415; SSE41-LABEL: test_v4f32_undef:416; SSE41: # %bb.0:417; SSE41-NEXT: movaps %xmm0, %xmm1418; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]419; SSE41-NEXT: mulps %xmm1, %xmm0420; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]421; SSE41-NEXT: mulss %xmm1, %xmm0422; SSE41-NEXT: retq423;424; AVX-LABEL: test_v4f32_undef:425; AVX: # %bb.0:426; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]427; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0428; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]429; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0430; AVX-NEXT: retq431;432; AVX512-LABEL: test_v4f32_undef:433; AVX512: # %bb.0:434; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]435; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0436; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]437; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0438; AVX512-NEXT: retq439 %1 = call fast float @llvm.vector.reduce.fmul.f32.v4f32(float 1.0, <4 x float> %a0)440 ret float %1441}442 443define float @test_v8f32_undef(<8 x float> %a0) {444; SSE2-LABEL: test_v8f32_undef:445; SSE2: # %bb.0:446; SSE2-NEXT: mulps %xmm1, %xmm0447; SSE2-NEXT: movaps %xmm0, %xmm1448; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]449; SSE2-NEXT: mulps %xmm1, %xmm0450; SSE2-NEXT: movaps %xmm0, %xmm1451; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]452; SSE2-NEXT: mulss %xmm1, %xmm0453; SSE2-NEXT: retq454;455; SSE41-LABEL: test_v8f32_undef:456; SSE41: # %bb.0:457; SSE41-NEXT: mulps %xmm1, %xmm0458; SSE41-NEXT: movaps %xmm0, %xmm1459; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]460; SSE41-NEXT: mulps %xmm1, %xmm0461; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]462; SSE41-NEXT: mulss %xmm1, %xmm0463; SSE41-NEXT: retq464;465; AVX-LABEL: test_v8f32_undef:466; AVX: # %bb.0:467; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1468; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0469; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]470; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0471; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]472; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0473; AVX-NEXT: vzeroupper474; AVX-NEXT: retq475;476; AVX512-LABEL: test_v8f32_undef:477; AVX512: # %bb.0:478; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1479; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0480; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]481; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0482; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]483; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0484; AVX512-NEXT: vzeroupper485; AVX512-NEXT: retq486 %1 = call fast float @llvm.vector.reduce.fmul.f32.v8f32(float 1.0, <8 x float> %a0)487 ret float %1488}489 490define float @test_v16f32_undef(<16 x float> %a0) {491; SSE2-LABEL: test_v16f32_undef:492; SSE2: # %bb.0:493; SSE2-NEXT: mulps %xmm3, %xmm1494; SSE2-NEXT: mulps %xmm2, %xmm0495; SSE2-NEXT: mulps %xmm1, %xmm0496; SSE2-NEXT: movaps %xmm0, %xmm1497; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]498; SSE2-NEXT: mulps %xmm1, %xmm0499; SSE2-NEXT: movaps %xmm0, %xmm1500; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]501; SSE2-NEXT: mulss %xmm1, %xmm0502; SSE2-NEXT: retq503;504; SSE41-LABEL: test_v16f32_undef:505; SSE41: # %bb.0:506; SSE41-NEXT: mulps %xmm3, %xmm1507; SSE41-NEXT: mulps %xmm2, %xmm0508; SSE41-NEXT: mulps %xmm1, %xmm0509; SSE41-NEXT: movaps %xmm0, %xmm1510; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]511; SSE41-NEXT: mulps %xmm1, %xmm0512; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]513; SSE41-NEXT: mulss %xmm1, %xmm0514; SSE41-NEXT: retq515;516; AVX-LABEL: test_v16f32_undef:517; AVX: # %bb.0:518; AVX-NEXT: vmulps %ymm1, %ymm0, %ymm0519; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1520; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0521; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]522; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0523; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]524; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0525; AVX-NEXT: vzeroupper526; AVX-NEXT: retq527;528; AVX512-LABEL: test_v16f32_undef:529; AVX512: # %bb.0:530; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1531; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0532; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1533; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0534; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]535; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0536; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]537; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0538; AVX512-NEXT: vzeroupper539; AVX512-NEXT: retq540 %1 = call fast float @llvm.vector.reduce.fmul.f32.v16f32(float 1.0, <16 x float> %a0)541 ret float %1542}543 544;545; vXf64 (accum)546;547 548define double @test_v2f64(double %a0, <2 x double> %a1) {549; SSE-LABEL: test_v2f64:550; SSE: # %bb.0:551; SSE-NEXT: movapd %xmm1, %xmm2552; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]553; SSE-NEXT: mulsd %xmm1, %xmm2554; SSE-NEXT: mulsd %xmm2, %xmm0555; SSE-NEXT: retq556;557; AVX-LABEL: test_v2f64:558; AVX: # %bb.0:559; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]560; AVX-NEXT: vmulsd %xmm2, %xmm1, %xmm1561; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0562; AVX-NEXT: retq563;564; AVX512-LABEL: test_v2f64:565; AVX512: # %bb.0:566; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]567; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm1568; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0569; AVX512-NEXT: retq570 %1 = call fast double @llvm.vector.reduce.fmul.f64.v2f64(double %a0, <2 x double> %a1)571 ret double %1572}573 574define double @test_v4f64(double %a0, <4 x double> %a1) {575; SSE-LABEL: test_v4f64:576; SSE: # %bb.0:577; SSE-NEXT: mulpd %xmm2, %xmm1578; SSE-NEXT: movapd %xmm1, %xmm2579; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]580; SSE-NEXT: mulsd %xmm1, %xmm2581; SSE-NEXT: mulsd %xmm2, %xmm0582; SSE-NEXT: retq583;584; AVX-LABEL: test_v4f64:585; AVX: # %bb.0:586; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2587; AVX-NEXT: vmulpd %xmm2, %xmm1, %xmm1588; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]589; AVX-NEXT: vmulsd %xmm2, %xmm1, %xmm1590; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0591; AVX-NEXT: vzeroupper592; AVX-NEXT: retq593;594; AVX512-LABEL: test_v4f64:595; AVX512: # %bb.0:596; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2597; AVX512-NEXT: vmulpd %xmm2, %xmm1, %xmm1598; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]599; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm1600; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0601; AVX512-NEXT: vzeroupper602; AVX512-NEXT: retq603 %1 = call fast double @llvm.vector.reduce.fmul.f64.v4f64(double %a0, <4 x double> %a1)604 ret double %1605}606 607define double @test_v8f64(double %a0, <8 x double> %a1) {608; SSE-LABEL: test_v8f64:609; SSE: # %bb.0:610; SSE-NEXT: mulpd %xmm4, %xmm2611; SSE-NEXT: mulpd %xmm3, %xmm1612; SSE-NEXT: mulpd %xmm2, %xmm1613; SSE-NEXT: movapd %xmm1, %xmm2614; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]615; SSE-NEXT: mulsd %xmm1, %xmm2616; SSE-NEXT: mulsd %xmm2, %xmm0617; SSE-NEXT: retq618;619; AVX-LABEL: test_v8f64:620; AVX: # %bb.0:621; AVX-NEXT: vmulpd %ymm2, %ymm1, %ymm1622; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2623; AVX-NEXT: vmulpd %xmm2, %xmm1, %xmm1624; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]625; AVX-NEXT: vmulsd %xmm2, %xmm1, %xmm1626; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0627; AVX-NEXT: vzeroupper628; AVX-NEXT: retq629;630; AVX512-LABEL: test_v8f64:631; AVX512: # %bb.0:632; AVX512-NEXT: vextractf64x4 $1, %zmm1, %ymm2633; AVX512-NEXT: vmulpd %zmm2, %zmm1, %zmm1634; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2635; AVX512-NEXT: vmulpd %xmm2, %xmm1, %xmm1636; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]637; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm1638; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0639; AVX512-NEXT: vzeroupper640; AVX512-NEXT: retq641 %1 = call fast double @llvm.vector.reduce.fmul.f64.v8f64(double %a0, <8 x double> %a1)642 ret double %1643}644 645define double @test_v16f64(double %a0, <16 x double> %a1) {646; SSE-LABEL: test_v16f64:647; SSE: # %bb.0:648; SSE-NEXT: mulpd %xmm6, %xmm2649; SSE-NEXT: mulpd %xmm7, %xmm3650; SSE-NEXT: mulpd %xmm5, %xmm1651; SSE-NEXT: mulpd {{[0-9]+}}(%rsp), %xmm4652; SSE-NEXT: mulpd %xmm3, %xmm1653; SSE-NEXT: mulpd %xmm2, %xmm4654; SSE-NEXT: mulpd %xmm1, %xmm4655; SSE-NEXT: movapd %xmm4, %xmm1656; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]657; SSE-NEXT: mulsd %xmm4, %xmm1658; SSE-NEXT: mulsd %xmm1, %xmm0659; SSE-NEXT: retq660;661; AVX-LABEL: test_v16f64:662; AVX: # %bb.0:663; AVX-NEXT: vmulpd %ymm4, %ymm2, %ymm2664; AVX-NEXT: vmulpd %ymm3, %ymm1, %ymm1665; AVX-NEXT: vmulpd %ymm2, %ymm1, %ymm1666; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2667; AVX-NEXT: vmulpd %xmm2, %xmm1, %xmm1668; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]669; AVX-NEXT: vmulsd %xmm2, %xmm1, %xmm1670; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0671; AVX-NEXT: vzeroupper672; AVX-NEXT: retq673;674; AVX512-LABEL: test_v16f64:675; AVX512: # %bb.0:676; AVX512-NEXT: vmulpd %zmm2, %zmm1, %zmm1677; AVX512-NEXT: vextractf64x4 $1, %zmm1, %ymm2678; AVX512-NEXT: vmulpd %zmm2, %zmm1, %zmm1679; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2680; AVX512-NEXT: vmulpd %xmm2, %xmm1, %xmm1681; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]682; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm1683; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0684; AVX512-NEXT: vzeroupper685; AVX512-NEXT: retq686 %1 = call fast double @llvm.vector.reduce.fmul.f64.v16f64(double %a0, <16 x double> %a1)687 ret double %1688}689 690;691; vXf64 (one)692;693 694define double @test_v2f64_zero(<2 x double> %a0) {695; SSE-LABEL: test_v2f64_zero:696; SSE: # %bb.0:697; SSE-NEXT: movapd %xmm0, %xmm1698; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]699; SSE-NEXT: mulsd %xmm1, %xmm0700; SSE-NEXT: retq701;702; AVX-LABEL: test_v2f64_zero:703; AVX: # %bb.0:704; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]705; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0706; AVX-NEXT: retq707;708; AVX512-LABEL: test_v2f64_zero:709; AVX512: # %bb.0:710; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]711; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0712; AVX512-NEXT: retq713 %1 = call fast double @llvm.vector.reduce.fmul.f64.v2f64(double 1.0, <2 x double> %a0)714 ret double %1715}716 717define double @test_v4f64_zero(<4 x double> %a0) {718; SSE-LABEL: test_v4f64_zero:719; SSE: # %bb.0:720; SSE-NEXT: mulpd %xmm1, %xmm0721; SSE-NEXT: movapd %xmm0, %xmm1722; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]723; SSE-NEXT: mulsd %xmm1, %xmm0724; SSE-NEXT: retq725;726; AVX-LABEL: test_v4f64_zero:727; AVX: # %bb.0:728; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1729; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0730; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]731; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0732; AVX-NEXT: vzeroupper733; AVX-NEXT: retq734;735; AVX512-LABEL: test_v4f64_zero:736; AVX512: # %bb.0:737; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1738; AVX512-NEXT: vmulpd %xmm1, %xmm0, %xmm0739; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]740; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0741; AVX512-NEXT: vzeroupper742; AVX512-NEXT: retq743 %1 = call fast double @llvm.vector.reduce.fmul.f64.v4f64(double 1.0, <4 x double> %a0)744 ret double %1745}746 747define double @test_v8f64_zero(<8 x double> %a0) {748; SSE-LABEL: test_v8f64_zero:749; SSE: # %bb.0:750; SSE-NEXT: mulpd %xmm3, %xmm1751; SSE-NEXT: mulpd %xmm2, %xmm0752; SSE-NEXT: mulpd %xmm1, %xmm0753; SSE-NEXT: movapd %xmm0, %xmm1754; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]755; SSE-NEXT: mulsd %xmm1, %xmm0756; SSE-NEXT: retq757;758; AVX-LABEL: test_v8f64_zero:759; AVX: # %bb.0:760; AVX-NEXT: vmulpd %ymm1, %ymm0, %ymm0761; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1762; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0763; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]764; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0765; AVX-NEXT: vzeroupper766; AVX-NEXT: retq767;768; AVX512-LABEL: test_v8f64_zero:769; AVX512: # %bb.0:770; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1771; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0772; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1773; AVX512-NEXT: vmulpd %xmm1, %xmm0, %xmm0774; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]775; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0776; AVX512-NEXT: vzeroupper777; AVX512-NEXT: retq778 %1 = call fast double @llvm.vector.reduce.fmul.f64.v8f64(double 1.0, <8 x double> %a0)779 ret double %1780}781 782define double @test_v16f64_zero(<16 x double> %a0) {783; SSE-LABEL: test_v16f64_zero:784; SSE: # %bb.0:785; SSE-NEXT: mulpd %xmm6, %xmm2786; SSE-NEXT: mulpd %xmm4, %xmm0787; SSE-NEXT: mulpd %xmm2, %xmm0788; SSE-NEXT: mulpd %xmm7, %xmm3789; SSE-NEXT: mulpd %xmm5, %xmm1790; SSE-NEXT: mulpd %xmm3, %xmm1791; SSE-NEXT: mulpd %xmm1, %xmm0792; SSE-NEXT: movapd %xmm0, %xmm1793; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]794; SSE-NEXT: mulsd %xmm1, %xmm0795; SSE-NEXT: retq796;797; AVX-LABEL: test_v16f64_zero:798; AVX: # %bb.0:799; AVX-NEXT: vmulpd %ymm3, %ymm1, %ymm1800; AVX-NEXT: vmulpd %ymm2, %ymm0, %ymm0801; AVX-NEXT: vmulpd %ymm1, %ymm0, %ymm0802; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1803; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0804; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]805; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0806; AVX-NEXT: vzeroupper807; AVX-NEXT: retq808;809; AVX512-LABEL: test_v16f64_zero:810; AVX512: # %bb.0:811; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0812; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1813; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0814; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1815; AVX512-NEXT: vmulpd %xmm1, %xmm0, %xmm0816; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]817; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0818; AVX512-NEXT: vzeroupper819; AVX512-NEXT: retq820 %1 = call fast double @llvm.vector.reduce.fmul.f64.v16f64(double 1.0, <16 x double> %a0)821 ret double %1822}823 824;825; vXf64 (undef)826;827 828define double @test_v2f64_undef(<2 x double> %a0) {829; SSE-LABEL: test_v2f64_undef:830; SSE: # %bb.0:831; SSE-NEXT: movapd %xmm0, %xmm1832; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]833; SSE-NEXT: mulsd %xmm1, %xmm0834; SSE-NEXT: retq835;836; AVX-LABEL: test_v2f64_undef:837; AVX: # %bb.0:838; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]839; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0840; AVX-NEXT: retq841;842; AVX512-LABEL: test_v2f64_undef:843; AVX512: # %bb.0:844; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]845; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0846; AVX512-NEXT: retq847 %1 = call fast double @llvm.vector.reduce.fmul.f64.v2f64(double 1.0, <2 x double> %a0)848 ret double %1849}850 851define double @test_v4f64_undef(<4 x double> %a0) {852; SSE-LABEL: test_v4f64_undef:853; SSE: # %bb.0:854; SSE-NEXT: mulpd %xmm1, %xmm0855; SSE-NEXT: movapd %xmm0, %xmm1856; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]857; SSE-NEXT: mulsd %xmm1, %xmm0858; SSE-NEXT: retq859;860; AVX-LABEL: test_v4f64_undef:861; AVX: # %bb.0:862; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1863; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0864; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]865; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0866; AVX-NEXT: vzeroupper867; AVX-NEXT: retq868;869; AVX512-LABEL: test_v4f64_undef:870; AVX512: # %bb.0:871; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1872; AVX512-NEXT: vmulpd %xmm1, %xmm0, %xmm0873; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]874; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0875; AVX512-NEXT: vzeroupper876; AVX512-NEXT: retq877 %1 = call fast double @llvm.vector.reduce.fmul.f64.v4f64(double 1.0, <4 x double> %a0)878 ret double %1879}880 881define double @test_v8f64_undef(<8 x double> %a0) {882; SSE-LABEL: test_v8f64_undef:883; SSE: # %bb.0:884; SSE-NEXT: mulpd %xmm3, %xmm1885; SSE-NEXT: mulpd %xmm2, %xmm0886; SSE-NEXT: mulpd %xmm1, %xmm0887; SSE-NEXT: movapd %xmm0, %xmm1888; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]889; SSE-NEXT: mulsd %xmm1, %xmm0890; SSE-NEXT: retq891;892; AVX-LABEL: test_v8f64_undef:893; AVX: # %bb.0:894; AVX-NEXT: vmulpd %ymm1, %ymm0, %ymm0895; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1896; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0897; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]898; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0899; AVX-NEXT: vzeroupper900; AVX-NEXT: retq901;902; AVX512-LABEL: test_v8f64_undef:903; AVX512: # %bb.0:904; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1905; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0906; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1907; AVX512-NEXT: vmulpd %xmm1, %xmm0, %xmm0908; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]909; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0910; AVX512-NEXT: vzeroupper911; AVX512-NEXT: retq912 %1 = call fast double @llvm.vector.reduce.fmul.f64.v8f64(double 1.0, <8 x double> %a0)913 ret double %1914}915 916define double @test_v16f64_undef(<16 x double> %a0) {917; SSE-LABEL: test_v16f64_undef:918; SSE: # %bb.0:919; SSE-NEXT: mulpd %xmm6, %xmm2920; SSE-NEXT: mulpd %xmm4, %xmm0921; SSE-NEXT: mulpd %xmm2, %xmm0922; SSE-NEXT: mulpd %xmm7, %xmm3923; SSE-NEXT: mulpd %xmm5, %xmm1924; SSE-NEXT: mulpd %xmm3, %xmm1925; SSE-NEXT: mulpd %xmm1, %xmm0926; SSE-NEXT: movapd %xmm0, %xmm1927; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]928; SSE-NEXT: mulsd %xmm1, %xmm0929; SSE-NEXT: retq930;931; AVX-LABEL: test_v16f64_undef:932; AVX: # %bb.0:933; AVX-NEXT: vmulpd %ymm3, %ymm1, %ymm1934; AVX-NEXT: vmulpd %ymm2, %ymm0, %ymm0935; AVX-NEXT: vmulpd %ymm1, %ymm0, %ymm0936; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1937; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0938; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]939; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0940; AVX-NEXT: vzeroupper941; AVX-NEXT: retq942;943; AVX512-LABEL: test_v16f64_undef:944; AVX512: # %bb.0:945; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0946; AVX512-NEXT: vextractf64x4 $1, %zmm0, %ymm1947; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0948; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm1949; AVX512-NEXT: vmulpd %xmm1, %xmm0, %xmm0950; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]951; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0952; AVX512-NEXT: vzeroupper953; AVX512-NEXT: retq954 %1 = call fast double @llvm.vector.reduce.fmul.f64.v16f64(double 1.0, <16 x double> %a0)955 ret double %1956}957 958declare float @llvm.vector.reduce.fmul.f32.v2f32(float, <2 x float>)959declare float @llvm.vector.reduce.fmul.f32.v4f32(float, <4 x float>)960declare float @llvm.vector.reduce.fmul.f32.v8f32(float, <8 x float>)961declare float @llvm.vector.reduce.fmul.f32.v16f32(float, <16 x float>)962 963declare double @llvm.vector.reduce.fmul.f64.v2f64(double, <2 x double>)964declare double @llvm.vector.reduce.fmul.f64.v4f64(double, <4 x double>)965declare double @llvm.vector.reduce.fmul.f64.v8f64(double, <8 x double>)966declare double @llvm.vector.reduce.fmul.f64.v16f64(double, <16 x double>)967