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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX5127; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX5128 9;10; vXf32 (accum)11;12 13define float @test_v2f32(float %a0, <2 x float> %a1) {14; SSE2-LABEL: test_v2f32:15; SSE2: # %bb.0:16; SSE2-NEXT: mulss %xmm1, %xmm017; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]18; SSE2-NEXT: mulss %xmm1, %xmm019; SSE2-NEXT: retq20;21; SSE41-LABEL: test_v2f32:22; SSE41: # %bb.0:23; SSE41-NEXT: mulss %xmm1, %xmm024; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]25; SSE41-NEXT: mulss %xmm1, %xmm026; SSE41-NEXT: retq27;28; AVX-LABEL: test_v2f32:29; AVX: # %bb.0:30; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm031; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]32; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm033; AVX-NEXT: retq34;35; AVX512-LABEL: test_v2f32:36; AVX512: # %bb.0:37; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm038; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]39; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm040; AVX512-NEXT: retq41 %1 = call float @llvm.vector.reduce.fmul.f32.v2f32(float %a0, <2 x float> %a1)42 ret float %143}44 45define float @test_v4f32(float %a0, <4 x float> %a1) {46; SSE2-LABEL: test_v4f32:47; SSE2: # %bb.0:48; SSE2-NEXT: mulss %xmm1, %xmm049; SSE2-NEXT: movaps %xmm1, %xmm250; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]51; SSE2-NEXT: mulss %xmm2, %xmm052; SSE2-NEXT: movaps %xmm1, %xmm253; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]54; SSE2-NEXT: mulss %xmm2, %xmm055; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]56; SSE2-NEXT: mulss %xmm1, %xmm057; SSE2-NEXT: retq58;59; SSE41-LABEL: test_v4f32:60; SSE41: # %bb.0:61; SSE41-NEXT: mulss %xmm1, %xmm062; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]63; SSE41-NEXT: mulss %xmm2, %xmm064; SSE41-NEXT: movaps %xmm1, %xmm265; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]66; SSE41-NEXT: mulss %xmm2, %xmm067; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]68; SSE41-NEXT: mulss %xmm1, %xmm069; SSE41-NEXT: retq70;71; AVX-LABEL: test_v4f32:72; AVX: # %bb.0:73; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm074; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]75; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm076; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]77; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm078; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]79; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm080; AVX-NEXT: retq81;82; AVX512-LABEL: test_v4f32:83; AVX512: # %bb.0:84; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm085; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]86; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm087; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]88; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm089; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]90; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm091; AVX512-NEXT: retq92 %1 = call float @llvm.vector.reduce.fmul.f32.v4f32(float %a0, <4 x float> %a1)93 ret float %194}95 96define float @test_v8f32(float %a0, <8 x float> %a1) {97; SSE2-LABEL: test_v8f32:98; SSE2: # %bb.0:99; SSE2-NEXT: mulss %xmm1, %xmm0100; SSE2-NEXT: movaps %xmm1, %xmm3101; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[1,1]102; SSE2-NEXT: mulss %xmm3, %xmm0103; SSE2-NEXT: movaps %xmm1, %xmm3104; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]105; SSE2-NEXT: mulss %xmm3, %xmm0106; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]107; SSE2-NEXT: mulss %xmm1, %xmm0108; SSE2-NEXT: mulss %xmm2, %xmm0109; SSE2-NEXT: movaps %xmm2, %xmm1110; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]111; SSE2-NEXT: mulss %xmm1, %xmm0112; SSE2-NEXT: movaps %xmm2, %xmm1113; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]114; SSE2-NEXT: mulss %xmm1, %xmm0115; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]116; SSE2-NEXT: mulss %xmm2, %xmm0117; SSE2-NEXT: retq118;119; SSE41-LABEL: test_v8f32:120; SSE41: # %bb.0:121; SSE41-NEXT: mulss %xmm1, %xmm0122; SSE41-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]123; SSE41-NEXT: mulss %xmm3, %xmm0124; SSE41-NEXT: movaps %xmm1, %xmm3125; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]126; SSE41-NEXT: mulss %xmm3, %xmm0127; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]128; SSE41-NEXT: mulss %xmm1, %xmm0129; SSE41-NEXT: mulss %xmm2, %xmm0130; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]131; SSE41-NEXT: mulss %xmm1, %xmm0132; SSE41-NEXT: movaps %xmm2, %xmm1133; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]134; SSE41-NEXT: mulss %xmm1, %xmm0135; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]136; SSE41-NEXT: mulss %xmm2, %xmm0137; SSE41-NEXT: retq138;139; AVX-LABEL: test_v8f32:140; AVX: # %bb.0:141; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0142; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]143; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0144; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]145; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0146; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]147; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0148; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1149; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0150; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]151; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0152; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]153; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0154; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]155; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0156; AVX-NEXT: vzeroupper157; AVX-NEXT: retq158;159; AVX512-LABEL: test_v8f32:160; AVX512: # %bb.0:161; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0162; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]163; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0164; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]165; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0166; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]167; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0168; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm1169; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0170; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]171; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0172; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]173; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0174; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]175; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0176; AVX512-NEXT: vzeroupper177; AVX512-NEXT: retq178 %1 = call float @llvm.vector.reduce.fmul.f32.v8f32(float %a0, <8 x float> %a1)179 ret float %1180}181 182define float @test_v16f32(float %a0, <16 x float> %a1) {183; SSE2-LABEL: test_v16f32:184; SSE2: # %bb.0:185; SSE2-NEXT: mulss %xmm1, %xmm0186; SSE2-NEXT: movaps %xmm1, %xmm5187; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[1,1],xmm1[1,1]188; SSE2-NEXT: mulss %xmm5, %xmm0189; SSE2-NEXT: movaps %xmm1, %xmm5190; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm1[1]191; SSE2-NEXT: mulss %xmm5, %xmm0192; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]193; SSE2-NEXT: mulss %xmm1, %xmm0194; SSE2-NEXT: mulss %xmm2, %xmm0195; SSE2-NEXT: movaps %xmm2, %xmm1196; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]197; SSE2-NEXT: mulss %xmm1, %xmm0198; SSE2-NEXT: movaps %xmm2, %xmm1199; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]200; SSE2-NEXT: mulss %xmm1, %xmm0201; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]202; SSE2-NEXT: mulss %xmm2, %xmm0203; SSE2-NEXT: mulss %xmm3, %xmm0204; SSE2-NEXT: movaps %xmm3, %xmm1205; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm3[1,1]206; SSE2-NEXT: mulss %xmm1, %xmm0207; SSE2-NEXT: movaps %xmm3, %xmm1208; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]209; SSE2-NEXT: mulss %xmm1, %xmm0210; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]211; SSE2-NEXT: mulss %xmm3, %xmm0212; SSE2-NEXT: mulss %xmm4, %xmm0213; SSE2-NEXT: movaps %xmm4, %xmm1214; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm4[1,1]215; SSE2-NEXT: mulss %xmm1, %xmm0216; SSE2-NEXT: movaps %xmm4, %xmm1217; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]218; SSE2-NEXT: mulss %xmm1, %xmm0219; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[3,3,3,3]220; SSE2-NEXT: mulss %xmm4, %xmm0221; SSE2-NEXT: retq222;223; SSE41-LABEL: test_v16f32:224; SSE41: # %bb.0:225; SSE41-NEXT: mulss %xmm1, %xmm0226; SSE41-NEXT: movshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]227; SSE41-NEXT: mulss %xmm5, %xmm0228; SSE41-NEXT: movaps %xmm1, %xmm5229; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm1[1]230; SSE41-NEXT: mulss %xmm5, %xmm0231; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]232; SSE41-NEXT: mulss %xmm1, %xmm0233; SSE41-NEXT: mulss %xmm2, %xmm0234; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]235; SSE41-NEXT: mulss %xmm1, %xmm0236; SSE41-NEXT: movaps %xmm2, %xmm1237; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]238; SSE41-NEXT: mulss %xmm1, %xmm0239; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]240; SSE41-NEXT: mulss %xmm2, %xmm0241; SSE41-NEXT: mulss %xmm3, %xmm0242; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]243; SSE41-NEXT: mulss %xmm1, %xmm0244; SSE41-NEXT: movaps %xmm3, %xmm1245; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]246; SSE41-NEXT: mulss %xmm1, %xmm0247; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]248; SSE41-NEXT: mulss %xmm3, %xmm0249; SSE41-NEXT: mulss %xmm4, %xmm0250; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm4[1,1,3,3]251; SSE41-NEXT: mulss %xmm1, %xmm0252; SSE41-NEXT: movaps %xmm4, %xmm1253; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]254; SSE41-NEXT: mulss %xmm1, %xmm0255; SSE41-NEXT: shufps {{.*#+}} xmm4 = xmm4[3,3,3,3]256; SSE41-NEXT: mulss %xmm4, %xmm0257; SSE41-NEXT: retq258;259; AVX-LABEL: test_v16f32:260; AVX: # %bb.0:261; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0262; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]263; AVX-NEXT: vmulss %xmm3, %xmm0, %xmm0264; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]265; AVX-NEXT: vmulss %xmm3, %xmm0, %xmm0266; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm1[3,3,3,3]267; AVX-NEXT: vmulss %xmm3, %xmm0, %xmm0268; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1269; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0270; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]271; AVX-NEXT: vmulss %xmm3, %xmm0, %xmm0272; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]273; AVX-NEXT: vmulss %xmm3, %xmm0, %xmm0274; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]275; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0276; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0277; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]278; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0279; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]280; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0281; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm2[3,3,3,3]282; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0283; AVX-NEXT: vextractf128 $1, %ymm2, %xmm1284; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0285; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]286; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0287; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]288; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0289; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]290; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0291; AVX-NEXT: vzeroupper292; AVX-NEXT: retq293;294; AVX512-LABEL: test_v16f32:295; AVX512: # %bb.0:296; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0297; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]298; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0299; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]300; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0301; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]302; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0303; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm2304; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0305; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]306; AVX512-NEXT: vmulss %xmm3, %xmm0, %xmm0307; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]308; AVX512-NEXT: vmulss %xmm3, %xmm0, %xmm0309; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]310; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0311; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm2312; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0313; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]314; AVX512-NEXT: vmulss %xmm3, %xmm0, %xmm0315; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]316; AVX512-NEXT: vmulss %xmm3, %xmm0, %xmm0317; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]318; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0319; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm1320; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0321; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]322; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0323; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]324; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0325; AVX512-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]326; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0327; AVX512-NEXT: vzeroupper328; AVX512-NEXT: retq329 %1 = call float @llvm.vector.reduce.fmul.f32.v16f32(float %a0, <16 x float> %a1)330 ret float %1331}332 333;334; vXf32 (one)335;336 337define float @test_v2f32_one(<2 x float> %a0) {338; SSE2-LABEL: test_v2f32_one:339; SSE2: # %bb.0:340; SSE2-NEXT: movaps %xmm0, %xmm1341; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]342; SSE2-NEXT: mulss %xmm1, %xmm0343; SSE2-NEXT: retq344;345; SSE41-LABEL: test_v2f32_one:346; SSE41: # %bb.0:347; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]348; SSE41-NEXT: mulss %xmm1, %xmm0349; SSE41-NEXT: retq350;351; AVX-LABEL: test_v2f32_one:352; AVX: # %bb.0:353; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]354; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0355; AVX-NEXT: retq356;357; AVX512-LABEL: test_v2f32_one:358; AVX512: # %bb.0:359; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]360; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0361; AVX512-NEXT: retq362 %1 = call float @llvm.vector.reduce.fmul.f32.v2f32(float 1.0, <2 x float> %a0)363 ret float %1364}365 366define float @test_v4f32_one(<4 x float> %a0) {367; SSE2-LABEL: test_v4f32_one:368; SSE2: # %bb.0:369; SSE2-NEXT: movaps %xmm0, %xmm1370; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]371; SSE2-NEXT: mulss %xmm0, %xmm1372; SSE2-NEXT: movaps %xmm0, %xmm2373; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]374; SSE2-NEXT: mulss %xmm1, %xmm2375; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]376; SSE2-NEXT: mulss %xmm2, %xmm0377; SSE2-NEXT: retq378;379; SSE41-LABEL: test_v4f32_one:380; SSE41: # %bb.0:381; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]382; SSE41-NEXT: mulss %xmm0, %xmm1383; SSE41-NEXT: movaps %xmm0, %xmm2384; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]385; SSE41-NEXT: mulss %xmm1, %xmm2386; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]387; SSE41-NEXT: mulss %xmm2, %xmm0388; SSE41-NEXT: retq389;390; AVX-LABEL: test_v4f32_one:391; AVX: # %bb.0:392; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]393; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm1394; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]395; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1396; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]397; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0398; AVX-NEXT: retq399;400; AVX512-LABEL: test_v4f32_one:401; AVX512: # %bb.0:402; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]403; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm1404; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]405; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1406; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]407; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0408; AVX512-NEXT: retq409 %1 = call float @llvm.vector.reduce.fmul.f32.v4f32(float 1.0, <4 x float> %a0)410 ret float %1411}412 413define float @test_v8f32_one(<8 x float> %a0) {414; SSE2-LABEL: test_v8f32_one:415; SSE2: # %bb.0:416; SSE2-NEXT: movaps %xmm0, %xmm2417; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[1,1]418; SSE2-NEXT: mulss %xmm0, %xmm2419; SSE2-NEXT: movaps %xmm0, %xmm3420; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]421; SSE2-NEXT: mulss %xmm2, %xmm3422; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]423; SSE2-NEXT: mulss %xmm3, %xmm0424; SSE2-NEXT: mulss %xmm1, %xmm0425; SSE2-NEXT: movaps %xmm1, %xmm2426; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]427; SSE2-NEXT: mulss %xmm2, %xmm0428; SSE2-NEXT: movaps %xmm1, %xmm2429; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]430; SSE2-NEXT: mulss %xmm2, %xmm0431; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]432; SSE2-NEXT: mulss %xmm1, %xmm0433; SSE2-NEXT: retq434;435; SSE41-LABEL: test_v8f32_one:436; SSE41: # %bb.0:437; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]438; SSE41-NEXT: mulss %xmm0, %xmm2439; SSE41-NEXT: movaps %xmm0, %xmm3440; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]441; SSE41-NEXT: mulss %xmm2, %xmm3442; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]443; SSE41-NEXT: mulss %xmm3, %xmm0444; SSE41-NEXT: mulss %xmm1, %xmm0445; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]446; SSE41-NEXT: mulss %xmm2, %xmm0447; SSE41-NEXT: movaps %xmm1, %xmm2448; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]449; SSE41-NEXT: mulss %xmm2, %xmm0450; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]451; SSE41-NEXT: mulss %xmm1, %xmm0452; SSE41-NEXT: retq453;454; AVX-LABEL: test_v8f32_one:455; AVX: # %bb.0:456; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]457; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm1458; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]459; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1460; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]461; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1462; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0463; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm1464; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]465; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1466; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]467; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1468; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]469; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0470; AVX-NEXT: vzeroupper471; AVX-NEXT: retq472;473; AVX512-LABEL: test_v8f32_one:474; AVX512: # %bb.0:475; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]476; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm1477; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]478; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1479; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]480; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1481; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0482; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm1483; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]484; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1485; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]486; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1487; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]488; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0489; AVX512-NEXT: vzeroupper490; AVX512-NEXT: retq491 %1 = call float @llvm.vector.reduce.fmul.f32.v8f32(float 1.0, <8 x float> %a0)492 ret float %1493}494 495define float @test_v16f32_one(<16 x float> %a0) {496; SSE2-LABEL: test_v16f32_one:497; SSE2: # %bb.0:498; SSE2-NEXT: movaps %xmm0, %xmm4499; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm0[1,1]500; SSE2-NEXT: mulss %xmm0, %xmm4501; SSE2-NEXT: movaps %xmm0, %xmm5502; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]503; SSE2-NEXT: mulss %xmm4, %xmm5504; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]505; SSE2-NEXT: mulss %xmm5, %xmm0506; SSE2-NEXT: mulss %xmm1, %xmm0507; SSE2-NEXT: movaps %xmm1, %xmm4508; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm1[1,1]509; SSE2-NEXT: mulss %xmm4, %xmm0510; SSE2-NEXT: movaps %xmm1, %xmm4511; SSE2-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]512; SSE2-NEXT: mulss %xmm4, %xmm0513; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]514; SSE2-NEXT: mulss %xmm1, %xmm0515; SSE2-NEXT: mulss %xmm2, %xmm0516; SSE2-NEXT: movaps %xmm2, %xmm1517; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]518; SSE2-NEXT: mulss %xmm1, %xmm0519; SSE2-NEXT: movaps %xmm2, %xmm1520; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]521; SSE2-NEXT: mulss %xmm1, %xmm0522; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]523; SSE2-NEXT: mulss %xmm2, %xmm0524; SSE2-NEXT: mulss %xmm3, %xmm0525; SSE2-NEXT: movaps %xmm3, %xmm1526; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm3[1,1]527; SSE2-NEXT: mulss %xmm1, %xmm0528; SSE2-NEXT: movaps %xmm3, %xmm1529; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]530; SSE2-NEXT: mulss %xmm1, %xmm0531; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]532; SSE2-NEXT: mulss %xmm3, %xmm0533; SSE2-NEXT: retq534;535; SSE41-LABEL: test_v16f32_one:536; SSE41: # %bb.0:537; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]538; SSE41-NEXT: mulss %xmm0, %xmm4539; SSE41-NEXT: movaps %xmm0, %xmm5540; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]541; SSE41-NEXT: mulss %xmm4, %xmm5542; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]543; SSE41-NEXT: mulss %xmm5, %xmm0544; SSE41-NEXT: mulss %xmm1, %xmm0545; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]546; SSE41-NEXT: mulss %xmm4, %xmm0547; SSE41-NEXT: movaps %xmm1, %xmm4548; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]549; SSE41-NEXT: mulss %xmm4, %xmm0550; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]551; SSE41-NEXT: mulss %xmm1, %xmm0552; SSE41-NEXT: mulss %xmm2, %xmm0553; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]554; SSE41-NEXT: mulss %xmm1, %xmm0555; SSE41-NEXT: movaps %xmm2, %xmm1556; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]557; SSE41-NEXT: mulss %xmm1, %xmm0558; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]559; SSE41-NEXT: mulss %xmm2, %xmm0560; SSE41-NEXT: mulss %xmm3, %xmm0561; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]562; SSE41-NEXT: mulss %xmm1, %xmm0563; SSE41-NEXT: movaps %xmm3, %xmm1564; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]565; SSE41-NEXT: mulss %xmm1, %xmm0566; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]567; SSE41-NEXT: mulss %xmm3, %xmm0568; SSE41-NEXT: retq569;570; AVX-LABEL: test_v16f32_one:571; AVX: # %bb.0:572; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]573; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm2574; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]575; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2576; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]577; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2578; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0579; AVX-NEXT: vmulss %xmm0, %xmm2, %xmm2580; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]581; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2582; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]583; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2584; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]585; AVX-NEXT: vmulss %xmm0, %xmm2, %xmm0586; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0587; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]588; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0589; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]590; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0591; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]592; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0593; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1594; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0595; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]596; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0597; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]598; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0599; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]600; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0601; AVX-NEXT: vzeroupper602; AVX-NEXT: retq603;604; AVX512-LABEL: test_v16f32_one:605; AVX512: # %bb.0:606; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]607; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm1608; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]609; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1610; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]611; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1612; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm2613; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1614; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]615; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1616; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]617; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1618; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]619; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1620; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm2621; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1622; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]623; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1624; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]625; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1626; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]627; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1628; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm0629; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm1630; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]631; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1632; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]633; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1634; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]635; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0636; AVX512-NEXT: vzeroupper637; AVX512-NEXT: retq638 %1 = call float @llvm.vector.reduce.fmul.f32.v16f32(float 1.0, <16 x float> %a0)639 ret float %1640}641 642;643; vXf32 (undef)644;645 646define float @test_v2f32_undef(<2 x float> %a0) {647; SSE2-LABEL: test_v2f32_undef:648; SSE2: # %bb.0:649; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]650; SSE2-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0651; SSE2-NEXT: retq652;653; SSE41-LABEL: test_v2f32_undef:654; SSE41: # %bb.0:655; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]656; SSE41-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0657; SSE41-NEXT: retq658;659; AVX-LABEL: test_v2f32_undef:660; AVX: # %bb.0:661; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]662; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0663; AVX-NEXT: retq664;665; AVX512-LABEL: test_v2f32_undef:666; AVX512: # %bb.0:667; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]668; AVX512-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0669; AVX512-NEXT: retq670 %1 = call float @llvm.vector.reduce.fmul.f32.v2f32(float undef, <2 x float> %a0)671 ret float %1672}673 674define float @test_v4f32_undef(<4 x float> %a0) {675; SSE2-LABEL: test_v4f32_undef:676; SSE2: # %bb.0:677; SSE2-NEXT: movaps %xmm0, %xmm1678; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]679; SSE2-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1680; SSE2-NEXT: movaps %xmm0, %xmm2681; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]682; SSE2-NEXT: mulss %xmm1, %xmm2683; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]684; SSE2-NEXT: mulss %xmm2, %xmm0685; SSE2-NEXT: retq686;687; SSE41-LABEL: test_v4f32_undef:688; SSE41: # %bb.0:689; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]690; SSE41-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1691; SSE41-NEXT: movaps %xmm0, %xmm2692; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]693; SSE41-NEXT: mulss %xmm1, %xmm2694; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]695; SSE41-NEXT: mulss %xmm2, %xmm0696; SSE41-NEXT: retq697;698; AVX-LABEL: test_v4f32_undef:699; AVX: # %bb.0:700; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]701; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1702; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]703; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1704; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]705; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0706; AVX-NEXT: retq707;708; AVX512-LABEL: test_v4f32_undef:709; AVX512: # %bb.0:710; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]711; AVX512-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1712; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]713; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1714; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]715; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0716; AVX512-NEXT: retq717 %1 = call float @llvm.vector.reduce.fmul.f32.v4f32(float undef, <4 x float> %a0)718 ret float %1719}720 721define float @test_v8f32_undef(<8 x float> %a0) {722; SSE2-LABEL: test_v8f32_undef:723; SSE2: # %bb.0:724; SSE2-NEXT: movaps %xmm0, %xmm2725; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[1,1]726; SSE2-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2727; SSE2-NEXT: movaps %xmm0, %xmm3728; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]729; SSE2-NEXT: mulss %xmm2, %xmm3730; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]731; SSE2-NEXT: mulss %xmm3, %xmm0732; SSE2-NEXT: mulss %xmm1, %xmm0733; SSE2-NEXT: movaps %xmm1, %xmm2734; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[1,1]735; SSE2-NEXT: mulss %xmm2, %xmm0736; SSE2-NEXT: movaps %xmm1, %xmm2737; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]738; SSE2-NEXT: mulss %xmm2, %xmm0739; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]740; SSE2-NEXT: mulss %xmm1, %xmm0741; SSE2-NEXT: retq742;743; SSE41-LABEL: test_v8f32_undef:744; SSE41: # %bb.0:745; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]746; SSE41-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2747; SSE41-NEXT: movaps %xmm0, %xmm3748; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]749; SSE41-NEXT: mulss %xmm2, %xmm3750; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]751; SSE41-NEXT: mulss %xmm3, %xmm0752; SSE41-NEXT: mulss %xmm1, %xmm0753; SSE41-NEXT: movshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]754; SSE41-NEXT: mulss %xmm2, %xmm0755; SSE41-NEXT: movaps %xmm1, %xmm2756; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm1[1]757; SSE41-NEXT: mulss %xmm2, %xmm0758; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]759; SSE41-NEXT: mulss %xmm1, %xmm0760; SSE41-NEXT: retq761;762; AVX-LABEL: test_v8f32_undef:763; AVX: # %bb.0:764; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]765; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1766; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]767; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1768; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]769; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1770; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0771; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm1772; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]773; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1774; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]775; AVX-NEXT: vmulss %xmm2, %xmm1, %xmm1776; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]777; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0778; AVX-NEXT: vzeroupper779; AVX-NEXT: retq780;781; AVX512-LABEL: test_v8f32_undef:782; AVX512: # %bb.0:783; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]784; AVX512-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1785; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]786; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1787; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]788; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1789; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0790; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm1791; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]792; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1793; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]794; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1795; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]796; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0797; AVX512-NEXT: vzeroupper798; AVX512-NEXT: retq799 %1 = call float @llvm.vector.reduce.fmul.f32.v8f32(float undef, <8 x float> %a0)800 ret float %1801}802 803define float @test_v16f32_undef(<16 x float> %a0) {804; SSE2-LABEL: test_v16f32_undef:805; SSE2: # %bb.0:806; SSE2-NEXT: movaps %xmm0, %xmm4807; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm0[1,1]808; SSE2-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4809; SSE2-NEXT: movaps %xmm0, %xmm5810; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]811; SSE2-NEXT: mulss %xmm4, %xmm5812; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]813; SSE2-NEXT: mulss %xmm5, %xmm0814; SSE2-NEXT: mulss %xmm1, %xmm0815; SSE2-NEXT: movaps %xmm1, %xmm4816; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,1],xmm1[1,1]817; SSE2-NEXT: mulss %xmm4, %xmm0818; SSE2-NEXT: movaps %xmm1, %xmm4819; SSE2-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]820; SSE2-NEXT: mulss %xmm4, %xmm0821; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]822; SSE2-NEXT: mulss %xmm1, %xmm0823; SSE2-NEXT: mulss %xmm2, %xmm0824; SSE2-NEXT: movaps %xmm2, %xmm1825; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[1,1]826; SSE2-NEXT: mulss %xmm1, %xmm0827; SSE2-NEXT: movaps %xmm2, %xmm1828; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]829; SSE2-NEXT: mulss %xmm1, %xmm0830; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]831; SSE2-NEXT: mulss %xmm2, %xmm0832; SSE2-NEXT: mulss %xmm3, %xmm0833; SSE2-NEXT: movaps %xmm3, %xmm1834; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm3[1,1]835; SSE2-NEXT: mulss %xmm1, %xmm0836; SSE2-NEXT: movaps %xmm3, %xmm1837; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]838; SSE2-NEXT: mulss %xmm1, %xmm0839; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]840; SSE2-NEXT: mulss %xmm3, %xmm0841; SSE2-NEXT: retq842;843; SSE41-LABEL: test_v16f32_undef:844; SSE41: # %bb.0:845; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]846; SSE41-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4847; SSE41-NEXT: movaps %xmm0, %xmm5848; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]849; SSE41-NEXT: mulss %xmm4, %xmm5850; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]851; SSE41-NEXT: mulss %xmm5, %xmm0852; SSE41-NEXT: mulss %xmm1, %xmm0853; SSE41-NEXT: movshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]854; SSE41-NEXT: mulss %xmm4, %xmm0855; SSE41-NEXT: movaps %xmm1, %xmm4856; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm1[1]857; SSE41-NEXT: mulss %xmm4, %xmm0858; SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]859; SSE41-NEXT: mulss %xmm1, %xmm0860; SSE41-NEXT: mulss %xmm2, %xmm0861; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]862; SSE41-NEXT: mulss %xmm1, %xmm0863; SSE41-NEXT: movaps %xmm2, %xmm1864; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]865; SSE41-NEXT: mulss %xmm1, %xmm0866; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]867; SSE41-NEXT: mulss %xmm2, %xmm0868; SSE41-NEXT: mulss %xmm3, %xmm0869; SSE41-NEXT: movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]870; SSE41-NEXT: mulss %xmm1, %xmm0871; SSE41-NEXT: movaps %xmm3, %xmm1872; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm3[1]873; SSE41-NEXT: mulss %xmm1, %xmm0874; SSE41-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]875; SSE41-NEXT: mulss %xmm3, %xmm0876; SSE41-NEXT: retq877;878; AVX-LABEL: test_v16f32_undef:879; AVX: # %bb.0:880; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]881; AVX-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2882; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]883; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2884; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]885; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2886; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0887; AVX-NEXT: vmulss %xmm0, %xmm2, %xmm2888; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]889; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2890; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]891; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm2892; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]893; AVX-NEXT: vmulss %xmm0, %xmm2, %xmm0894; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0895; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]896; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0897; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]898; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0899; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm1[3,3,3,3]900; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0901; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1902; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0903; AVX-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]904; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0905; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]906; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0907; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]908; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0909; AVX-NEXT: vzeroupper910; AVX-NEXT: retq911;912; AVX512-LABEL: test_v16f32_undef:913; AVX512: # %bb.0:914; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]915; AVX512-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1916; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]917; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1918; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm0[3,3,3,3]919; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1920; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm2921; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1922; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]923; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1924; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]925; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1926; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]927; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1928; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm2929; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1930; AVX512-NEXT: vmovshdup {{.*#+}} xmm3 = xmm2[1,1,3,3]931; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1932; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm2[1,0]933; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm1934; AVX512-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]935; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1936; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm0937; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm1938; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]939; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1940; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]941; AVX512-NEXT: vmulss %xmm2, %xmm1, %xmm1942; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]943; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0944; AVX512-NEXT: vzeroupper945; AVX512-NEXT: retq946 %1 = call float @llvm.vector.reduce.fmul.f32.v16f32(float undef, <16 x float> %a0)947 ret float %1948}949 950;951; vXf64 (accum)952;953 954define double @test_v2f64(double %a0, <2 x double> %a1) {955; SSE-LABEL: test_v2f64:956; SSE: # %bb.0:957; SSE-NEXT: mulsd %xmm1, %xmm0958; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]959; SSE-NEXT: mulsd %xmm1, %xmm0960; SSE-NEXT: retq961;962; AVX-LABEL: test_v2f64:963; AVX: # %bb.0:964; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0965; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]966; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0967; AVX-NEXT: retq968;969; AVX512-LABEL: test_v2f64:970; AVX512: # %bb.0:971; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0972; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]973; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm0974; AVX512-NEXT: retq975 %1 = call double @llvm.vector.reduce.fmul.f64.v2f64(double %a0, <2 x double> %a1)976 ret double %1977}978 979define double @test_v4f64(double %a0, <4 x double> %a1) {980; SSE-LABEL: test_v4f64:981; SSE: # %bb.0:982; SSE-NEXT: mulsd %xmm1, %xmm0983; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]984; SSE-NEXT: mulsd %xmm1, %xmm0985; SSE-NEXT: mulsd %xmm2, %xmm0986; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]987; SSE-NEXT: mulsd %xmm2, %xmm0988; SSE-NEXT: retq989;990; AVX-LABEL: test_v4f64:991; AVX: # %bb.0:992; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0993; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]994; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm0995; AVX-NEXT: vextractf128 $1, %ymm1, %xmm1996; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0997; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]998; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0999; AVX-NEXT: vzeroupper1000; AVX-NEXT: retq1001;1002; AVX512-LABEL: test_v4f64:1003; AVX512: # %bb.0:1004; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01005; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1006; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01007; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm11008; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01009; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1010; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01011; AVX512-NEXT: vzeroupper1012; AVX512-NEXT: retq1013 %1 = call double @llvm.vector.reduce.fmul.f64.v4f64(double %a0, <4 x double> %a1)1014 ret double %11015}1016 1017define double @test_v8f64(double %a0, <8 x double> %a1) {1018; SSE-LABEL: test_v8f64:1019; SSE: # %bb.0:1020; SSE-NEXT: mulsd %xmm1, %xmm01021; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1022; SSE-NEXT: mulsd %xmm1, %xmm01023; SSE-NEXT: mulsd %xmm2, %xmm01024; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1025; SSE-NEXT: mulsd %xmm2, %xmm01026; SSE-NEXT: mulsd %xmm3, %xmm01027; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1028; SSE-NEXT: mulsd %xmm3, %xmm01029; SSE-NEXT: mulsd %xmm4, %xmm01030; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1031; SSE-NEXT: mulsd %xmm4, %xmm01032; SSE-NEXT: retq1033;1034; AVX-LABEL: test_v8f64:1035; AVX: # %bb.0:1036; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01037; AVX-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]1038; AVX-NEXT: vmulsd %xmm3, %xmm0, %xmm01039; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11040; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01041; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1042; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01043; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm01044; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1045; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01046; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11047; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01048; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1049; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01050; AVX-NEXT: vzeroupper1051; AVX-NEXT: retq1052;1053; AVX512-LABEL: test_v8f64:1054; AVX512: # %bb.0:1055; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01056; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1057; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01058; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm21059; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01060; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1061; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01062; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm21063; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01064; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1065; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01066; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11067; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01068; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1069; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01070; AVX512-NEXT: vzeroupper1071; AVX512-NEXT: retq1072 %1 = call double @llvm.vector.reduce.fmul.f64.v8f64(double %a0, <8 x double> %a1)1073 ret double %11074}1075 1076define double @test_v16f64(double %a0, <16 x double> %a1) {1077; SSE2-LABEL: test_v16f64:1078; SSE2: # %bb.0:1079; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm81080; SSE2-NEXT: mulsd %xmm1, %xmm01081; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1082; SSE2-NEXT: mulsd %xmm1, %xmm01083; SSE2-NEXT: mulsd %xmm2, %xmm01084; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1085; SSE2-NEXT: mulsd %xmm2, %xmm01086; SSE2-NEXT: mulsd %xmm3, %xmm01087; SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1088; SSE2-NEXT: mulsd %xmm3, %xmm01089; SSE2-NEXT: mulsd %xmm4, %xmm01090; SSE2-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1091; SSE2-NEXT: mulsd %xmm4, %xmm01092; SSE2-NEXT: mulsd %xmm5, %xmm01093; SSE2-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1094; SSE2-NEXT: mulsd %xmm5, %xmm01095; SSE2-NEXT: mulsd %xmm6, %xmm01096; SSE2-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1097; SSE2-NEXT: mulsd %xmm6, %xmm01098; SSE2-NEXT: mulsd %xmm7, %xmm01099; SSE2-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1100; SSE2-NEXT: mulsd %xmm7, %xmm01101; SSE2-NEXT: mulsd %xmm8, %xmm01102; SSE2-NEXT: unpckhpd {{.*#+}} xmm8 = xmm8[1,1]1103; SSE2-NEXT: mulsd %xmm8, %xmm01104; SSE2-NEXT: retq1105;1106; SSE41-LABEL: test_v16f64:1107; SSE41: # %bb.0:1108; SSE41-NEXT: mulsd %xmm1, %xmm01109; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1110; SSE41-NEXT: mulsd %xmm1, %xmm01111; SSE41-NEXT: mulsd %xmm2, %xmm01112; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1113; SSE41-NEXT: mulsd %xmm2, %xmm01114; SSE41-NEXT: mulsd %xmm3, %xmm01115; SSE41-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1116; SSE41-NEXT: mulsd %xmm3, %xmm01117; SSE41-NEXT: mulsd %xmm4, %xmm01118; SSE41-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1119; SSE41-NEXT: mulsd %xmm4, %xmm01120; SSE41-NEXT: mulsd %xmm5, %xmm01121; SSE41-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1122; SSE41-NEXT: mulsd %xmm5, %xmm01123; SSE41-NEXT: mulsd %xmm6, %xmm01124; SSE41-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1125; SSE41-NEXT: mulsd %xmm6, %xmm01126; SSE41-NEXT: mulsd %xmm7, %xmm01127; SSE41-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1128; SSE41-NEXT: mulsd %xmm7, %xmm01129; SSE41-NEXT: mulsd {{[0-9]+}}(%rsp), %xmm01130; SSE41-NEXT: mulsd {{[0-9]+}}(%rsp), %xmm01131; SSE41-NEXT: retq1132;1133; AVX-LABEL: test_v16f64:1134; AVX: # %bb.0:1135; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01136; AVX-NEXT: vshufpd {{.*#+}} xmm5 = xmm1[1,0]1137; AVX-NEXT: vmulsd %xmm5, %xmm0, %xmm01138; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11139; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01140; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1141; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01142; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm01143; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1144; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01145; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11146; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01147; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1148; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01149; AVX-NEXT: vmulsd %xmm3, %xmm0, %xmm01150; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1151; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01152; AVX-NEXT: vextractf128 $1, %ymm3, %xmm11153; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01154; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1155; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01156; AVX-NEXT: vmulsd %xmm4, %xmm0, %xmm01157; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm4[1,0]1158; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01159; AVX-NEXT: vextractf128 $1, %ymm4, %xmm11160; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01161; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1162; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01163; AVX-NEXT: vzeroupper1164; AVX-NEXT: retq1165;1166; AVX512-LABEL: test_v16f64:1167; AVX512: # %bb.0:1168; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01169; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]1170; AVX512-NEXT: vmulsd %xmm3, %xmm0, %xmm01171; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm31172; AVX512-NEXT: vmulsd %xmm3, %xmm0, %xmm01173; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1174; AVX512-NEXT: vmulsd %xmm3, %xmm0, %xmm01175; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm31176; AVX512-NEXT: vmulsd %xmm3, %xmm0, %xmm01177; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1178; AVX512-NEXT: vmulsd %xmm3, %xmm0, %xmm01179; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11180; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01181; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1182; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01183; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01184; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1185; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01186; AVX512-NEXT: vextractf128 $1, %ymm2, %xmm11187; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01188; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1189; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01190; AVX512-NEXT: vextractf32x4 $2, %zmm2, %xmm11191; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01192; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1193; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01194; AVX512-NEXT: vextractf32x4 $3, %zmm2, %xmm11195; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01196; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1197; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01198; AVX512-NEXT: vzeroupper1199; AVX512-NEXT: retq1200 %1 = call double @llvm.vector.reduce.fmul.f64.v16f64(double %a0, <16 x double> %a1)1201 ret double %11202}1203 1204;1205; vXf64 (one)1206;1207 1208define double @test_v2f64_one(<2 x double> %a0) {1209; SSE-LABEL: test_v2f64_one:1210; SSE: # %bb.0:1211; SSE-NEXT: movapd %xmm0, %xmm11212; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]1213; SSE-NEXT: mulsd %xmm1, %xmm01214; SSE-NEXT: retq1215;1216; AVX-LABEL: test_v2f64_one:1217; AVX: # %bb.0:1218; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1219; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01220; AVX-NEXT: retq1221;1222; AVX512-LABEL: test_v2f64_one:1223; AVX512: # %bb.0:1224; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1225; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01226; AVX512-NEXT: retq1227 %1 = call double @llvm.vector.reduce.fmul.f64.v2f64(double 1.0, <2 x double> %a0)1228 ret double %11229}1230 1231define double @test_v4f64_one(<4 x double> %a0) {1232; SSE-LABEL: test_v4f64_one:1233; SSE: # %bb.0:1234; SSE-NEXT: movapd %xmm0, %xmm21235; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]1236; SSE-NEXT: mulsd %xmm2, %xmm01237; SSE-NEXT: mulsd %xmm1, %xmm01238; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1239; SSE-NEXT: mulsd %xmm1, %xmm01240; SSE-NEXT: retq1241;1242; AVX-LABEL: test_v4f64_one:1243; AVX: # %bb.0:1244; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1245; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm11246; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01247; AVX-NEXT: vmulsd %xmm0, %xmm1, %xmm11248; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1249; AVX-NEXT: vmulsd %xmm0, %xmm1, %xmm01250; AVX-NEXT: vzeroupper1251; AVX-NEXT: retq1252;1253; AVX512-LABEL: test_v4f64_one:1254; AVX512: # %bb.0:1255; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1256; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm11257; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm01258; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm11259; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1260; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm01261; AVX512-NEXT: vzeroupper1262; AVX512-NEXT: retq1263 %1 = call double @llvm.vector.reduce.fmul.f64.v4f64(double 1.0, <4 x double> %a0)1264 ret double %11265}1266 1267define double @test_v8f64_one(<8 x double> %a0) {1268; SSE-LABEL: test_v8f64_one:1269; SSE: # %bb.0:1270; SSE-NEXT: movapd %xmm0, %xmm41271; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm0[1]1272; SSE-NEXT: mulsd %xmm4, %xmm01273; SSE-NEXT: mulsd %xmm1, %xmm01274; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1275; SSE-NEXT: mulsd %xmm1, %xmm01276; SSE-NEXT: mulsd %xmm2, %xmm01277; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1278; SSE-NEXT: mulsd %xmm2, %xmm01279; SSE-NEXT: mulsd %xmm3, %xmm01280; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1281; SSE-NEXT: mulsd %xmm3, %xmm01282; SSE-NEXT: retq1283;1284; AVX-LABEL: test_v8f64_one:1285; AVX: # %bb.0:1286; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1287; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm21288; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01289; AVX-NEXT: vmulsd %xmm0, %xmm2, %xmm21290; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1291; AVX-NEXT: vmulsd %xmm0, %xmm2, %xmm01292; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01293; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1294; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm01295; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11296; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01297; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1298; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01299; AVX-NEXT: vzeroupper1300; AVX-NEXT: retq1301;1302; AVX512-LABEL: test_v8f64_one:1303; AVX512: # %bb.0:1304; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1305; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm11306; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm21307; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11308; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1309; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11310; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm21311; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11312; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1313; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11314; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01315; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm11316; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1317; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm01318; AVX512-NEXT: vzeroupper1319; AVX512-NEXT: retq1320 %1 = call double @llvm.vector.reduce.fmul.f64.v8f64(double 1.0, <8 x double> %a0)1321 ret double %11322}1323 1324define double @test_v16f64_one(<16 x double> %a0) {1325; SSE-LABEL: test_v16f64_one:1326; SSE: # %bb.0:1327; SSE-NEXT: movapd %xmm0, %xmm81328; SSE-NEXT: unpckhpd {{.*#+}} xmm8 = xmm8[1],xmm0[1]1329; SSE-NEXT: mulsd %xmm8, %xmm01330; SSE-NEXT: mulsd %xmm1, %xmm01331; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1332; SSE-NEXT: mulsd %xmm1, %xmm01333; SSE-NEXT: mulsd %xmm2, %xmm01334; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1335; SSE-NEXT: mulsd %xmm2, %xmm01336; SSE-NEXT: mulsd %xmm3, %xmm01337; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1338; SSE-NEXT: mulsd %xmm3, %xmm01339; SSE-NEXT: mulsd %xmm4, %xmm01340; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1341; SSE-NEXT: mulsd %xmm4, %xmm01342; SSE-NEXT: mulsd %xmm5, %xmm01343; SSE-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1344; SSE-NEXT: mulsd %xmm5, %xmm01345; SSE-NEXT: mulsd %xmm6, %xmm01346; SSE-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1347; SSE-NEXT: mulsd %xmm6, %xmm01348; SSE-NEXT: mulsd %xmm7, %xmm01349; SSE-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1350; SSE-NEXT: mulsd %xmm7, %xmm01351; SSE-NEXT: retq1352;1353; AVX-LABEL: test_v16f64_one:1354; AVX: # %bb.0:1355; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1356; AVX-NEXT: vmulsd %xmm4, %xmm0, %xmm41357; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01358; AVX-NEXT: vmulsd %xmm0, %xmm4, %xmm41359; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1360; AVX-NEXT: vmulsd %xmm0, %xmm4, %xmm01361; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01362; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm1[1,0]1363; AVX-NEXT: vmulsd %xmm4, %xmm0, %xmm01364; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11365; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01366; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1367; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01368; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm01369; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1370; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01371; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11372; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01373; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1374; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01375; AVX-NEXT: vmulsd %xmm3, %xmm0, %xmm01376; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1377; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01378; AVX-NEXT: vextractf128 $1, %ymm3, %xmm11379; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01380; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1381; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01382; AVX-NEXT: vzeroupper1383; AVX-NEXT: retq1384;1385; AVX512-LABEL: test_v16f64_one:1386; AVX512: # %bb.0:1387; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1388; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm21389; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm31390; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21391; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1392; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21393; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm31394; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21395; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1396; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21397; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01398; AVX512-NEXT: vmulsd %xmm0, %xmm2, %xmm21399; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1400; AVX512-NEXT: vmulsd %xmm0, %xmm2, %xmm01401; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01402; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1403; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01404; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm21405; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01406; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1407; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01408; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm21409; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01410; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1411; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01412; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11413; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01414; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1415; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01416; AVX512-NEXT: vzeroupper1417; AVX512-NEXT: retq1418 %1 = call double @llvm.vector.reduce.fmul.f64.v16f64(double 1.0, <16 x double> %a0)1419 ret double %11420}1421 1422;1423; vXf64 (undef)1424;1425 1426define double @test_v2f64_undef(<2 x double> %a0) {1427; SSE-LABEL: test_v2f64_undef:1428; SSE: # %bb.0:1429; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1430; SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01431; SSE-NEXT: retq1432;1433; AVX-LABEL: test_v2f64_undef:1434; AVX: # %bb.0:1435; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1436; AVX-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01437; AVX-NEXT: retq1438;1439; AVX512-LABEL: test_v2f64_undef:1440; AVX512: # %bb.0:1441; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1442; AVX512-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01443; AVX512-NEXT: retq1444 %1 = call double @llvm.vector.reduce.fmul.f64.v2f64(double undef, <2 x double> %a0)1445 ret double %11446}1447 1448define double @test_v4f64_undef(<4 x double> %a0) {1449; SSE-LABEL: test_v4f64_undef:1450; SSE: # %bb.0:1451; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1452; SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01453; SSE-NEXT: mulsd %xmm1, %xmm01454; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1455; SSE-NEXT: mulsd %xmm1, %xmm01456; SSE-NEXT: retq1457;1458; AVX-LABEL: test_v4f64_undef:1459; AVX: # %bb.0:1460; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1461; AVX-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11462; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01463; AVX-NEXT: vmulsd %xmm0, %xmm1, %xmm11464; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1465; AVX-NEXT: vmulsd %xmm0, %xmm1, %xmm01466; AVX-NEXT: vzeroupper1467; AVX-NEXT: retq1468;1469; AVX512-LABEL: test_v4f64_undef:1470; AVX512: # %bb.0:1471; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1472; AVX512-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11473; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm01474; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm11475; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1476; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm01477; AVX512-NEXT: vzeroupper1478; AVX512-NEXT: retq1479 %1 = call double @llvm.vector.reduce.fmul.f64.v4f64(double undef, <4 x double> %a0)1480 ret double %11481}1482 1483define double @test_v8f64_undef(<8 x double> %a0) {1484; SSE-LABEL: test_v8f64_undef:1485; SSE: # %bb.0:1486; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1487; SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01488; SSE-NEXT: mulsd %xmm1, %xmm01489; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1490; SSE-NEXT: mulsd %xmm1, %xmm01491; SSE-NEXT: mulsd %xmm2, %xmm01492; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1493; SSE-NEXT: mulsd %xmm2, %xmm01494; SSE-NEXT: mulsd %xmm3, %xmm01495; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1496; SSE-NEXT: mulsd %xmm3, %xmm01497; SSE-NEXT: retq1498;1499; AVX-LABEL: test_v8f64_undef:1500; AVX: # %bb.0:1501; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1502; AVX-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm21503; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01504; AVX-NEXT: vmulsd %xmm0, %xmm2, %xmm21505; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1506; AVX-NEXT: vmulsd %xmm0, %xmm2, %xmm01507; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01508; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1509; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm01510; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11511; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01512; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1513; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01514; AVX-NEXT: vzeroupper1515; AVX-NEXT: retq1516;1517; AVX512-LABEL: test_v8f64_undef:1518; AVX512: # %bb.0:1519; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]1520; AVX512-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm11521; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm21522; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11523; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1524; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11525; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm21526; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11527; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1528; AVX512-NEXT: vmulsd %xmm2, %xmm1, %xmm11529; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01530; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm11531; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1532; AVX512-NEXT: vmulsd %xmm0, %xmm1, %xmm01533; AVX512-NEXT: vzeroupper1534; AVX512-NEXT: retq1535 %1 = call double @llvm.vector.reduce.fmul.f64.v8f64(double undef, <8 x double> %a0)1536 ret double %11537}1538 1539define double @test_v16f64_undef(<16 x double> %a0) {1540; SSE-LABEL: test_v16f64_undef:1541; SSE: # %bb.0:1542; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]1543; SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01544; SSE-NEXT: mulsd %xmm1, %xmm01545; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]1546; SSE-NEXT: mulsd %xmm1, %xmm01547; SSE-NEXT: mulsd %xmm2, %xmm01548; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]1549; SSE-NEXT: mulsd %xmm2, %xmm01550; SSE-NEXT: mulsd %xmm3, %xmm01551; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]1552; SSE-NEXT: mulsd %xmm3, %xmm01553; SSE-NEXT: mulsd %xmm4, %xmm01554; SSE-NEXT: unpckhpd {{.*#+}} xmm4 = xmm4[1,1]1555; SSE-NEXT: mulsd %xmm4, %xmm01556; SSE-NEXT: mulsd %xmm5, %xmm01557; SSE-NEXT: unpckhpd {{.*#+}} xmm5 = xmm5[1,1]1558; SSE-NEXT: mulsd %xmm5, %xmm01559; SSE-NEXT: mulsd %xmm6, %xmm01560; SSE-NEXT: unpckhpd {{.*#+}} xmm6 = xmm6[1,1]1561; SSE-NEXT: mulsd %xmm6, %xmm01562; SSE-NEXT: mulsd %xmm7, %xmm01563; SSE-NEXT: unpckhpd {{.*#+}} xmm7 = xmm7[1,1]1564; SSE-NEXT: mulsd %xmm7, %xmm01565; SSE-NEXT: retq1566;1567; AVX-LABEL: test_v16f64_undef:1568; AVX: # %bb.0:1569; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1570; AVX-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm41571; AVX-NEXT: vextractf128 $1, %ymm0, %xmm01572; AVX-NEXT: vmulsd %xmm0, %xmm4, %xmm41573; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1574; AVX-NEXT: vmulsd %xmm0, %xmm4, %xmm01575; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01576; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm1[1,0]1577; AVX-NEXT: vmulsd %xmm4, %xmm0, %xmm01578; AVX-NEXT: vextractf128 $1, %ymm1, %xmm11579; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01580; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1581; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01582; AVX-NEXT: vmulsd %xmm2, %xmm0, %xmm01583; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm2[1,0]1584; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01585; AVX-NEXT: vextractf128 $1, %ymm2, %xmm11586; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01587; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1588; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01589; AVX-NEXT: vmulsd %xmm3, %xmm0, %xmm01590; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]1591; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01592; AVX-NEXT: vextractf128 $1, %ymm3, %xmm11593; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01594; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1595; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm01596; AVX-NEXT: vzeroupper1597; AVX-NEXT: retq1598;1599; AVX512-LABEL: test_v16f64_undef:1600; AVX512: # %bb.0:1601; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]1602; AVX512-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm21603; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm31604; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21605; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1606; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21607; AVX512-NEXT: vextractf32x4 $2, %zmm0, %xmm31608; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21609; AVX512-NEXT: vshufpd {{.*#+}} xmm3 = xmm3[1,0]1610; AVX512-NEXT: vmulsd %xmm3, %xmm2, %xmm21611; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm01612; AVX512-NEXT: vmulsd %xmm0, %xmm2, %xmm21613; AVX512-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1614; AVX512-NEXT: vmulsd %xmm0, %xmm2, %xmm01615; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01616; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1617; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01618; AVX512-NEXT: vextractf128 $1, %ymm1, %xmm21619; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01620; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1621; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01622; AVX512-NEXT: vextractf32x4 $2, %zmm1, %xmm21623; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01624; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]1625; AVX512-NEXT: vmulsd %xmm2, %xmm0, %xmm01626; AVX512-NEXT: vextractf32x4 $3, %zmm1, %xmm11627; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01628; AVX512-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]1629; AVX512-NEXT: vmulsd %xmm1, %xmm0, %xmm01630; AVX512-NEXT: vzeroupper1631; AVX512-NEXT: retq1632 %1 = call double @llvm.vector.reduce.fmul.f64.v16f64(double undef, <16 x double> %a0)1633 ret double %11634}1635 1636declare float @llvm.vector.reduce.fmul.f32.v2f32(float, <2 x float>)1637declare float @llvm.vector.reduce.fmul.f32.v4f32(float, <4 x float>)1638declare float @llvm.vector.reduce.fmul.f32.v8f32(float, <8 x float>)1639declare float @llvm.vector.reduce.fmul.f32.v16f32(float, <16 x float>)1640 1641declare double @llvm.vector.reduce.fmul.f64.v2f64(double, <2 x double>)1642declare double @llvm.vector.reduce.fmul.f64.v4f64(double, <4 x double>)1643declare double @llvm.vector.reduce.fmul.f64.v8f64(double, <8 x double>)1644declare double @llvm.vector.reduce.fmul.f64.v16f64(double, <16 x double>)1645