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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,AVX2,X86-AVX23; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX512,X86-AVX5124; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,AVX2,X64-AVX25; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX512,X64-AVX5126 7declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>)8declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>)9declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>)10declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>)11 12define <32 x i8> @combine_pshufb_pslldq(<32 x i8> %a0) {13; CHECK-LABEL: combine_pshufb_pslldq:14; CHECK: # %bb.0:15; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm016; CHECK-NEXT: ret{{[l|q]}}17 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)18 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>19 ret <32 x i8> %220}21 22define <32 x i8> @combine_pshufb_psrldq(<32 x i8> %a0) {23; CHECK-LABEL: combine_pshufb_psrldq:24; CHECK: # %bb.0:25; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm026; CHECK-NEXT: ret{{[l|q]}}27 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)28 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32>29 ret <32 x i8> %230}31 32define <32 x i8> @combine_pshufb_vpermd(<8 x i32> %a) {33; CHECK-LABEL: combine_pshufb_vpermd:34; CHECK: # %bb.0:35; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18]36; CHECK-NEXT: ret{{[l|q]}}37 %tmp0 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>)38 %tmp1 = bitcast <8 x i32> %tmp0 to <32 x i8>39 %tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30>40 ret <32 x i8> %tmp241}42 43define <32 x i8> @combine_pshufb_vpermps(<8 x float> %a) {44; CHECK-LABEL: combine_pshufb_vpermps:45; CHECK: # %bb.0:46; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18]47; CHECK-NEXT: ret{{[l|q]}}48 %tmp0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>)49 %tmp1 = bitcast <8 x float> %tmp0 to <32 x i8>50 %tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30>51 ret <32 x i8> %tmp252}53 54define <32 x i8> @combine_and_pshufb(<32 x i8> %a0) {55; CHECK-LABEL: combine_and_pshufb:56; CHECK: # %bb.0:57; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm158; CHECK-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15]59; CHECK-NEXT: ret{{[l|q]}}60 %1 = shufflevector <32 x i8> %a0, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>61 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)62 ret <32 x i8> %263}64 65define <32 x i8> @combine_pshufb_and(<32 x i8> %a0) {66; CHECK-LABEL: combine_pshufb_and:67; CHECK: # %bb.0:68; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm169; CHECK-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15]70; CHECK-NEXT: ret{{[l|q]}}71 %1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)72 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>73 ret <32 x i8> %274}75 76define <4 x i64> @combine_permq_pshufb_as_vextracti128(<4 x i64> %a0) {77; X86-LABEL: combine_permq_pshufb_as_vextracti128:78; X86: # %bb.0:79; X86-NEXT: vextracti128 $1, %ymm0, %xmm080; X86-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm081; X86-NEXT: retl82;83; X64-LABEL: combine_permq_pshufb_as_vextracti128:84; X64: # %bb.0:85; X64-NEXT: vextracti128 $1, %ymm0, %xmm086; X64-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm087; X64-NEXT: retq88 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>89 %2 = bitcast <4 x i64> %1 to <32 x i8>90 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>)91 %4 = bitcast <32 x i8> %3 to <4 x i64>92 %5 = add <4 x i64> %4, <i64 1, i64 1, i64 3, i64 3>93 ret <4 x i64> %594}95 96define <4 x i64> @combine_permq_pshufb_as_vmovdqa(<4 x i64> %a0) {97; X86-LABEL: combine_permq_pshufb_as_vmovdqa:98; X86: # %bb.0:99; X86-NEXT: vmovdqa %xmm0, %xmm0100; X86-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0101; X86-NEXT: retl102;103; X64-LABEL: combine_permq_pshufb_as_vmovdqa:104; X64: # %bb.0:105; X64-NEXT: vmovdqa %xmm0, %xmm0106; X64-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0107; X64-NEXT: retq108 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>109 %2 = bitcast <4 x i64> %1 to <32 x i8>110 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>)111 %4 = bitcast <32 x i8> %3 to <4 x i64>112 %5 = add <4 x i64> %4, <i64 1, i64 1, i64 3, i64 3>113 ret <4 x i64> %5114}115 116define <8 x i32> @combine_as_vpermd(<8 x i32> %a0) {117; AVX2-LABEL: combine_as_vpermd:118; AVX2: # %bb.0:119; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [4,5,4,5,6,7,0,7]120; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0121; AVX2-NEXT: ret{{[l|q]}}122;123; AVX512-LABEL: combine_as_vpermd:124; AVX512: # %bb.0:125; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,5,4,5,6,7,0,7]126; AVX512-NEXT: vpermps %ymm0, %ymm1, %ymm0127; AVX512-NEXT: ret{{[l|q]}}128 %1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>129 %2 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6>)130 %3 = shufflevector <8 x i32> %1, <8 x i32> %2, <8 x i32> <i32 0, i32 8, i32 9, i32 1, i32 15, i32 14, i32 4, i32 3>131 ret <8 x i32> %3132}133 134define <8 x float> @combine_as_vpermps(<8 x float> %a0) {135; AVX2-LABEL: combine_as_vpermps:136; AVX2: # %bb.0:137; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [6,4,7,5,1,u,4,7]138; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0139; AVX2-NEXT: ret{{[l|q]}}140;141; AVX512-LABEL: combine_as_vpermps:142; AVX512: # %bb.0:143; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm1 = [6,4,7,5,1,0,4,7]144; AVX512-NEXT: vpermps %ymm0, %ymm1, %ymm0145; AVX512-NEXT: ret{{[l|q]}}146 %1 = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>147 %2 = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 1, i32 undef, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>)148 %3 = shufflevector <8 x float> %1, <8 x float> %2, <8 x i32> <i32 15, i32 0, i32 14, i32 1, i32 8, i32 9, i32 4, i32 3>149 ret <8 x float> %3150}151 152define <32 x i8> @combine_permq_pshufb_as_vmovaps(<4 x i64> %a0) {153; CHECK-LABEL: combine_permq_pshufb_as_vmovaps:154; CHECK: # %bb.0:155; CHECK-NEXT: vmovaps %xmm0, %xmm0156; CHECK-NEXT: ret{{[l|q]}}157 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>158 %2 = bitcast <4 x i64> %1 to <32 x i8>159 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>)160 ret <32 x i8> %3161}162 163define <32 x i8> @combine_permq_pshufb_as_vpblendd(<4 x i64> %a0) {164; CHECK-LABEL: combine_permq_pshufb_as_vpblendd:165; CHECK: # %bb.0:166; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1167; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]168; CHECK-NEXT: ret{{[l|q]}}169 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>170 %2 = bitcast <4 x i64> %1 to <32 x i8>171 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)172 ret <32 x i8> %3173}174 175define <16 x i8> @combine_pshufb_as_vpbroadcastb128(<16 x i8> %a) {176; CHECK-LABEL: combine_pshufb_as_vpbroadcastb128:177; CHECK: # %bb.0:178; CHECK-NEXT: vpbroadcastb %xmm0, %xmm0179; CHECK-NEXT: ret{{[l|q]}}180 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> zeroinitializer)181 ret <16 x i8> %1182}183 184define <32 x i8> @combine_pshufb_as_vpbroadcastb256(<2 x i64> %a) {185; CHECK-LABEL: combine_pshufb_as_vpbroadcastb256:186; CHECK: # %bb.0:187; CHECK-NEXT: vpbroadcastb %xmm0, %ymm0188; CHECK-NEXT: ret{{[l|q]}}189 %1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>190 %2 = bitcast <4 x i64> %1 to <32 x i8>191 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> zeroinitializer)192 %4 = bitcast <32 x i8> %3 to <8 x i32>193 %5 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %4, <8 x i32> zeroinitializer)194 %6 = bitcast <8 x i32> %5 to <32 x i8>195 ret <32 x i8> %6196}197 198define <16 x i8> @combine_pshufb_as_vpbroadcastw128(<16 x i8> %a) {199; CHECK-LABEL: combine_pshufb_as_vpbroadcastw128:200; CHECK: # %bb.0:201; CHECK-NEXT: vpbroadcastw %xmm0, %xmm0202; CHECK-NEXT: ret{{[l|q]}}203 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1>)204 ret <16 x i8> %1205}206 207define <32 x i8> @combine_pshufb_as_vpbroadcastw256(<2 x i64> %a) {208; CHECK-LABEL: combine_pshufb_as_vpbroadcastw256:209; CHECK: # %bb.0:210; CHECK-NEXT: vpbroadcastw %xmm0, %ymm0211; CHECK-NEXT: ret{{[l|q]}}212 %1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>213 %2 = bitcast <4 x i64> %1 to <32 x i8>214 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1>)215 %4 = bitcast <32 x i8> %3 to <8 x i32>216 %5 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %4, <8 x i32> zeroinitializer)217 %6 = bitcast <8 x i32> %5 to <32 x i8>218 ret <32 x i8> %6219}220 221define <16 x i8> @combine_pshufb_as_vpbroadcastd128(<16 x i8> %a) {222; X86-LABEL: combine_pshufb_as_vpbroadcastd128:223; X86: # %bb.0:224; X86-NEXT: vpbroadcastd %xmm0, %xmm0225; X86-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0226; X86-NEXT: retl227;228; X64-LABEL: combine_pshufb_as_vpbroadcastd128:229; X64: # %bb.0:230; X64-NEXT: vpbroadcastd %xmm0, %xmm0231; X64-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0232; X64-NEXT: retq233 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>)234 %2 = add <16 x i8> %1, <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>235 ret <16 x i8> %2236}237 238define <8 x i32> @combine_permd_as_vpbroadcastd256(<4 x i32> %a) {239; X86-LABEL: combine_permd_as_vpbroadcastd256:240; X86: # %bb.0:241; X86-NEXT: vpbroadcastd %xmm0, %ymm0242; X86-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0243; X86-NEXT: retl244;245; X64-LABEL: combine_permd_as_vpbroadcastd256:246; X64: # %bb.0:247; X64-NEXT: vpbroadcastd %xmm0, %ymm0248; X64-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0249; X64-NEXT: retq250 %1 = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>251 %2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %1, <8 x i32> zeroinitializer)252 %3 = add <8 x i32> %2, <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>253 ret <8 x i32> %3254}255 256define <16 x i8> @combine_pshufb_as_vpbroadcastq128(<16 x i8> %a) {257; CHECK-LABEL: combine_pshufb_as_vpbroadcastq128:258; CHECK: # %bb.0:259; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]260; CHECK-NEXT: ret{{[l|q]}}261 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)262 ret <16 x i8> %1263}264 265define <8 x i32> @combine_permd_as_vpbroadcastq256(<4 x i32> %a) {266; X86-LABEL: combine_permd_as_vpbroadcastq256:267; X86: # %bb.0:268; X86-NEXT: vpbroadcastq %xmm0, %ymm0269; X86-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0270; X86-NEXT: retl271;272; X64-LABEL: combine_permd_as_vpbroadcastq256:273; X64: # %bb.0:274; X64-NEXT: vpbroadcastq %xmm0, %ymm0275; X64-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0276; X64-NEXT: retq277 %1 = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>278 %2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %1, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)279 %3 = add <8 x i32> %2, <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>280 ret <8 x i32> %3281}282 283define <4 x float> @combine_pshufb_as_vpbroadcastss128(<4 x float> %a) {284; CHECK-LABEL: combine_pshufb_as_vpbroadcastss128:285; CHECK: # %bb.0:286; CHECK-NEXT: vbroadcastss %xmm0, %xmm0287; CHECK-NEXT: ret{{[l|q]}}288 %1 = bitcast <4 x float> %a to <16 x i8>289 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>)290 %3 = bitcast <16 x i8> %2 to <4 x float>291 ret <4 x float> %3292}293 294define <8 x float> @combine_permps_as_vpbroadcastss256(<4 x float> %a) {295; CHECK-LABEL: combine_permps_as_vpbroadcastss256:296; CHECK: # %bb.0:297; CHECK-NEXT: vbroadcastss %xmm0, %ymm0298; CHECK-NEXT: ret{{[l|q]}}299 %1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>300 %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %1, <8 x i32> zeroinitializer)301 ret <8 x float> %2302}303 304define <4 x double> @combine_permps_as_vpbroadcastsd256(<2 x double> %a) {305; CHECK-LABEL: combine_permps_as_vpbroadcastsd256:306; CHECK: # %bb.0:307; CHECK-NEXT: vbroadcastsd %xmm0, %ymm0308; CHECK-NEXT: ret{{[l|q]}}309 %1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>310 %2 = bitcast <4 x double> %1 to <8 x float>311 %3 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)312 %4 = bitcast <8 x float> %3 to <4 x double>313 ret <4 x double> %4314}315 316define <16 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb128(<16 x i8> %a) {317; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb128:318; CHECK: # %bb.0:319; CHECK-NEXT: vpbroadcastb %xmm0, %xmm0320; CHECK-NEXT: ret{{[l|q]}}321 %1 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> zeroinitializer322 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> zeroinitializer)323 ret <16 x i8> %2324}325 326define <32 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb256(<32 x i8> %a) {327; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb256:328; CHECK: # %bb.0:329; CHECK-NEXT: vpbroadcastb %xmm0, %ymm0330; CHECK-NEXT: ret{{[l|q]}}331 %1 = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> zeroinitializer332 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> zeroinitializer)333 ret <32 x i8> %2334}335 336define <4 x float> @combine_vpbroadcast_pshufb_as_vpbroadcastss128(<4 x float> %a) {337; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastss128:338; CHECK: # %bb.0:339; CHECK-NEXT: vbroadcastss %xmm0, %xmm0340; CHECK-NEXT: ret{{[l|q]}}341 %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer342 %2 = bitcast <4 x float> %1 to <16 x i8>343 %3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>)344 %4 = bitcast <16 x i8> %3 to <4 x float>345 ret <4 x float> %4346}347 348define <8 x float> @combine_vpbroadcast_permd_as_vpbroadcastss256(<4 x float> %a) {349; CHECK-LABEL: combine_vpbroadcast_permd_as_vpbroadcastss256:350; CHECK: # %bb.0:351; CHECK-NEXT: vbroadcastss %xmm0, %ymm0352; CHECK-NEXT: ret{{[l|q]}}353 %1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> zeroinitializer354 %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %1, <8 x i32> zeroinitializer)355 ret <8 x float> %2356}357 358define <4 x double> @combine_vpbroadcast_permd_as_vpbroadcastsd256(<2 x double> %a) {359; CHECK-LABEL: combine_vpbroadcast_permd_as_vpbroadcastsd256:360; CHECK: # %bb.0:361; CHECK-NEXT: vbroadcastsd %xmm0, %ymm0362; CHECK-NEXT: ret{{[l|q]}}363 %1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> zeroinitializer364 %2 = bitcast <4 x double> %1 to <8 x float>365 %3 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)366 %4 = bitcast <8 x float> %3 to <4 x double>367 ret <4 x double> %4368}369 370define <8 x i32> @combine_permd_as_permq(<8 x i32> %a) {371; CHECK-LABEL: combine_permd_as_permq:372; CHECK: # %bb.0:373; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,1]374; CHECK-NEXT: ret{{[l|q]}}375 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 2, i32 3>)376 ret <8 x i32> %1377}378 379define <8 x float> @combine_permps_as_permpd(<8 x float> %a) {380; CHECK-LABEL: combine_permps_as_permpd:381; CHECK: # %bb.0:382; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,2,0,1]383; CHECK-NEXT: ret{{[l|q]}}384 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 6, i32 7, i32 4, i32 5, i32 0, i32 1, i32 2, i32 3>)385 ret <8 x float> %1386}387 388define <8 x float> @combine_permps_as_vpermilps(<8 x float> %a, i32 %a1) {389; CHECK-LABEL: combine_permps_as_vpermilps:390; CHECK: # %bb.0:391; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,2,1,0,7,6,5,4]392; CHECK-NEXT: ret{{[l|q]}}393 %1 = insertelement <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>, i32 %a1, i32 0394 %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> %1)395 %3 = shufflevector <8 x float> %2, <8 x float> undef, <8 x i32> <i32 1, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>396 ret <8 x float> %3397}398 399define <4 x i64> @combine_pshufb_as_zext(<32 x i8> %a0) {400; CHECK-LABEL: combine_pshufb_as_zext:401; CHECK: # %bb.0:402; CHECK-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero403; CHECK-NEXT: ret{{[l|q]}}404 %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>405 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 10, i8 11, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)406 %3 = bitcast <32 x i8> %2 to <4 x i64>407 ret <4 x i64> %3408}409 410define <4 x i64> @combine_pshufb_as_zext128(<32 x i8> %a0) {411; CHECK-LABEL: combine_pshufb_as_zext128:412; CHECK: # %bb.0:413; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,7,6,5,4,3,2,1,0]414; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,0,1]415; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,14],zero,zero,zero,zero,zero,zero,ymm0[13,12],zero,zero,zero,zero,zero,zero,ymm0[31,30],zero,zero,zero,zero,zero,zero,ymm0[29,28],zero,zero,zero,zero,zero,zero416; CHECK-NEXT: ret{{[l|q]}}417 %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>418 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 13, i8 12, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 13, i8 12, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)419 %3 = bitcast <32 x i8> %2 to <4 x i64>420 ret <4 x i64> %3421}422 423define <4 x double> @combine_pshufb_as_vzmovl_64(<4 x double> %a0) {424; CHECK-LABEL: combine_pshufb_as_vzmovl_64:425; CHECK: # %bb.0:426; CHECK-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero427; CHECK-NEXT: ret{{[l|q]}}428 %1 = bitcast <4 x double> %a0 to <32 x i8>429 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)430 %3 = bitcast <32 x i8> %2 to <4 x double>431 ret <4 x double> %3432}433 434define <8 x float> @combine_pshufb_as_vzmovl_32(<8 x float> %a0) {435; CHECK-LABEL: combine_pshufb_as_vzmovl_32:436; CHECK: # %bb.0:437; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1438; CHECK-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]439; CHECK-NEXT: ret{{[l|q]}}440 %1 = bitcast <8 x float> %a0 to <32 x i8>441 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)442 %3 = bitcast <32 x i8> %2 to <8 x float>443 ret <8 x float> %3444}445 446define <32 x i8> @combine_pshufb_as_pslldq(<32 x i8> %a0) {447; CHECK-LABEL: combine_pshufb_as_pslldq:448; CHECK: # %bb.0:449; CHECK-NEXT: vpslldq {{.*#+}} ymm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,18,19,20,21]450; CHECK-NEXT: ret{{[l|q]}}451 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>)452 ret <32 x i8> %res0453}454 455define <32 x i8> @combine_pshufb_as_psrldq(<32 x i8> %a0) {456; CHECK-LABEL: combine_pshufb_as_psrldq:457; CHECK: # %bb.0:458; CHECK-NEXT: vpsrldq {{.*#+}} ymm0 = ymm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero459; CHECK-NEXT: ret{{[l|q]}}460 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)461 ret <32 x i8> %res0462}463 464define <32 x i8> @combine_pshufb_as_psrlw(<32 x i8> %a0) {465; CHECK-LABEL: combine_pshufb_as_psrlw:466; CHECK: # %bb.0:467; CHECK-NEXT: vpsrlw $8, %ymm0, %ymm0468; CHECK-NEXT: ret{{[l|q]}}469 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 1, i8 128, i8 3, i8 128, i8 5, i8 128, i8 7, i8 128, i8 9, i8 128, i8 11, i8 128, i8 13, i8 128, i8 15, i8 128, i8 17, i8 128, i8 19, i8 128, i8 21, i8 128, i8 23, i8 128, i8 25, i8 128, i8 27, i8 128, i8 29, i8 128, i8 31, i8 128>)470 ret <32 x i8> %res0471}472 473define <32 x i8> @combine_pshufb_as_pslld(<32 x i8> %a0) {474; CHECK-LABEL: combine_pshufb_as_pslld:475; CHECK: # %bb.0:476; CHECK-NEXT: vpslld $24, %ymm0, %ymm0477; CHECK-NEXT: ret{{[l|q]}}478 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 0, i8 128, i8 128, i8 128, i8 4, i8 128, i8 128, i8 128, i8 8, i8 128, i8 128, i8 128, i8 12, i8 128, i8 128, i8 128, i8 16, i8 128, i8 128, i8 128, i8 20, i8 128, i8 128, i8 128, i8 24, i8 128, i8 128, i8 128, i8 28>)479 ret <32 x i8> %res0480}481 482define <32 x i8> @combine_pshufb_as_psrlq(<32 x i8> %a0) {483; CHECK-LABEL: combine_pshufb_as_psrlq:484; CHECK: # %bb.0:485; CHECK-NEXT: vpsrlq $40, %ymm0, %ymm0486; CHECK-NEXT: ret{{[l|q]}}487 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 21, i8 22, i8 23, i8 128, i8 128, i8 128, i8 128, i8 128, i8 29, i8 30, i8 31, i8 128, i8 128, i8 128, i8 128, i8 128>)488 ret <32 x i8> %res0489}490 491define <32 x i8> @combine_pshufb_as_pshuflw(<32 x i8> %a0) {492; CHECK-LABEL: combine_pshufb_as_pshuflw:493; CHECK: # %bb.0:494; CHECK-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15]495; CHECK-NEXT: ret{{[l|q]}}496 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)497 ret <32 x i8> %res0498}499 500define <32 x i8> @combine_pshufb_as_pshufhw(<32 x i8> %a0) {501; CHECK-LABEL: combine_pshufb_as_pshufhw:502; CHECK: # %bb.0:503; CHECK-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,7,6,8,9,10,11,13,12,15,14]504; CHECK-NEXT: ret{{[l|q]}}505 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>)506 ret <32 x i8> %res0507}508 509define <32 x i8> @combine_pshufb_not_as_pshufw(<32 x i8> %a0) {510; AVX2-LABEL: combine_pshufb_not_as_pshufw:511; AVX2: # %bb.0:512; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13,18,19,16,17,22,23,20,21,26,27,24,25,30,31,28,29]513; AVX2-NEXT: ret{{[l|q]}}514;515; AVX512-LABEL: combine_pshufb_not_as_pshufw:516; AVX512: # %bb.0:517; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0518; AVX512-NEXT: vprold $16, %zmm0, %zmm0519; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0520; AVX512-NEXT: ret{{[l|q]}}521 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)522 %res1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %res0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>)523 ret <32 x i8> %res1524}525 526define <32 x i8> @combine_pshufb_as_unpacklo_undef(<32 x i8> %a0) {527; CHECK-LABEL: combine_pshufb_as_unpacklo_undef:528; CHECK: # %bb.0:529; CHECK-NEXT: ret{{[l|q]}}530 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 undef, i8 0, i8 undef, i8 1, i8 undef, i8 2, i8 undef, i8 3, i8 undef, i8 4, i8 undef, i8 5, i8 undef, i8 6, i8 undef, i8 7, i8 undef, i8 16, i8 undef, i8 17, i8 undef, i8 18, i8 undef, i8 19, i8 undef, i8 20, i8 undef, i8 21, i8 undef, i8 22, i8 undef, i8 23>)531 %2 = shufflevector <32 x i8> %1, <32 x i8> undef, <32 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14, i32 16, i32 16, i32 18, i32 18, i32 20, i32 20, i32 22, i32 22, i32 24, i32 24, i32 26, i32 26, i32 28, i32 28, i32 30, i32 30>532 ret <32 x i8> %2533}534 535define <32 x i8> @combine_pshufb_as_unpacklo_zero(<32 x i8> %a0) {536; CHECK-LABEL: combine_pshufb_as_unpacklo_zero:537; CHECK: # %bb.0:538; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1539; CHECK-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]540; CHECK-NEXT: ret{{[l|q]}}541 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 2, i8 3, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 16, i8 17, i8 -1, i8 -1, i8 18, i8 19, i8 -1, i8 -1, i8 20, i8 21, i8 -1, i8 -1, i8 22, i8 23, i8 -1, i8 -1>)542 ret <32 x i8> %1543}544 545define <32 x i8> @combine_pshufb_as_unpackhi_zero(<32 x i8> %a0) {546; CHECK-LABEL: combine_pshufb_as_unpackhi_zero:547; CHECK: # %bb.0:548; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1549; CHECK-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31]550; CHECK-NEXT: ret{{[l|q]}}551 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 8, i8 -1, i8 9, i8 -1, i8 10, i8 -1, i8 11, i8 -1, i8 12, i8 -1, i8 13, i8 -1, i8 14, i8 -1, i8 15, i8 -1, i8 24, i8 -1, i8 25, i8 -1, i8 26, i8 -1, i8 27, i8 -1, i8 28, i8 -1, i8 29, i8 -1, i8 30, i8 -1, i8 31>)552 ret <32 x i8> %1553}554 555define <32 x i8> @combine_psrlw_pshufb(<16 x i16> %a0) {556; X86-LABEL: combine_psrlw_pshufb:557; X86: # %bb.0:558; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0559; X86-NEXT: retl560;561; X64-LABEL: combine_psrlw_pshufb:562; X64: # %bb.0:563; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0564; X64-NEXT: retq565 %1 = lshr <16 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>566 %2 = bitcast <16 x i16> %1 to <32 x i8>567 %3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 1, i8 0, i8 3, i8 2, i8 5, i8 4, i8 7, i8 6, i8 9, i8 8, i8 11, i8 10, i8 13, i8 12, i8 15, i8 14, i8 17, i8 16, i8 19, i8 18, i8 21, i8 20, i8 23, i8 22, i8 25, i8 24, i8 27, i8 26, i8 29, i8 28, i8 31, i8 30>)568 ret <32 x i8> %3569}570 571define <32 x i8> @combine_pslld_pshufb(<8 x i32> %a0) {572; X86-LABEL: combine_pslld_pshufb:573; X86: # %bb.0:574; X86-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0575; X86-NEXT: retl576;577; X64-LABEL: combine_pslld_pshufb:578; X64: # %bb.0:579; X64-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0580; X64-NEXT: retq581 %1 = shl <8 x i32> %a0, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>582 %2 = bitcast <8 x i32> %1 to <32 x i8>583 %3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 11, i8 10, i8 9, i8 8, i8 15, i8 14, i8 13, i8 12, i8 19, i8 18, i8 17, i8 16, i8 23, i8 22, i8 21, i8 20, i8 27, i8 26, i8 25, i8 24, i8 31, i8 30, i8 29, i8 28>)584 ret <32 x i8> %3585}586 587define <32 x i8> @combine_psrlq_pshufb(<4 x i64> %a0) {588; CHECK-LABEL: combine_psrlq_pshufb:589; CHECK: # %bb.0:590; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = zero,zero,zero,zero,ymm0[7,6,5,4],zero,zero,zero,zero,ymm0[15,14,13,12],zero,zero,zero,zero,ymm0[23,22,21],zero,zero,zero,zero,ymm0[31,30,29,28],zero591; CHECK-NEXT: ret{{[l|q]}}592 %1 = lshr <4 x i64> %a0, <i64 32, i64 32, i64 32, i64 32>593 %2 = bitcast <4 x i64> %1 to <32 x i8>594 %3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23>)595 ret <32 x i8> %3596}597 598define <32 x i8> @combine_unpack_unpack_pshufb(<32 x i8> %a0) {599; CHECK-LABEL: combine_unpack_unpack_pshufb:600; CHECK: # %bb.0:601; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,0,4,8,1,1,5,9,2,2,6,10,3,3,7,11,16,16,20,24,17,17,21,25,18,18,22,26,19,19,23,27]602; CHECK-NEXT: ret{{[l|q]}}603 %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>604 %2 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>605 %3 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 25, i32 26, i32 27, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>606 %4 = shufflevector <32 x i8> %1, <32 x i8> %2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>607 %5 = shufflevector <32 x i8> %1, <32 x i8> %3, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>608 %6 = shufflevector <32 x i8> %4, <32 x i8> %5, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55>609 ret <32 x i8> %6610}611 612define <16 x i16> @shuffle_combine_packssdw_pshufb(<8 x i32> %a0) {613; CHECK-LABEL: shuffle_combine_packssdw_pshufb:614; CHECK: # %bb.0:615; CHECK-NEXT: vpsrad $31, %ymm0, %ymm0616; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[12,13,8,9,4,5,0,1,12,13,8,9,4,5,0,1,16,17,20,21,24,25,28,29,28,29,24,25,20,21,16,17]617; CHECK-NEXT: ret{{[l|q]}}618 %1 = ashr <8 x i32> %a0, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>619 %2 = tail call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %1, <8 x i32> %1)620 %3 = shufflevector <16 x i16> %2, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0, i32 8, i32 9, i32 10, i32 11, i32 11, i32 10, i32 9, i32 8>621 ret <16 x i16> %3622}623declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readnone624 625define <32 x i8> @shuffle_combine_packsswb_pshufb(<16 x i16> %a0, <16 x i16> %a1) {626; CHECK-LABEL: shuffle_combine_packsswb_pshufb:627; CHECK: # %bb.0:628; CHECK-NEXT: vpsraw $15, %ymm0, %ymm0629; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[14,12,10,8,6,4,2,0,14,12,10,8,6,4,2,0,30,28,26,24,22,20,18,16,30,28,26,24,22,20,18,16]630; CHECK-NEXT: ret{{[l|q]}}631 %1 = ashr <16 x i16> %a0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>632 %2 = ashr <16 x i16> %a1, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>633 %3 = tail call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %1, <16 x i16> %2)634 %4 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)635 ret <32 x i8> %4636}637declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone638 639define <16 x i16> @shuffle_combine_packusdw_pshufb(<8 x i32> %a0, <8 x i32> %a1) {640; CHECK-LABEL: shuffle_combine_packusdw_pshufb:641; CHECK: # %bb.0:642; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[14,15,10,11,6,7,2,3,14,15,10,11,6,7,2,3,18,19,22,23,26,27,30,31,30,31,26,27,22,23,18,19]643; CHECK-NEXT: ret{{[l|q]}}644 %1 = lshr <8 x i32> %a0, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>645 %2 = tail call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %1, <8 x i32> %1)646 %3 = shufflevector <16 x i16> %2, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0, i32 8, i32 9, i32 10, i32 11, i32 11, i32 10, i32 9, i32 8>647 ret <16 x i16> %3648}649declare <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32>, <8 x i32>) nounwind readnone650 651define <8 x i16> @shuffle_combine_packusdw_permq_extract(<8 x i32> %a0) {652; CHECK-LABEL: shuffle_combine_packusdw_permq_extract:653; CHECK: # %bb.0:654; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm1655; CHECK-NEXT: vpackusdw %xmm1, %xmm0, %xmm0656; CHECK-NEXT: vzeroupper657; CHECK-NEXT: ret{{[l|q]}}658 %1 = tail call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %a0, <8 x i32> poison)659 %2 = shufflevector <16 x i16> %1, <16 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>660 ret <8 x i16> %2661}662 663define <32 x i8> @shuffle_combine_packuswb_pshufb(<16 x i16> %a0, <16 x i16> %a1) {664; CHECK-LABEL: shuffle_combine_packuswb_pshufb:665; CHECK: # %bb.0:666; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,13,11,9,7,5,3,1,15,13,11,9,7,5,3,1,31,29,27,25,23,21,19,17,31,29,27,25,23,21,19,17]667; CHECK-NEXT: ret{{[l|q]}}668 %1 = lshr <16 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>669 %2 = lshr <16 x i16> %a1, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>670 %3 = tail call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %1, <16 x i16> %2)671 %4 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)672 ret <32 x i8> %4673}674declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readnone675 676define <32 x i8> @combine_pshufb_as_packsswb(<16 x i16> %a0, <16 x i16> %a1) nounwind {677; CHECK-LABEL: combine_pshufb_as_packsswb:678; CHECK: # %bb.0:679; CHECK-NEXT: vpsraw $11, %ymm0, %ymm0680; CHECK-NEXT: vpsraw $11, %ymm1, %ymm1681; CHECK-NEXT: vpacksswb %ymm1, %ymm0, %ymm0682; CHECK-NEXT: ret{{[l|q]}}683 %1 = ashr <16 x i16> %a0, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>684 %2 = ashr <16 x i16> %a1, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>685 %3 = bitcast <16 x i16> %1 to <32 x i8>686 %4 = bitcast <16 x i16> %2 to <32 x i8>687 %5 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)688 %6 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %4, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14>)689 %7 = or <32 x i8> %5, %6690 ret <32 x i8> %7691}692 693define <32 x i8> @combine_pshufb_as_packuswb(<16 x i16> %a0, <16 x i16> %a1) nounwind {694; CHECK-LABEL: combine_pshufb_as_packuswb:695; CHECK: # %bb.0:696; CHECK-NEXT: vpsrlw $11, %ymm0, %ymm0697; CHECK-NEXT: vpsrlw $11, %ymm1, %ymm1698; CHECK-NEXT: vpackuswb %ymm1, %ymm0, %ymm0699; CHECK-NEXT: ret{{[l|q]}}700 %1 = lshr <16 x i16> %a0, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>701 %2 = lshr <16 x i16> %a1, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>702 %3 = bitcast <16 x i16> %1 to <32 x i8>703 %4 = bitcast <16 x i16> %2 to <32 x i8>704 %5 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)705 %6 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %4, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14>)706 %7 = or <32 x i8> %5, %6707 ret <32 x i8> %7708}709 710define <16 x i8> @combine_pshufb_insertion_as_broadcast_v2i64(i64 %a0) {711; X86-LABEL: combine_pshufb_insertion_as_broadcast_v2i64:712; X86: # %bb.0:713; X86-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]714; X86-NEXT: retl715;716; X64-LABEL: combine_pshufb_insertion_as_broadcast_v2i64:717; X64: # %bb.0:718; X64-NEXT: vmovq %rdi, %xmm0719; X64-NEXT: vpbroadcastq %xmm0, %xmm0720; X64-NEXT: retq721 %1 = insertelement <2 x i64> undef, i64 %a0, i32 0722 %2 = bitcast <2 x i64> %1 to <16 x i8>723 %3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)724 ret <16 x i8> %3725}726 727define <8 x i32> @combine_permd_insertion_as_broadcast_v4i64(i64 %a0) {728; X86-LABEL: combine_permd_insertion_as_broadcast_v4i64:729; X86: # %bb.0:730; X86-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %ymm0731; X86-NEXT: retl732;733; X64-LABEL: combine_permd_insertion_as_broadcast_v4i64:734; X64: # %bb.0:735; X64-NEXT: vmovq %rdi, %xmm0736; X64-NEXT: vpbroadcastq %xmm0, %ymm0737; X64-NEXT: retq738 %1 = insertelement <4 x i64> undef, i64 %a0, i32 0739 %2 = bitcast <4 x i64> %1 to <8 x i32>740 %3 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)741 ret <8 x i32> %3742}743 744define <32 x i8> @combine_pshufb_pshufb_or_as_blend(<32 x i8> %a0, <32 x i8> %a1) {745; CHECK-LABEL: combine_pshufb_pshufb_or_as_blend:746; CHECK: # %bb.0:747; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]748; CHECK-NEXT: ret{{[l|q]}}749 %1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)750 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a1, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)751 %3 = or <32 x i8> %1, %2752 ret <32 x i8> %3753}754 755define <32 x i8> @combine_pshufb_pshufb_or_as_unpcklbw(<32 x i8> %a0, <32 x i8> %a1) {756; CHECK-LABEL: combine_pshufb_pshufb_or_as_unpcklbw:757; CHECK: # %bb.0:758; CHECK-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[16],ymm1[16],ymm0[17],ymm1[17],ymm0[18],ymm1[18],ymm0[19],ymm1[19],ymm0[20],ymm1[20],ymm0[21],ymm1[21],ymm0[22],ymm1[22],ymm0[23],ymm1[23]759; CHECK-NEXT: ret{{[l|q]}}760 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1>)761 %2 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a1, <32 x i8> <i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7>)762 %3 = or <32 x i8> %1, %2763 ret <32 x i8> %3764}765 766define <32 x i8> @combine_pshufb_pshufb_or_pshufb(<32 x i8> %a0) {767; CHECK-LABEL: combine_pshufb_pshufb_or_pshufb:768; CHECK: # %bb.0:769; CHECK-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4]770; CHECK-NEXT: ret{{[l|q]}}771 %1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1>)772 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3>)773 %3 = or <32 x i8> %1, %2774 %4 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)775 ret <32 x i8> %4776}777 778define <4 x i32> @extract_vpermd(<8 x i32> %a0) {779; CHECK-LABEL: extract_vpermd:780; CHECK: # %bb.0:781; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,1,3,0]782; CHECK-NEXT: vzeroupper783; CHECK-NEXT: ret{{[l|q]}}784 %1 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 1, i32 1, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6>)785 %2 = shufflevector <8 x i32> %1, <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>786 ret <4 x i32> %2787}788 789; Not beneficial to concatenate both inputs just to create a 256-bit vpaddb790define <32 x i8> @concat_add_unnecessary(<16 x i8> %a0, <16 x i8> noundef %a1, <16 x i8> %a2) nounwind {791; CHECK-LABEL: concat_add_unnecessary:792; CHECK: # %bb.0:793; CHECK-NEXT: vpaddb %xmm1, %xmm0, %xmm1794; CHECK-NEXT: vpaddb %xmm2, %xmm0, %xmm0795; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0796; CHECK-NEXT: ret{{[l|q]}}797 %lo = add <16 x i8> %a0, %a1798 %hi = add <16 x i8> %a0, %a2799 %res = shufflevector <16 x i8> %lo, <16 x i8> %hi, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>800 ret <32 x i8> %res801}802 803; Not beneficial to concatenate both inputs just to create a 256-bit vpmullw804define <16 x i16> @concat_mul_unnecessary(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) nounwind {805; CHECK-LABEL: concat_mul_unnecessary:806; CHECK: # %bb.0:807; CHECK-NEXT: vpmullw %xmm1, %xmm0, %xmm1808; CHECK-NEXT: vpmullw %xmm2, %xmm0, %xmm0809; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0810; CHECK-NEXT: ret{{[l|q]}}811 %lo = mul <8 x i16> %a0, %a1812 %hi = mul <8 x i16> %a0, %a2813 %res = shufflevector <8 x i16> %lo, <8 x i16> %hi, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>814 ret <16 x i16> %res815}816 817; Not beneficial to concatenate both inputs just to create a 256-bit palignr818define <32 x i8> @concat_alignr_unnecessary(<16 x i8> %a0, <16 x i8> noundef %a1, <16 x i8> %a2) nounwind {819; CHECK-LABEL: concat_alignr_unnecessary:820; CHECK: # %bb.0:821; CHECK-NEXT: vpalignr {{.*#+}} xmm1 = xmm1[3,4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2]822; CHECK-NEXT: vpalignr {{.*#+}} xmm0 = xmm2[3,4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2]823; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0824; CHECK-NEXT: ret{{[l|q]}}825 %lo = shufflevector <16 x i8> %a1, <16 x i8> %a0, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>826 %hi = shufflevector <16 x i8> %a2, <16 x i8> %a0, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>827 %res = shufflevector <16 x i8> %lo, <16 x i8> %hi, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>828 ret <32 x i8> %res829}830 831; Not beneficial to concatenate both inputs just to create a 256-bit packss832define <32 x i8> @concat_packss_unnecessary(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) nounwind {833; CHECK-LABEL: concat_packss_unnecessary:834; CHECK: # %bb.0:835; CHECK-NEXT: vpacksswb %xmm1, %xmm0, %xmm1836; CHECK-NEXT: vpacksswb %xmm2, %xmm0, %xmm0837; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0838; CHECK-NEXT: ret{{[l|q]}}839 %lo = tail call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a1)840 %hi = tail call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a2)841 %res = shufflevector <16 x i8> %lo, <16 x i8> %hi, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>842 ret <32 x i8> %res843}844declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>)845 846; Not beneficial to concatenate both inputs just to create a 256-bit pshufb847define <32 x i8> @concat_pshufb_unnecessary(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) nounwind {848; CHECK-LABEL: concat_pshufb_unnecessary:849; CHECK: # %bb.0:850; CHECK-NEXT: vpshufb %xmm1, %xmm0, %xmm1851; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0852; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0853; CHECK-NEXT: ret{{[l|q]}}854 %lo = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1)855 %hi = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a2)856 %res = shufflevector <16 x i8> %lo, <16 x i8> %hi, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>857 ret <32 x i8> %res858}859 860define <8 x float> @demandedelts_vpermps(<8 x float> %a0, <8 x float> %a1) {861; AVX2-LABEL: demandedelts_vpermps:862; AVX2: # %bb.0:863; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,1,1,0]864; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]865; AVX2-NEXT: ret{{[l|q]}}866;867; AVX512-LABEL: demandedelts_vpermps:868; AVX512: # %bb.0:869; AVX512-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1870; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0871; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm2 = [3,1,1,0,20,21,22,23]872; AVX512-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0873; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0874; AVX512-NEXT: ret{{[l|q]}}875 %lo = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 3, i32 1, i32 1, i32 0, i32 0, i32 0, i32 7, i32 7>)876 %hi = shufflevector <8 x float> %lo, <8 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>877 ret <8 x float> %hi878}879 880define <8 x i32> @constant_fold_permd() {881; AVX2-LABEL: constant_fold_permd:882; AVX2: # %bb.0:883; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1]884; AVX2-NEXT: ret{{[l|q]}}885;886; AVX512-LABEL: constant_fold_permd:887; AVX512: # %bb.0:888; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1]889; AVX512-NEXT: ret{{[l|q]}}890 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>)891 ret <8 x i32> %1892}893 894define <8 x float> @constant_fold_permps() {895; CHECK-LABEL: constant_fold_permps:896; CHECK: # %bb.0:897; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [5.0E+0,7.0E+0,3.0E+0,2.0E+0,8.0E+0,2.0E+0,6.0E+0,1.0E+0]898; CHECK-NEXT: ret{{[l|q]}}899 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>)900 ret <8 x float> %1901}902 903define <32 x i8> @constant_fold_pshufb_256() {904; CHECK-LABEL: constant_fold_pshufb_256:905; CHECK: # %bb.0:906; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9,255,0,0,0,u,u,0,0,241,0,0,0,0,0,249,250]907; CHECK-NEXT: ret{{[l|q]}}908 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <32 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6, i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6>)909 ret <32 x i8> %1910}911 912define i32 @broadcast_v2i64_multiuse(ptr %p0) {913; X86-LABEL: broadcast_v2i64_multiuse:914; X86: # %bb.0: # %entry915; X86-NEXT: movl {{[0-9]+}}(%esp), %eax916; X86-NEXT: movl (%eax), %eax917; X86-NEXT: addl %eax, %eax918; X86-NEXT: retl919;920; X64-LABEL: broadcast_v2i64_multiuse:921; X64: # %bb.0: # %entry922; X64-NEXT: movl (%rdi), %eax923; X64-NEXT: addl %eax, %eax924; X64-NEXT: retq925entry:926 %tmp = load i64, ptr %p0, align 8927 %tmp1 = trunc i64 %tmp to i32928 %tmp2 = insertelement <2 x i64> undef, i64 %tmp, i32 0929 %tmp3 = shufflevector <2 x i64> %tmp2, <2 x i64> undef, <2 x i32> zeroinitializer930 %tmp4 = trunc <2 x i64> %tmp3 to <2 x i32>931 %tmp5 = extractelement <2 x i32> %tmp4, i32 1932 %tmp6 = add i32 %tmp1, %tmp5933 ret i32 %tmp6934}935 936define <8 x float> @freeze_permps(<8 x float> %a0) {937; CHECK-LABEL: freeze_permps:938; CHECK: # %bb.0:939; CHECK-NEXT: ret{{[l|q]}}940 %s0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)941 %f0 = freeze <8 x float> %s0942 %s1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %f0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)943 ret <8 x float> %s1944}945 946define <32 x i8> @PR27320(<8 x i32> %a0) {947; CHECK-LABEL: PR27320:948; CHECK: # %bb.0:949; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,2]950; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,1,2,3,4,4,5,6,7,7,8,9,10,10,11,20,21,21,22,23,24,24,25,26,27,27,28,29,30,30,31]951; CHECK-NEXT: ret{{[l|q]}}952 %1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 3, i32 4, i32 5, i32 undef>953 %2 = bitcast <8 x i32> %1 to <32 x i8>954 %3 = shufflevector <32 x i8> %2, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 1, i32 2, i32 3, i32 4, i32 4, i32 5, i32 6, i32 7, i32 7, i32 8, i32 9, i32 10, i32 10, i32 11, i32 16, i32 17, i32 17, i32 18, i32 19, i32 20, i32 20, i32 21, i32 22, i32 23, i32 23, i32 24, i32 25, i32 26, i32 26, i32 27>955 ret <32 x i8> %3956}957 958define internal fastcc <8 x float> @PR34577(<8 x float> %inp0, <8 x float> %inp1, <8 x float> %inp2) {959; AVX2-LABEL: PR34577:960; AVX2: # %bb.0: # %entry961; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[1,1,1,1]962; AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2963; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]964; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = [u,u,7,2,u,u,3,2]965; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1966; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]967; AVX2-NEXT: ret{{[l|q]}}968;969; AVX512-LABEL: PR34577:970; AVX512: # %bb.0: # %entry971; AVX512-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1972; AVX512-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[1,1,1,1]973; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2974; AVX512-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5],ymm2[6,7]975; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm0 = [23,18,7,2,20,0,3,2]976; AVX512-NEXT: vpermi2ps %zmm2, %zmm1, %zmm0977; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0978; AVX512-NEXT: ret{{[l|q]}}979entry:980 %shuf0 = shufflevector <8 x float> %inp0, <8 x float> %inp2, <8 x i32> <i32 1, i32 10, i32 11, i32 13, i32 2, i32 13, i32 5, i32 0>981 %sel = select <8 x i1> <i1 false, i1 true, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>, <8 x float> %shuf0, <8 x float> zeroinitializer982 %shuf1 = shufflevector <8 x float> zeroinitializer, <8 x float> %sel, <8 x i32> <i32 6, i32 11, i32 6, i32 15, i32 12, i32 11, i32 1, i32 3>983 %shuf2 = shufflevector <8 x float> %inp1, <8 x float> %shuf1, <8 x i32> <i32 15, i32 10, i32 7, i32 2, i32 12, i32 undef, i32 3, i32 2>984 ret <8 x float> %shuf2985}986 987define <32 x i8> @PR52122(<32 x i8> %0, <32 x i8> %1) {988; CHECK-LABEL: PR52122:989; CHECK: # %bb.0:990; CHECK-NEXT: vpshufb {{.*#+}} ymm1 = zero,zero,ymm1[4],zero,zero,zero,ymm1[5],zero,zero,zero,ymm1[6],zero,zero,zero,ymm1[7],zero,zero,zero,ymm1[20],zero,zero,zero,ymm1[21],zero,zero,zero,ymm1[22],zero,zero,zero,ymm1[23],zero991; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,4],zero,zero,zero,ymm0[5],zero,zero,ymm0[3,6],zero,zero,zero,ymm0[7],zero,zero,ymm0[18,20],zero,zero,zero,ymm0[21],zero,zero,ymm0[19,22],zero,zero,zero,ymm0[23],zero,zero992; CHECK-NEXT: vpor %ymm1, %ymm0, %ymm0993; CHECK-NEXT: ret{{[l|q]}}994 %3 = shufflevector <32 x i8> %0, <32 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55>995 %4 = shufflevector <32 x i8> %3, <32 x i8> %1, <32 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55>996 %5 = shufflevector <32 x i8> %4, <32 x i8> %3, <32 x i32> <i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>997 ret <32 x i8> %5998}999 1000define void @PR63030(ptr %p0) {1001; X86-AVX2-LABEL: PR63030:1002; X86-AVX2: # %bb.0:1003; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax1004; X86-AVX2-NEXT: vmovaps (%eax), %xmm01005; X86-AVX2-NEXT: vmovddup {{.*#+}} xmm1 = [3,0,3,0]1006; X86-AVX2-NEXT: # xmm1 = mem[0,0]1007; X86-AVX2-NEXT: vpermpd {{.*#+}} ymm2 = ymm0[1,1,0,0]1008; X86-AVX2-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5,6,7]1009; X86-AVX2-NEXT: vmovaps {{.*#+}} xmm2 = [3,0,2,0]1010; X86-AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,1]1011; X86-AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5,6,7]1012; X86-AVX2-NEXT: vmovaps %ymm0, (%eax)1013; X86-AVX2-NEXT: vmovaps %ymm1, (%eax)1014; X86-AVX2-NEXT: vzeroupper1015; X86-AVX2-NEXT: retl1016;1017; X86-AVX512-LABEL: PR63030:1018; X86-AVX512: # %bb.0:1019; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax1020; X86-AVX512-NEXT: vmovdqa (%eax), %xmm01021; X86-AVX512-NEXT: vpmovsxbq {{.*#+}} zmm1 = [1,8,0,0,0,9,1,1]1022; X86-AVX512-NEXT: vpermi2q {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm11023; X86-AVX512-NEXT: vmovdqa64 %zmm1, (%eax)1024; X86-AVX512-NEXT: vzeroupper1025; X86-AVX512-NEXT: retl1026;1027; X64-AVX2-LABEL: PR63030:1028; X64-AVX2: # %bb.0:1029; X64-AVX2-NEXT: vmovaps (%rdi), %xmm01030; X64-AVX2-NEXT: vmovddup {{.*#+}} xmm1 = [3,3]1031; X64-AVX2-NEXT: # xmm1 = mem[0,0]1032; X64-AVX2-NEXT: vpermpd {{.*#+}} ymm2 = ymm0[1,1,0,0]1033; X64-AVX2-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5,6,7]1034; X64-AVX2-NEXT: vmovaps {{.*#+}} xmm2 = [3,2]1035; X64-AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,1]1036; X64-AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5,6,7]1037; X64-AVX2-NEXT: vmovaps %ymm0, (%rax)1038; X64-AVX2-NEXT: vmovaps %ymm1, (%rax)1039; X64-AVX2-NEXT: vzeroupper1040; X64-AVX2-NEXT: retq1041;1042; X64-AVX512-LABEL: PR63030:1043; X64-AVX512: # %bb.0:1044; X64-AVX512-NEXT: vmovdqa (%rdi), %xmm01045; X64-AVX512-NEXT: vpmovsxbq {{.*#+}} zmm1 = [1,8,0,0,0,9,1,1]1046; X64-AVX512-NEXT: vpermi2q {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm11047; X64-AVX512-NEXT: vmovdqa64 %zmm1, (%rax)1048; X64-AVX512-NEXT: vzeroupper1049; X64-AVX512-NEXT: retq1050 %load = load <2 x i64>, ptr %p0, align 161051 %shuffle = shufflevector <2 x i64> <i64 3, i64 2>, <2 x i64> %load, <8 x i32> <i32 3, i32 0, i32 2, i32 2, i32 2, i32 1, i32 3, i32 3>1052 store volatile <8 x i64> %shuffle, ptr poison, align 641053 ret void1054}1055 1056define <2 x i64> @PR116815(<4 x i64> %v0, <4 x i64> %v1) {1057; CHECK-LABEL: PR116815:1058; CHECK: # %bb.0:1059; CHECK-NEXT: vpslld $16, %ymm1, %ymm11060; CHECK-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]1061; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,4,8,12,2,6,10,14,u,u,u,u,u,u,u,u,16,20,24,28,18,22,26,30,u,u,u,u,u,u,u,u]1062; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm11063; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]1064; CHECK-NEXT: vzeroupper1065; CHECK-NEXT: ret{{[l|q]}}1066 %tmp0 = bitcast <4 x i64> %v1 to <8 x i32>1067 %tmp1 = shl <8 x i32> %tmp0, splat (i32 16)1068 %tmp2 = bitcast <8 x i32> %tmp1 to <16 x i16>1069 %tmp3 = bitcast <4 x i64> %v0 to <16 x i16>1070 %blend = shufflevector <16 x i16> %tmp3, <16 x i16> %tmp2, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>1071 %tmp4 = bitcast <16 x i16> %blend to <32 x i8>1072 %tmp5 = shufflevector <32 x i8> %tmp4, <32 x i8> poison, <32 x i32> <i32 0, i32 4, i32 8, i32 12, i32 2, i32 6, i32 10, i32 14, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 16, i32 20, i32 24, i32 28, i32 18, i32 22, i32 26, i32 30, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>1073 %tmp6 = bitcast <32 x i8> %tmp5 to <8 x i32>1074 %tmp7 = shufflevector <8 x i32> %tmp6, <8 x i32> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 poison, i32 poison, i32 poison, i32 poison>1075 %tmp8 = bitcast <8 x i32> %tmp7 to <4 x i64>1076 %shuffle.i = shufflevector <4 x i64> %tmp8, <4 x i64> poison, <2 x i32> <i32 0, i32 1>1077 ret <2 x i64> %shuffle.i1078}1079 1080define void @packss_zext_v8i1() {1081; X86-LABEL: packss_zext_v8i1:1082; X86: # %bb.0:1083; X86-NEXT: vxorps %xmm0, %xmm0, %xmm01084; X86-NEXT: vmovups %ymm0, (%eax)1085; X86-NEXT: vzeroupper1086; X86-NEXT: retl1087;1088; X64-LABEL: packss_zext_v8i1:1089; X64: # %bb.0:1090; X64-NEXT: vxorps %xmm0, %xmm0, %xmm01091; X64-NEXT: vmovups %ymm0, (%rax)1092; X64-NEXT: vzeroupper1093; X64-NEXT: retq1094 %tmp0 = icmp sgt <8 x i32> undef, undef1095 %tmp1 = zext <8 x i1> %tmp0 to <8 x i32>1096 %tmp2 = shufflevector <8 x i32> %tmp1, <8 x i32> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>1097 %tmp3 = trunc <16 x i32> %tmp2 to <16 x i16>1098 %tmp4 = add <16 x i16> zeroinitializer, %tmp31099 %tmp6 = sext <16 x i16> %tmp4 to <16 x i32>1100 %tmp10 = shufflevector <16 x i32> %tmp6, <16 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>1101 %tmp11 = tail call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> undef, <8 x i32> %tmp10)1102 store <16 x i16> %tmp11, ptr undef, align 21103 ret void1104}1105 1106define <32 x i16> @PR158415(<8 x i8> %arg) {1107; X86-AVX2-LABEL: PR158415:1108; X86-AVX2: # %bb.0: # %entry1109; X86-AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u],zero,xmm0[u,u,u,0,2,u,u,u,u,u,u,u,4]1110; X86-AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]1111; X86-AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1112; X86-AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,24],zero,ymm0[25],zero,ymm0[30],zero,ymm0[31],zero,ymm0[u,u,u,u,u,u,u,u]1113; X86-AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]1114; X86-AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,2,2,3]1115; X86-AVX2-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[12,13,14,15],zero,zero,ymm1[4,5,u,u,u,u,u,u,u,u,28,29,30,31],zero,zero,ymm1[20,21],zero,zero,ymm1[26,27,28,29,30,31]1116; X86-AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,0,2]1117; X86-AVX2-NEXT: vpbroadcastw {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]1118; X86-AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm11119; X86-AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm21120; X86-AVX2-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,xmm2[0,1,2,3,4,5,6,7,8,9,10,11,12,13]1121; X86-AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm01122; X86-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm01123; X86-AVX2-NEXT: vpbroadcastw %xmm1, %ymm31124; X86-AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0,1],ymm3[2],ymm0[3,4,5,6,7,8,9],ymm3[10],ymm0[11,12,13,14,15]1125; X86-AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm31126; X86-AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]1127; X86-AVX2-NEXT: vpshufb {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,xmm2[14,15],zero,zero,zero,zero,xmm2[u,u],zero,zero1128; X86-AVX2-NEXT: vextracti128 $1, %ymm1, %xmm11129; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero1130; X86-AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3,4,5],xmm1[6],xmm2[7]1131; X86-AVX2-NEXT: retl1132;1133; X86-AVX512-LABEL: PR158415:1134; X86-AVX512: # %bb.0: # %entry1135; X86-AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u],zero,xmm0[u,u,u,0,2,u,u,u,u,u,u,u,4]1136; X86-AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]1137; X86-AVX512-NEXT: vextracti128 $1, %ymm0, %xmm11138; X86-AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero1139; X86-AVX512-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1140; X86-AVX512-NEXT: vpunpckhqdq {{.*#+}} ymm1 = ymm0[1],ymm1[1],ymm0[3],ymm1[3]1141; X86-AVX512-NEXT: vextracti128 $1, %ymm1, %xmm11142; X86-AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]1143; X86-AVX512-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]1144; X86-AVX512-NEXT: vpbroadcastd %xmm0, %ymm01145; X86-AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm01146; X86-AVX512-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %zmm01147; X86-AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm11148; X86-AVX512-NEXT: vextracti128 $1, %ymm1, %xmm21149; X86-AVX512-NEXT: vpsrld $16, %xmm2, %xmm21150; X86-AVX512-NEXT: vpalignr {{.*#+}} xmm2 = xmm0[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]1151; X86-AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]1152; X86-AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,3]1153; X86-AVX512-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,7,7,7]1154; X86-AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm01155; X86-AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm01156; X86-AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm01157; X86-AVX512-NEXT: retl1158;1159; X64-AVX2-LABEL: PR158415:1160; X64-AVX2: # %bb.0: # %entry1161; X64-AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u],zero,xmm0[u,u,u,0,2,u,u,u,u,u,u,u,4]1162; X64-AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]1163; X64-AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1164; X64-AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,24],zero,ymm0[25],zero,ymm0[30],zero,ymm0[31],zero,ymm0[u,u,u,u,u,u,u,u]1165; X64-AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]1166; X64-AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,2,2,3]1167; X64-AVX2-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[12,13,14,15],zero,zero,ymm1[4,5,u,u,u,u,u,u,u,u,28,29,30,31],zero,zero,ymm1[20,21],zero,zero,ymm1[26,27,28,29,30,31]1168; X64-AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,0,2]1169; X64-AVX2-NEXT: vpbroadcastw {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]1170; X64-AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm11171; X64-AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm21172; X64-AVX2-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,xmm2[0,1,2,3,4,5,6,7,8,9,10,11,12,13]1173; X64-AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm01174; X64-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01175; X64-AVX2-NEXT: vpbroadcastw %xmm1, %ymm31176; X64-AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0,1],ymm3[2],ymm0[3,4,5,6,7,8,9],ymm3[10],ymm0[11,12,13,14,15]1177; X64-AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm31178; X64-AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]1179; X64-AVX2-NEXT: vpshufb {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,xmm2[14,15],zero,zero,zero,zero,xmm2[u,u],zero,zero1180; X64-AVX2-NEXT: vextracti128 $1, %ymm1, %xmm11181; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero1182; X64-AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3,4,5],xmm1[6],xmm2[7]1183; X64-AVX2-NEXT: retq1184;1185; X64-AVX512-LABEL: PR158415:1186; X64-AVX512: # %bb.0: # %entry1187; X64-AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u],zero,xmm0[u,u,u,0,2,u,u,u,u,u,u,u,4]1188; X64-AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]1189; X64-AVX512-NEXT: vextracti128 $1, %ymm0, %xmm11190; X64-AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero1191; X64-AVX512-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero1192; X64-AVX512-NEXT: vpunpckhqdq {{.*#+}} ymm1 = ymm0[1],ymm1[1],ymm0[3],ymm1[3]1193; X64-AVX512-NEXT: vextracti128 $1, %ymm1, %xmm11194; X64-AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]1195; X64-AVX512-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]1196; X64-AVX512-NEXT: vpbroadcastd %xmm0, %ymm01197; X64-AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm01198; X64-AVX512-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm01199; X64-AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm11200; X64-AVX512-NEXT: vextracti128 $1, %ymm1, %xmm21201; X64-AVX512-NEXT: vpsrld $16, %xmm2, %xmm21202; X64-AVX512-NEXT: vpalignr {{.*#+}} xmm2 = xmm0[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]1203; X64-AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]1204; X64-AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,3]1205; X64-AVX512-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,7,7,7]1206; X64-AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm01207; X64-AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm01208; X64-AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm01209; X64-AVX512-NEXT: retq1210entry:1211 %shuffle2 = shufflevector <8 x i8> %arg, <8 x i8> zeroinitializer, <32 x i32> <i32 2, i32 2, i32 9, i32 3, i32 1, i32 0, i32 0, i32 2, i32 0, i32 5, i32 9, i32 6, i32 5, i32 4, i32 7, i32 2, i32 7, i32 9, i32 4, i32 0, i32 9, i32 2, i32 4, i32 3, i32 3, i32 2, i32 2, i32 3, i32 9, i32 0, i32 6, i32 4>1212 %conv3 = zext <32 x i8> %shuffle2 to <32 x i16>1213 %shuffle4 = shufflevector <32 x i16> zeroinitializer, <32 x i16> %conv3, <32 x i32> <i32 5, i32 3, i32 4, i32 47, i32 5, i32 5, i32 3, i32 63, i32 4, i32 4, i32 60, i32 2, i32 2, i32 5, i32 4, i32 0, i32 38, i32 1, i32 0, i32 3, i32 59, i32 2, i32 3, i32 1, i32 1, i32 0, i32 3, i32 34, i32 0, i32 0, i32 62, i32 5>1214 %not = xor <32 x i16> %shuffle4, splat (i16 1)1215 %shuffle5 = shufflevector <32 x i16> zeroinitializer, <32 x i16> %not, <32 x i32> <i32 3, i32 9, i32 3, i32 1, i32 9, i32 8, i32 9, i32 2, i32 0, i32 8, i32 48, i32 8, i32 35, i32 3, i32 0, i32 4, i32 4, i32 7, i32 4, i32 39, i32 9, i32 0, i32 59, i32 6, i32 0, i32 4, i32 9, i32 1, i32 1, i32 2, i32 8, i32 9>1216 ret <32 x i16> %shuffle51217}1218