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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSSE33; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX15; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX26; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512F7;8; Combine tests involving SSE3/SSSE3 target shuffles (MOVDDUP, MOVSHDUP, MOVSLDUP, PSHUFB)9 10declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>)11 12define <16 x i8> @combine_vpshufb_as_zero(<16 x i8> %a0) {13; SSE-LABEL: combine_vpshufb_as_zero:14; SSE: # %bb.0:15; SSE-NEXT: xorps %xmm0, %xmm016; SSE-NEXT: retq17;18; AVX-LABEL: combine_vpshufb_as_zero:19; AVX: # %bb.0:20; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm021; AVX-NEXT: retq22 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)23 %res1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res0, <16 x i8> <i8 0, i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)24 %res2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res1, <16 x i8> <i8 0, i8 1, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)25 ret <16 x i8> %res226}27 28define <16 x i8> @combine_vpshufb_as_movq(<16 x i8> %a0) {29; SSE-LABEL: combine_vpshufb_as_movq:30; SSE: # %bb.0:31; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero32; SSE-NEXT: retq33;34; AVX-LABEL: combine_vpshufb_as_movq:35; AVX: # %bb.0:36; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero37; AVX-NEXT: retq38 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 128, i8 1, i8 128, i8 2, i8 128, i8 3, i8 128, i8 4, i8 128, i8 5, i8 128, i8 6, i8 128, i8 7, i8 128>)39 %res1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res0, <16 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 1, i8 3, i8 5, i8 7, i8 9, i8 11, i8 13, i8 15>)40 ret <16 x i8> %res141}42 43define <2 x double> @combine_pshufb_as_movsd(<2 x double> %a0, <2 x double> %a1) {44; SSSE3-LABEL: combine_pshufb_as_movsd:45; SSSE3: # %bb.0:46; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]47; SSSE3-NEXT: retq48;49; SSE41-LABEL: combine_pshufb_as_movsd:50; SSE41: # %bb.0:51; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]52; SSE41-NEXT: retq53;54; AVX-LABEL: combine_pshufb_as_movsd:55; AVX: # %bb.0:56; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]57; AVX-NEXT: retq58 %1 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 3, i32 0>59 %2 = bitcast <2 x double> %1 to <16 x i8>60 %3 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)61 %4 = bitcast <16 x i8> %3 to <2 x double>62 ret <2 x double> %463}64 65define <4 x float> @combine_pshufb_as_movss(<4 x float> %a0, <4 x float> %a1) {66; SSE-LABEL: combine_pshufb_as_movss:67; SSE: # %bb.0:68; SSE-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]69; SSE-NEXT: retq70;71; AVX-LABEL: combine_pshufb_as_movss:72; AVX: # %bb.0:73; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]74; AVX-NEXT: retq75 %1 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 4, i32 3, i32 2, i32 1>76 %2 = bitcast <4 x float> %1 to <16 x i8>77 %3 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 12, i8 13, i8 14, i8 15, i8 8, i8 9, i8 10, i8 11, i8 4, i8 5, i8 6, i8 7>)78 %4 = bitcast <16 x i8> %3 to <4 x float>79 ret <4 x float> %480}81 82define <4 x i32> @combine_pshufb_as_zext(<16 x i8> %a0) {83; SSSE3-LABEL: combine_pshufb_as_zext:84; SSSE3: # %bb.0:85; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero86; SSSE3-NEXT: retq87;88; SSE41-LABEL: combine_pshufb_as_zext:89; SSE41: # %bb.0:90; SSE41-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero91; SSE41-NEXT: retq92;93; AVX-LABEL: combine_pshufb_as_zext:94; AVX: # %bb.0:95; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero96; AVX-NEXT: retq97 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 -1, i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 -1, i8 2, i8 -1, i8 -1, i8 -1, i8 3, i8 -1, i8 -1, i8 -1>)98 %2 = bitcast <16 x i8> %1 to <4 x i32>99 ret <4 x i32> %2100}101 102define <2 x double> @combine_pshufb_as_vzmovl_64(<2 x double> %a0) {103; SSE-LABEL: combine_pshufb_as_vzmovl_64:104; SSE: # %bb.0:105; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero106; SSE-NEXT: retq107;108; AVX-LABEL: combine_pshufb_as_vzmovl_64:109; AVX: # %bb.0:110; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero111; AVX-NEXT: retq112 %1 = bitcast <2 x double> %a0 to <16 x i8>113 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)114 %3 = bitcast <16 x i8> %2 to <2 x double>115 ret <2 x double> %3116}117 118define <4 x float> @combine_pshufb_as_vzmovl_32(<4 x float> %a0) {119; SSSE3-LABEL: combine_pshufb_as_vzmovl_32:120; SSSE3: # %bb.0:121; SSSE3-NEXT: xorps %xmm1, %xmm1122; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]123; SSSE3-NEXT: movaps %xmm1, %xmm0124; SSSE3-NEXT: retq125;126; SSE41-LABEL: combine_pshufb_as_vzmovl_32:127; SSE41: # %bb.0:128; SSE41-NEXT: xorps %xmm1, %xmm1129; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]130; SSE41-NEXT: retq131;132; AVX-LABEL: combine_pshufb_as_vzmovl_32:133; AVX: # %bb.0:134; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1135; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]136; AVX-NEXT: retq137 %1 = bitcast <4 x float> %a0 to <16 x i8>138 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)139 %3 = bitcast <16 x i8> %2 to <4 x float>140 ret <4 x float> %3141}142 143define <4 x float> @combine_pshufb_movddup(<4 x float> %a0) {144; SSE-LABEL: combine_pshufb_movddup:145; SSE: # %bb.0:146; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,7,7,7,7,5,5,5,5,7,7,7,7]147; SSE-NEXT: retq148;149; AVX-LABEL: combine_pshufb_movddup:150; AVX: # %bb.0:151; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,7,7,7,7,5,5,5,5,7,7,7,7]152; AVX-NEXT: retq153 %1 = bitcast <4 x float> %a0 to <16 x i8>154 %2 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 5, i8 5, i8 5, i8 5, i8 7, i8 7, i8 7, i8 7, i8 1, i8 1, i8 1, i8 1, i8 3, i8 3, i8 3, i8 3>)155 %3 = bitcast <16 x i8> %2 to <4 x float>156 %4 = shufflevector <4 x float> %3, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>157 ret <4 x float> %4158}159 160define <4 x float> @combine_pshufb_movshdup(<4 x float> %a0) {161; SSE-LABEL: combine_pshufb_movshdup:162; SSE: # %bb.0:163; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[7,7,7,7,7,7,7,7,3,3,3,3,3,3,3,3]164; SSE-NEXT: retq165;166; AVX-LABEL: combine_pshufb_movshdup:167; AVX: # %bb.0:168; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[7,7,7,7,7,7,7,7,3,3,3,3,3,3,3,3]169; AVX-NEXT: retq170 %1 = bitcast <4 x float> %a0 to <16 x i8>171 %2 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 5, i8 5, i8 5, i8 5, i8 7, i8 7, i8 7, i8 7, i8 1, i8 1, i8 1, i8 1, i8 3, i8 3, i8 3, i8 3>)172 %3 = bitcast <16 x i8> %2 to <4 x float>173 %4 = shufflevector <4 x float> %3, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3>174 ret <4 x float> %4175}176 177define <4 x float> @combine_pshufb_movsldup(<4 x float> %a0) {178; SSE-LABEL: combine_pshufb_movsldup:179; SSE: # %bb.0:180; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,5,5,5,5,1,1,1,1,1,1,1,1]181; SSE-NEXT: retq182;183; AVX-LABEL: combine_pshufb_movsldup:184; AVX: # %bb.0:185; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,5,5,5,5,1,1,1,1,1,1,1,1]186; AVX-NEXT: retq187 %1 = bitcast <4 x float> %a0 to <16 x i8>188 %2 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 5, i8 5, i8 5, i8 5, i8 7, i8 7, i8 7, i8 7, i8 1, i8 1, i8 1, i8 1, i8 3, i8 3, i8 3, i8 3>)189 %3 = bitcast <16 x i8> %2 to <4 x float>190 %4 = shufflevector <4 x float> %3, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>191 ret <4 x float> %4192}193 194define <16 x i8> @combine_pshufb_palignr(<16 x i8> %a0, <16 x i8> %a1) {195; SSE-LABEL: combine_pshufb_palignr:196; SSE: # %bb.0:197; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]198; SSE-NEXT: retq199;200; AVX-LABEL: combine_pshufb_palignr:201; AVX: # %bb.0:202; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,3,2,3]203; AVX-NEXT: retq204 %1 = shufflevector <16 x i8> %a0, <16 x i8> %a1, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>205 %2 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)206 ret <16 x i8> %2207}208 209define <16 x i8> @combine_pshufb_pslldq(<16 x i8> %a0) {210; SSE-LABEL: combine_pshufb_pslldq:211; SSE: # %bb.0:212; SSE-NEXT: xorps %xmm0, %xmm0213; SSE-NEXT: retq214;215; AVX-LABEL: combine_pshufb_pslldq:216; AVX: # %bb.0:217; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0218; AVX-NEXT: retq219 %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)220 %2 = shufflevector <16 x i8> %1, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>221 ret <16 x i8> %2222}223 224define <16 x i8> @combine_pshufb_psrldq(<16 x i8> %a0) {225; SSE-LABEL: combine_pshufb_psrldq:226; SSE: # %bb.0:227; SSE-NEXT: xorps %xmm0, %xmm0228; SSE-NEXT: retq229;230; AVX-LABEL: combine_pshufb_psrldq:231; AVX: # %bb.0:232; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0233; AVX-NEXT: retq234 %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)235 %2 = shufflevector <16 x i8> %1, <16 x i8> zeroinitializer, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>236 ret <16 x i8> %2237}238 239define <16 x i8> @combine_and_pshufb(<16 x i8> %a0) {240; SSSE3-LABEL: combine_and_pshufb:241; SSSE3: # %bb.0:242; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0243; SSSE3-NEXT: retq244;245; SSE41-LABEL: combine_and_pshufb:246; SSE41: # %bb.0:247; SSE41-NEXT: pxor %xmm1, %xmm1248; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]249; SSE41-NEXT: retq250;251; AVX-LABEL: combine_and_pshufb:252; AVX: # %bb.0:253; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1254; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]255; AVX-NEXT: retq256 %1 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>257 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)258 ret <16 x i8> %2259}260 261define <16 x i8> @combine_pshufb_and(<16 x i8> %a0) {262; SSSE3-LABEL: combine_pshufb_and:263; SSSE3: # %bb.0:264; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0265; SSSE3-NEXT: retq266;267; SSE41-LABEL: combine_pshufb_and:268; SSE41: # %bb.0:269; SSE41-NEXT: pxor %xmm1, %xmm1270; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]271; SSE41-NEXT: retq272;273; AVX-LABEL: combine_pshufb_and:274; AVX: # %bb.0:275; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1276; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]277; AVX-NEXT: retq278 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)279 %2 = shufflevector <16 x i8> %1, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>280 ret <16 x i8> %2281}282 283define <16 x i8> @combine_pshufb_as_palignr(<16 x i8> %a0) {284; SSE-LABEL: combine_pshufb_as_palignr:285; SSE: # %bb.0:286; SSE-NEXT: palignr {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0]287; SSE-NEXT: retq288;289; AVX-LABEL: combine_pshufb_as_palignr:290; AVX: # %bb.0:291; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0]292; AVX-NEXT: retq293 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 undef, i8 undef, i8 0>)294 ret <16 x i8> %res0295}296 297define <16 x i8> @combine_pshufb_as_pslldq(<16 x i8> %a0) {298; SSE-LABEL: combine_pshufb_as_pslldq:299; SSE: # %bb.0:300; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]301; SSE-NEXT: retq302;303; AVX-LABEL: combine_pshufb_as_pslldq:304; AVX: # %bb.0:305; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]306; AVX-NEXT: retq307 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>)308 ret <16 x i8> %res0309}310 311define <16 x i8> @combine_pshufb_as_psrldq(<16 x i8> %a0) {312; SSE-LABEL: combine_pshufb_as_psrldq:313; SSE: # %bb.0:314; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero315; SSE-NEXT: retq316;317; AVX-LABEL: combine_pshufb_as_psrldq:318; AVX: # %bb.0:319; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero320; AVX-NEXT: retq321 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)322 ret <16 x i8> %res0323}324 325define <16 x i8> @combine_pshufb_as_psrlw(<16 x i8> %a0) {326; SSE-LABEL: combine_pshufb_as_psrlw:327; SSE: # %bb.0:328; SSE-NEXT: psrlw $8, %xmm0329; SSE-NEXT: retq330;331; AVX-LABEL: combine_pshufb_as_psrlw:332; AVX: # %bb.0:333; AVX-NEXT: vpsrlw $8, %xmm0, %xmm0334; AVX-NEXT: retq335 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 1, i8 128, i8 3, i8 128, i8 5, i8 128, i8 7, i8 128, i8 9, i8 128, i8 11, i8 128, i8 13, i8 128, i8 15, i8 128>)336 ret <16 x i8> %res0337}338 339define <16 x i8> @combine_pshufb_as_pslld(<16 x i8> %a0) {340; SSE-LABEL: combine_pshufb_as_pslld:341; SSE: # %bb.0:342; SSE-NEXT: pslld $24, %xmm0343; SSE-NEXT: retq344;345; AVX-LABEL: combine_pshufb_as_pslld:346; AVX: # %bb.0:347; AVX-NEXT: vpslld $24, %xmm0, %xmm0348; AVX-NEXT: retq349 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 128, i8 128, i8 128, i8 0, i8 128, i8 128, i8 128, i8 4, i8 128, i8 128, i8 128, i8 8, i8 128, i8 128, i8 128, i8 12>)350 ret <16 x i8> %res0351}352 353define <16 x i8> @combine_pshufb_as_psrlq(<16 x i8> %a0) {354; SSE-LABEL: combine_pshufb_as_psrlq:355; SSE: # %bb.0:356; SSE-NEXT: psrlq $40, %xmm0357; SSE-NEXT: retq358;359; AVX-LABEL: combine_pshufb_as_psrlq:360; AVX: # %bb.0:361; AVX-NEXT: vpsrlq $40, %xmm0, %xmm0362; AVX-NEXT: retq363 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128>)364 ret <16 x i8> %res0365}366 367define <16 x i8> @combine_pshufb_as_pshuflw(<16 x i8> %a0) {368; SSE-LABEL: combine_pshufb_as_pshuflw:369; SSE: # %bb.0:370; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]371; SSE-NEXT: retq372;373; AVX-LABEL: combine_pshufb_as_pshuflw:374; AVX: # %bb.0:375; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]376; AVX-NEXT: retq377 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)378 ret <16 x i8> %res0379}380 381define <16 x i8> @combine_pshufb_as_pshufhw(<16 x i8> %a0) {382; SSE-LABEL: combine_pshufb_as_pshufhw:383; SSE: # %bb.0:384; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]385; SSE-NEXT: retq386;387; AVX-LABEL: combine_pshufb_as_pshufhw:388; AVX: # %bb.0:389; AVX-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]390; AVX-NEXT: retq391 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>)392 ret <16 x i8> %res0393}394 395define <16 x i8> @combine_pshufb_not_as_pshufw(<16 x i8> %a0) {396; SSE-LABEL: combine_pshufb_not_as_pshufw:397; SSE: # %bb.0:398; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13]399; SSE-NEXT: retq400;401; AVX1-LABEL: combine_pshufb_not_as_pshufw:402; AVX1: # %bb.0:403; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13]404; AVX1-NEXT: retq405;406; AVX2-LABEL: combine_pshufb_not_as_pshufw:407; AVX2: # %bb.0:408; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13]409; AVX2-NEXT: retq410;411; AVX512F-LABEL: combine_pshufb_not_as_pshufw:412; AVX512F: # %bb.0:413; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0414; AVX512F-NEXT: vprold $16, %zmm0, %zmm0415; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0416; AVX512F-NEXT: vzeroupper417; AVX512F-NEXT: retq418 %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)419 %res1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res0, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>)420 ret <16 x i8> %res1421}422 423define <16 x i8> @combine_vpshufb_as_pshuflw_not_pslld(ptr%a0) {424; SSE-LABEL: combine_vpshufb_as_pshuflw_not_pslld:425; SSE: # %bb.0:426; SSE-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,0,2,2,4,5,6,7]427; SSE-NEXT: retq428;429; AVX-LABEL: combine_vpshufb_as_pshuflw_not_pslld:430; AVX: # %bb.0:431; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = mem[0,0,2,2,4,5,6,7]432; AVX-NEXT: retq433 %res0 = load <16 x i8>, ptr%a0, align 16434 %res1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res0, <16 x i8> <i8 undef, i8 undef, i8 0, i8 1, i8 undef, i8 undef, i8 4, i8 5, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)435 ret <16 x i8> %res1436}437 438define <16 x i8> @combine_pshufb_as_unary_unpcklbw(<16 x i8> %a0) {439; SSE-LABEL: combine_pshufb_as_unary_unpcklbw:440; SSE: # %bb.0:441; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]442; SSE-NEXT: retq443;444; AVX-LABEL: combine_pshufb_as_unary_unpcklbw:445; AVX: # %bb.0:446; AVX-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]447; AVX-NEXT: retq448 %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 undef, i8 undef, i8 1, i8 2, i8 2, i8 3, i8 3, i8 4, i8 4, i8 5, i8 5, i8 6, i8 6, i8 7, i8 7>)449 ret <16 x i8> %1450}451 452define <16 x i8> @combine_pshufb_as_unary_unpckhwd(<16 x i8> %a0) {453; SSE-LABEL: combine_pshufb_as_unary_unpckhwd:454; SSE: # %bb.0:455; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]456; SSE-NEXT: retq457;458; AVX-LABEL: combine_pshufb_as_unary_unpckhwd:459; AVX: # %bb.0:460; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]461; AVX-NEXT: retq462 %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 8, i8 9, i8 8, i8 9, i8 10, i8 11, i8 10, i8 11, i8 12, i8 13, i8 12, i8 13, i8 14, i8 15, i8 undef, i8 undef>)463 ret <16 x i8> %1464}465 466define <8 x i16> @combine_pshufb_as_unpacklo_undef(<16 x i8> %a0) {467; CHECK-LABEL: combine_pshufb_as_unpacklo_undef:468; CHECK: # %bb.0:469; CHECK-NEXT: retq470 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 undef, i8 undef, i8 0, i8 1, i8 undef, i8 undef, i8 2, i8 3, i8 undef, i8 undef, i8 4, i8 5, i8 undef, i8 undef, i8 6, i8 7>)471 %2 = bitcast <16 x i8> %1 to <8 x i16>472 %3 = shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>473 ret <8 x i16> %3474}475 476define <16 x i8> @combine_pshufb_as_unpackhi_undef(<16 x i8> %a0) {477; CHECK-LABEL: combine_pshufb_as_unpackhi_undef:478; CHECK: # %bb.0:479; CHECK-NEXT: retq480 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 8, i8 undef, i8 9, i8 undef, i8 10, i8 undef, i8 11, i8 undef, i8 12, i8 undef, i8 13, i8 undef, i8 14, i8 undef, i8 15, i8 undef>)481 %2 = shufflevector <16 x i8> %1, <16 x i8> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>482 ret <16 x i8> %2483}484 485define <16 x i8> @combine_pshufb_as_unpacklo_zero(<16 x i8> %a0) {486; SSE-LABEL: combine_pshufb_as_unpacklo_zero:487; SSE: # %bb.0:488; SSE-NEXT: xorps %xmm1, %xmm1489; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]490; SSE-NEXT: movaps %xmm1, %xmm0491; SSE-NEXT: retq492;493; AVX-LABEL: combine_pshufb_as_unpacklo_zero:494; AVX: # %bb.0:495; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1496; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]497; AVX-NEXT: retq498 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 4, i8 5, i8 6, i8 7>)499 ret <16 x i8> %1500}501 502define <16 x i8> @combine_pshufb_as_unpackhi_zero(<16 x i8> %a0) {503; SSE-LABEL: combine_pshufb_as_unpackhi_zero:504; SSE: # %bb.0:505; SSE-NEXT: pxor %xmm1, %xmm1506; SSE-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]507; SSE-NEXT: retq508;509; AVX-LABEL: combine_pshufb_as_unpackhi_zero:510; AVX: # %bb.0:511; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1512; AVX-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]513; AVX-NEXT: retq514 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 8, i8 -1, i8 9, i8 -1, i8 10, i8 -1, i8 11, i8 -1, i8 12, i8 -1, i8 13, i8 -1, i8 14, i8 -1, i8 15, i8 -1>)515 ret <16 x i8> %1516}517 518define <16 x i8> @combine_psrlw_pshufb(<8 x i16> %a0) {519; SSE-LABEL: combine_psrlw_pshufb:520; SSE: # %bb.0:521; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[1],zero,zero,zero522; SSE-NEXT: retq523;524; AVX-LABEL: combine_psrlw_pshufb:525; AVX: # %bb.0:526; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[1],zero,zero,zero527; AVX-NEXT: retq528 %1 = lshr <8 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>529 %2 = bitcast <8 x i16> %1 to <16 x i8>530 %3 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1>)531 ret <16 x i8> %3532}533 534define <16 x i8> @combine_pslld_pshufb(<4 x i32> %a0) {535; SSE-LABEL: combine_pslld_pshufb:536; SSE: # %bb.0:537; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,1,0],zero,xmm0[6,5,4],zero,xmm0[10,9,8],zero,xmm0[14,13,12],zero538; SSE-NEXT: retq539;540; AVX-LABEL: combine_pslld_pshufb:541; AVX: # %bb.0:542; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,1,0],zero,xmm0[6,5,4],zero,xmm0[10,9,8],zero,xmm0[14,13,12],zero543; AVX-NEXT: retq544 %1 = shl <4 x i32> %a0, <i32 8, i32 8, i32 8, i32 8>545 %2 = bitcast <4 x i32> %1 to <16 x i8>546 %3 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 11, i8 10, i8 9, i8 8, i8 15, i8 14, i8 13, i8 12>)547 ret <16 x i8> %3548}549 550define <16 x i8> @combine_psrlq_pshufb(<2 x i64> %a0) {551; SSE-LABEL: combine_psrlq_pshufb:552; SSE: # %bb.0:553; SSE-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,xmm0[7,6],zero,zero,zero,zero,zero,zero,xmm0[15,14]554; SSE-NEXT: retq555;556; AVX-LABEL: combine_psrlq_pshufb:557; AVX: # %bb.0:558; AVX-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,xmm0[7,6],zero,zero,zero,zero,zero,zero,xmm0[15,14]559; AVX-NEXT: retq560 %1 = lshr <2 x i64> %a0, <i64 48, i64 48>561 %2 = bitcast <2 x i64> %1 to <16 x i8>562 %3 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8>)563 ret <16 x i8> %3564}565 566define <16 x i8> @combine_unpckl_arg0_pshufb(<16 x i8> %a0, <16 x i8> %a1) {567; SSE-LABEL: combine_unpckl_arg0_pshufb:568; SSE: # %bb.0:569; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero570; SSE-NEXT: retq571;572; AVX-LABEL: combine_unpckl_arg0_pshufb:573; AVX: # %bb.0:574; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero575; AVX-NEXT: retq576 %1 = shufflevector <16 x i8> %a0, <16 x i8> %a1, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>577 %2 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1>)578 ret <16 x i8> %2579}580 581define <16 x i8> @combine_unpckl_arg1_pshufb(<16 x i8> %a0, <16 x i8> %a1) {582; SSE-LABEL: combine_unpckl_arg1_pshufb:583; SSE: # %bb.0:584; SSE-NEXT: movdqa %xmm1, %xmm0585; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[0],zero,zero,zero586; SSE-NEXT: retq587;588; AVX-LABEL: combine_unpckl_arg1_pshufb:589; AVX: # %bb.0:590; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero591; AVX-NEXT: retq592 %1 = shufflevector <16 x i8> %a0, <16 x i8> %a1, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>593 %2 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 -1>)594 ret <16 x i8> %2595}596 597define <8 x i16> @shuffle_combine_unpack_insert(<8 x i16> %a0) {598; SSE-LABEL: shuffle_combine_unpack_insert:599; SSE: # %bb.0:600; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,8,9,8,9,8,9,10,11,10,11]601; SSE-NEXT: retq602;603; AVX-LABEL: shuffle_combine_unpack_insert:604; AVX: # %bb.0:605; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,8,9,8,9,8,9,10,11,10,11]606; AVX-NEXT: retq607 %1 = extractelement <8 x i16> %a0, i32 2608 %2 = extractelement <8 x i16> %a0, i32 4609 %3 = insertelement <8 x i16> %a0, i16 %1, i32 4610 %4 = insertelement <8 x i16> %a0, i16 %2, i32 2611 %5 = shufflevector <8 x i16> %3, <8 x i16> %4, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>612 %6 = shufflevector <8 x i16> %5, <8 x i16> %3, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 undef, i32 undef, i32 undef, i32 undef>613 %7 = shufflevector <8 x i16> %5, <8 x i16> %a0, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 undef, i32 undef, i32 undef, i32 undef>614 %8 = shufflevector <8 x i16> %6, <8 x i16> %7, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>615 ret <8 x i16> %8616}617 618define <16 x i8> @shuffle_combine_packssdw_pshufb(<4 x i32> %a0) {619; SSE-LABEL: shuffle_combine_packssdw_pshufb:620; SSE: # %bb.0:621; SSE-NEXT: psrad $31, %xmm0622; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[13,12,9,8,5,4,1,0,13,12,9,8,5,4,1,0]623; SSE-NEXT: retq624;625; AVX-LABEL: shuffle_combine_packssdw_pshufb:626; AVX: # %bb.0:627; AVX-NEXT: vpsrad $31, %xmm0, %xmm0628; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[13,12,9,8,5,4,1,0,13,12,9,8,5,4,1,0]629; AVX-NEXT: retq630 %1 = ashr <4 x i32> %a0, <i32 31, i32 31, i32 31, i32 31>631 %2 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %1, <4 x i32> %1)632 %3 = bitcast <8 x i16> %2 to <16 x i8>633 %4 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %3, <16 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8>)634 ret <16 x i8> %4635}636declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind readnone637 638define <16 x i8> @shuffle_combine_packsswb_pshufb(<8 x i16> %a0, <8 x i16> %a1) {639; SSE-LABEL: shuffle_combine_packsswb_pshufb:640; SSE: # %bb.0:641; SSE-NEXT: psraw $15, %xmm0642; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[14,12,10,8,6,4,2,0,14,12,10,8,6,4,2,0]643; SSE-NEXT: retq644;645; AVX-LABEL: shuffle_combine_packsswb_pshufb:646; AVX: # %bb.0:647; AVX-NEXT: vpsraw $15, %xmm0, %xmm0648; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[14,12,10,8,6,4,2,0,14,12,10,8,6,4,2,0]649; AVX-NEXT: retq650 %1 = ashr <8 x i16> %a0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>651 %2 = ashr <8 x i16> %a1, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>652 %3 = tail call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %1, <8 x i16> %2)653 %4 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %3, <16 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)654 ret <16 x i8> %4655}656declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>) nounwind readnone657 658define <16 x i8> @shuffle_combine_packuswb_pshufb(<8 x i16> %a0, <8 x i16> %a1) {659; SSE-LABEL: shuffle_combine_packuswb_pshufb:660; SSE: # %bb.0:661; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[15,13,11,9,7,5,3,1,15,13,11,9,7,5,3,1]662; SSE-NEXT: retq663;664; AVX-LABEL: shuffle_combine_packuswb_pshufb:665; AVX: # %bb.0:666; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,13,11,9,7,5,3,1,15,13,11,9,7,5,3,1]667; AVX-NEXT: retq668 %1 = lshr <8 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>669 %2 = lshr <8 x i16> %a1, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>670 %3 = tail call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %1, <8 x i16> %2)671 %4 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %3, <16 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)672 ret <16 x i8> %4673}674declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind readnone675 676define <16 x i8> @combine_pshufb_pshufb_or_as_blend(<16 x i8> %a0, <16 x i8> %a1) {677; SSSE3-LABEL: combine_pshufb_pshufb_or_as_blend:678; SSSE3: # %bb.0:679; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]680; SSSE3-NEXT: retq681;682; SSE41-LABEL: combine_pshufb_pshufb_or_as_blend:683; SSE41: # %bb.0:684; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]685; SSE41-NEXT: retq686;687; AVX-LABEL: combine_pshufb_pshufb_or_as_blend:688; AVX: # %bb.0:689; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]690; AVX-NEXT: retq691 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)692 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a1, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)693 %3 = or <16 x i8> %1, %2694 ret <16 x i8> %3695}696 697define <16 x i8> @combine_pshufb_pshufb_or_as_unpcklbw(<16 x i8> %a0, <16 x i8> %a1) {698; SSE-LABEL: combine_pshufb_pshufb_or_as_unpcklbw:699; SSE: # %bb.0:700; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]701; SSE-NEXT: retq702;703; AVX-LABEL: combine_pshufb_pshufb_or_as_unpcklbw:704; AVX: # %bb.0:705; AVX-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]706; AVX-NEXT: retq707 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1>)708 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a1, <16 x i8> <i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7>)709 %3 = or <16 x i8> %1, %2710 ret <16 x i8> %3711}712 713define <16 x i8> @combine_pshufb_pshufb_or_pshufb(<16 x i8> %a0) {714; SSE-LABEL: combine_pshufb_pshufb_or_pshufb:715; SSE: # %bb.0:716; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]717; SSE-NEXT: retq718;719; AVX1-LABEL: combine_pshufb_pshufb_or_pshufb:720; AVX1: # %bb.0:721; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0,0,0]722; AVX1-NEXT: retq723;724; AVX2-LABEL: combine_pshufb_pshufb_or_pshufb:725; AVX2: # %bb.0:726; AVX2-NEXT: vbroadcastss %xmm0, %xmm0727; AVX2-NEXT: retq728;729; AVX512F-LABEL: combine_pshufb_pshufb_or_pshufb:730; AVX512F: # %bb.0:731; AVX512F-NEXT: vbroadcastss %xmm0, %xmm0732; AVX512F-NEXT: retq733 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1>)734 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3>)735 %3 = or <16 x i8> %1, %2736 %4 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %3, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)737 ret <16 x i8> %4738}739 740define <16 x i8> @combine_and_pshufb_or_pshufb(<16 x i8> %a0, <16 x i8> %a1) {741; SSE-LABEL: combine_and_pshufb_or_pshufb:742; SSE: # %bb.0:743; SSE-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[15],zero,xmm0[1],zero,xmm0[14],zero,xmm0[2],zero,xmm0[13],zero,xmm0[3],zero,zero744; SSE-NEXT: pshufb {{.*#+}} xmm1 = xmm1[7],zero,xmm1[0],zero,xmm1[8],zero,xmm1[1],zero,xmm1[9],zero,xmm1[10],zero,xmm1[7],zero,xmm1[7],zero745; SSE-NEXT: por %xmm1, %xmm0746; SSE-NEXT: retq747;748; AVX-LABEL: combine_and_pshufb_or_pshufb:749; AVX: # %bb.0:750; AVX-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[15],zero,xmm0[1],zero,xmm0[14],zero,xmm0[2],zero,xmm0[13],zero,xmm0[3],zero,zero751; AVX-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[7],zero,xmm1[0],zero,xmm1[8],zero,xmm1[1],zero,xmm1[9],zero,xmm1[10],zero,xmm1[7],zero,xmm1[7],zero752; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0753; AVX-NEXT: retq754 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 15, i8 -1, i8 1, i8 -1, i8 14, i8 -1, i8 2, i8 -1, i8 13, i8 -1, i8 3, i8 -1, i8 -1>)755 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a1, <16 x i8> <i8 7, i8 -1, i8 0, i8 -1, i8 8, i8 -1, i8 1, i8 -1, i8 9, i8 -1, i8 10, i8 -1, i8 7, i8 -1, i8 7, i8 -1>)756 %3 = or <16 x i8> %1, %2757 %4 = and <16 x i8> %3, <i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>758 ret <16 x i8> %4759}760 761define <16 x i8> @combine_lshr_pshufb(<4 x i32> %a0) {762; SSE-LABEL: combine_lshr_pshufb:763; SSE: # %bb.0:764; SSE-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[3,5,6,7,4,10,11],zero,xmm0[9,14,15],zero,zero765; SSE-NEXT: retq766;767; AVX-LABEL: combine_lshr_pshufb:768; AVX: # %bb.0:769; AVX-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[3,5,6,7,4,10,11],zero,xmm0[9,14,15],zero,zero770; AVX-NEXT: retq771 %shr = lshr <4 x i32> %a0, <i32 24, i32 0, i32 8, i32 16>772 %bc = bitcast <4 x i32> %shr to <16 x i8>773 %shuffle = shufflevector <16 x i8> %bc, <16 x i8> poison, <16 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4, i32 9, i32 10, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>774 ret <16 x i8> %shuffle775}776 777define <16 x i8> @combine_shl_pshufb(<4 x i32> %a0) {778; SSSE3-LABEL: combine_shl_pshufb:779; SSSE3: # %bb.0:780; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]781; SSSE3-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,256,65536,65536]782; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]783; SSSE3-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [256,u,65536,u]784; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]785; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]786; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,2,3,0,5,6,7,4,9,10,11,8,12,13,14,15]787; SSSE3-NEXT: retq788;789; SSE41-LABEL: combine_shl_pshufb:790; SSE41: # %bb.0:791; SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,256,65536,65536]792; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,2,3,0,5,6,7,4,9,10,11,8,12,13,14,15]793; SSE41-NEXT: retq794;795; AVX1-LABEL: combine_shl_pshufb:796; AVX1: # %bb.0:797; AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,256,65536,65536]798; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,2,3,0,5,6,7,4,9,10,11,8,12,13,14,15]799; AVX1-NEXT: retq800;801; AVX2-LABEL: combine_shl_pshufb:802; AVX2: # %bb.0:803; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6],zero,zero,xmm0[8,9],zero,zero,zero,xmm0[12,13]804; AVX2-NEXT: retq805;806; AVX512F-LABEL: combine_shl_pshufb:807; AVX512F: # %bb.0:808; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6],zero,zero,xmm0[8,9],zero,zero,zero,xmm0[12,13]809; AVX512F-NEXT: retq810 %shr = shl <4 x i32> %a0, <i32 0, i32 8, i32 16, i32 16>811 %bc = bitcast <4 x i32> %shr to <16 x i8>812 %shuffle = shufflevector <16 x i8> %bc, <16 x i8> poison, <16 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4, i32 9, i32 10, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>813 ret <16 x i8> %shuffle814}815 816define <16 x i8> @constant_fold_pshufb() {817; SSE-LABEL: constant_fold_pshufb:818; SSE: # %bb.0:819; SSE-NEXT: movaps {{.*#+}} xmm0 = [14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9]820; SSE-NEXT: retq821;822; AVX-LABEL: constant_fold_pshufb:823; AVX: # %bb.0:824; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9]825; AVX-NEXT: retq826 %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <16 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6>)827 ret <16 x i8> %1828}829 830define <16 x i8> @constant_fold_pshufb_2() {831; SSE-LABEL: constant_fold_pshufb_2:832; SSE: # %bb.0:833; SSE-NEXT: movl $2, %eax834; SSE-NEXT: movd %eax, %xmm0835; SSE-NEXT: retq836;837; AVX-LABEL: constant_fold_pshufb_2:838; AVX: # %bb.0:839; AVX-NEXT: movl $2, %eax840; AVX-NEXT: vmovd %eax, %xmm0841; AVX-NEXT: retq842 %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> <i8 2, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)843 ret <16 x i8> %1844}845 846define i32 @mask_zzz3_v16i8(<16 x i8> %a0) {847; SSSE3-LABEL: mask_zzz3_v16i8:848; SSSE3: # %bb.0:849; SSSE3-NEXT: psrldq {{.*#+}} xmm0 = xmm0[11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero850; SSSE3-NEXT: movd %xmm0, %eax851; SSSE3-NEXT: andl $-16777216, %eax # imm = 0xFF000000852; SSSE3-NEXT: retq853;854; SSE41-LABEL: mask_zzz3_v16i8:855; SSE41: # %bb.0:856; SSE41-NEXT: psllw $8, %xmm0857; SSE41-NEXT: pextrd $3, %xmm0, %eax858; SSE41-NEXT: andl $-16777216, %eax # imm = 0xFF000000859; SSE41-NEXT: retq860;861; AVX-LABEL: mask_zzz3_v16i8:862; AVX: # %bb.0:863; AVX-NEXT: vpsllw $8, %xmm0, %xmm0864; AVX-NEXT: vpextrd $3, %xmm0, %eax865; AVX-NEXT: andl $-16777216, %eax # imm = 0xFF000000866; AVX-NEXT: retq867 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14>)868 %2 = bitcast <16 x i8> %1 to <4 x i32>869 %3 = extractelement <4 x i32> %2, i32 3870 %4 = and i32 %3, 4278190080871 ret i32 %4872}873 874define i32 @mask_z1z3_v16i8(<16 x i8> %a0) {875; SSSE3-LABEL: mask_z1z3_v16i8:876; SSSE3: # %bb.0:877; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = zero,xmm0[10],zero,xmm0[14,u,u,u,u,u,u,u,u,u,u,u,u]878; SSSE3-NEXT: movd %xmm0, %eax879; SSSE3-NEXT: retq880;881; SSE41-LABEL: mask_z1z3_v16i8:882; SSE41: # %bb.0:883; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u],zero,xmm0[10],zero,xmm0[14]884; SSE41-NEXT: pextrd $3, %xmm0, %eax885; SSE41-NEXT: retq886;887; AVX-LABEL: mask_z1z3_v16i8:888; AVX: # %bb.0:889; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u],zero,xmm0[10],zero,xmm0[14]890; AVX-NEXT: vpextrd $3, %xmm0, %eax891; AVX-NEXT: retq892 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14>)893 %2 = bitcast <16 x i8> %1 to <4 x i32>894 %3 = extractelement <4 x i32> %2, i32 3895 %4 = and i32 %3, 4278255360896 ret i32 %4897}898 899define <16 x i8> @freeze_pshufb_v16i8(<16 x i8> %a0) {900; CHECK-LABEL: freeze_pshufb_v16i8:901; CHECK: # %bb.0:902; CHECK-NEXT: retq903 %s0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)904 %f0 = freeze <16 x i8> %s0905 %s1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %f0, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)906 ret <16 x i8> %s1907}908 909define i32 @PR22415(double %a0) {910; SSE-LABEL: PR22415:911; SSE: # %bb.0:912; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4],zero,xmm0[u,u,u,u,u,u,u,u,u,u,u,u]913; SSE-NEXT: movd %xmm0, %eax914; SSE-NEXT: retq915;916; AVX-LABEL: PR22415:917; AVX: # %bb.0:918; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4],zero,xmm0[u,u,u,u,u,u,u,u,u,u,u,u]919; AVX-NEXT: vmovd %xmm0, %eax920; AVX-NEXT: retq921 %1 = bitcast double %a0 to <8 x i8>922 %2 = shufflevector <8 x i8> %1, <8 x i8> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 undef>923 %3 = shufflevector <4 x i8> %2, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>924 %4 = bitcast <3 x i8> %3 to i24925 %5 = zext i24 %4 to i32926 ret i32 %5927}928