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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=SSE13 4define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {5; SSE1-LABEL: shuffle_v4f32_0001:6; SSE1: # %bb.0:7; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]8; SSE1-NEXT: retq9 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>10 ret <4 x float> %shuffle11}12 13define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {14; SSE1-LABEL: shuffle_v4f32_0020:15; SSE1: # %bb.0:16; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]17; SSE1-NEXT: retq18 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>19 ret <4 x float> %shuffle20}21 22define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {23; SSE1-LABEL: shuffle_v4f32_0300:24; SSE1: # %bb.0:25; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]26; SSE1-NEXT: retq27 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>28 ret <4 x float> %shuffle29}30 31define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {32; SSE1-LABEL: shuffle_v4f32_1000:33; SSE1: # %bb.0:34; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]35; SSE1-NEXT: retq36 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>37 ret <4 x float> %shuffle38}39 40define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {41; SSE1-LABEL: shuffle_v4f32_2200:42; SSE1: # %bb.0:43; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]44; SSE1-NEXT: retq45 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>46 ret <4 x float> %shuffle47}48 49define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {50; SSE1-LABEL: shuffle_v4f32_3330:51; SSE1: # %bb.0:52; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]53; SSE1-NEXT: retq54 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>55 ret <4 x float> %shuffle56}57 58define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {59; SSE1-LABEL: shuffle_v4f32_3210:60; SSE1: # %bb.0:61; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]62; SSE1-NEXT: retq63 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>64 ret <4 x float> %shuffle65}66 67define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {68; SSE1-LABEL: shuffle_v4f32_0011:69; SSE1: # %bb.0:70; SSE1-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]71; SSE1-NEXT: retq72 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>73 ret <4 x float> %shuffle74}75 76define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {77; SSE1-LABEL: shuffle_v4f32_2233:78; SSE1: # %bb.0:79; SSE1-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]80; SSE1-NEXT: retq81 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>82 ret <4 x float> %shuffle83}84 85define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {86; SSE1-LABEL: shuffle_v4f32_0022:87; SSE1: # %bb.0:88; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]89; SSE1-NEXT: retq90 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>91 ret <4 x float> %shuffle92}93 94define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {95; SSE1-LABEL: shuffle_v4f32_1133:96; SSE1: # %bb.0:97; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]98; SSE1-NEXT: retq99 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>100 ret <4 x float> %shuffle101}102 103define <4 x float> @shuffle_v4f32_0145(<4 x float> %a, <4 x float> %b) {104; SSE1-LABEL: shuffle_v4f32_0145:105; SSE1: # %bb.0:106; SSE1-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]107; SSE1-NEXT: retq108 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>109 ret <4 x float> %shuffle110}111 112define <4 x float> @shuffle_v4f32_0101(<4 x float> %a, <4 x float> %b) {113; SSE1-LABEL: shuffle_v4f32_0101:114; SSE1: # %bb.0:115; SSE1-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]116; SSE1-NEXT: retq117 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 0, i32 1>118 ret <4 x float> %shuffle119}120 121define <4 x float> @shuffle_v4f32_2323(<4 x float> %a, <4 x float> %b) {122; SSE1-LABEL: shuffle_v4f32_2323:123; SSE1: # %bb.0:124; SSE1-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]125; SSE1-NEXT: retq126 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 3, i32 2, i32 3>127 ret <4 x float> %shuffle128}129 130define <4 x float> @shuffle_v4f32_6723(<4 x float> %a, <4 x float> %b) {131; SSE1-LABEL: shuffle_v4f32_6723:132; SSE1: # %bb.0:133; SSE1-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1]134; SSE1-NEXT: retq135 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>136 ret <4 x float> %shuffle137}138 139define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {140; SSE1-LABEL: shuffle_v4f32_4zzz:141; SSE1: # %bb.0:142; SSE1-NEXT: xorps %xmm1, %xmm1143; SSE1-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]144; SSE1-NEXT: movaps %xmm1, %xmm0145; SSE1-NEXT: retq146 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>147 ret <4 x float> %shuffle148}149 150define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {151; SSE1-LABEL: shuffle_v4f32_z4zz:152; SSE1: # %bb.0:153; SSE1-NEXT: xorps %xmm1, %xmm1154; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]155; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]156; SSE1-NEXT: retq157 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>158 ret <4 x float> %shuffle159}160 161define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {162; SSE1-LABEL: shuffle_v4f32_zz4z:163; SSE1: # %bb.0:164; SSE1-NEXT: xorps %xmm1, %xmm1165; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]166; SSE1-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]167; SSE1-NEXT: movaps %xmm1, %xmm0168; SSE1-NEXT: retq169 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>170 ret <4 x float> %shuffle171}172 173define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {174; SSE1-LABEL: shuffle_v4f32_zuu4:175; SSE1: # %bb.0:176; SSE1-NEXT: xorps %xmm1, %xmm1177; SSE1-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]178; SSE1-NEXT: movaps %xmm1, %xmm0179; SSE1-NEXT: retq180 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>181 ret <4 x float> %shuffle182}183 184define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {185; SSE1-LABEL: shuffle_v4f32_zzz7:186; SSE1: # %bb.0:187; SSE1-NEXT: xorps %xmm1, %xmm1188; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]189; SSE1-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]190; SSE1-NEXT: movaps %xmm1, %xmm0191; SSE1-NEXT: retq192 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>193 ret <4 x float> %shuffle194}195 196define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {197; SSE1-LABEL: shuffle_v4f32_z6zz:198; SSE1: # %bb.0:199; SSE1-NEXT: xorps %xmm1, %xmm1200; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]201; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]202; SSE1-NEXT: retq203 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>204 ret <4 x float> %shuffle205}206 207define <4 x float> @insert_reg_and_zero_v4f32(float %a) {208; SSE1-LABEL: insert_reg_and_zero_v4f32:209; SSE1: # %bb.0:210; SSE1-NEXT: xorps %xmm1, %xmm1211; SSE1-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]212; SSE1-NEXT: movaps %xmm1, %xmm0213; SSE1-NEXT: retq214 %v = insertelement <4 x float> undef, float %a, i32 0215 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>216 ret <4 x float> %shuffle217}218 219define <4 x float> @insert_mem_and_zero_v4f32(ptr %ptr) {220; SSE1-LABEL: insert_mem_and_zero_v4f32:221; SSE1: # %bb.0:222; SSE1-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero223; SSE1-NEXT: retq224 %a = load float, ptr %ptr225 %v = insertelement <4 x float> undef, float %a, i32 0226 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>227 ret <4 x float> %shuffle228}229 230define <4 x float> @insert_mem_lo_v4f32(ptr %ptr, <4 x float> %b) {231; SSE1-LABEL: insert_mem_lo_v4f32:232; SSE1: # %bb.0:233; SSE1-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]234; SSE1-NEXT: retq235 %a = load <2 x float>, ptr %ptr236 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>237 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>238 ret <4 x float> %shuffle239}240 241define <4 x float> @insert_mem_hi_v4f32(ptr %ptr, <4 x float> %b) {242; SSE1-LABEL: insert_mem_hi_v4f32:243; SSE1: # %bb.0:244; SSE1-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]245; SSE1-NEXT: retq246 %a = load <2 x float>, ptr %ptr247 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>248 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>249 ret <4 x float> %shuffle250}251 252define <4 x float> @shuffle_mem_v4f32_3210(ptr %ptr) {253; SSE1-LABEL: shuffle_mem_v4f32_3210:254; SSE1: # %bb.0:255; SSE1-NEXT: movaps (%rdi), %xmm0256; SSE1-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]257; SSE1-NEXT: retq258 %a = load <4 x float>, ptr %ptr259 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>260 ret <4 x float> %shuffle261}262 263define <4 x float> @shuffle_mem_v4f32_0145(<4 x float> %a, ptr %pb) {264; SSE1-LABEL: shuffle_mem_v4f32_0145:265; SSE1: # %bb.0:266; SSE1-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]267; SSE1-NEXT: retq268 %b = load <4 x float>, ptr %pb, align 1269 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>270 ret <4 x float> %shuffle271}272 273define <4 x float> @shuffle_mem_v4f32_6723(<4 x float> %a, ptr %pb) {274; SSE1-LABEL: shuffle_mem_v4f32_6723:275; SSE1: # %bb.0:276; SSE1-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]277; SSE1-NEXT: retq278 %b = load <4 x float>, ptr %pb, align 16279 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>280 ret <4 x float> %shuffle281}282 283define <4 x float> @shuffle_mem_v4f32_4523(<4 x float> %a, ptr %pb) {284; SSE1-LABEL: shuffle_mem_v4f32_4523:285; SSE1: # %bb.0:286; SSE1-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]287; SSE1-NEXT: retq288 %b = load <4 x float>, ptr %pb, align 1289 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>290 ret <4 x float> %shuffle291}292