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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=x86_64-- -O2 | FileCheck %s3 4; This test verifies the fix for PR33368.5;6; The expected outcome of the operation is to store bytes 0 and 2 of the incoming7; parameter into c2 (a 2 x i8 vector). DAGCombine converts shuffles into a8; sequence of extend and subsequent truncate operations. The bug was that an extension9; by 4 followed by a truncation by 8 was completely eliminated.10 11; The test checks for the correct sequence of operations that results from the12; preservation of the extend/truncate operations mentioned above (2 extend and13; 3 truncate instructions).14;15; NOTE: This operation could be collapsed in to a single truncate. Once that is done16; this test will have to be adjusted.17 18define void @test(double %vec.coerce) local_unnamed_addr {19; CHECK-LABEL: test:20; CHECK: # %bb.0: # %entry21; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm022; CHECK-NEXT: packuswb %xmm0, %xmm023; CHECK-NEXT: movd %xmm0, %eax24; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)25; CHECK-NEXT: retq26entry:27 %c2 = alloca <2 x i8>, align 228 %0 = bitcast double %vec.coerce to <8 x i8>29 %1 = shufflevector <8 x i8> %0, <8 x i8> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 0>30 %2 = shufflevector <4 x i8> %1, <4 x i8> undef, <2 x i32> <i32 3, i32 0>31 store volatile <2 x i8> %2, ptr %c2, align 232 br label %if.end33 34if.end:35 %3 = bitcast <2 x i8> %2 to i1636 ret void37}38