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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE23; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX14; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X86-AVX,X86-AVX25; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE26; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX17; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX28 9; The mask is all-ones, potentially shifted.10 11;------------------------------------------------------------------------------;12; 128-bit vector; 8-bit elements = 16 elements13;------------------------------------------------------------------------------;14 15; lshr16 17define <16 x i8> @test_128_i8_x_16_7_mask_lshr_1(<16 x i8> %a0) {18; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_lshr_1:19; X86-SSE2: # %bb.0:20; X86-SSE2-NEXT: psrlw $1, %xmm021; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm022; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm023; X86-SSE2-NEXT: retl24;25; X86-AVX-LABEL: test_128_i8_x_16_7_mask_lshr_1:26; X86-AVX: # %bb.0:27; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm028; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm029; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm030; X86-AVX-NEXT: retl31;32; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_lshr_1:33; X64-SSE2: # %bb.0:34; X64-SSE2-NEXT: psrlw $1, %xmm035; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm036; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm037; X64-SSE2-NEXT: retq38;39; X64-AVX-LABEL: test_128_i8_x_16_7_mask_lshr_1:40; X64-AVX: # %bb.0:41; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm042; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm043; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm044; X64-AVX-NEXT: retq45 %t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>46 %t1 = lshr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>47 ret <16 x i8> %t148}49 50define <16 x i8> @test_128_i8_x_16_28_mask_lshr_1(<16 x i8> %a0) {51; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_1:52; X86-SSE2: # %bb.0:53; X86-SSE2-NEXT: psrlw $1, %xmm054; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm055; X86-SSE2-NEXT: retl56;57; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_1:58; X86-AVX: # %bb.0:59; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm060; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm061; X86-AVX-NEXT: retl62;63; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_1:64; X64-SSE2: # %bb.0:65; X64-SSE2-NEXT: psrlw $1, %xmm066; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm067; X64-SSE2-NEXT: retq68;69; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_1:70; X64-AVX: # %bb.0:71; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm072; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm073; X64-AVX-NEXT: retq74 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>75 %t1 = lshr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>76 ret <16 x i8> %t177}78define <16 x i8> @test_128_i8_x_16_28_mask_lshr_2(<16 x i8> %a0) {79; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_2:80; X86-SSE2: # %bb.0:81; X86-SSE2-NEXT: psrlw $2, %xmm082; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm083; X86-SSE2-NEXT: retl84;85; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_2:86; X86-AVX: # %bb.0:87; X86-AVX-NEXT: vpsrlw $2, %xmm0, %xmm088; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm089; X86-AVX-NEXT: retl90;91; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_2:92; X64-SSE2: # %bb.0:93; X64-SSE2-NEXT: psrlw $2, %xmm094; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm095; X64-SSE2-NEXT: retq96;97; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_2:98; X64-AVX: # %bb.0:99; X64-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0100; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0101; X64-AVX-NEXT: retq102 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>103 %t1 = lshr <16 x i8> %t0, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>104 ret <16 x i8> %t1105}106define <16 x i8> @test_128_i8_x_16_28_mask_lshr_3(<16 x i8> %a0) {107; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_3:108; X86-SSE2: # %bb.0:109; X86-SSE2-NEXT: psrlw $3, %xmm0110; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0111; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0112; X86-SSE2-NEXT: retl113;114; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_3:115; X86-AVX: # %bb.0:116; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0117; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0118; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0119; X86-AVX-NEXT: retl120;121; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_3:122; X64-SSE2: # %bb.0:123; X64-SSE2-NEXT: psrlw $3, %xmm0124; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0125; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0126; X64-SSE2-NEXT: retq127;128; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_3:129; X64-AVX: # %bb.0:130; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0131; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0132; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0133; X64-AVX-NEXT: retq134 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>135 %t1 = lshr <16 x i8> %t0, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>136 ret <16 x i8> %t1137}138define <16 x i8> @test_128_i8_x_16_28_mask_lshr_4(<16 x i8> %a0) {139; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_4:140; X86-SSE2: # %bb.0:141; X86-SSE2-NEXT: psrlw $4, %xmm0142; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0143; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0144; X86-SSE2-NEXT: retl145;146; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_4:147; X86-AVX: # %bb.0:148; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0149; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0150; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0151; X86-AVX-NEXT: retl152;153; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_4:154; X64-SSE2: # %bb.0:155; X64-SSE2-NEXT: psrlw $4, %xmm0156; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0157; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0158; X64-SSE2-NEXT: retq159;160; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_4:161; X64-AVX: # %bb.0:162; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0163; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0164; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0165; X64-AVX-NEXT: retq166 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>167 %t1 = lshr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>168 ret <16 x i8> %t1169}170 171define <16 x i8> @test_128_i8_x_16_224_mask_lshr_1(<16 x i8> %a0) {172; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_1:173; X86-SSE2: # %bb.0:174; X86-SSE2-NEXT: psrlw $1, %xmm0175; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0176; X86-SSE2-NEXT: retl177;178; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_1:179; X86-AVX: # %bb.0:180; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0181; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0182; X86-AVX-NEXT: retl183;184; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_1:185; X64-SSE2: # %bb.0:186; X64-SSE2-NEXT: psrlw $1, %xmm0187; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0188; X64-SSE2-NEXT: retq189;190; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_1:191; X64-AVX: # %bb.0:192; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0193; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0194; X64-AVX-NEXT: retq195 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>196 %t1 = lshr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>197 ret <16 x i8> %t1198}199define <16 x i8> @test_128_i8_x_16_224_mask_lshr_4(<16 x i8> %a0) {200; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_4:201; X86-SSE2: # %bb.0:202; X86-SSE2-NEXT: psrlw $4, %xmm0203; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0204; X86-SSE2-NEXT: retl205;206; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_4:207; X86-AVX: # %bb.0:208; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0209; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0210; X86-AVX-NEXT: retl211;212; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_4:213; X64-SSE2: # %bb.0:214; X64-SSE2-NEXT: psrlw $4, %xmm0215; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0216; X64-SSE2-NEXT: retq217;218; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_4:219; X64-AVX: # %bb.0:220; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0221; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0222; X64-AVX-NEXT: retq223 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>224 %t1 = lshr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>225 ret <16 x i8> %t1226}227define <16 x i8> @test_128_i8_x_16_224_mask_lshr_5(<16 x i8> %a0) {228; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_5:229; X86-SSE2: # %bb.0:230; X86-SSE2-NEXT: psrlw $5, %xmm0231; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0232; X86-SSE2-NEXT: retl233;234; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_5:235; X86-AVX: # %bb.0:236; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0237; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0238; X86-AVX-NEXT: retl239;240; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_5:241; X64-SSE2: # %bb.0:242; X64-SSE2-NEXT: psrlw $5, %xmm0243; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0244; X64-SSE2-NEXT: retq245;246; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_5:247; X64-AVX: # %bb.0:248; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0249; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0250; X64-AVX-NEXT: retq251 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>252 %t1 = lshr <16 x i8> %t0, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>253 ret <16 x i8> %t1254}255define <16 x i8> @test_128_i8_x_16_224_mask_lshr_6(<16 x i8> %a0) {256; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_6:257; X86-SSE2: # %bb.0:258; X86-SSE2-NEXT: psrlw $6, %xmm0259; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0260; X86-SSE2-NEXT: retl261;262; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_6:263; X86-AVX: # %bb.0:264; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0265; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0266; X86-AVX-NEXT: retl267;268; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_6:269; X64-SSE2: # %bb.0:270; X64-SSE2-NEXT: psrlw $6, %xmm0271; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0272; X64-SSE2-NEXT: retq273;274; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_6:275; X64-AVX: # %bb.0:276; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0277; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0278; X64-AVX-NEXT: retq279 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>280 %t1 = lshr <16 x i8> %t0, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>281 ret <16 x i8> %t1282}283 284; ashr285 286define <16 x i8> @test_128_i8_x_16_7_mask_ashr_1(<16 x i8> %a0) {287; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_ashr_1:288; X86-SSE2: # %bb.0:289; X86-SSE2-NEXT: psrlw $1, %xmm0290; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0291; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0292; X86-SSE2-NEXT: retl293;294; X86-AVX-LABEL: test_128_i8_x_16_7_mask_ashr_1:295; X86-AVX: # %bb.0:296; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0297; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0298; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0299; X86-AVX-NEXT: retl300;301; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_ashr_1:302; X64-SSE2: # %bb.0:303; X64-SSE2-NEXT: psrlw $1, %xmm0304; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0305; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0306; X64-SSE2-NEXT: retq307;308; X64-AVX-LABEL: test_128_i8_x_16_7_mask_ashr_1:309; X64-AVX: # %bb.0:310; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0311; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0312; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0313; X64-AVX-NEXT: retq314 %t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>315 %t1 = ashr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>316 ret <16 x i8> %t1317}318 319define <16 x i8> @test_128_i8_x_16_28_mask_ashr_1(<16 x i8> %a0) {320; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_1:321; X86-SSE2: # %bb.0:322; X86-SSE2-NEXT: psrlw $1, %xmm0323; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0324; X86-SSE2-NEXT: retl325;326; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_1:327; X86-AVX: # %bb.0:328; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0329; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0330; X86-AVX-NEXT: retl331;332; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_1:333; X64-SSE2: # %bb.0:334; X64-SSE2-NEXT: psrlw $1, %xmm0335; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0336; X64-SSE2-NEXT: retq337;338; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_1:339; X64-AVX: # %bb.0:340; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0341; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0342; X64-AVX-NEXT: retq343 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>344 %t1 = ashr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>345 ret <16 x i8> %t1346}347define <16 x i8> @test_128_i8_x_16_28_mask_ashr_2(<16 x i8> %a0) {348; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_2:349; X86-SSE2: # %bb.0:350; X86-SSE2-NEXT: psrlw $2, %xmm0351; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0352; X86-SSE2-NEXT: retl353;354; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_2:355; X86-AVX: # %bb.0:356; X86-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0357; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0358; X86-AVX-NEXT: retl359;360; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_2:361; X64-SSE2: # %bb.0:362; X64-SSE2-NEXT: psrlw $2, %xmm0363; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0364; X64-SSE2-NEXT: retq365;366; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_2:367; X64-AVX: # %bb.0:368; X64-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0369; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0370; X64-AVX-NEXT: retq371 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>372 %t1 = ashr <16 x i8> %t0, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>373 ret <16 x i8> %t1374}375define <16 x i8> @test_128_i8_x_16_28_mask_ashr_3(<16 x i8> %a0) {376; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_3:377; X86-SSE2: # %bb.0:378; X86-SSE2-NEXT: psrlw $3, %xmm0379; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0380; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0381; X86-SSE2-NEXT: retl382;383; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_3:384; X86-AVX: # %bb.0:385; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0386; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0387; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0388; X86-AVX-NEXT: retl389;390; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_3:391; X64-SSE2: # %bb.0:392; X64-SSE2-NEXT: psrlw $3, %xmm0393; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0394; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0395; X64-SSE2-NEXT: retq396;397; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_3:398; X64-AVX: # %bb.0:399; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0400; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0401; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0402; X64-AVX-NEXT: retq403 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>404 %t1 = ashr <16 x i8> %t0, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>405 ret <16 x i8> %t1406}407define <16 x i8> @test_128_i8_x_16_28_mask_ashr_4(<16 x i8> %a0) {408; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_4:409; X86-SSE2: # %bb.0:410; X86-SSE2-NEXT: psrlw $4, %xmm0411; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0412; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0413; X86-SSE2-NEXT: retl414;415; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_4:416; X86-AVX: # %bb.0:417; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0418; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0419; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0420; X86-AVX-NEXT: retl421;422; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_4:423; X64-SSE2: # %bb.0:424; X64-SSE2-NEXT: psrlw $4, %xmm0425; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0426; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0427; X64-SSE2-NEXT: retq428;429; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_4:430; X64-AVX: # %bb.0:431; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0432; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0433; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0434; X64-AVX-NEXT: retq435 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>436 %t1 = ashr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>437 ret <16 x i8> %t1438}439 440define <16 x i8> @test_128_i8_x_16_224_mask_ashr_1(<16 x i8> %a0) {441; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_1:442; X86-SSE2: # %bb.0:443; X86-SSE2-NEXT: psrlw $1, %xmm0444; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0445; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]446; X86-SSE2-NEXT: pxor %xmm1, %xmm0447; X86-SSE2-NEXT: psubb %xmm1, %xmm0448; X86-SSE2-NEXT: retl449;450; X86-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_1:451; X86-AVX1: # %bb.0:452; X86-AVX1-NEXT: vpsrlw $1, %xmm0, %xmm0453; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0454; X86-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]455; X86-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0456; X86-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0457; X86-AVX1-NEXT: retl458;459; X86-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_1:460; X86-AVX2: # %bb.0:461; X86-AVX2-NEXT: vpsrlw $1, %xmm0, %xmm0462; X86-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0463; X86-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]464; X86-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0465; X86-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0466; X86-AVX2-NEXT: retl467;468; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_1:469; X64-SSE2: # %bb.0:470; X64-SSE2-NEXT: psrlw $1, %xmm0471; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0472; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]473; X64-SSE2-NEXT: pxor %xmm1, %xmm0474; X64-SSE2-NEXT: psubb %xmm1, %xmm0475; X64-SSE2-NEXT: retq476;477; X64-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_1:478; X64-AVX1: # %bb.0:479; X64-AVX1-NEXT: vpsrlw $1, %xmm0, %xmm0480; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0481; X64-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]482; X64-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0483; X64-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0484; X64-AVX1-NEXT: retq485;486; X64-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_1:487; X64-AVX2: # %bb.0:488; X64-AVX2-NEXT: vpsrlw $1, %xmm0, %xmm0489; X64-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0490; X64-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]491; X64-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0492; X64-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0493; X64-AVX2-NEXT: retq494 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>495 %t1 = ashr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>496 ret <16 x i8> %t1497}498define <16 x i8> @test_128_i8_x_16_224_mask_ashr_4(<16 x i8> %a0) {499; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_4:500; X86-SSE2: # %bb.0:501; X86-SSE2-NEXT: psrlw $4, %xmm0502; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0503; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]504; X86-SSE2-NEXT: pxor %xmm1, %xmm0505; X86-SSE2-NEXT: psubb %xmm1, %xmm0506; X86-SSE2-NEXT: retl507;508; X86-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_4:509; X86-AVX1: # %bb.0:510; X86-AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0511; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0512; X86-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]513; X86-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0514; X86-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0515; X86-AVX1-NEXT: retl516;517; X86-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_4:518; X86-AVX2: # %bb.0:519; X86-AVX2-NEXT: vpsrlw $4, %xmm0, %xmm0520; X86-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0521; X86-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]522; X86-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0523; X86-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0524; X86-AVX2-NEXT: retl525;526; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_4:527; X64-SSE2: # %bb.0:528; X64-SSE2-NEXT: psrlw $4, %xmm0529; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0530; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]531; X64-SSE2-NEXT: pxor %xmm1, %xmm0532; X64-SSE2-NEXT: psubb %xmm1, %xmm0533; X64-SSE2-NEXT: retq534;535; X64-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_4:536; X64-AVX1: # %bb.0:537; X64-AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0538; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0539; X64-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]540; X64-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0541; X64-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0542; X64-AVX1-NEXT: retq543;544; X64-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_4:545; X64-AVX2: # %bb.0:546; X64-AVX2-NEXT: vpsrlw $4, %xmm0, %xmm0547; X64-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0548; X64-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]549; X64-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0550; X64-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0551; X64-AVX2-NEXT: retq552 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>553 %t1 = ashr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>554 ret <16 x i8> %t1555}556define <16 x i8> @test_128_i8_x_16_224_mask_ashr_5(<16 x i8> %a0) {557; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_5:558; X86-SSE2: # %bb.0:559; X86-SSE2-NEXT: psrlw $5, %xmm0560; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0561; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]562; X86-SSE2-NEXT: pxor %xmm1, %xmm0563; X86-SSE2-NEXT: psubb %xmm1, %xmm0564; X86-SSE2-NEXT: retl565;566; X86-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_5:567; X86-AVX1: # %bb.0:568; X86-AVX1-NEXT: vpsrlw $5, %xmm0, %xmm0569; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0570; X86-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]571; X86-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0572; X86-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0573; X86-AVX1-NEXT: retl574;575; X86-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_5:576; X86-AVX2: # %bb.0:577; X86-AVX2-NEXT: vpsrlw $5, %xmm0, %xmm0578; X86-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0579; X86-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]580; X86-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0581; X86-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0582; X86-AVX2-NEXT: retl583;584; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_5:585; X64-SSE2: # %bb.0:586; X64-SSE2-NEXT: psrlw $5, %xmm0587; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0588; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]589; X64-SSE2-NEXT: pxor %xmm1, %xmm0590; X64-SSE2-NEXT: psubb %xmm1, %xmm0591; X64-SSE2-NEXT: retq592;593; X64-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_5:594; X64-AVX1: # %bb.0:595; X64-AVX1-NEXT: vpsrlw $5, %xmm0, %xmm0596; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0597; X64-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]598; X64-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0599; X64-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0600; X64-AVX1-NEXT: retq601;602; X64-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_5:603; X64-AVX2: # %bb.0:604; X64-AVX2-NEXT: vpsrlw $5, %xmm0, %xmm0605; X64-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0606; X64-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]607; X64-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0608; X64-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0609; X64-AVX2-NEXT: retq610 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>611 %t1 = ashr <16 x i8> %t0, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>612 ret <16 x i8> %t1613}614define <16 x i8> @test_128_i8_x_16_224_mask_ashr_6(<16 x i8> %a0) {615; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_6:616; X86-SSE2: # %bb.0:617; X86-SSE2-NEXT: psrlw $6, %xmm0618; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0619; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]620; X86-SSE2-NEXT: pxor %xmm1, %xmm0621; X86-SSE2-NEXT: psubb %xmm1, %xmm0622; X86-SSE2-NEXT: retl623;624; X86-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_6:625; X86-AVX1: # %bb.0:626; X86-AVX1-NEXT: vpsrlw $6, %xmm0, %xmm0627; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0628; X86-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]629; X86-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0630; X86-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0631; X86-AVX1-NEXT: retl632;633; X86-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_6:634; X86-AVX2: # %bb.0:635; X86-AVX2-NEXT: vpsrlw $6, %xmm0, %xmm0636; X86-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0637; X86-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]638; X86-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0639; X86-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0640; X86-AVX2-NEXT: retl641;642; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_6:643; X64-SSE2: # %bb.0:644; X64-SSE2-NEXT: psrlw $6, %xmm0645; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0646; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]647; X64-SSE2-NEXT: pxor %xmm1, %xmm0648; X64-SSE2-NEXT: psubb %xmm1, %xmm0649; X64-SSE2-NEXT: retq650;651; X64-AVX1-LABEL: test_128_i8_x_16_224_mask_ashr_6:652; X64-AVX1: # %bb.0:653; X64-AVX1-NEXT: vpsrlw $6, %xmm0, %xmm0654; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0655; X64-AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]656; X64-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0657; X64-AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0658; X64-AVX1-NEXT: retq659;660; X64-AVX2-LABEL: test_128_i8_x_16_224_mask_ashr_6:661; X64-AVX2: # %bb.0:662; X64-AVX2-NEXT: vpsrlw $6, %xmm0, %xmm0663; X64-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0664; X64-AVX2-NEXT: vpbroadcastb {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]665; X64-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0666; X64-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0667; X64-AVX2-NEXT: retq668 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>669 %t1 = ashr <16 x i8> %t0, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>670 ret <16 x i8> %t1671}672 673; shl674 675define <16 x i8> @test_128_i8_x_16_7_mask_shl_1(<16 x i8> %a0) {676; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_1:677; X86-SSE2: # %bb.0:678; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0679; X86-SSE2-NEXT: paddb %xmm0, %xmm0680; X86-SSE2-NEXT: retl681;682; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_1:683; X86-AVX: # %bb.0:684; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0685; X86-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0686; X86-AVX-NEXT: retl687;688; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_1:689; X64-SSE2: # %bb.0:690; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0691; X64-SSE2-NEXT: paddb %xmm0, %xmm0692; X64-SSE2-NEXT: retq693;694; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_1:695; X64-AVX: # %bb.0:696; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0697; X64-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0698; X64-AVX-NEXT: retq699 %t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>700 %t1 = shl <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>701 ret <16 x i8> %t1702}703define <16 x i8> @test_128_i8_x_16_7_mask_shl_4(<16 x i8> %a0) {704; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_4:705; X86-SSE2: # %bb.0:706; X86-SSE2-NEXT: psllw $4, %xmm0707; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0708; X86-SSE2-NEXT: retl709;710; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_4:711; X86-AVX: # %bb.0:712; X86-AVX-NEXT: vpsllw $4, %xmm0, %xmm0713; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0714; X86-AVX-NEXT: retl715;716; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_4:717; X64-SSE2: # %bb.0:718; X64-SSE2-NEXT: psllw $4, %xmm0719; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0720; X64-SSE2-NEXT: retq721;722; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_4:723; X64-AVX: # %bb.0:724; X64-AVX-NEXT: vpsllw $4, %xmm0, %xmm0725; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0726; X64-AVX-NEXT: retq727 %t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>728 %t1 = shl <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>729 ret <16 x i8> %t1730}731define <16 x i8> @test_128_i8_x_16_7_mask_shl_5(<16 x i8> %a0) {732; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_5:733; X86-SSE2: # %bb.0:734; X86-SSE2-NEXT: psllw $5, %xmm0735; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0736; X86-SSE2-NEXT: retl737;738; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_5:739; X86-AVX: # %bb.0:740; X86-AVX-NEXT: vpsllw $5, %xmm0, %xmm0741; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0742; X86-AVX-NEXT: retl743;744; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_5:745; X64-SSE2: # %bb.0:746; X64-SSE2-NEXT: psllw $5, %xmm0747; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0748; X64-SSE2-NEXT: retq749;750; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_5:751; X64-AVX: # %bb.0:752; X64-AVX-NEXT: vpsllw $5, %xmm0, %xmm0753; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0754; X64-AVX-NEXT: retq755 %t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>756 %t1 = shl <16 x i8> %t0, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>757 ret <16 x i8> %t1758}759define <16 x i8> @test_128_i8_x_16_7_mask_shl_6(<16 x i8> %a0) {760; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_6:761; X86-SSE2: # %bb.0:762; X86-SSE2-NEXT: psllw $6, %xmm0763; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0764; X86-SSE2-NEXT: retl765;766; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_6:767; X86-AVX: # %bb.0:768; X86-AVX-NEXT: vpsllw $6, %xmm0, %xmm0769; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0770; X86-AVX-NEXT: retl771;772; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_6:773; X64-SSE2: # %bb.0:774; X64-SSE2-NEXT: psllw $6, %xmm0775; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0776; X64-SSE2-NEXT: retq777;778; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_6:779; X64-AVX: # %bb.0:780; X64-AVX-NEXT: vpsllw $6, %xmm0, %xmm0781; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0782; X64-AVX-NEXT: retq783 %t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>784 %t1 = shl <16 x i8> %t0, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>785 ret <16 x i8> %t1786}787 788define <16 x i8> @test_128_i8_x_16_28_mask_shl_1(<16 x i8> %a0) {789; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_1:790; X86-SSE2: # %bb.0:791; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0792; X86-SSE2-NEXT: paddb %xmm0, %xmm0793; X86-SSE2-NEXT: retl794;795; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_1:796; X86-AVX: # %bb.0:797; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0798; X86-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0799; X86-AVX-NEXT: retl800;801; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_1:802; X64-SSE2: # %bb.0:803; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0804; X64-SSE2-NEXT: paddb %xmm0, %xmm0805; X64-SSE2-NEXT: retq806;807; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_1:808; X64-AVX: # %bb.0:809; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0810; X64-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0811; X64-AVX-NEXT: retq812 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>813 %t1 = shl <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>814 ret <16 x i8> %t1815}816define <16 x i8> @test_128_i8_x_16_28_mask_shl_2(<16 x i8> %a0) {817; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_2:818; X86-SSE2: # %bb.0:819; X86-SSE2-NEXT: psllw $2, %xmm0820; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0821; X86-SSE2-NEXT: retl822;823; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_2:824; X86-AVX: # %bb.0:825; X86-AVX-NEXT: vpsllw $2, %xmm0, %xmm0826; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0827; X86-AVX-NEXT: retl828;829; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_2:830; X64-SSE2: # %bb.0:831; X64-SSE2-NEXT: psllw $2, %xmm0832; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0833; X64-SSE2-NEXT: retq834;835; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_2:836; X64-AVX: # %bb.0:837; X64-AVX-NEXT: vpsllw $2, %xmm0, %xmm0838; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0839; X64-AVX-NEXT: retq840 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>841 %t1 = shl <16 x i8> %t0, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>842 ret <16 x i8> %t1843}844define <16 x i8> @test_128_i8_x_16_28_mask_shl_3(<16 x i8> %a0) {845; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_3:846; X86-SSE2: # %bb.0:847; X86-SSE2-NEXT: psllw $3, %xmm0848; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0849; X86-SSE2-NEXT: retl850;851; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_3:852; X86-AVX: # %bb.0:853; X86-AVX-NEXT: vpsllw $3, %xmm0, %xmm0854; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0855; X86-AVX-NEXT: retl856;857; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_3:858; X64-SSE2: # %bb.0:859; X64-SSE2-NEXT: psllw $3, %xmm0860; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0861; X64-SSE2-NEXT: retq862;863; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_3:864; X64-AVX: # %bb.0:865; X64-AVX-NEXT: vpsllw $3, %xmm0, %xmm0866; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0867; X64-AVX-NEXT: retq868 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>869 %t1 = shl <16 x i8> %t0, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>870 ret <16 x i8> %t1871}872define <16 x i8> @test_128_i8_x_16_28_mask_shl_4(<16 x i8> %a0) {873; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_4:874; X86-SSE2: # %bb.0:875; X86-SSE2-NEXT: psllw $4, %xmm0876; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0877; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0878; X86-SSE2-NEXT: retl879;880; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_4:881; X86-AVX: # %bb.0:882; X86-AVX-NEXT: vpsllw $4, %xmm0, %xmm0883; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0884; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0885; X86-AVX-NEXT: retl886;887; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_4:888; X64-SSE2: # %bb.0:889; X64-SSE2-NEXT: psllw $4, %xmm0890; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0891; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0892; X64-SSE2-NEXT: retq893;894; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_4:895; X64-AVX: # %bb.0:896; X64-AVX-NEXT: vpsllw $4, %xmm0, %xmm0897; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0898; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0899; X64-AVX-NEXT: retq900 %t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>901 %t1 = shl <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>902 ret <16 x i8> %t1903}904 905define <16 x i8> @test_128_i8_x_16_224_mask_shl_1(<16 x i8> %a0) {906; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_shl_1:907; X86-SSE2: # %bb.0:908; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0909; X86-SSE2-NEXT: paddb %xmm0, %xmm0910; X86-SSE2-NEXT: retl911;912; X86-AVX-LABEL: test_128_i8_x_16_224_mask_shl_1:913; X86-AVX: # %bb.0:914; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0915; X86-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0916; X86-AVX-NEXT: retl917;918; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_shl_1:919; X64-SSE2: # %bb.0:920; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0921; X64-SSE2-NEXT: paddb %xmm0, %xmm0922; X64-SSE2-NEXT: retq923;924; X64-AVX-LABEL: test_128_i8_x_16_224_mask_shl_1:925; X64-AVX: # %bb.0:926; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0927; X64-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0928; X64-AVX-NEXT: retq929 %t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>930 %t1 = shl <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>931 ret <16 x i8> %t1932}933 934;------------------------------------------------------------------------------;935; 128-bit vector; 16-bit elements = 8 elements936;------------------------------------------------------------------------------;937 938; lshr939 940define <8 x i16> @test_128_i16_x_8_127_mask_lshr_1(<8 x i16> %a0) {941; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_lshr_1:942; X86-SSE2: # %bb.0:943; X86-SSE2-NEXT: psrlw $1, %xmm0944; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0945; X86-SSE2-NEXT: retl946;947; X86-AVX-LABEL: test_128_i16_x_8_127_mask_lshr_1:948; X86-AVX: # %bb.0:949; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0950; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0951; X86-AVX-NEXT: retl952;953; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_lshr_1:954; X64-SSE2: # %bb.0:955; X64-SSE2-NEXT: psrlw $1, %xmm0956; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0957; X64-SSE2-NEXT: retq958;959; X64-AVX-LABEL: test_128_i16_x_8_127_mask_lshr_1:960; X64-AVX: # %bb.0:961; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0962; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0963; X64-AVX-NEXT: retq964 %t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>965 %t1 = lshr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>966 ret <8 x i16> %t1967}968 969define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_3(<8 x i16> %a0) {970; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_3:971; X86-SSE2: # %bb.0:972; X86-SSE2-NEXT: psrlw $3, %xmm0973; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0974; X86-SSE2-NEXT: retl975;976; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_3:977; X86-AVX: # %bb.0:978; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0979; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0980; X86-AVX-NEXT: retl981;982; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_3:983; X64-SSE2: # %bb.0:984; X64-SSE2-NEXT: psrlw $3, %xmm0985; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0986; X64-SSE2-NEXT: retq987;988; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_3:989; X64-AVX: # %bb.0:990; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0991; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0992; X64-AVX-NEXT: retq993 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>994 %t1 = lshr <8 x i16> %t0, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>995 ret <8 x i16> %t1996}997define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_4(<8 x i16> %a0) {998; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_4:999; X86-SSE2: # %bb.0:1000; X86-SSE2-NEXT: psrlw $4, %xmm01001; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01002; X86-SSE2-NEXT: retl1003;1004; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_4:1005; X86-AVX: # %bb.0:1006; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm01007; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01008; X86-AVX-NEXT: retl1009;1010; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_4:1011; X64-SSE2: # %bb.0:1012; X64-SSE2-NEXT: psrlw $4, %xmm01013; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01014; X64-SSE2-NEXT: retq1015;1016; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_4:1017; X64-AVX: # %bb.0:1018; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm01019; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01020; X64-AVX-NEXT: retq1021 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1022 %t1 = lshr <8 x i16> %t0, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>1023 ret <8 x i16> %t11024}1025define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_5(<8 x i16> %a0) {1026; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_5:1027; X86-SSE2: # %bb.0:1028; X86-SSE2-NEXT: psrlw $5, %xmm01029; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01030; X86-SSE2-NEXT: retl1031;1032; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_5:1033; X86-AVX: # %bb.0:1034; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm01035; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01036; X86-AVX-NEXT: retl1037;1038; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_5:1039; X64-SSE2: # %bb.0:1040; X64-SSE2-NEXT: psrlw $5, %xmm01041; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01042; X64-SSE2-NEXT: retq1043;1044; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_5:1045; X64-AVX: # %bb.0:1046; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm01047; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01048; X64-AVX-NEXT: retq1049 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1050 %t1 = lshr <8 x i16> %t0, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>1051 ret <8 x i16> %t11052}1053define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_6(<8 x i16> %a0) {1054; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_6:1055; X86-SSE2: # %bb.0:1056; X86-SSE2-NEXT: psrlw $6, %xmm01057; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01058; X86-SSE2-NEXT: retl1059;1060; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_6:1061; X86-AVX: # %bb.0:1062; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm01063; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01064; X86-AVX-NEXT: retl1065;1066; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_6:1067; X64-SSE2: # %bb.0:1068; X64-SSE2-NEXT: psrlw $6, %xmm01069; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01070; X64-SSE2-NEXT: retq1071;1072; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_6:1073; X64-AVX: # %bb.0:1074; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm01075; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01076; X64-AVX-NEXT: retq1077 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1078 %t1 = lshr <8 x i16> %t0, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>1079 ret <8 x i16> %t11080}1081 1082define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_1(<8 x i16> %a0) {1083; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_1:1084; X86-SSE2: # %bb.0:1085; X86-SSE2-NEXT: psrlw $1, %xmm01086; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01087; X86-SSE2-NEXT: retl1088;1089; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_1:1090; X86-AVX: # %bb.0:1091; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm01092; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01093; X86-AVX-NEXT: retl1094;1095; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_1:1096; X64-SSE2: # %bb.0:1097; X64-SSE2-NEXT: psrlw $1, %xmm01098; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01099; X64-SSE2-NEXT: retq1100;1101; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_1:1102; X64-AVX: # %bb.0:1103; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm01104; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01105; X64-AVX-NEXT: retq1106 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1107 %t1 = lshr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1108 ret <8 x i16> %t11109}1110define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_8(<8 x i16> %a0) {1111; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_8:1112; X86-SSE2: # %bb.0:1113; X86-SSE2-NEXT: psrlw $8, %xmm01114; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01115; X86-SSE2-NEXT: retl1116;1117; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_8:1118; X86-AVX: # %bb.0:1119; X86-AVX-NEXT: vpsrlw $8, %xmm0, %xmm01120; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01121; X86-AVX-NEXT: retl1122;1123; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_8:1124; X64-SSE2: # %bb.0:1125; X64-SSE2-NEXT: psrlw $8, %xmm01126; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01127; X64-SSE2-NEXT: retq1128;1129; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_8:1130; X64-AVX: # %bb.0:1131; X64-AVX-NEXT: vpsrlw $8, %xmm0, %xmm01132; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01133; X64-AVX-NEXT: retq1134 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1135 %t1 = lshr <8 x i16> %t0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>1136 ret <8 x i16> %t11137}1138define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_9(<8 x i16> %a0) {1139; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_9:1140; X86-SSE2: # %bb.0:1141; X86-SSE2-NEXT: psrlw $9, %xmm01142; X86-SSE2-NEXT: retl1143;1144; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_9:1145; X86-AVX: # %bb.0:1146; X86-AVX-NEXT: vpsrlw $9, %xmm0, %xmm01147; X86-AVX-NEXT: retl1148;1149; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_9:1150; X64-SSE2: # %bb.0:1151; X64-SSE2-NEXT: psrlw $9, %xmm01152; X64-SSE2-NEXT: retq1153;1154; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_9:1155; X64-AVX: # %bb.0:1156; X64-AVX-NEXT: vpsrlw $9, %xmm0, %xmm01157; X64-AVX-NEXT: retq1158 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1159 %t1 = lshr <8 x i16> %t0, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>1160 ret <8 x i16> %t11161}1162define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_10(<8 x i16> %a0) {1163; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_10:1164; X86-SSE2: # %bb.0:1165; X86-SSE2-NEXT: psrlw $10, %xmm01166; X86-SSE2-NEXT: retl1167;1168; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_10:1169; X86-AVX: # %bb.0:1170; X86-AVX-NEXT: vpsrlw $10, %xmm0, %xmm01171; X86-AVX-NEXT: retl1172;1173; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_10:1174; X64-SSE2: # %bb.0:1175; X64-SSE2-NEXT: psrlw $10, %xmm01176; X64-SSE2-NEXT: retq1177;1178; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_10:1179; X64-AVX: # %bb.0:1180; X64-AVX-NEXT: vpsrlw $10, %xmm0, %xmm01181; X64-AVX-NEXT: retq1182 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1183 %t1 = lshr <8 x i16> %t0, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>1184 ret <8 x i16> %t11185}1186 1187; ashr1188 1189define <8 x i16> @test_128_i16_x_8_127_mask_ashr_1(<8 x i16> %a0) {1190; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_ashr_1:1191; X86-SSE2: # %bb.0:1192; X86-SSE2-NEXT: psrlw $1, %xmm01193; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01194; X86-SSE2-NEXT: retl1195;1196; X86-AVX-LABEL: test_128_i16_x_8_127_mask_ashr_1:1197; X86-AVX: # %bb.0:1198; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm01199; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01200; X86-AVX-NEXT: retl1201;1202; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_ashr_1:1203; X64-SSE2: # %bb.0:1204; X64-SSE2-NEXT: psrlw $1, %xmm01205; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01206; X64-SSE2-NEXT: retq1207;1208; X64-AVX-LABEL: test_128_i16_x_8_127_mask_ashr_1:1209; X64-AVX: # %bb.0:1210; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm01211; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01212; X64-AVX-NEXT: retq1213 %t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>1214 %t1 = ashr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1215 ret <8 x i16> %t11216}1217 1218define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_3(<8 x i16> %a0) {1219; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_3:1220; X86-SSE2: # %bb.0:1221; X86-SSE2-NEXT: psrlw $3, %xmm01222; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01223; X86-SSE2-NEXT: retl1224;1225; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_3:1226; X86-AVX: # %bb.0:1227; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm01228; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01229; X86-AVX-NEXT: retl1230;1231; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_3:1232; X64-SSE2: # %bb.0:1233; X64-SSE2-NEXT: psrlw $3, %xmm01234; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01235; X64-SSE2-NEXT: retq1236;1237; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_3:1238; X64-AVX: # %bb.0:1239; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm01240; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01241; X64-AVX-NEXT: retq1242 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1243 %t1 = ashr <8 x i16> %t0, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>1244 ret <8 x i16> %t11245}1246define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_4(<8 x i16> %a0) {1247; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_4:1248; X86-SSE2: # %bb.0:1249; X86-SSE2-NEXT: psrlw $4, %xmm01250; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01251; X86-SSE2-NEXT: retl1252;1253; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_4:1254; X86-AVX: # %bb.0:1255; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm01256; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01257; X86-AVX-NEXT: retl1258;1259; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_4:1260; X64-SSE2: # %bb.0:1261; X64-SSE2-NEXT: psrlw $4, %xmm01262; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01263; X64-SSE2-NEXT: retq1264;1265; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_4:1266; X64-AVX: # %bb.0:1267; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm01268; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01269; X64-AVX-NEXT: retq1270 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1271 %t1 = ashr <8 x i16> %t0, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>1272 ret <8 x i16> %t11273}1274define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_5(<8 x i16> %a0) {1275; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_5:1276; X86-SSE2: # %bb.0:1277; X86-SSE2-NEXT: psrlw $5, %xmm01278; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01279; X86-SSE2-NEXT: retl1280;1281; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_5:1282; X86-AVX: # %bb.0:1283; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm01284; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01285; X86-AVX-NEXT: retl1286;1287; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_5:1288; X64-SSE2: # %bb.0:1289; X64-SSE2-NEXT: psrlw $5, %xmm01290; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01291; X64-SSE2-NEXT: retq1292;1293; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_5:1294; X64-AVX: # %bb.0:1295; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm01296; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01297; X64-AVX-NEXT: retq1298 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1299 %t1 = ashr <8 x i16> %t0, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>1300 ret <8 x i16> %t11301}1302define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_6(<8 x i16> %a0) {1303; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_6:1304; X86-SSE2: # %bb.0:1305; X86-SSE2-NEXT: psrlw $6, %xmm01306; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01307; X86-SSE2-NEXT: retl1308;1309; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_6:1310; X86-AVX: # %bb.0:1311; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm01312; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01313; X86-AVX-NEXT: retl1314;1315; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_6:1316; X64-SSE2: # %bb.0:1317; X64-SSE2-NEXT: psrlw $6, %xmm01318; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01319; X64-SSE2-NEXT: retq1320;1321; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_6:1322; X64-AVX: # %bb.0:1323; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm01324; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01325; X64-AVX-NEXT: retq1326 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1327 %t1 = ashr <8 x i16> %t0, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>1328 ret <8 x i16> %t11329}1330 1331define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_1(<8 x i16> %a0) {1332; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_1:1333; X86-SSE2: # %bb.0:1334; X86-SSE2-NEXT: psraw $1, %xmm01335; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01336; X86-SSE2-NEXT: retl1337;1338; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_1:1339; X86-AVX: # %bb.0:1340; X86-AVX-NEXT: vpsraw $1, %xmm0, %xmm01341; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01342; X86-AVX-NEXT: retl1343;1344; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_1:1345; X64-SSE2: # %bb.0:1346; X64-SSE2-NEXT: psraw $1, %xmm01347; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01348; X64-SSE2-NEXT: retq1349;1350; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_1:1351; X64-AVX: # %bb.0:1352; X64-AVX-NEXT: vpsraw $1, %xmm0, %xmm01353; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01354; X64-AVX-NEXT: retq1355 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1356 %t1 = ashr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1357 ret <8 x i16> %t11358}1359define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_8(<8 x i16> %a0) {1360; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_8:1361; X86-SSE2: # %bb.0:1362; X86-SSE2-NEXT: psraw $8, %xmm01363; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01364; X86-SSE2-NEXT: retl1365;1366; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_8:1367; X86-AVX: # %bb.0:1368; X86-AVX-NEXT: vpsraw $8, %xmm0, %xmm01369; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01370; X86-AVX-NEXT: retl1371;1372; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_8:1373; X64-SSE2: # %bb.0:1374; X64-SSE2-NEXT: psraw $8, %xmm01375; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01376; X64-SSE2-NEXT: retq1377;1378; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_8:1379; X64-AVX: # %bb.0:1380; X64-AVX-NEXT: vpsraw $8, %xmm0, %xmm01381; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01382; X64-AVX-NEXT: retq1383 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1384 %t1 = ashr <8 x i16> %t0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>1385 ret <8 x i16> %t11386}1387define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_9(<8 x i16> %a0) {1388; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_9:1389; X86-SSE2: # %bb.0:1390; X86-SSE2-NEXT: psraw $9, %xmm01391; X86-SSE2-NEXT: retl1392;1393; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_9:1394; X86-AVX: # %bb.0:1395; X86-AVX-NEXT: vpsraw $9, %xmm0, %xmm01396; X86-AVX-NEXT: retl1397;1398; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_9:1399; X64-SSE2: # %bb.0:1400; X64-SSE2-NEXT: psraw $9, %xmm01401; X64-SSE2-NEXT: retq1402;1403; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_9:1404; X64-AVX: # %bb.0:1405; X64-AVX-NEXT: vpsraw $9, %xmm0, %xmm01406; X64-AVX-NEXT: retq1407 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1408 %t1 = ashr <8 x i16> %t0, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>1409 ret <8 x i16> %t11410}1411define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_10(<8 x i16> %a0) {1412; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_10:1413; X86-SSE2: # %bb.0:1414; X86-SSE2-NEXT: psraw $10, %xmm01415; X86-SSE2-NEXT: retl1416;1417; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_10:1418; X86-AVX: # %bb.0:1419; X86-AVX-NEXT: vpsraw $10, %xmm0, %xmm01420; X86-AVX-NEXT: retl1421;1422; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_10:1423; X64-SSE2: # %bb.0:1424; X64-SSE2-NEXT: psraw $10, %xmm01425; X64-SSE2-NEXT: retq1426;1427; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_10:1428; X64-AVX: # %bb.0:1429; X64-AVX-NEXT: vpsraw $10, %xmm0, %xmm01430; X64-AVX-NEXT: retq1431 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1432 %t1 = ashr <8 x i16> %t0, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>1433 ret <8 x i16> %t11434}1435 1436; shl1437 1438define <8 x i16> @test_128_i16_x_8_127_mask_shl_1(<8 x i16> %a0) {1439; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_1:1440; X86-SSE2: # %bb.0:1441; X86-SSE2-NEXT: paddw %xmm0, %xmm01442; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01443; X86-SSE2-NEXT: retl1444;1445; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_1:1446; X86-AVX: # %bb.0:1447; X86-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm01448; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01449; X86-AVX-NEXT: retl1450;1451; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_1:1452; X64-SSE2: # %bb.0:1453; X64-SSE2-NEXT: paddw %xmm0, %xmm01454; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01455; X64-SSE2-NEXT: retq1456;1457; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_1:1458; X64-AVX: # %bb.0:1459; X64-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm01460; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01461; X64-AVX-NEXT: retq1462 %t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>1463 %t1 = shl <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1464 ret <8 x i16> %t11465}1466define <8 x i16> @test_128_i16_x_8_127_mask_shl_8(<8 x i16> %a0) {1467; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_8:1468; X86-SSE2: # %bb.0:1469; X86-SSE2-NEXT: psllw $8, %xmm01470; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01471; X86-SSE2-NEXT: retl1472;1473; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_8:1474; X86-AVX: # %bb.0:1475; X86-AVX-NEXT: vpsllw $8, %xmm0, %xmm01476; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01477; X86-AVX-NEXT: retl1478;1479; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_8:1480; X64-SSE2: # %bb.0:1481; X64-SSE2-NEXT: psllw $8, %xmm01482; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01483; X64-SSE2-NEXT: retq1484;1485; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_8:1486; X64-AVX: # %bb.0:1487; X64-AVX-NEXT: vpsllw $8, %xmm0, %xmm01488; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01489; X64-AVX-NEXT: retq1490 %t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>1491 %t1 = shl <8 x i16> %t0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>1492 ret <8 x i16> %t11493}1494define <8 x i16> @test_128_i16_x_8_127_mask_shl_9(<8 x i16> %a0) {1495; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_9:1496; X86-SSE2: # %bb.0:1497; X86-SSE2-NEXT: psllw $9, %xmm01498; X86-SSE2-NEXT: retl1499;1500; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_9:1501; X86-AVX: # %bb.0:1502; X86-AVX-NEXT: vpsllw $9, %xmm0, %xmm01503; X86-AVX-NEXT: retl1504;1505; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_9:1506; X64-SSE2: # %bb.0:1507; X64-SSE2-NEXT: psllw $9, %xmm01508; X64-SSE2-NEXT: retq1509;1510; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_9:1511; X64-AVX: # %bb.0:1512; X64-AVX-NEXT: vpsllw $9, %xmm0, %xmm01513; X64-AVX-NEXT: retq1514 %t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>1515 %t1 = shl <8 x i16> %t0, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>1516 ret <8 x i16> %t11517}1518define <8 x i16> @test_128_i16_x_8_127_mask_shl_10(<8 x i16> %a0) {1519; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_10:1520; X86-SSE2: # %bb.0:1521; X86-SSE2-NEXT: psllw $10, %xmm01522; X86-SSE2-NEXT: retl1523;1524; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_10:1525; X86-AVX: # %bb.0:1526; X86-AVX-NEXT: vpsllw $10, %xmm0, %xmm01527; X86-AVX-NEXT: retl1528;1529; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_10:1530; X64-SSE2: # %bb.0:1531; X64-SSE2-NEXT: psllw $10, %xmm01532; X64-SSE2-NEXT: retq1533;1534; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_10:1535; X64-AVX: # %bb.0:1536; X64-AVX-NEXT: vpsllw $10, %xmm0, %xmm01537; X64-AVX-NEXT: retq1538 %t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>1539 %t1 = shl <8 x i16> %t0, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>1540 ret <8 x i16> %t11541}1542 1543define <8 x i16> @test_128_i16_x_8_2032_mask_shl_3(<8 x i16> %a0) {1544; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_3:1545; X86-SSE2: # %bb.0:1546; X86-SSE2-NEXT: psllw $3, %xmm01547; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01548; X86-SSE2-NEXT: retl1549;1550; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_3:1551; X86-AVX: # %bb.0:1552; X86-AVX-NEXT: vpsllw $3, %xmm0, %xmm01553; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01554; X86-AVX-NEXT: retl1555;1556; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_3:1557; X64-SSE2: # %bb.0:1558; X64-SSE2-NEXT: psllw $3, %xmm01559; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01560; X64-SSE2-NEXT: retq1561;1562; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_3:1563; X64-AVX: # %bb.0:1564; X64-AVX-NEXT: vpsllw $3, %xmm0, %xmm01565; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01566; X64-AVX-NEXT: retq1567 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1568 %t1 = shl <8 x i16> %t0, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>1569 ret <8 x i16> %t11570}1571define <8 x i16> @test_128_i16_x_8_2032_mask_shl_4(<8 x i16> %a0) {1572; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_4:1573; X86-SSE2: # %bb.0:1574; X86-SSE2-NEXT: psllw $4, %xmm01575; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01576; X86-SSE2-NEXT: retl1577;1578; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_4:1579; X86-AVX: # %bb.0:1580; X86-AVX-NEXT: vpsllw $4, %xmm0, %xmm01581; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01582; X86-AVX-NEXT: retl1583;1584; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_4:1585; X64-SSE2: # %bb.0:1586; X64-SSE2-NEXT: psllw $4, %xmm01587; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01588; X64-SSE2-NEXT: retq1589;1590; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_4:1591; X64-AVX: # %bb.0:1592; X64-AVX-NEXT: vpsllw $4, %xmm0, %xmm01593; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01594; X64-AVX-NEXT: retq1595 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1596 %t1 = shl <8 x i16> %t0, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>1597 ret <8 x i16> %t11598}1599define <8 x i16> @test_128_i16_x_8_2032_mask_shl_5(<8 x i16> %a0) {1600; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_5:1601; X86-SSE2: # %bb.0:1602; X86-SSE2-NEXT: psllw $5, %xmm01603; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01604; X86-SSE2-NEXT: retl1605;1606; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_5:1607; X86-AVX: # %bb.0:1608; X86-AVX-NEXT: vpsllw $5, %xmm0, %xmm01609; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01610; X86-AVX-NEXT: retl1611;1612; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_5:1613; X64-SSE2: # %bb.0:1614; X64-SSE2-NEXT: psllw $5, %xmm01615; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01616; X64-SSE2-NEXT: retq1617;1618; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_5:1619; X64-AVX: # %bb.0:1620; X64-AVX-NEXT: vpsllw $5, %xmm0, %xmm01621; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01622; X64-AVX-NEXT: retq1623 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1624 %t1 = shl <8 x i16> %t0, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>1625 ret <8 x i16> %t11626}1627define <8 x i16> @test_128_i16_x_8_2032_mask_shl_6(<8 x i16> %a0) {1628; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_6:1629; X86-SSE2: # %bb.0:1630; X86-SSE2-NEXT: psllw $6, %xmm01631; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01632; X86-SSE2-NEXT: retl1633;1634; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_6:1635; X86-AVX: # %bb.0:1636; X86-AVX-NEXT: vpsllw $6, %xmm0, %xmm01637; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01638; X86-AVX-NEXT: retl1639;1640; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_6:1641; X64-SSE2: # %bb.0:1642; X64-SSE2-NEXT: psllw $6, %xmm01643; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01644; X64-SSE2-NEXT: retq1645;1646; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_6:1647; X64-AVX: # %bb.0:1648; X64-AVX-NEXT: vpsllw $6, %xmm0, %xmm01649; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01650; X64-AVX-NEXT: retq1651 %t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>1652 %t1 = shl <8 x i16> %t0, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>1653 ret <8 x i16> %t11654}1655 1656define <8 x i16> @test_128_i16_x_8_65024_mask_shl_1(<8 x i16> %a0) {1657; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_shl_1:1658; X86-SSE2: # %bb.0:1659; X86-SSE2-NEXT: paddw %xmm0, %xmm01660; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01661; X86-SSE2-NEXT: retl1662;1663; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_shl_1:1664; X86-AVX: # %bb.0:1665; X86-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm01666; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01667; X86-AVX-NEXT: retl1668;1669; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_shl_1:1670; X64-SSE2: # %bb.0:1671; X64-SSE2-NEXT: paddw %xmm0, %xmm01672; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01673; X64-SSE2-NEXT: retq1674;1675; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_shl_1:1676; X64-AVX: # %bb.0:1677; X64-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm01678; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01679; X64-AVX-NEXT: retq1680 %t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>1681 %t1 = shl <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1682 ret <8 x i16> %t11683}1684 1685;------------------------------------------------------------------------------;1686; 128-bit vector; 32-bit elements = 4 elements1687;------------------------------------------------------------------------------;1688 1689; lshr1690 1691define <4 x i32> @test_128_i32_x_4_32767_mask_lshr_1(<4 x i32> %a0) {1692; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:1693; X86-SSE2: # %bb.0:1694; X86-SSE2-NEXT: psrld $1, %xmm01695; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01696; X86-SSE2-NEXT: retl1697;1698; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_lshr_1:1699; X86-AVX1: # %bb.0:1700; X86-AVX1-NEXT: vpsrld $1, %xmm0, %xmm01701; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01702; X86-AVX1-NEXT: retl1703;1704; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:1705; X86-AVX2: # %bb.0:1706; X86-AVX2-NEXT: vpsrld $1, %xmm0, %xmm01707; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]1708; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01709; X86-AVX2-NEXT: retl1710;1711; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:1712; X64-SSE2: # %bb.0:1713; X64-SSE2-NEXT: psrld $1, %xmm01714; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01715; X64-SSE2-NEXT: retq1716;1717; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_lshr_1:1718; X64-AVX1: # %bb.0:1719; X64-AVX1-NEXT: vpsrld $1, %xmm0, %xmm01720; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01721; X64-AVX1-NEXT: retq1722;1723; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:1724; X64-AVX2: # %bb.0:1725; X64-AVX2-NEXT: vpsrld $1, %xmm0, %xmm01726; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]1727; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01728; X64-AVX2-NEXT: retq1729 %t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>1730 %t1 = lshr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>1731 ret <4 x i32> %t11732}1733 1734define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_7(<4 x i32> %a0) {1735; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:1736; X86-SSE2: # %bb.0:1737; X86-SSE2-NEXT: psrld $7, %xmm01738; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01739; X86-SSE2-NEXT: retl1740;1741; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:1742; X86-AVX1: # %bb.0:1743; X86-AVX1-NEXT: vpsrld $7, %xmm0, %xmm01744; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01745; X86-AVX1-NEXT: retl1746;1747; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:1748; X86-AVX2: # %bb.0:1749; X86-AVX2-NEXT: vpsrld $7, %xmm0, %xmm01750; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]1751; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01752; X86-AVX2-NEXT: retl1753;1754; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:1755; X64-SSE2: # %bb.0:1756; X64-SSE2-NEXT: psrld $7, %xmm01757; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01758; X64-SSE2-NEXT: retq1759;1760; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:1761; X64-AVX1: # %bb.0:1762; X64-AVX1-NEXT: vpsrld $7, %xmm0, %xmm01763; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01764; X64-AVX1-NEXT: retq1765;1766; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:1767; X64-AVX2: # %bb.0:1768; X64-AVX2-NEXT: vpsrld $7, %xmm0, %xmm01769; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]1770; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01771; X64-AVX2-NEXT: retq1772 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>1773 %t1 = lshr <4 x i32> %t0, <i32 7, i32 7, i32 7, i32 7>1774 ret <4 x i32> %t11775}1776define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_8(<4 x i32> %a0) {1777; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:1778; X86-SSE2: # %bb.0:1779; X86-SSE2-NEXT: psrld $8, %xmm01780; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01781; X86-SSE2-NEXT: retl1782;1783; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:1784; X86-AVX1: # %bb.0:1785; X86-AVX1-NEXT: vpsrld $8, %xmm0, %xmm01786; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01787; X86-AVX1-NEXT: retl1788;1789; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:1790; X86-AVX2: # %bb.0:1791; X86-AVX2-NEXT: vpsrld $8, %xmm0, %xmm01792; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]1793; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01794; X86-AVX2-NEXT: retl1795;1796; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:1797; X64-SSE2: # %bb.0:1798; X64-SSE2-NEXT: psrld $8, %xmm01799; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01800; X64-SSE2-NEXT: retq1801;1802; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:1803; X64-AVX1: # %bb.0:1804; X64-AVX1-NEXT: vpsrld $8, %xmm0, %xmm01805; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01806; X64-AVX1-NEXT: retq1807;1808; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:1809; X64-AVX2: # %bb.0:1810; X64-AVX2-NEXT: vpsrld $8, %xmm0, %xmm01811; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]1812; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01813; X64-AVX2-NEXT: retq1814 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>1815 %t1 = lshr <4 x i32> %t0, <i32 8, i32 8, i32 8, i32 8>1816 ret <4 x i32> %t11817}1818define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_9(<4 x i32> %a0) {1819; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:1820; X86-SSE2: # %bb.0:1821; X86-SSE2-NEXT: psrld $9, %xmm01822; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01823; X86-SSE2-NEXT: retl1824;1825; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:1826; X86-AVX1: # %bb.0:1827; X86-AVX1-NEXT: vpsrld $9, %xmm0, %xmm01828; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01829; X86-AVX1-NEXT: retl1830;1831; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:1832; X86-AVX2: # %bb.0:1833; X86-AVX2-NEXT: vpsrld $9, %xmm0, %xmm01834; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]1835; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01836; X86-AVX2-NEXT: retl1837;1838; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:1839; X64-SSE2: # %bb.0:1840; X64-SSE2-NEXT: psrld $9, %xmm01841; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01842; X64-SSE2-NEXT: retq1843;1844; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:1845; X64-AVX1: # %bb.0:1846; X64-AVX1-NEXT: vpsrld $9, %xmm0, %xmm01847; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01848; X64-AVX1-NEXT: retq1849;1850; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:1851; X64-AVX2: # %bb.0:1852; X64-AVX2-NEXT: vpsrld $9, %xmm0, %xmm01853; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]1854; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01855; X64-AVX2-NEXT: retq1856 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>1857 %t1 = lshr <4 x i32> %t0, <i32 9, i32 9, i32 9, i32 9>1858 ret <4 x i32> %t11859}1860define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_10(<4 x i32> %a0) {1861; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:1862; X86-SSE2: # %bb.0:1863; X86-SSE2-NEXT: psrld $10, %xmm01864; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01865; X86-SSE2-NEXT: retl1866;1867; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:1868; X86-AVX1: # %bb.0:1869; X86-AVX1-NEXT: vpsrld $10, %xmm0, %xmm01870; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01871; X86-AVX1-NEXT: retl1872;1873; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:1874; X86-AVX2: # %bb.0:1875; X86-AVX2-NEXT: vpsrld $10, %xmm0, %xmm01876; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8191,8191,8191,8191]1877; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01878; X86-AVX2-NEXT: retl1879;1880; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:1881; X64-SSE2: # %bb.0:1882; X64-SSE2-NEXT: psrld $10, %xmm01883; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01884; X64-SSE2-NEXT: retq1885;1886; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:1887; X64-AVX1: # %bb.0:1888; X64-AVX1-NEXT: vpsrld $10, %xmm0, %xmm01889; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01890; X64-AVX1-NEXT: retq1891;1892; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:1893; X64-AVX2: # %bb.0:1894; X64-AVX2-NEXT: vpsrld $10, %xmm0, %xmm01895; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8191,8191,8191,8191]1896; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01897; X64-AVX2-NEXT: retq1898 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>1899 %t1 = lshr <4 x i32> %t0, <i32 10, i32 10, i32 10, i32 10>1900 ret <4 x i32> %t11901}1902 1903define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_1(<4 x i32> %a0) {1904; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:1905; X86-SSE2: # %bb.0:1906; X86-SSE2-NEXT: psrld $1, %xmm01907; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01908; X86-SSE2-NEXT: retl1909;1910; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:1911; X86-AVX1: # %bb.0:1912; X86-AVX1-NEXT: vpsrld $1, %xmm0, %xmm01913; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01914; X86-AVX1-NEXT: retl1915;1916; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:1917; X86-AVX2: # %bb.0:1918; X86-AVX2-NEXT: vpsrld $1, %xmm0, %xmm01919; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147418112,2147418112,2147418112,2147418112]1920; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01921; X86-AVX2-NEXT: retl1922;1923; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:1924; X64-SSE2: # %bb.0:1925; X64-SSE2-NEXT: psrld $1, %xmm01926; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01927; X64-SSE2-NEXT: retq1928;1929; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:1930; X64-AVX1: # %bb.0:1931; X64-AVX1-NEXT: vpsrld $1, %xmm0, %xmm01932; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01933; X64-AVX1-NEXT: retq1934;1935; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:1936; X64-AVX2: # %bb.0:1937; X64-AVX2-NEXT: vpsrld $1, %xmm0, %xmm01938; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147418112,2147418112,2147418112,2147418112]1939; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01940; X64-AVX2-NEXT: retq1941 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>1942 %t1 = lshr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>1943 ret <4 x i32> %t11944}1945define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_16(<4 x i32> %a0) {1946; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:1947; X86-SSE2: # %bb.0:1948; X86-SSE2-NEXT: psrld $16, %xmm01949; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm01950; X86-SSE2-NEXT: retl1951;1952; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:1953; X86-AVX1: # %bb.0:1954; X86-AVX1-NEXT: vpsrld $16, %xmm0, %xmm01955; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm01956; X86-AVX1-NEXT: retl1957;1958; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:1959; X86-AVX2: # %bb.0:1960; X86-AVX2-NEXT: vpsrld $16, %xmm0, %xmm01961; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]1962; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01963; X86-AVX2-NEXT: retl1964;1965; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:1966; X64-SSE2: # %bb.0:1967; X64-SSE2-NEXT: psrld $16, %xmm01968; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01969; X64-SSE2-NEXT: retq1970;1971; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:1972; X64-AVX1: # %bb.0:1973; X64-AVX1-NEXT: vpsrld $16, %xmm0, %xmm01974; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01975; X64-AVX1-NEXT: retq1976;1977; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:1978; X64-AVX2: # %bb.0:1979; X64-AVX2-NEXT: vpsrld $16, %xmm0, %xmm01980; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]1981; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm01982; X64-AVX2-NEXT: retq1983 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>1984 %t1 = lshr <4 x i32> %t0, <i32 16, i32 16, i32 16, i32 16>1985 ret <4 x i32> %t11986}1987define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_17(<4 x i32> %a0) {1988; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:1989; X86-SSE2: # %bb.0:1990; X86-SSE2-NEXT: psrld $17, %xmm01991; X86-SSE2-NEXT: retl1992;1993; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:1994; X86-AVX: # %bb.0:1995; X86-AVX-NEXT: vpsrld $17, %xmm0, %xmm01996; X86-AVX-NEXT: retl1997;1998; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:1999; X64-SSE2: # %bb.0:2000; X64-SSE2-NEXT: psrld $17, %xmm02001; X64-SSE2-NEXT: retq2002;2003; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:2004; X64-AVX: # %bb.0:2005; X64-AVX-NEXT: vpsrld $17, %xmm0, %xmm02006; X64-AVX-NEXT: retq2007 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2008 %t1 = lshr <4 x i32> %t0, <i32 17, i32 17, i32 17, i32 17>2009 ret <4 x i32> %t12010}2011define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_18(<4 x i32> %a0) {2012; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:2013; X86-SSE2: # %bb.0:2014; X86-SSE2-NEXT: psrld $18, %xmm02015; X86-SSE2-NEXT: retl2016;2017; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:2018; X86-AVX: # %bb.0:2019; X86-AVX-NEXT: vpsrld $18, %xmm0, %xmm02020; X86-AVX-NEXT: retl2021;2022; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:2023; X64-SSE2: # %bb.0:2024; X64-SSE2-NEXT: psrld $18, %xmm02025; X64-SSE2-NEXT: retq2026;2027; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:2028; X64-AVX: # %bb.0:2029; X64-AVX-NEXT: vpsrld $18, %xmm0, %xmm02030; X64-AVX-NEXT: retq2031 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2032 %t1 = lshr <4 x i32> %t0, <i32 18, i32 18, i32 18, i32 18>2033 ret <4 x i32> %t12034}2035 2036; ashr2037 2038define <4 x i32> @test_128_i32_x_4_32767_mask_ashr_1(<4 x i32> %a0) {2039; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:2040; X86-SSE2: # %bb.0:2041; X86-SSE2-NEXT: psrld $1, %xmm02042; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02043; X86-SSE2-NEXT: retl2044;2045; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_ashr_1:2046; X86-AVX1: # %bb.0:2047; X86-AVX1-NEXT: vpsrld $1, %xmm0, %xmm02048; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02049; X86-AVX1-NEXT: retl2050;2051; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:2052; X86-AVX2: # %bb.0:2053; X86-AVX2-NEXT: vpsrld $1, %xmm0, %xmm02054; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]2055; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02056; X86-AVX2-NEXT: retl2057;2058; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:2059; X64-SSE2: # %bb.0:2060; X64-SSE2-NEXT: psrld $1, %xmm02061; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02062; X64-SSE2-NEXT: retq2063;2064; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_ashr_1:2065; X64-AVX1: # %bb.0:2066; X64-AVX1-NEXT: vpsrld $1, %xmm0, %xmm02067; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02068; X64-AVX1-NEXT: retq2069;2070; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:2071; X64-AVX2: # %bb.0:2072; X64-AVX2-NEXT: vpsrld $1, %xmm0, %xmm02073; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]2074; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02075; X64-AVX2-NEXT: retq2076 %t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>2077 %t1 = ashr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>2078 ret <4 x i32> %t12079}2080 2081define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_7(<4 x i32> %a0) {2082; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:2083; X86-SSE2: # %bb.0:2084; X86-SSE2-NEXT: psrld $7, %xmm02085; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02086; X86-SSE2-NEXT: retl2087;2088; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:2089; X86-AVX1: # %bb.0:2090; X86-AVX1-NEXT: vpsrld $7, %xmm0, %xmm02091; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02092; X86-AVX1-NEXT: retl2093;2094; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:2095; X86-AVX2: # %bb.0:2096; X86-AVX2-NEXT: vpsrld $7, %xmm0, %xmm02097; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]2098; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02099; X86-AVX2-NEXT: retl2100;2101; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:2102; X64-SSE2: # %bb.0:2103; X64-SSE2-NEXT: psrld $7, %xmm02104; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02105; X64-SSE2-NEXT: retq2106;2107; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:2108; X64-AVX1: # %bb.0:2109; X64-AVX1-NEXT: vpsrld $7, %xmm0, %xmm02110; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02111; X64-AVX1-NEXT: retq2112;2113; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:2114; X64-AVX2: # %bb.0:2115; X64-AVX2-NEXT: vpsrld $7, %xmm0, %xmm02116; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]2117; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02118; X64-AVX2-NEXT: retq2119 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2120 %t1 = ashr <4 x i32> %t0, <i32 7, i32 7, i32 7, i32 7>2121 ret <4 x i32> %t12122}2123define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_8(<4 x i32> %a0) {2124; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:2125; X86-SSE2: # %bb.0:2126; X86-SSE2-NEXT: psrld $8, %xmm02127; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02128; X86-SSE2-NEXT: retl2129;2130; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:2131; X86-AVX1: # %bb.0:2132; X86-AVX1-NEXT: vpsrld $8, %xmm0, %xmm02133; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02134; X86-AVX1-NEXT: retl2135;2136; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:2137; X86-AVX2: # %bb.0:2138; X86-AVX2-NEXT: vpsrld $8, %xmm0, %xmm02139; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]2140; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02141; X86-AVX2-NEXT: retl2142;2143; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:2144; X64-SSE2: # %bb.0:2145; X64-SSE2-NEXT: psrld $8, %xmm02146; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02147; X64-SSE2-NEXT: retq2148;2149; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:2150; X64-AVX1: # %bb.0:2151; X64-AVX1-NEXT: vpsrld $8, %xmm0, %xmm02152; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02153; X64-AVX1-NEXT: retq2154;2155; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:2156; X64-AVX2: # %bb.0:2157; X64-AVX2-NEXT: vpsrld $8, %xmm0, %xmm02158; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]2159; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02160; X64-AVX2-NEXT: retq2161 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2162 %t1 = ashr <4 x i32> %t0, <i32 8, i32 8, i32 8, i32 8>2163 ret <4 x i32> %t12164}2165define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_9(<4 x i32> %a0) {2166; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:2167; X86-SSE2: # %bb.0:2168; X86-SSE2-NEXT: psrld $9, %xmm02169; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02170; X86-SSE2-NEXT: retl2171;2172; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:2173; X86-AVX1: # %bb.0:2174; X86-AVX1-NEXT: vpsrld $9, %xmm0, %xmm02175; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02176; X86-AVX1-NEXT: retl2177;2178; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:2179; X86-AVX2: # %bb.0:2180; X86-AVX2-NEXT: vpsrld $9, %xmm0, %xmm02181; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]2182; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02183; X86-AVX2-NEXT: retl2184;2185; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:2186; X64-SSE2: # %bb.0:2187; X64-SSE2-NEXT: psrld $9, %xmm02188; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02189; X64-SSE2-NEXT: retq2190;2191; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:2192; X64-AVX1: # %bb.0:2193; X64-AVX1-NEXT: vpsrld $9, %xmm0, %xmm02194; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02195; X64-AVX1-NEXT: retq2196;2197; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:2198; X64-AVX2: # %bb.0:2199; X64-AVX2-NEXT: vpsrld $9, %xmm0, %xmm02200; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16383,16383,16383,16383]2201; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02202; X64-AVX2-NEXT: retq2203 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2204 %t1 = ashr <4 x i32> %t0, <i32 9, i32 9, i32 9, i32 9>2205 ret <4 x i32> %t12206}2207define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_10(<4 x i32> %a0) {2208; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:2209; X86-SSE2: # %bb.0:2210; X86-SSE2-NEXT: psrld $10, %xmm02211; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02212; X86-SSE2-NEXT: retl2213;2214; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:2215; X86-AVX1: # %bb.0:2216; X86-AVX1-NEXT: vpsrld $10, %xmm0, %xmm02217; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02218; X86-AVX1-NEXT: retl2219;2220; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:2221; X86-AVX2: # %bb.0:2222; X86-AVX2-NEXT: vpsrld $10, %xmm0, %xmm02223; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8191,8191,8191,8191]2224; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02225; X86-AVX2-NEXT: retl2226;2227; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:2228; X64-SSE2: # %bb.0:2229; X64-SSE2-NEXT: psrld $10, %xmm02230; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02231; X64-SSE2-NEXT: retq2232;2233; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:2234; X64-AVX1: # %bb.0:2235; X64-AVX1-NEXT: vpsrld $10, %xmm0, %xmm02236; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02237; X64-AVX1-NEXT: retq2238;2239; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:2240; X64-AVX2: # %bb.0:2241; X64-AVX2-NEXT: vpsrld $10, %xmm0, %xmm02242; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8191,8191,8191,8191]2243; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02244; X64-AVX2-NEXT: retq2245 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2246 %t1 = ashr <4 x i32> %t0, <i32 10, i32 10, i32 10, i32 10>2247 ret <4 x i32> %t12248}2249 2250define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_1(<4 x i32> %a0) {2251; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:2252; X86-SSE2: # %bb.0:2253; X86-SSE2-NEXT: psrad $1, %xmm02254; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02255; X86-SSE2-NEXT: retl2256;2257; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:2258; X86-AVX: # %bb.0:2259; X86-AVX-NEXT: vpsrad $1, %xmm0, %xmm02260; X86-AVX-NEXT: vpxor %xmm1, %xmm1, %xmm12261; X86-AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3],xmm1[4],xmm0[5],xmm1[6],xmm0[7]2262; X86-AVX-NEXT: retl2263;2264; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:2265; X64-SSE2: # %bb.0:2266; X64-SSE2-NEXT: psrad $1, %xmm02267; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02268; X64-SSE2-NEXT: retq2269;2270; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:2271; X64-AVX: # %bb.0:2272; X64-AVX-NEXT: vpsrad $1, %xmm0, %xmm02273; X64-AVX-NEXT: vpxor %xmm1, %xmm1, %xmm12274; X64-AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3],xmm1[4],xmm0[5],xmm1[6],xmm0[7]2275; X64-AVX-NEXT: retq2276 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2277 %t1 = ashr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>2278 ret <4 x i32> %t12279}2280define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_16(<4 x i32> %a0) {2281; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:2282; X86-SSE2: # %bb.0:2283; X86-SSE2-NEXT: psrad $16, %xmm02284; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02285; X86-SSE2-NEXT: retl2286;2287; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:2288; X86-AVX1: # %bb.0:2289; X86-AVX1-NEXT: vpsrad $16, %xmm0, %xmm02290; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02291; X86-AVX1-NEXT: retl2292;2293; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:2294; X86-AVX2: # %bb.0:2295; X86-AVX2-NEXT: vpsrad $16, %xmm0, %xmm02296; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]2297; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02298; X86-AVX2-NEXT: retl2299;2300; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:2301; X64-SSE2: # %bb.0:2302; X64-SSE2-NEXT: psrad $16, %xmm02303; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02304; X64-SSE2-NEXT: retq2305;2306; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:2307; X64-AVX1: # %bb.0:2308; X64-AVX1-NEXT: vpsrad $16, %xmm0, %xmm02309; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02310; X64-AVX1-NEXT: retq2311;2312; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:2313; X64-AVX2: # %bb.0:2314; X64-AVX2-NEXT: vpsrad $16, %xmm0, %xmm02315; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]2316; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02317; X64-AVX2-NEXT: retq2318 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2319 %t1 = ashr <4 x i32> %t0, <i32 16, i32 16, i32 16, i32 16>2320 ret <4 x i32> %t12321}2322define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_17(<4 x i32> %a0) {2323; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:2324; X86-SSE2: # %bb.0:2325; X86-SSE2-NEXT: psrad $17, %xmm02326; X86-SSE2-NEXT: retl2327;2328; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:2329; X86-AVX: # %bb.0:2330; X86-AVX-NEXT: vpsrad $17, %xmm0, %xmm02331; X86-AVX-NEXT: retl2332;2333; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:2334; X64-SSE2: # %bb.0:2335; X64-SSE2-NEXT: psrad $17, %xmm02336; X64-SSE2-NEXT: retq2337;2338; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:2339; X64-AVX: # %bb.0:2340; X64-AVX-NEXT: vpsrad $17, %xmm0, %xmm02341; X64-AVX-NEXT: retq2342 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2343 %t1 = ashr <4 x i32> %t0, <i32 17, i32 17, i32 17, i32 17>2344 ret <4 x i32> %t12345}2346define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_18(<4 x i32> %a0) {2347; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:2348; X86-SSE2: # %bb.0:2349; X86-SSE2-NEXT: psrad $18, %xmm02350; X86-SSE2-NEXT: retl2351;2352; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:2353; X86-AVX: # %bb.0:2354; X86-AVX-NEXT: vpsrad $18, %xmm0, %xmm02355; X86-AVX-NEXT: retl2356;2357; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:2358; X64-SSE2: # %bb.0:2359; X64-SSE2-NEXT: psrad $18, %xmm02360; X64-SSE2-NEXT: retq2361;2362; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:2363; X64-AVX: # %bb.0:2364; X64-AVX-NEXT: vpsrad $18, %xmm0, %xmm02365; X64-AVX-NEXT: retq2366 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2367 %t1 = ashr <4 x i32> %t0, <i32 18, i32 18, i32 18, i32 18>2368 ret <4 x i32> %t12369}2370 2371; shl2372 2373define <4 x i32> @test_128_i32_x_4_32767_mask_shl_1(<4 x i32> %a0) {2374; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_1:2375; X86-SSE2: # %bb.0:2376; X86-SSE2-NEXT: paddd %xmm0, %xmm02377; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02378; X86-SSE2-NEXT: retl2379;2380; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_1:2381; X86-AVX1: # %bb.0:2382; X86-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm02383; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02384; X86-AVX1-NEXT: retl2385;2386; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_1:2387; X86-AVX2: # %bb.0:2388; X86-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm02389; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]2390; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02391; X86-AVX2-NEXT: retl2392;2393; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_1:2394; X64-SSE2: # %bb.0:2395; X64-SSE2-NEXT: paddd %xmm0, %xmm02396; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02397; X64-SSE2-NEXT: retq2398;2399; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_1:2400; X64-AVX1: # %bb.0:2401; X64-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm02402; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02403; X64-AVX1-NEXT: retq2404;2405; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_1:2406; X64-AVX2: # %bb.0:2407; X64-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm02408; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65534,65534,65534,65534]2409; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02410; X64-AVX2-NEXT: retq2411 %t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>2412 %t1 = shl <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>2413 ret <4 x i32> %t12414}2415define <4 x i32> @test_128_i32_x_4_32767_mask_shl_16(<4 x i32> %a0) {2416; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_16:2417; X86-SSE2: # %bb.0:2418; X86-SSE2-NEXT: pslld $16, %xmm02419; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02420; X86-SSE2-NEXT: retl2421;2422; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_16:2423; X86-AVX1: # %bb.0:2424; X86-AVX1-NEXT: vpslld $16, %xmm0, %xmm02425; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02426; X86-AVX1-NEXT: retl2427;2428; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_16:2429; X86-AVX2: # %bb.0:2430; X86-AVX2-NEXT: vpslld $16, %xmm0, %xmm02431; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147418112,2147418112,2147418112,2147418112]2432; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02433; X86-AVX2-NEXT: retl2434;2435; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_16:2436; X64-SSE2: # %bb.0:2437; X64-SSE2-NEXT: pslld $16, %xmm02438; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02439; X64-SSE2-NEXT: retq2440;2441; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_16:2442; X64-AVX1: # %bb.0:2443; X64-AVX1-NEXT: vpslld $16, %xmm0, %xmm02444; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02445; X64-AVX1-NEXT: retq2446;2447; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_16:2448; X64-AVX2: # %bb.0:2449; X64-AVX2-NEXT: vpslld $16, %xmm0, %xmm02450; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147418112,2147418112,2147418112,2147418112]2451; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02452; X64-AVX2-NEXT: retq2453 %t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>2454 %t1 = shl <4 x i32> %t0, <i32 16, i32 16, i32 16, i32 16>2455 ret <4 x i32> %t12456}2457define <4 x i32> @test_128_i32_x_4_32767_mask_shl_17(<4 x i32> %a0) {2458; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_17:2459; X86-SSE2: # %bb.0:2460; X86-SSE2-NEXT: pslld $17, %xmm02461; X86-SSE2-NEXT: retl2462;2463; X86-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_17:2464; X86-AVX: # %bb.0:2465; X86-AVX-NEXT: vpslld $17, %xmm0, %xmm02466; X86-AVX-NEXT: retl2467;2468; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_17:2469; X64-SSE2: # %bb.0:2470; X64-SSE2-NEXT: pslld $17, %xmm02471; X64-SSE2-NEXT: retq2472;2473; X64-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_17:2474; X64-AVX: # %bb.0:2475; X64-AVX-NEXT: vpslld $17, %xmm0, %xmm02476; X64-AVX-NEXT: retq2477 %t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>2478 %t1 = shl <4 x i32> %t0, <i32 17, i32 17, i32 17, i32 17>2479 ret <4 x i32> %t12480}2481define <4 x i32> @test_128_i32_x_4_32767_mask_shl_18(<4 x i32> %a0) {2482; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_18:2483; X86-SSE2: # %bb.0:2484; X86-SSE2-NEXT: pslld $18, %xmm02485; X86-SSE2-NEXT: retl2486;2487; X86-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_18:2488; X86-AVX: # %bb.0:2489; X86-AVX-NEXT: vpslld $18, %xmm0, %xmm02490; X86-AVX-NEXT: retl2491;2492; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_18:2493; X64-SSE2: # %bb.0:2494; X64-SSE2-NEXT: pslld $18, %xmm02495; X64-SSE2-NEXT: retq2496;2497; X64-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_18:2498; X64-AVX: # %bb.0:2499; X64-AVX-NEXT: vpslld $18, %xmm0, %xmm02500; X64-AVX-NEXT: retq2501 %t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>2502 %t1 = shl <4 x i32> %t0, <i32 18, i32 18, i32 18, i32 18>2503 ret <4 x i32> %t12504}2505 2506define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_7(<4 x i32> %a0) {2507; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:2508; X86-SSE2: # %bb.0:2509; X86-SSE2-NEXT: pslld $7, %xmm02510; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02511; X86-SSE2-NEXT: retl2512;2513; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_7:2514; X86-AVX1: # %bb.0:2515; X86-AVX1-NEXT: vpslld $7, %xmm0, %xmm02516; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02517; X86-AVX1-NEXT: retl2518;2519; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:2520; X86-AVX2: # %bb.0:2521; X86-AVX2-NEXT: vpslld $7, %xmm0, %xmm02522; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1073709056,1073709056,1073709056,1073709056]2523; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02524; X86-AVX2-NEXT: retl2525;2526; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:2527; X64-SSE2: # %bb.0:2528; X64-SSE2-NEXT: pslld $7, %xmm02529; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02530; X64-SSE2-NEXT: retq2531;2532; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_7:2533; X64-AVX1: # %bb.0:2534; X64-AVX1-NEXT: vpslld $7, %xmm0, %xmm02535; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02536; X64-AVX1-NEXT: retq2537;2538; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:2539; X64-AVX2: # %bb.0:2540; X64-AVX2-NEXT: vpslld $7, %xmm0, %xmm02541; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1073709056,1073709056,1073709056,1073709056]2542; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02543; X64-AVX2-NEXT: retq2544 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2545 %t1 = shl <4 x i32> %t0, <i32 7, i32 7, i32 7, i32 7>2546 ret <4 x i32> %t12547}2548define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_8(<4 x i32> %a0) {2549; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:2550; X86-SSE2: # %bb.0:2551; X86-SSE2-NEXT: pslld $8, %xmm02552; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02553; X86-SSE2-NEXT: retl2554;2555; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_8:2556; X86-AVX1: # %bb.0:2557; X86-AVX1-NEXT: vpslld $8, %xmm0, %xmm02558; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02559; X86-AVX1-NEXT: retl2560;2561; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:2562; X86-AVX2: # %bb.0:2563; X86-AVX2-NEXT: vpslld $8, %xmm0, %xmm02564; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147418112,2147418112,2147418112,2147418112]2565; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02566; X86-AVX2-NEXT: retl2567;2568; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:2569; X64-SSE2: # %bb.0:2570; X64-SSE2-NEXT: pslld $8, %xmm02571; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02572; X64-SSE2-NEXT: retq2573;2574; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_8:2575; X64-AVX1: # %bb.0:2576; X64-AVX1-NEXT: vpslld $8, %xmm0, %xmm02577; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02578; X64-AVX1-NEXT: retq2579;2580; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:2581; X64-AVX2: # %bb.0:2582; X64-AVX2-NEXT: vpslld $8, %xmm0, %xmm02583; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147418112,2147418112,2147418112,2147418112]2584; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02585; X64-AVX2-NEXT: retq2586 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2587 %t1 = shl <4 x i32> %t0, <i32 8, i32 8, i32 8, i32 8>2588 ret <4 x i32> %t12589}2590define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_9(<4 x i32> %a0) {2591; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:2592; X86-SSE2: # %bb.0:2593; X86-SSE2-NEXT: pslld $9, %xmm02594; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02595; X86-SSE2-NEXT: retl2596;2597; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_9:2598; X86-AVX1: # %bb.0:2599; X86-AVX1-NEXT: vpslld $9, %xmm0, %xmm02600; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02601; X86-AVX1-NEXT: retl2602;2603; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:2604; X86-AVX2: # %bb.0:2605; X86-AVX2-NEXT: vpslld $9, %xmm0, %xmm02606; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]2607; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02608; X86-AVX2-NEXT: retl2609;2610; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:2611; X64-SSE2: # %bb.0:2612; X64-SSE2-NEXT: pslld $9, %xmm02613; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02614; X64-SSE2-NEXT: retq2615;2616; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_9:2617; X64-AVX1: # %bb.0:2618; X64-AVX1-NEXT: vpslld $9, %xmm0, %xmm02619; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02620; X64-AVX1-NEXT: retq2621;2622; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:2623; X64-AVX2: # %bb.0:2624; X64-AVX2-NEXT: vpslld $9, %xmm0, %xmm02625; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]2626; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02627; X64-AVX2-NEXT: retq2628 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2629 %t1 = shl <4 x i32> %t0, <i32 9, i32 9, i32 9, i32 9>2630 ret <4 x i32> %t12631}2632define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_10(<4 x i32> %a0) {2633; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:2634; X86-SSE2: # %bb.0:2635; X86-SSE2-NEXT: pslld $10, %xmm02636; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02637; X86-SSE2-NEXT: retl2638;2639; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_10:2640; X86-AVX1: # %bb.0:2641; X86-AVX1-NEXT: vpslld $10, %xmm0, %xmm02642; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02643; X86-AVX1-NEXT: retl2644;2645; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:2646; X86-AVX2: # %bb.0:2647; X86-AVX2-NEXT: vpslld $10, %xmm0, %xmm02648; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294705152,4294705152,4294705152,4294705152]2649; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02650; X86-AVX2-NEXT: retl2651;2652; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:2653; X64-SSE2: # %bb.0:2654; X64-SSE2-NEXT: pslld $10, %xmm02655; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02656; X64-SSE2-NEXT: retq2657;2658; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_10:2659; X64-AVX1: # %bb.0:2660; X64-AVX1-NEXT: vpslld $10, %xmm0, %xmm02661; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02662; X64-AVX1-NEXT: retq2663;2664; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:2665; X64-AVX2: # %bb.0:2666; X64-AVX2-NEXT: vpslld $10, %xmm0, %xmm02667; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294705152,4294705152,4294705152,4294705152]2668; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02669; X64-AVX2-NEXT: retq2670 %t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>2671 %t1 = shl <4 x i32> %t0, <i32 10, i32 10, i32 10, i32 10>2672 ret <4 x i32> %t12673}2674 2675define <4 x i32> @test_128_i32_x_4_4294836224_mask_shl_1(<4 x i32> %a0) {2676; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:2677; X86-SSE2: # %bb.0:2678; X86-SSE2-NEXT: paddd %xmm0, %xmm02679; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02680; X86-SSE2-NEXT: retl2681;2682; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:2683; X86-AVX1: # %bb.0:2684; X86-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm02685; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02686; X86-AVX1-NEXT: retl2687;2688; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:2689; X86-AVX2: # %bb.0:2690; X86-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm02691; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294705152,4294705152,4294705152,4294705152]2692; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02693; X86-AVX2-NEXT: retl2694;2695; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:2696; X64-SSE2: # %bb.0:2697; X64-SSE2-NEXT: paddd %xmm0, %xmm02698; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02699; X64-SSE2-NEXT: retq2700;2701; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:2702; X64-AVX1: # %bb.0:2703; X64-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm02704; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02705; X64-AVX1-NEXT: retq2706;2707; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:2708; X64-AVX2: # %bb.0:2709; X64-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm02710; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294705152,4294705152,4294705152,4294705152]2711; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm02712; X64-AVX2-NEXT: retq2713 %t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>2714 %t1 = shl <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>2715 ret <4 x i32> %t12716}2717 2718;------------------------------------------------------------------------------;2719; 128-bit vector; 64-bit elements = 2 elements2720;------------------------------------------------------------------------------;2721 2722; lshr2723 2724define <2 x i64> @test_128_i64_x_2_2147483647_mask_lshr_1(<2 x i64> %a0) {2725; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:2726; X86-SSE2: # %bb.0:2727; X86-SSE2-NEXT: psrlq $1, %xmm02728; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02729; X86-SSE2-NEXT: retl2730;2731; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:2732; X86-AVX: # %bb.0:2733; X86-AVX-NEXT: vpsrlq $1, %xmm0, %xmm02734; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02735; X86-AVX-NEXT: retl2736;2737; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:2738; X64-SSE2: # %bb.0:2739; X64-SSE2-NEXT: psrlq $1, %xmm02740; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02741; X64-SSE2-NEXT: retq2742;2743; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:2744; X64-AVX: # %bb.0:2745; X64-AVX-NEXT: vpsrlq $1, %xmm0, %xmm02746; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02747; X64-AVX-NEXT: retq2748 %t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>2749 %t1 = lshr <2 x i64> %t0, <i64 1, i64 1>2750 ret <2 x i64> %t12751}2752 2753define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_15(<2 x i64> %a0) {2754; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:2755; X86-SSE2: # %bb.0:2756; X86-SSE2-NEXT: psrlq $15, %xmm02757; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02758; X86-SSE2-NEXT: retl2759;2760; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:2761; X86-AVX: # %bb.0:2762; X86-AVX-NEXT: vpsrlq $15, %xmm0, %xmm02763; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02764; X86-AVX-NEXT: retl2765;2766; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:2767; X64-SSE2: # %bb.0:2768; X64-SSE2-NEXT: psrlq $15, %xmm02769; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02770; X64-SSE2-NEXT: retq2771;2772; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:2773; X64-AVX: # %bb.0:2774; X64-AVX-NEXT: vpsrlq $15, %xmm0, %xmm02775; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02776; X64-AVX-NEXT: retq2777 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>2778 %t1 = lshr <2 x i64> %t0, <i64 15, i64 15>2779 ret <2 x i64> %t12780}2781define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_16(<2 x i64> %a0) {2782; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:2783; X86-SSE2: # %bb.0:2784; X86-SSE2-NEXT: psrlq $16, %xmm02785; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02786; X86-SSE2-NEXT: retl2787;2788; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:2789; X86-AVX: # %bb.0:2790; X86-AVX-NEXT: vpsrlq $16, %xmm0, %xmm02791; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02792; X86-AVX-NEXT: retl2793;2794; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:2795; X64-SSE2: # %bb.0:2796; X64-SSE2-NEXT: psrlq $16, %xmm02797; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02798; X64-SSE2-NEXT: retq2799;2800; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:2801; X64-AVX: # %bb.0:2802; X64-AVX-NEXT: vpsrlq $16, %xmm0, %xmm02803; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02804; X64-AVX-NEXT: retq2805 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>2806 %t1 = lshr <2 x i64> %t0, <i64 16, i64 16>2807 ret <2 x i64> %t12808}2809define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_17(<2 x i64> %a0) {2810; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:2811; X86-SSE2: # %bb.0:2812; X86-SSE2-NEXT: psrlq $17, %xmm02813; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02814; X86-SSE2-NEXT: retl2815;2816; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:2817; X86-AVX: # %bb.0:2818; X86-AVX-NEXT: vpsrlq $17, %xmm0, %xmm02819; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02820; X86-AVX-NEXT: retl2821;2822; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:2823; X64-SSE2: # %bb.0:2824; X64-SSE2-NEXT: psrlq $17, %xmm02825; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02826; X64-SSE2-NEXT: retq2827;2828; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:2829; X64-AVX: # %bb.0:2830; X64-AVX-NEXT: vpsrlq $17, %xmm0, %xmm02831; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02832; X64-AVX-NEXT: retq2833 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>2834 %t1 = lshr <2 x i64> %t0, <i64 17, i64 17>2835 ret <2 x i64> %t12836}2837define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_18(<2 x i64> %a0) {2838; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:2839; X86-SSE2: # %bb.0:2840; X86-SSE2-NEXT: psrlq $18, %xmm02841; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02842; X86-SSE2-NEXT: retl2843;2844; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:2845; X86-AVX: # %bb.0:2846; X86-AVX-NEXT: vpsrlq $18, %xmm0, %xmm02847; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02848; X86-AVX-NEXT: retl2849;2850; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:2851; X64-SSE2: # %bb.0:2852; X64-SSE2-NEXT: psrlq $18, %xmm02853; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02854; X64-SSE2-NEXT: retq2855;2856; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:2857; X64-AVX: # %bb.0:2858; X64-AVX-NEXT: vpsrlq $18, %xmm0, %xmm02859; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02860; X64-AVX-NEXT: retq2861 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>2862 %t1 = lshr <2 x i64> %t0, <i64 18, i64 18>2863 ret <2 x i64> %t12864}2865 2866define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_1(<2 x i64> %a0) {2867; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:2868; X86-SSE2: # %bb.0:2869; X86-SSE2-NEXT: psrlq $1, %xmm02870; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02871; X86-SSE2-NEXT: retl2872;2873; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:2874; X86-AVX: # %bb.0:2875; X86-AVX-NEXT: vpsrlq $1, %xmm0, %xmm02876; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02877; X86-AVX-NEXT: retl2878;2879; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:2880; X64-SSE2: # %bb.0:2881; X64-SSE2-NEXT: psrlq $1, %xmm02882; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02883; X64-SSE2-NEXT: retq2884;2885; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:2886; X64-AVX: # %bb.0:2887; X64-AVX-NEXT: vpsrlq $1, %xmm0, %xmm02888; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02889; X64-AVX-NEXT: retq2890 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>2891 %t1 = lshr <2 x i64> %t0, <i64 1, i64 1>2892 ret <2 x i64> %t12893}2894define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_32(<2 x i64> %a0) {2895; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:2896; X86-SSE2: # %bb.0:2897; X86-SSE2-NEXT: psrlq $32, %xmm02898; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02899; X86-SSE2-NEXT: retl2900;2901; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:2902; X86-AVX: # %bb.0:2903; X86-AVX-NEXT: vpsrlq $32, %xmm0, %xmm02904; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02905; X86-AVX-NEXT: retl2906;2907; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:2908; X64-SSE2: # %bb.0:2909; X64-SSE2-NEXT: psrlq $32, %xmm02910; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02911; X64-SSE2-NEXT: retq2912;2913; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:2914; X64-AVX: # %bb.0:2915; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm02916; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02917; X64-AVX-NEXT: retq2918 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>2919 %t1 = lshr <2 x i64> %t0, <i64 32, i64 32>2920 ret <2 x i64> %t12921}2922define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_33(<2 x i64> %a0) {2923; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:2924; X86-SSE2: # %bb.0:2925; X86-SSE2-NEXT: psrlq $33, %xmm02926; X86-SSE2-NEXT: retl2927;2928; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:2929; X86-AVX: # %bb.0:2930; X86-AVX-NEXT: vpsrlq $33, %xmm0, %xmm02931; X86-AVX-NEXT: retl2932;2933; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:2934; X64-SSE2: # %bb.0:2935; X64-SSE2-NEXT: psrlq $33, %xmm02936; X64-SSE2-NEXT: retq2937;2938; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:2939; X64-AVX: # %bb.0:2940; X64-AVX-NEXT: vpsrlq $33, %xmm0, %xmm02941; X64-AVX-NEXT: retq2942 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>2943 %t1 = lshr <2 x i64> %t0, <i64 33, i64 33>2944 ret <2 x i64> %t12945}2946define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_34(<2 x i64> %a0) {2947; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:2948; X86-SSE2: # %bb.0:2949; X86-SSE2-NEXT: psrlq $34, %xmm02950; X86-SSE2-NEXT: retl2951;2952; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:2953; X86-AVX: # %bb.0:2954; X86-AVX-NEXT: vpsrlq $34, %xmm0, %xmm02955; X86-AVX-NEXT: retl2956;2957; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:2958; X64-SSE2: # %bb.0:2959; X64-SSE2-NEXT: psrlq $34, %xmm02960; X64-SSE2-NEXT: retq2961;2962; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:2963; X64-AVX: # %bb.0:2964; X64-AVX-NEXT: vpsrlq $34, %xmm0, %xmm02965; X64-AVX-NEXT: retq2966 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>2967 %t1 = lshr <2 x i64> %t0, <i64 34, i64 34>2968 ret <2 x i64> %t12969}2970 2971; ashr2972 2973define <2 x i64> @test_128_i64_x_2_2147483647_mask_ashr_1(<2 x i64> %a0) {2974; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:2975; X86-SSE2: # %bb.0:2976; X86-SSE2-NEXT: psrlq $1, %xmm02977; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm02978; X86-SSE2-NEXT: retl2979;2980; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:2981; X86-AVX: # %bb.0:2982; X86-AVX-NEXT: vpsrlq $1, %xmm0, %xmm02983; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm02984; X86-AVX-NEXT: retl2985;2986; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:2987; X64-SSE2: # %bb.0:2988; X64-SSE2-NEXT: psrlq $1, %xmm02989; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm02990; X64-SSE2-NEXT: retq2991;2992; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:2993; X64-AVX: # %bb.0:2994; X64-AVX-NEXT: vpsrlq $1, %xmm0, %xmm02995; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm02996; X64-AVX-NEXT: retq2997 %t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>2998 %t1 = ashr <2 x i64> %t0, <i64 1, i64 1>2999 ret <2 x i64> %t13000}3001 3002define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_15(<2 x i64> %a0) {3003; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:3004; X86-SSE2: # %bb.0:3005; X86-SSE2-NEXT: psrlq $15, %xmm03006; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03007; X86-SSE2-NEXT: retl3008;3009; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:3010; X86-AVX: # %bb.0:3011; X86-AVX-NEXT: vpsrlq $15, %xmm0, %xmm03012; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03013; X86-AVX-NEXT: retl3014;3015; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:3016; X64-SSE2: # %bb.0:3017; X64-SSE2-NEXT: psrlq $15, %xmm03018; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03019; X64-SSE2-NEXT: retq3020;3021; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:3022; X64-AVX: # %bb.0:3023; X64-AVX-NEXT: vpsrlq $15, %xmm0, %xmm03024; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03025; X64-AVX-NEXT: retq3026 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3027 %t1 = ashr <2 x i64> %t0, <i64 15, i64 15>3028 ret <2 x i64> %t13029}3030define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_16(<2 x i64> %a0) {3031; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:3032; X86-SSE2: # %bb.0:3033; X86-SSE2-NEXT: psrlq $16, %xmm03034; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03035; X86-SSE2-NEXT: retl3036;3037; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:3038; X86-AVX: # %bb.0:3039; X86-AVX-NEXT: vpsrlq $16, %xmm0, %xmm03040; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03041; X86-AVX-NEXT: retl3042;3043; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:3044; X64-SSE2: # %bb.0:3045; X64-SSE2-NEXT: psrlq $16, %xmm03046; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03047; X64-SSE2-NEXT: retq3048;3049; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:3050; X64-AVX: # %bb.0:3051; X64-AVX-NEXT: vpsrlq $16, %xmm0, %xmm03052; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03053; X64-AVX-NEXT: retq3054 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3055 %t1 = ashr <2 x i64> %t0, <i64 16, i64 16>3056 ret <2 x i64> %t13057}3058define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_17(<2 x i64> %a0) {3059; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:3060; X86-SSE2: # %bb.0:3061; X86-SSE2-NEXT: psrlq $17, %xmm03062; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03063; X86-SSE2-NEXT: retl3064;3065; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:3066; X86-AVX: # %bb.0:3067; X86-AVX-NEXT: vpsrlq $17, %xmm0, %xmm03068; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03069; X86-AVX-NEXT: retl3070;3071; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:3072; X64-SSE2: # %bb.0:3073; X64-SSE2-NEXT: psrlq $17, %xmm03074; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03075; X64-SSE2-NEXT: retq3076;3077; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:3078; X64-AVX: # %bb.0:3079; X64-AVX-NEXT: vpsrlq $17, %xmm0, %xmm03080; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03081; X64-AVX-NEXT: retq3082 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3083 %t1 = ashr <2 x i64> %t0, <i64 17, i64 17>3084 ret <2 x i64> %t13085}3086define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_18(<2 x i64> %a0) {3087; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:3088; X86-SSE2: # %bb.0:3089; X86-SSE2-NEXT: psrlq $18, %xmm03090; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03091; X86-SSE2-NEXT: retl3092;3093; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:3094; X86-AVX: # %bb.0:3095; X86-AVX-NEXT: vpsrlq $18, %xmm0, %xmm03096; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03097; X86-AVX-NEXT: retl3098;3099; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:3100; X64-SSE2: # %bb.0:3101; X64-SSE2-NEXT: psrlq $18, %xmm03102; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03103; X64-SSE2-NEXT: retq3104;3105; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:3106; X64-AVX: # %bb.0:3107; X64-AVX-NEXT: vpsrlq $18, %xmm0, %xmm03108; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03109; X64-AVX-NEXT: retq3110 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3111 %t1 = ashr <2 x i64> %t0, <i64 18, i64 18>3112 ret <2 x i64> %t13113}3114 3115define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_1(<2 x i64> %a0) {3116; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:3117; X86-SSE2: # %bb.0:3118; X86-SSE2-NEXT: psrad $1, %xmm03119; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03120; X86-SSE2-NEXT: retl3121;3122; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:3123; X86-AVX1: # %bb.0:3124; X86-AVX1-NEXT: vpsrad $1, %xmm0, %xmm03125; X86-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm13126; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]3127; X86-AVX1-NEXT: retl3128;3129; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:3130; X86-AVX2: # %bb.0:3131; X86-AVX2-NEXT: vpsrad $1, %xmm0, %xmm03132; X86-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm13133; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]3134; X86-AVX2-NEXT: retl3135;3136; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:3137; X64-SSE2: # %bb.0:3138; X64-SSE2-NEXT: psrad $1, %xmm03139; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03140; X64-SSE2-NEXT: retq3141;3142; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:3143; X64-AVX1: # %bb.0:3144; X64-AVX1-NEXT: vpsrad $1, %xmm0, %xmm03145; X64-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm13146; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]3147; X64-AVX1-NEXT: retq3148;3149; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:3150; X64-AVX2: # %bb.0:3151; X64-AVX2-NEXT: vpsrad $1, %xmm0, %xmm03152; X64-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm13153; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]3154; X64-AVX2-NEXT: retq3155 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>3156 %t1 = ashr <2 x i64> %t0, <i64 1, i64 1>3157 ret <2 x i64> %t13158}3159define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_32(<2 x i64> %a0) {3160; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:3161; X86-SSE2: # %bb.0:3162; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03163; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]3164; X86-SSE2-NEXT: movdqa %xmm0, %xmm13165; X86-SSE2-NEXT: psrad $31, %xmm13166; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]3167; X86-SSE2-NEXT: retl3168;3169; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:3170; X86-AVX1: # %bb.0:3171; X86-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03172; X86-AVX1-NEXT: vpsrad $31, %xmm0, %xmm13173; X86-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3174; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]3175; X86-AVX1-NEXT: retl3176;3177; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:3178; X86-AVX2: # %bb.0:3179; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]3180; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm13181; X86-AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]3182; X86-AVX2-NEXT: vpsrad $31, %xmm0, %xmm03183; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]3184; X86-AVX2-NEXT: retl3185;3186; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:3187; X64-SSE2: # %bb.0:3188; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03189; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]3190; X64-SSE2-NEXT: movdqa %xmm0, %xmm13191; X64-SSE2-NEXT: psrad $31, %xmm13192; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]3193; X64-SSE2-NEXT: retq3194;3195; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:3196; X64-AVX1: # %bb.0:3197; X64-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03198; X64-AVX1-NEXT: vpsrad $31, %xmm0, %xmm13199; X64-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3200; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]3201; X64-AVX1-NEXT: retq3202;3203; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:3204; X64-AVX2: # %bb.0:3205; X64-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03206; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm13207; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3208; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]3209; X64-AVX2-NEXT: retq3210 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>3211 %t1 = ashr <2 x i64> %t0, <i64 32, i64 32>3212 ret <2 x i64> %t13213}3214define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_33(<2 x i64> %a0) {3215; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:3216; X86-SSE2: # %bb.0:3217; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]3218; X86-SSE2-NEXT: movdqa %xmm0, %xmm13219; X86-SSE2-NEXT: psrad $31, %xmm13220; X86-SSE2-NEXT: psrad $1, %xmm03221; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]3222; X86-SSE2-NEXT: retl3223;3224; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:3225; X86-AVX1: # %bb.0:3226; X86-AVX1-NEXT: vpsrad $31, %xmm0, %xmm13227; X86-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3228; X86-AVX1-NEXT: vpsrad $1, %xmm0, %xmm03229; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]3230; X86-AVX1-NEXT: retl3231;3232; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:3233; X86-AVX2: # %bb.0:3234; X86-AVX2-NEXT: vpsrad $31, %xmm0, %xmm13235; X86-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3236; X86-AVX2-NEXT: vpsrad $1, %xmm0, %xmm03237; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]3238; X86-AVX2-NEXT: retl3239;3240; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:3241; X64-SSE2: # %bb.0:3242; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]3243; X64-SSE2-NEXT: movdqa %xmm0, %xmm13244; X64-SSE2-NEXT: psrad $31, %xmm13245; X64-SSE2-NEXT: psrad $1, %xmm03246; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]3247; X64-SSE2-NEXT: retq3248;3249; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:3250; X64-AVX1: # %bb.0:3251; X64-AVX1-NEXT: vpsrad $31, %xmm0, %xmm13252; X64-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3253; X64-AVX1-NEXT: vpsrad $1, %xmm0, %xmm03254; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]3255; X64-AVX1-NEXT: retq3256;3257; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:3258; X64-AVX2: # %bb.0:3259; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm13260; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3261; X64-AVX2-NEXT: vpsrad $1, %xmm0, %xmm03262; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]3263; X64-AVX2-NEXT: retq3264 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>3265 %t1 = ashr <2 x i64> %t0, <i64 33, i64 33>3266 ret <2 x i64> %t13267}3268define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_34(<2 x i64> %a0) {3269; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:3270; X86-SSE2: # %bb.0:3271; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]3272; X86-SSE2-NEXT: movdqa %xmm0, %xmm13273; X86-SSE2-NEXT: psrad $31, %xmm13274; X86-SSE2-NEXT: psrad $2, %xmm03275; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]3276; X86-SSE2-NEXT: retl3277;3278; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:3279; X86-AVX1: # %bb.0:3280; X86-AVX1-NEXT: vpsrad $31, %xmm0, %xmm13281; X86-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3282; X86-AVX1-NEXT: vpsrad $2, %xmm0, %xmm03283; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]3284; X86-AVX1-NEXT: retl3285;3286; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:3287; X86-AVX2: # %bb.0:3288; X86-AVX2-NEXT: vpsrad $31, %xmm0, %xmm13289; X86-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3290; X86-AVX2-NEXT: vpsrad $2, %xmm0, %xmm03291; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]3292; X86-AVX2-NEXT: retl3293;3294; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:3295; X64-SSE2: # %bb.0:3296; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]3297; X64-SSE2-NEXT: movdqa %xmm0, %xmm13298; X64-SSE2-NEXT: psrad $31, %xmm13299; X64-SSE2-NEXT: psrad $2, %xmm03300; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]3301; X64-SSE2-NEXT: retq3302;3303; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:3304; X64-AVX1: # %bb.0:3305; X64-AVX1-NEXT: vpsrad $31, %xmm0, %xmm13306; X64-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3307; X64-AVX1-NEXT: vpsrad $2, %xmm0, %xmm03308; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]3309; X64-AVX1-NEXT: retq3310;3311; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:3312; X64-AVX2: # %bb.0:3313; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm13314; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]3315; X64-AVX2-NEXT: vpsrad $2, %xmm0, %xmm03316; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]3317; X64-AVX2-NEXT: retq3318 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>3319 %t1 = ashr <2 x i64> %t0, <i64 34, i64 34>3320 ret <2 x i64> %t13321}3322 3323; shl3324 3325define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_1(<2 x i64> %a0) {3326; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:3327; X86-SSE2: # %bb.0:3328; X86-SSE2-NEXT: paddq %xmm0, %xmm03329; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03330; X86-SSE2-NEXT: retl3331;3332; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:3333; X86-AVX: # %bb.0:3334; X86-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm03335; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03336; X86-AVX-NEXT: retl3337;3338; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:3339; X64-SSE2: # %bb.0:3340; X64-SSE2-NEXT: paddq %xmm0, %xmm03341; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03342; X64-SSE2-NEXT: retq3343;3344; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:3345; X64-AVX: # %bb.0:3346; X64-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm03347; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03348; X64-AVX-NEXT: retq3349 %t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>3350 %t1 = shl <2 x i64> %t0, <i64 1, i64 1>3351 ret <2 x i64> %t13352}3353define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_32(<2 x i64> %a0) {3354; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:3355; X86-SSE2: # %bb.0:3356; X86-SSE2-NEXT: psllq $32, %xmm03357; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03358; X86-SSE2-NEXT: retl3359;3360; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:3361; X86-AVX: # %bb.0:3362; X86-AVX-NEXT: vpsllq $32, %xmm0, %xmm03363; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03364; X86-AVX-NEXT: retl3365;3366; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:3367; X64-SSE2: # %bb.0:3368; X64-SSE2-NEXT: psllq $32, %xmm03369; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03370; X64-SSE2-NEXT: retq3371;3372; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:3373; X64-AVX: # %bb.0:3374; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm03375; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03376; X64-AVX-NEXT: retq3377 %t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>3378 %t1 = shl <2 x i64> %t0, <i64 32, i64 32>3379 ret <2 x i64> %t13380}3381define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_33(<2 x i64> %a0) {3382; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:3383; X86-SSE2: # %bb.0:3384; X86-SSE2-NEXT: psllq $33, %xmm03385; X86-SSE2-NEXT: retl3386;3387; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:3388; X86-AVX: # %bb.0:3389; X86-AVX-NEXT: vpsllq $33, %xmm0, %xmm03390; X86-AVX-NEXT: retl3391;3392; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:3393; X64-SSE2: # %bb.0:3394; X64-SSE2-NEXT: psllq $33, %xmm03395; X64-SSE2-NEXT: retq3396;3397; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:3398; X64-AVX: # %bb.0:3399; X64-AVX-NEXT: vpsllq $33, %xmm0, %xmm03400; X64-AVX-NEXT: retq3401 %t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>3402 %t1 = shl <2 x i64> %t0, <i64 33, i64 33>3403 ret <2 x i64> %t13404}3405define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_34(<2 x i64> %a0) {3406; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:3407; X86-SSE2: # %bb.0:3408; X86-SSE2-NEXT: psllq $34, %xmm03409; X86-SSE2-NEXT: retl3410;3411; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:3412; X86-AVX: # %bb.0:3413; X86-AVX-NEXT: vpsllq $34, %xmm0, %xmm03414; X86-AVX-NEXT: retl3415;3416; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:3417; X64-SSE2: # %bb.0:3418; X64-SSE2-NEXT: psllq $34, %xmm03419; X64-SSE2-NEXT: retq3420;3421; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:3422; X64-AVX: # %bb.0:3423; X64-AVX-NEXT: vpsllq $34, %xmm0, %xmm03424; X64-AVX-NEXT: retq3425 %t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>3426 %t1 = shl <2 x i64> %t0, <i64 34, i64 34>3427 ret <2 x i64> %t13428}3429 3430define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_15(<2 x i64> %a0) {3431; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:3432; X86-SSE2: # %bb.0:3433; X86-SSE2-NEXT: psllq $15, %xmm03434; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03435; X86-SSE2-NEXT: retl3436;3437; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:3438; X86-AVX: # %bb.0:3439; X86-AVX-NEXT: vpsllq $15, %xmm0, %xmm03440; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03441; X86-AVX-NEXT: retl3442;3443; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:3444; X64-SSE2: # %bb.0:3445; X64-SSE2-NEXT: psllq $15, %xmm03446; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03447; X64-SSE2-NEXT: retq3448;3449; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:3450; X64-AVX: # %bb.0:3451; X64-AVX-NEXT: vpsllq $15, %xmm0, %xmm03452; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03453; X64-AVX-NEXT: retq3454 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3455 %t1 = shl <2 x i64> %t0, <i64 15, i64 15>3456 ret <2 x i64> %t13457}3458define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_16(<2 x i64> %a0) {3459; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:3460; X86-SSE2: # %bb.0:3461; X86-SSE2-NEXT: psllq $16, %xmm03462; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03463; X86-SSE2-NEXT: retl3464;3465; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:3466; X86-AVX: # %bb.0:3467; X86-AVX-NEXT: vpsllq $16, %xmm0, %xmm03468; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03469; X86-AVX-NEXT: retl3470;3471; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:3472; X64-SSE2: # %bb.0:3473; X64-SSE2-NEXT: psllq $16, %xmm03474; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03475; X64-SSE2-NEXT: retq3476;3477; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:3478; X64-AVX: # %bb.0:3479; X64-AVX-NEXT: vpsllq $16, %xmm0, %xmm03480; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03481; X64-AVX-NEXT: retq3482 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3483 %t1 = shl <2 x i64> %t0, <i64 16, i64 16>3484 ret <2 x i64> %t13485}3486define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_17(<2 x i64> %a0) {3487; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:3488; X86-SSE2: # %bb.0:3489; X86-SSE2-NEXT: psllq $17, %xmm03490; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03491; X86-SSE2-NEXT: retl3492;3493; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:3494; X86-AVX: # %bb.0:3495; X86-AVX-NEXT: vpsllq $17, %xmm0, %xmm03496; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03497; X86-AVX-NEXT: retl3498;3499; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:3500; X64-SSE2: # %bb.0:3501; X64-SSE2-NEXT: psllq $17, %xmm03502; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03503; X64-SSE2-NEXT: retq3504;3505; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:3506; X64-AVX: # %bb.0:3507; X64-AVX-NEXT: vpsllq $17, %xmm0, %xmm03508; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03509; X64-AVX-NEXT: retq3510 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3511 %t1 = shl <2 x i64> %t0, <i64 17, i64 17>3512 ret <2 x i64> %t13513}3514define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_18(<2 x i64> %a0) {3515; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:3516; X86-SSE2: # %bb.0:3517; X86-SSE2-NEXT: psllq $18, %xmm03518; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03519; X86-SSE2-NEXT: retl3520;3521; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:3522; X86-AVX: # %bb.0:3523; X86-AVX-NEXT: vpsllq $18, %xmm0, %xmm03524; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03525; X86-AVX-NEXT: retl3526;3527; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:3528; X64-SSE2: # %bb.0:3529; X64-SSE2-NEXT: psllq $18, %xmm03530; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03531; X64-SSE2-NEXT: retq3532;3533; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:3534; X64-AVX: # %bb.0:3535; X64-AVX-NEXT: vpsllq $18, %xmm0, %xmm03536; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03537; X64-AVX-NEXT: retq3538 %t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>3539 %t1 = shl <2 x i64> %t0, <i64 18, i64 18>3540 ret <2 x i64> %t13541}3542 3543define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_shl_1(<2 x i64> %a0) {3544; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:3545; X86-SSE2: # %bb.0:3546; X86-SSE2-NEXT: paddq %xmm0, %xmm03547; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm03548; X86-SSE2-NEXT: retl3549;3550; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:3551; X86-AVX: # %bb.0:3552; X86-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm03553; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm03554; X86-AVX-NEXT: retl3555;3556; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:3557; X64-SSE2: # %bb.0:3558; X64-SSE2-NEXT: paddq %xmm0, %xmm03559; X64-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm03560; X64-SSE2-NEXT: retq3561;3562; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:3563; X64-AVX: # %bb.0:3564; X64-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm03565; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm03566; X64-AVX-NEXT: retq3567 %t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>3568 %t1 = shl <2 x i64> %t0, <i64 1, i64 1>3569 ret <2 x i64> %t13570}3571